blob: 511de38d20467d3e211cdd81f84d99f2338a85c7 [file] [log] [blame]
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +09001/*
2 * Renesas Technology Corp. R0P7785LC0011RL Support.
3 *
4 * Copyright (C) 2008 Yoshihiro Shimoda
Paul Mundta77b5ac2009-05-13 17:55:00 +09005 * Copyright (C) 2009 Paul Mundt
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +09006 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090011#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/sm501.h>
14#include <linux/sm501-regs.h>
15#include <linux/fb.h>
16#include <linux/mtd/physmap.h>
17#include <linux/delay.h>
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +000018#include <linux/interrupt.h>
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090019#include <linux/i2c.h>
20#include <linux/i2c-pca-platform.h>
21#include <linux/i2c-algo-pca.h>
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +000022#include <linux/usb/r8a66597.h>
Paul Mundt604437f2009-01-09 15:11:58 +090023#include <linux/irq.h>
Paul Mundta77b5ac2009-05-13 17:55:00 +090024#include <linux/clk.h>
25#include <linux/errno.h>
Paul Mundt7639a452008-10-20 13:02:48 +090026#include <mach/sh7785lcr.h>
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +000027#include <cpu/sh7785.h>
Paul Mundta77b5ac2009-05-13 17:55:00 +090028#include <asm/heartbeat.h>
29#include <asm/clock.h>
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090030
31/*
32 * NOTE: This board has 2 physical memory maps.
33 * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
34 */
Paul Mundta09d2832010-01-15 12:24:34 +090035static struct resource heartbeat_resource = {
36 .start = PLD_LEDCR,
37 .end = PLD_LEDCR,
38 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090039};
40
41static struct platform_device heartbeat_device = {
42 .name = "heartbeat",
43 .id = -1,
Paul Mundta09d2832010-01-15 12:24:34 +090044 .num_resources = 1,
45 .resource = &heartbeat_resource,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090046};
47
48static struct mtd_partition nor_flash_partitions[] = {
49 {
50 .name = "loader",
51 .offset = 0x00000000,
52 .size = 512 * 1024,
53 },
54 {
55 .name = "bootenv",
56 .offset = MTDPART_OFS_APPEND,
57 .size = 512 * 1024,
58 },
59 {
60 .name = "kernel",
61 .offset = MTDPART_OFS_APPEND,
62 .size = 4 * 1024 * 1024,
63 },
64 {
65 .name = "data",
66 .offset = MTDPART_OFS_APPEND,
67 .size = MTDPART_SIZ_FULL,
68 },
69};
70
71static struct physmap_flash_data nor_flash_data = {
72 .width = 4,
73 .parts = nor_flash_partitions,
74 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
75};
76
77static struct resource nor_flash_resources[] = {
78 [0] = {
79 .start = NOR_FLASH_ADDR,
80 .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
81 .flags = IORESOURCE_MEM,
82 }
83};
84
85static struct platform_device nor_flash_device = {
86 .name = "physmap-flash",
87 .dev = {
88 .platform_data = &nor_flash_data,
89 },
90 .num_resources = ARRAY_SIZE(nor_flash_resources),
91 .resource = nor_flash_resources,
92};
93
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +000094static struct r8a66597_platdata r8a66597_data = {
95 .xtal = R8A66597_PLATDATA_XTAL_12MHZ,
96 .vif = 1,
97};
98
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +090099static struct resource r8a66597_usb_host_resources[] = {
100 [0] = {
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900101 .start = R8A66597_ADDR,
102 .end = R8A66597_ADDR + R8A66597_SIZE - 1,
103 .flags = IORESOURCE_MEM,
104 },
105 [1] = {
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900106 .start = 2,
107 .end = 2,
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +0000108 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900109 },
110};
111
112static struct platform_device r8a66597_usb_host_device = {
113 .name = "r8a66597_hcd",
114 .id = -1,
115 .dev = {
116 .dma_mask = NULL,
117 .coherent_dma_mask = 0xffffffff,
Yoshihiro Shimoda5a62a222009-05-26 09:33:02 +0000118 .platform_data = &r8a66597_data,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900119 },
120 .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
121 .resource = r8a66597_usb_host_resources,
122};
123
124static struct resource sm501_resources[] = {
125 [0] = {
126 .start = SM107_MEM_ADDR,
127 .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
128 .flags = IORESOURCE_MEM,
129 },
130 [1] = {
131 .start = SM107_REG_ADDR,
132 .end = SM107_REG_ADDR + SM107_REG_SIZE - 1,
133 .flags = IORESOURCE_MEM,
134 },
135 [2] = {
136 .start = 10,
137 .flags = IORESOURCE_IRQ,
138 },
139};
140
141static struct fb_videomode sm501_default_mode_crt = {
142 .pixclock = 35714, /* 28MHz */
143 .xres = 640,
144 .yres = 480,
145 .left_margin = 105,
146 .right_margin = 16,
147 .upper_margin = 33,
148 .lower_margin = 10,
149 .hsync_len = 39,
150 .vsync_len = 2,
151 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
152};
153
154static struct fb_videomode sm501_default_mode_pnl = {
155 .pixclock = 40000, /* 25MHz */
156 .xres = 640,
157 .yres = 480,
158 .left_margin = 2,
159 .right_margin = 16,
160 .upper_margin = 33,
161 .lower_margin = 10,
162 .hsync_len = 39,
163 .vsync_len = 2,
164 .sync = 0,
165};
166
167static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
168 .def_bpp = 16,
169 .def_mode = &sm501_default_mode_pnl,
170 .flags = SM501FB_FLAG_USE_INIT_MODE |
171 SM501FB_FLAG_USE_HWCURSOR |
172 SM501FB_FLAG_USE_HWACCEL |
173 SM501FB_FLAG_DISABLE_AT_EXIT |
174 SM501FB_FLAG_PANEL_NO_VBIASEN,
175};
176
177static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
178 .def_bpp = 16,
179 .def_mode = &sm501_default_mode_crt,
180 .flags = SM501FB_FLAG_USE_INIT_MODE |
181 SM501FB_FLAG_USE_HWCURSOR |
182 SM501FB_FLAG_USE_HWACCEL |
183 SM501FB_FLAG_DISABLE_AT_EXIT,
184};
185
186static struct sm501_platdata_fb sm501_fb_pdata = {
187 .fb_route = SM501_FB_OWN,
188 .fb_crt = &sm501_pdata_fbsub_crt,
189 .fb_pnl = &sm501_pdata_fbsub_pnl,
190};
191
192static struct sm501_initdata sm501_initdata = {
193 .gpio_high = {
194 .set = 0x00001fe0,
195 .mask = 0x0,
196 },
197 .devices = 0,
198 .mclk = 84 * 1000000,
199 .m1xclk = 112 * 1000000,
200};
201
202static struct sm501_platdata sm501_platform_data = {
203 .init = &sm501_initdata,
204 .fb = &sm501_fb_pdata,
205};
206
207static struct platform_device sm501_device = {
208 .name = "sm501",
209 .id = -1,
210 .dev = {
211 .platform_data = &sm501_platform_data,
212 },
213 .num_resources = ARRAY_SIZE(sm501_resources),
214 .resource = sm501_resources,
215};
216
Yoshihiro Shimodae79d5742009-08-27 13:57:26 +0000217static struct resource i2c_proto_resources[] = {
218 [0] = {
219 .start = PCA9564_PROTO_32BIT_ADDR,
220 .end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
221 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
222 },
223 [1] = {
224 .start = 12,
225 .end = 12,
226 .flags = IORESOURCE_IRQ,
227 },
228};
229
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900230static struct resource i2c_resources[] = {
231 [0] = {
232 .start = PCA9564_ADDR,
233 .end = PCA9564_ADDR + PCA9564_SIZE - 1,
234 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
235 },
236 [1] = {
237 .start = 12,
238 .end = 12,
239 .flags = IORESOURCE_IRQ,
240 },
241};
242
243static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
244 .gpio = 0,
245 .i2c_clock_speed = I2C_PCA_CON_330kHz,
Wolfram Sang8e99ada2009-03-28 21:34:45 +0100246 .timeout = HZ,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900247};
248
249static struct platform_device i2c_device = {
250 .name = "i2c-pca-platform",
251 .id = -1,
252 .dev = {
253 .platform_data = &i2c_platform_data,
254 },
255 .num_resources = ARRAY_SIZE(i2c_resources),
256 .resource = i2c_resources,
257};
258
259static struct platform_device *sh7785lcr_devices[] __initdata = {
260 &heartbeat_device,
261 &nor_flash_device,
262 &r8a66597_usb_host_device,
263 &sm501_device,
264 &i2c_device,
265};
266
267static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
268 {
269 I2C_BOARD_INFO("r2025sd", 0x32),
270 },
271};
272
273static int __init sh7785lcr_devices_setup(void)
274{
275 i2c_register_board_info(0, sh7785lcr_i2c_devices,
276 ARRAY_SIZE(sh7785lcr_i2c_devices));
277
Yoshihiro Shimodae79d5742009-08-27 13:57:26 +0000278 if (mach_is_sh7785lcr_pt()) {
Paul Mundtd1af1192009-09-01 22:38:27 +0900279 i2c_device.resource = i2c_proto_resources;
Yoshihiro Shimodae79d5742009-08-27 13:57:26 +0000280 i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
281 }
282
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900283 return platform_add_devices(sh7785lcr_devices,
284 ARRAY_SIZE(sh7785lcr_devices));
285}
286__initcall(sh7785lcr_devices_setup);
287
288/* Initialize IRQ setting */
289void __init init_sh7785lcr_IRQ(void)
290{
291 plat_irq_setup_pins(IRQ_MODE_IRQ7654);
292 plat_irq_setup_pins(IRQ_MODE_IRQ3210);
293}
294
Paul Mundta77b5ac2009-05-13 17:55:00 +0900295static int sh7785lcr_clk_init(void)
296{
297 struct clk *clk;
298 int ret;
299
300 clk = clk_get(NULL, "extal");
301 if (!clk || IS_ERR(clk))
302 return PTR_ERR(clk);
303 ret = clk_set_rate(clk, 33333333);
304 clk_put(clk);
305
306 return ret;
307}
308
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900309static void sh7785lcr_power_off(void)
310{
Yoshihiro Shimodadf4d4f12009-03-10 15:50:44 +0900311 unsigned char *p;
312
313 p = ioremap(PLD_POFCR, PLD_POFCR + 1);
314 if (!p) {
315 printk(KERN_ERR "%s: ioremap error.\n", __func__);
316 return;
317 }
318 *p = 0x01;
319 iounmap(p);
Magnus Damm600fa572009-03-11 08:14:26 +0000320 set_bl_bit();
321 while (1)
322 cpu_relax();
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900323}
324
325/* Initialize the board */
326static void __init sh7785lcr_setup(char **cmdline_p)
327{
328 void __iomem *sm501_reg;
329
330 printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
331
332 pm_power_off = sh7785lcr_power_off;
333
334 /* sm501 DRAM configuration */
Matt Fleming6f82b6e2009-11-05 08:01:10 +0000335 sm501_reg = ioremap_fixed(SM107_REG_ADDR, SM501_DRAM_CONTROL,
336 PAGE_KERNEL);
337 if (!sm501_reg) {
338 printk(KERN_ERR "%s: ioremap error.\n", __func__);
339 return;
340 }
341
342 writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
343 iounmap_fixed(sm501_reg);
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900344}
345
Magnus Damm63d12e22009-05-28 12:00:25 +0000346/* Return the board specific boot mode pin configuration */
347static int sh7785lcr_mode_pins(void)
348{
349 int value = 0;
350
351 /* These are the factory default settings of S1 and S2.
352 * If you change these dip switches then you will need to
353 * adjust the values below as well.
354 */
Magnus Damm0d4fdbb2009-06-02 09:22:02 +0000355 value |= MODE_PIN4; /* Clock Mode 16 */
356 value |= MODE_PIN5; /* 32-bit Area0 bus width */
357 value |= MODE_PIN6; /* 32-bit Area0 bus width */
358 value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
359 value |= MODE_PIN8; /* Little Endian */
360 value |= MODE_PIN9; /* Master Mode */
361 value |= MODE_PIN14; /* No PLL step-up */
Magnus Damm63d12e22009-05-28 12:00:25 +0000362
363 return value;
364}
365
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900366/*
367 * The Machine Vector
368 */
369static struct sh_machine_vector mv_sh7785lcr __initmv = {
370 .mv_name = "SH7785LCR",
371 .mv_setup = sh7785lcr_setup,
Paul Mundta77b5ac2009-05-13 17:55:00 +0900372 .mv_clk_init = sh7785lcr_clk_init,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900373 .mv_init_irq = init_sh7785lcr_IRQ,
Magnus Damm63d12e22009-05-28 12:00:25 +0000374 .mv_mode_pins = sh7785lcr_mode_pins,
Yoshihiro Shimodacbe9da02008-07-16 20:21:09 +0900375};
376