| Sven Brandau | 2439ea1 | 2014-04-02 10:25:05 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Codec driver for ST STA350 2.1-channel high-efficiency digital audio system |
| 3 | * |
| 4 | * Copyright: 2011 Raumfeld GmbH |
| 5 | * Author: Sven Brandau <info@brandau.biz> |
| 6 | * |
| 7 | * based on code from: |
| 8 | * Raumfeld GmbH |
| 9 | * Johannes Stezenbach <js@sig21.net> |
| 10 | * Wolfson Microelectronics PLC. |
| 11 | * Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or modify it |
| 14 | * under the terms of the GNU General Public License as published by the |
| 15 | * Free Software Foundation; either version 2 of the License, or (at your |
| 16 | * option) any later version. |
| 17 | */ |
| 18 | #ifndef _ASOC_STA_350_H |
| 19 | #define _ASOC_STA_350_H |
| 20 | |
| 21 | /* STA50 register addresses */ |
| 22 | |
| 23 | #define STA350_REGISTER_COUNT 0x4D |
| 24 | #define STA350_COEF_COUNT 62 |
| 25 | |
| 26 | #define STA350_CONFA 0x00 |
| 27 | #define STA350_CONFB 0x01 |
| 28 | #define STA350_CONFC 0x02 |
| 29 | #define STA350_CONFD 0x03 |
| 30 | #define STA350_CONFE 0x04 |
| 31 | #define STA350_CONFF 0x05 |
| 32 | #define STA350_MMUTE 0x06 |
| 33 | #define STA350_MVOL 0x07 |
| 34 | #define STA350_C1VOL 0x08 |
| 35 | #define STA350_C2VOL 0x09 |
| 36 | #define STA350_C3VOL 0x0a |
| 37 | #define STA350_AUTO1 0x0b |
| 38 | #define STA350_AUTO2 0x0c |
| 39 | #define STA350_AUTO3 0x0d |
| 40 | #define STA350_C1CFG 0x0e |
| 41 | #define STA350_C2CFG 0x0f |
| 42 | #define STA350_C3CFG 0x10 |
| 43 | #define STA350_TONE 0x11 |
| 44 | #define STA350_L1AR 0x12 |
| 45 | #define STA350_L1ATRT 0x13 |
| 46 | #define STA350_L2AR 0x14 |
| 47 | #define STA350_L2ATRT 0x15 |
| 48 | #define STA350_CFADDR2 0x16 |
| 49 | #define STA350_B1CF1 0x17 |
| 50 | #define STA350_B1CF2 0x18 |
| 51 | #define STA350_B1CF3 0x19 |
| 52 | #define STA350_B2CF1 0x1a |
| 53 | #define STA350_B2CF2 0x1b |
| 54 | #define STA350_B2CF3 0x1c |
| 55 | #define STA350_A1CF1 0x1d |
| 56 | #define STA350_A1CF2 0x1e |
| 57 | #define STA350_A1CF3 0x1f |
| 58 | #define STA350_A2CF1 0x20 |
| 59 | #define STA350_A2CF2 0x21 |
| 60 | #define STA350_A2CF3 0x22 |
| 61 | #define STA350_B0CF1 0x23 |
| 62 | #define STA350_B0CF2 0x24 |
| 63 | #define STA350_B0CF3 0x25 |
| 64 | #define STA350_CFUD 0x26 |
| 65 | #define STA350_MPCC1 0x27 |
| 66 | #define STA350_MPCC2 0x28 |
| 67 | #define STA350_DCC1 0x29 |
| 68 | #define STA350_DCC2 0x2a |
| 69 | #define STA350_FDRC1 0x2b |
| 70 | #define STA350_FDRC2 0x2c |
| 71 | #define STA350_STATUS 0x2d |
| 72 | /* reserved: 0x2d - 0x30 */ |
| 73 | #define STA350_EQCFG 0x31 |
| 74 | #define STA350_EATH1 0x32 |
| 75 | #define STA350_ERTH1 0x33 |
| 76 | #define STA350_EATH2 0x34 |
| 77 | #define STA350_ERTH2 0x35 |
| 78 | #define STA350_CONFX 0x36 |
| 79 | #define STA350_SVCA 0x37 |
| 80 | #define STA350_SVCB 0x38 |
| 81 | #define STA350_RMS0A 0x39 |
| 82 | #define STA350_RMS0B 0x3a |
| 83 | #define STA350_RMS0C 0x3b |
| 84 | #define STA350_RMS1A 0x3c |
| 85 | #define STA350_RMS1B 0x3d |
| 86 | #define STA350_RMS1C 0x3e |
| 87 | #define STA350_EVOLRES 0x3f |
| 88 | /* reserved: 0x40 - 0x47 */ |
| 89 | #define STA350_NSHAPE 0x48 |
| 90 | #define STA350_CTXB4B1 0x49 |
| 91 | #define STA350_CTXB7B5 0x4a |
| 92 | #define STA350_MISC1 0x4b |
| 93 | #define STA350_MISC2 0x4c |
| 94 | |
| 95 | /* 0x00 CONFA */ |
| 96 | #define STA350_CONFA_MCS_MASK 0x03 |
| 97 | #define STA350_CONFA_MCS_SHIFT 0 |
| 98 | #define STA350_CONFA_IR_MASK 0x18 |
| 99 | #define STA350_CONFA_IR_SHIFT 3 |
| 100 | #define STA350_CONFA_TWRB BIT(5) |
| 101 | #define STA350_CONFA_TWAB BIT(6) |
| 102 | #define STA350_CONFA_FDRB BIT(7) |
| 103 | |
| 104 | /* 0x01 CONFB */ |
| 105 | #define STA350_CONFB_SAI_MASK 0x0f |
| 106 | #define STA350_CONFB_SAI_SHIFT 0 |
| 107 | #define STA350_CONFB_SAIFB BIT(4) |
| 108 | #define STA350_CONFB_DSCKE BIT(5) |
| 109 | #define STA350_CONFB_C1IM BIT(6) |
| 110 | #define STA350_CONFB_C2IM BIT(7) |
| 111 | |
| 112 | /* 0x02 CONFC */ |
| 113 | #define STA350_CONFC_OM_MASK 0x03 |
| 114 | #define STA350_CONFC_OM_SHIFT 0 |
| 115 | #define STA350_CONFC_CSZ_MASK 0x3c |
| 116 | #define STA350_CONFC_CSZ_SHIFT 2 |
| 117 | #define STA350_CONFC_OCRB BIT(7) |
| 118 | |
| 119 | /* 0x03 CONFD */ |
| 120 | #define STA350_CONFD_HPB_SHIFT 0 |
| 121 | #define STA350_CONFD_DEMP_SHIFT 1 |
| 122 | #define STA350_CONFD_DSPB_SHIFT 2 |
| 123 | #define STA350_CONFD_PSL_SHIFT 3 |
| 124 | #define STA350_CONFD_BQL_SHIFT 4 |
| 125 | #define STA350_CONFD_DRC_SHIFT 5 |
| 126 | #define STA350_CONFD_ZDE_SHIFT 6 |
| 127 | #define STA350_CONFD_SME_SHIFT 7 |
| 128 | |
| 129 | /* 0x04 CONFE */ |
| 130 | #define STA350_CONFE_MPCV BIT(0) |
| 131 | #define STA350_CONFE_MPCV_SHIFT 0 |
| 132 | #define STA350_CONFE_MPC BIT(1) |
| 133 | #define STA350_CONFE_MPC_SHIFT 1 |
| 134 | #define STA350_CONFE_NSBW BIT(2) |
| 135 | #define STA350_CONFE_NSBW_SHIFT 2 |
| 136 | #define STA350_CONFE_AME BIT(3) |
| 137 | #define STA350_CONFE_AME_SHIFT 3 |
| 138 | #define STA350_CONFE_PWMS BIT(4) |
| 139 | #define STA350_CONFE_PWMS_SHIFT 4 |
| 140 | #define STA350_CONFE_DCCV BIT(5) |
| 141 | #define STA350_CONFE_DCCV_SHIFT 5 |
| 142 | #define STA350_CONFE_ZCE BIT(6) |
| 143 | #define STA350_CONFE_ZCE_SHIFT 6 |
| 144 | #define STA350_CONFE_SVE BIT(7) |
| 145 | #define STA350_CONFE_SVE_SHIFT 7 |
| 146 | |
| 147 | /* 0x05 CONFF */ |
| 148 | #define STA350_CONFF_OCFG_MASK 0x03 |
| 149 | #define STA350_CONFF_OCFG_SHIFT 0 |
| 150 | #define STA350_CONFF_IDE BIT(2) |
| 151 | #define STA350_CONFF_BCLE BIT(3) |
| 152 | #define STA350_CONFF_LDTE BIT(4) |
| 153 | #define STA350_CONFF_ECLE BIT(5) |
| 154 | #define STA350_CONFF_PWDN BIT(6) |
| 155 | #define STA350_CONFF_EAPD BIT(7) |
| 156 | |
| 157 | /* 0x06 MMUTE */ |
| 158 | #define STA350_MMUTE_MMUTE 0x01 |
| 159 | #define STA350_MMUTE_MMUTE_SHIFT 0 |
| 160 | #define STA350_MMUTE_C1M 0x02 |
| 161 | #define STA350_MMUTE_C1M_SHIFT 1 |
| 162 | #define STA350_MMUTE_C2M 0x04 |
| 163 | #define STA350_MMUTE_C2M_SHIFT 2 |
| 164 | #define STA350_MMUTE_C3M 0x08 |
| 165 | #define STA350_MMUTE_C3M_SHIFT 3 |
| 166 | #define STA350_MMUTE_LOC_MASK 0xC0 |
| 167 | #define STA350_MMUTE_LOC_SHIFT 6 |
| 168 | |
| 169 | /* 0x0b AUTO1 */ |
| 170 | #define STA350_AUTO1_AMGC_MASK 0x30 |
| 171 | #define STA350_AUTO1_AMGC_SHIFT 4 |
| 172 | |
| 173 | /* 0x0c AUTO2 */ |
| 174 | #define STA350_AUTO2_AMAME 0x01 |
| 175 | #define STA350_AUTO2_AMAM_MASK 0x0e |
| 176 | #define STA350_AUTO2_AMAM_SHIFT 1 |
| 177 | #define STA350_AUTO2_XO_MASK 0xf0 |
| 178 | #define STA350_AUTO2_XO_SHIFT 4 |
| 179 | |
| 180 | /* 0x0d AUTO3 */ |
| 181 | #define STA350_AUTO3_PEQ_MASK 0x1f |
| 182 | #define STA350_AUTO3_PEQ_SHIFT 0 |
| 183 | |
| 184 | /* 0x0e 0x0f 0x10 CxCFG */ |
| 185 | #define STA350_CxCFG_TCB_SHIFT 0 |
| 186 | #define STA350_CxCFG_EQBP_SHIFT 1 |
| 187 | #define STA350_CxCFG_VBP_SHIFT 2 |
| 188 | #define STA350_CxCFG_BO_SHIFT 3 |
| 189 | #define STA350_CxCFG_LS_SHIFT 4 |
| 190 | #define STA350_CxCFG_OM_MASK 0xc0 |
| 191 | #define STA350_CxCFG_OM_SHIFT 6 |
| 192 | |
| 193 | /* 0x11 TONE */ |
| 194 | #define STA350_TONE_BTC_SHIFT 0 |
| 195 | #define STA350_TONE_TTC_SHIFT 4 |
| 196 | |
| 197 | /* 0x12 0x13 0x14 0x15 limiter attack/release */ |
| 198 | #define STA350_LxA_SHIFT 0 |
| 199 | #define STA350_LxR_SHIFT 4 |
| 200 | |
| 201 | /* 0x26 CFUD */ |
| 202 | #define STA350_CFUD_W1 0x01 |
| 203 | #define STA350_CFUD_WA 0x02 |
| 204 | #define STA350_CFUD_R1 0x04 |
| 205 | #define STA350_CFUD_RA 0x08 |
| 206 | |
| 207 | |
| 208 | /* biquad filter coefficient table offsets */ |
| 209 | #define STA350_C1_BQ_BASE 0 |
| 210 | #define STA350_C2_BQ_BASE 20 |
| 211 | #define STA350_CH_BQ_NUM 4 |
| 212 | #define STA350_BQ_NUM_COEF 5 |
| 213 | #define STA350_XO_HP_BQ_BASE 40 |
| 214 | #define STA350_XO_LP_BQ_BASE 45 |
| 215 | #define STA350_C1_PRESCALE 50 |
| 216 | #define STA350_C2_PRESCALE 51 |
| 217 | #define STA350_C1_POSTSCALE 52 |
| 218 | #define STA350_C2_POSTSCALE 53 |
| 219 | #define STA350_C3_POSTSCALE 54 |
| 220 | #define STA350_TW_POSTSCALE 55 |
| 221 | #define STA350_C1_MIX1 56 |
| 222 | #define STA350_C1_MIX2 57 |
| 223 | #define STA350_C2_MIX1 58 |
| 224 | #define STA350_C2_MIX2 59 |
| 225 | #define STA350_C3_MIX1 60 |
| 226 | #define STA350_C3_MIX2 61 |
| 227 | |
| Daniel Mack | 7c2fccc | 2014-05-05 11:49:23 +0200 | [diff] [blame] | 228 | /* miscellaneous register 1 */ |
| 229 | #define STA350_MISC1_CPWMEN BIT(2) |
| 230 | #define STA350_MISC1_BRIDGOFF BIT(5) |
| 231 | #define STA350_MISC1_NSHHPEN BIT(6) |
| 232 | #define STA350_MISC1_RPDNEN BIT(7) |
| 233 | |
| 234 | /* miscellaneous register 2 */ |
| 235 | #define STA350_MISC2_PNDLSL_MASK 0x1c |
| 236 | #define STA350_MISC2_PNDLSL_SHIFT 2 |
| 237 | |
| Sven Brandau | 2439ea1 | 2014-04-02 10:25:05 +0200 | [diff] [blame] | 238 | #endif /* _ASOC_STA_350_H */ |