blob: d3003937ddf52ab447378b3f4b59a0f1150072ca [file] [log] [blame]
Ben Gamari20172632009-02-17 20:08:50 -05001/*
2 * Copyright © 2008 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
26 *
27 */
28
29#include <linux/seq_file.h>
Chris Wilsonf3cd4742009-10-13 22:20:20 +010030#include <linux/debugfs.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Paul Gortmaker2d1a8a42011-08-30 18:16:33 -040032#include <linux/export.h>
Ben Gamari20172632009-02-17 20:08:50 -050033#include "drmP.h"
34#include "drm.h"
Simon Farnsworth4e5359c2010-09-01 17:47:52 +010035#include "intel_drv.h"
Chris Wilsone5c65262010-11-01 11:35:28 +000036#include "intel_ringbuffer.h"
Ben Gamari20172632009-02-17 20:08:50 -050037#include "i915_drm.h"
38#include "i915_drv.h"
39
40#define DRM_I915_RING_DEBUG 1
41
42
43#if defined(CONFIG_DEBUG_FS)
44
Chris Wilsonf13d3f72010-09-20 17:36:15 +010045enum {
Chris Wilson69dc4982010-10-19 10:36:51 +010046 ACTIVE_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010047 INACTIVE_LIST,
Chris Wilsond21d5972010-09-26 11:19:33 +010048 PINNED_LIST,
Chris Wilsonf13d3f72010-09-20 17:36:15 +010049};
Ben Gamari433e12f2009-02-17 20:08:51 -050050
Chris Wilson70d39fe2010-08-25 16:03:34 +010051static const char *yesno(int v)
52{
53 return v ? "yes" : "no";
54}
55
56static int i915_capabilities(struct seq_file *m, void *data)
57{
58 struct drm_info_node *node = (struct drm_info_node *) m->private;
59 struct drm_device *dev = node->minor->dev;
60 const struct intel_device_info *info = INTEL_INFO(dev);
61
62 seq_printf(m, "gen: %d\n", info->gen);
Paulo Zanoni03d00ac2011-10-14 18:17:41 -030063 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
Daniel Vetterc96ea642012-08-08 22:01:51 +020064#define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
65#define DEV_INFO_SEP ;
66 DEV_INFO_FLAGS;
67#undef DEV_INFO_FLAG
68#undef DEV_INFO_SEP
Chris Wilson70d39fe2010-08-25 16:03:34 +010069
70 return 0;
71}
Ben Gamari433e12f2009-02-17 20:08:51 -050072
Chris Wilson05394f32010-11-08 19:18:58 +000073static const char *get_pin_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000074{
Chris Wilson05394f32010-11-08 19:18:58 +000075 if (obj->user_pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000076 return "P";
Chris Wilson05394f32010-11-08 19:18:58 +000077 else if (obj->pin_count > 0)
Chris Wilsona6172a82009-02-11 14:26:38 +000078 return "p";
79 else
80 return " ";
81}
82
Chris Wilson05394f32010-11-08 19:18:58 +000083static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
Chris Wilsona6172a82009-02-11 14:26:38 +000084{
Akshay Joshi0206e352011-08-16 15:34:10 -040085 switch (obj->tiling_mode) {
86 default:
87 case I915_TILING_NONE: return " ";
88 case I915_TILING_X: return "X";
89 case I915_TILING_Y: return "Y";
90 }
Chris Wilsona6172a82009-02-11 14:26:38 +000091}
92
Chris Wilson93dfb402011-03-29 16:59:50 -070093static const char *cache_level_str(int type)
Chris Wilson08c18322011-01-10 00:00:24 +000094{
95 switch (type) {
Chris Wilson93dfb402011-03-29 16:59:50 -070096 case I915_CACHE_NONE: return " uncached";
97 case I915_CACHE_LLC: return " snooped (LLC)";
98 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
Chris Wilson08c18322011-01-10 00:00:24 +000099 default: return "";
100 }
101}
102
Chris Wilson37811fc2010-08-25 22:45:57 +0100103static void
104describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
105{
Chris Wilson0201f1e2012-07-20 12:41:01 +0100106 seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
Chris Wilson37811fc2010-08-25 22:45:57 +0100107 &obj->base,
108 get_pin_flag(obj),
109 get_tiling_flag(obj),
Eric Anholta05a5862011-12-20 08:54:15 -0800110 obj->base.size / 1024,
Chris Wilson37811fc2010-08-25 22:45:57 +0100111 obj->base.read_domains,
112 obj->base.write_domain,
Chris Wilson0201f1e2012-07-20 12:41:01 +0100113 obj->last_read_seqno,
114 obj->last_write_seqno,
Chris Wilsoncaea7472010-11-12 13:53:37 +0000115 obj->last_fenced_seqno,
Chris Wilson93dfb402011-03-29 16:59:50 -0700116 cache_level_str(obj->cache_level),
Chris Wilson37811fc2010-08-25 22:45:57 +0100117 obj->dirty ? " dirty" : "",
118 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
119 if (obj->base.name)
120 seq_printf(m, " (name: %d)", obj->base.name);
Chris Wilsonc110a6d2012-08-11 15:41:02 +0100121 if (obj->pin_count)
122 seq_printf(m, " (pinned x %d)", obj->pin_count);
Chris Wilson37811fc2010-08-25 22:45:57 +0100123 if (obj->fence_reg != I915_FENCE_REG_NONE)
124 seq_printf(m, " (fence: %d)", obj->fence_reg);
125 if (obj->gtt_space != NULL)
Chris Wilsona00b10c2010-09-24 21:15:47 +0100126 seq_printf(m, " (gtt offset: %08x, size: %08x)",
127 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
Chris Wilson6299f992010-11-24 12:23:44 +0000128 if (obj->pin_mappable || obj->fault_mappable) {
129 char s[3], *t = s;
130 if (obj->pin_mappable)
131 *t++ = 'p';
132 if (obj->fault_mappable)
133 *t++ = 'f';
134 *t = '\0';
135 seq_printf(m, " (%s mappable)", s);
136 }
Chris Wilson69dc4982010-10-19 10:36:51 +0100137 if (obj->ring != NULL)
138 seq_printf(m, " (%s)", obj->ring->name);
Chris Wilson37811fc2010-08-25 22:45:57 +0100139}
140
Ben Gamari433e12f2009-02-17 20:08:51 -0500141static int i915_gem_object_list_info(struct seq_file *m, void *data)
Ben Gamari20172632009-02-17 20:08:50 -0500142{
143 struct drm_info_node *node = (struct drm_info_node *) m->private;
Ben Gamari433e12f2009-02-17 20:08:51 -0500144 uintptr_t list = (uintptr_t) node->info_ent->data;
145 struct list_head *head;
Ben Gamari20172632009-02-17 20:08:50 -0500146 struct drm_device *dev = node->minor->dev;
147 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson05394f32010-11-08 19:18:58 +0000148 struct drm_i915_gem_object *obj;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100149 size_t total_obj_size, total_gtt_size;
150 int count, ret;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100151
152 ret = mutex_lock_interruptible(&dev->struct_mutex);
153 if (ret)
154 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500155
Ben Gamari433e12f2009-02-17 20:08:51 -0500156 switch (list) {
157 case ACTIVE_LIST:
158 seq_printf(m, "Active:\n");
Chris Wilson69dc4982010-10-19 10:36:51 +0100159 head = &dev_priv->mm.active_list;
Ben Gamari433e12f2009-02-17 20:08:51 -0500160 break;
161 case INACTIVE_LIST:
Ben Gamaria17458f2009-07-01 15:01:36 -0400162 seq_printf(m, "Inactive:\n");
Ben Gamari433e12f2009-02-17 20:08:51 -0500163 head = &dev_priv->mm.inactive_list;
164 break;
Ben Gamari433e12f2009-02-17 20:08:51 -0500165 default:
Chris Wilsonde227ef2010-07-03 07:58:38 +0100166 mutex_unlock(&dev->struct_mutex);
167 return -EINVAL;
Ben Gamari433e12f2009-02-17 20:08:51 -0500168 }
169
Chris Wilson8f2480f2010-09-26 11:44:19 +0100170 total_obj_size = total_gtt_size = count = 0;
Chris Wilson05394f32010-11-08 19:18:58 +0000171 list_for_each_entry(obj, head, mm_list) {
Chris Wilson37811fc2010-08-25 22:45:57 +0100172 seq_printf(m, " ");
Chris Wilson05394f32010-11-08 19:18:58 +0000173 describe_obj(m, obj);
Eric Anholtf4ceda82009-02-17 23:53:41 -0800174 seq_printf(m, "\n");
Chris Wilson05394f32010-11-08 19:18:58 +0000175 total_obj_size += obj->base.size;
176 total_gtt_size += obj->gtt_space->size;
Chris Wilson8f2480f2010-09-26 11:44:19 +0100177 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500178 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100179 mutex_unlock(&dev->struct_mutex);
Carl Worth5e118f42009-03-20 11:54:25 -0700180
Chris Wilson8f2480f2010-09-26 11:44:19 +0100181 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
182 count, total_obj_size, total_gtt_size);
Ben Gamari20172632009-02-17 20:08:50 -0500183 return 0;
184}
185
Chris Wilson6299f992010-11-24 12:23:44 +0000186#define count_objects(list, member) do { \
187 list_for_each_entry(obj, list, member) { \
188 size += obj->gtt_space->size; \
189 ++count; \
190 if (obj->map_and_fenceable) { \
191 mappable_size += obj->gtt_space->size; \
192 ++mappable_count; \
193 } \
194 } \
Akshay Joshi0206e352011-08-16 15:34:10 -0400195} while (0)
Chris Wilson6299f992010-11-24 12:23:44 +0000196
Chris Wilson73aa8082010-09-30 11:46:12 +0100197static int i915_gem_object_info(struct seq_file *m, void* data)
198{
199 struct drm_info_node *node = (struct drm_info_node *) m->private;
200 struct drm_device *dev = node->minor->dev;
201 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilsonb7abb712012-08-20 11:33:30 +0200202 u32 count, mappable_count, purgeable_count;
203 size_t size, mappable_size, purgeable_size;
Chris Wilson6299f992010-11-24 12:23:44 +0000204 struct drm_i915_gem_object *obj;
Chris Wilson73aa8082010-09-30 11:46:12 +0100205 int ret;
206
207 ret = mutex_lock_interruptible(&dev->struct_mutex);
208 if (ret)
209 return ret;
210
Chris Wilson6299f992010-11-24 12:23:44 +0000211 seq_printf(m, "%u objects, %zu bytes\n",
212 dev_priv->mm.object_count,
213 dev_priv->mm.object_memory);
214
215 size = count = mappable_size = mappable_count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200216 count_objects(&dev_priv->mm.bound_list, gtt_list);
Chris Wilson6299f992010-11-24 12:23:44 +0000217 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
218 count, mappable_count, size, mappable_size);
219
220 size = count = mappable_size = mappable_count = 0;
221 count_objects(&dev_priv->mm.active_list, mm_list);
Chris Wilson6299f992010-11-24 12:23:44 +0000222 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
223 count, mappable_count, size, mappable_size);
224
225 size = count = mappable_size = mappable_count = 0;
Chris Wilson6299f992010-11-24 12:23:44 +0000226 count_objects(&dev_priv->mm.inactive_list, mm_list);
227 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
228 count, mappable_count, size, mappable_size);
229
Chris Wilsonb7abb712012-08-20 11:33:30 +0200230 size = count = purgeable_size = purgeable_count = 0;
231 list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
Chris Wilson6c085a72012-08-20 11:40:46 +0200232 size += obj->base.size, ++count;
Chris Wilsonb7abb712012-08-20 11:33:30 +0200233 if (obj->madv == I915_MADV_DONTNEED)
234 purgeable_size += obj->base.size, ++purgeable_count;
235 }
Chris Wilson6c085a72012-08-20 11:40:46 +0200236 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
237
Chris Wilson6299f992010-11-24 12:23:44 +0000238 size = count = mappable_size = mappable_count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200239 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
Chris Wilson6299f992010-11-24 12:23:44 +0000240 if (obj->fault_mappable) {
241 size += obj->gtt_space->size;
242 ++count;
243 }
244 if (obj->pin_mappable) {
245 mappable_size += obj->gtt_space->size;
246 ++mappable_count;
247 }
Chris Wilsonb7abb712012-08-20 11:33:30 +0200248 if (obj->madv == I915_MADV_DONTNEED) {
249 purgeable_size += obj->base.size;
250 ++purgeable_count;
251 }
Chris Wilson6299f992010-11-24 12:23:44 +0000252 }
Chris Wilsonb7abb712012-08-20 11:33:30 +0200253 seq_printf(m, "%u purgeable objects, %zu bytes\n",
254 purgeable_count, purgeable_size);
Chris Wilson6299f992010-11-24 12:23:44 +0000255 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
256 mappable_count, mappable_size);
257 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
258 count, size);
259
260 seq_printf(m, "%zu [%zu] gtt total\n",
261 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
Chris Wilson73aa8082010-09-30 11:46:12 +0100262
263 mutex_unlock(&dev->struct_mutex);
264
265 return 0;
266}
267
Chris Wilson08c18322011-01-10 00:00:24 +0000268static int i915_gem_gtt_info(struct seq_file *m, void* data)
269{
270 struct drm_info_node *node = (struct drm_info_node *) m->private;
271 struct drm_device *dev = node->minor->dev;
Chris Wilson1b502472012-04-24 15:47:30 +0100272 uintptr_t list = (uintptr_t) node->info_ent->data;
Chris Wilson08c18322011-01-10 00:00:24 +0000273 struct drm_i915_private *dev_priv = dev->dev_private;
274 struct drm_i915_gem_object *obj;
275 size_t total_obj_size, total_gtt_size;
276 int count, ret;
277
278 ret = mutex_lock_interruptible(&dev->struct_mutex);
279 if (ret)
280 return ret;
281
282 total_obj_size = total_gtt_size = count = 0;
Chris Wilson6c085a72012-08-20 11:40:46 +0200283 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
Chris Wilson1b502472012-04-24 15:47:30 +0100284 if (list == PINNED_LIST && obj->pin_count == 0)
285 continue;
286
Chris Wilson08c18322011-01-10 00:00:24 +0000287 seq_printf(m, " ");
288 describe_obj(m, obj);
289 seq_printf(m, "\n");
290 total_obj_size += obj->base.size;
291 total_gtt_size += obj->gtt_space->size;
292 count++;
293 }
294
295 mutex_unlock(&dev->struct_mutex);
296
297 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
298 count, total_obj_size, total_gtt_size);
299
300 return 0;
301}
302
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100303static int i915_gem_pageflip_info(struct seq_file *m, void *data)
304{
305 struct drm_info_node *node = (struct drm_info_node *) m->private;
306 struct drm_device *dev = node->minor->dev;
307 unsigned long flags;
308 struct intel_crtc *crtc;
309
310 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800311 const char pipe = pipe_name(crtc->pipe);
312 const char plane = plane_name(crtc->plane);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100313 struct intel_unpin_work *work;
314
315 spin_lock_irqsave(&dev->event_lock, flags);
316 work = crtc->unpin_work;
317 if (work == NULL) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800318 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100319 pipe, plane);
320 } else {
321 if (!work->pending) {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800322 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100323 pipe, plane);
324 } else {
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800325 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100326 pipe, plane);
327 }
328 if (work->enable_stall_check)
329 seq_printf(m, "Stall check enabled, ");
330 else
331 seq_printf(m, "Stall check waiting for page flip ioctl, ");
332 seq_printf(m, "%d prepares\n", work->pending);
333
334 if (work->old_fb_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000335 struct drm_i915_gem_object *obj = work->old_fb_obj;
336 if (obj)
337 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100338 }
339 if (work->pending_flip_obj) {
Chris Wilson05394f32010-11-08 19:18:58 +0000340 struct drm_i915_gem_object *obj = work->pending_flip_obj;
341 if (obj)
342 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
Simon Farnsworth4e5359c2010-09-01 17:47:52 +0100343 }
344 }
345 spin_unlock_irqrestore(&dev->event_lock, flags);
346 }
347
348 return 0;
349}
350
Ben Gamari20172632009-02-17 20:08:50 -0500351static int i915_gem_request_info(struct seq_file *m, void *data)
352{
353 struct drm_info_node *node = (struct drm_info_node *) m->private;
354 struct drm_device *dev = node->minor->dev;
355 drm_i915_private_t *dev_priv = dev->dev_private;
356 struct drm_i915_gem_request *gem_request;
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100357 int ret, count;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100358
359 ret = mutex_lock_interruptible(&dev->struct_mutex);
360 if (ret)
361 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500362
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100363 count = 0;
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000364 if (!list_empty(&dev_priv->ring[RCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100365 seq_printf(m, "Render requests:\n");
366 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000367 &dev_priv->ring[RCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100368 list) {
369 seq_printf(m, " %d @ %d\n",
370 gem_request->seqno,
371 (int) (jiffies - gem_request->emitted_jiffies));
372 }
373 count++;
374 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000375 if (!list_empty(&dev_priv->ring[VCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100376 seq_printf(m, "BSD requests:\n");
377 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000378 &dev_priv->ring[VCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100379 list) {
380 seq_printf(m, " %d @ %d\n",
381 gem_request->seqno,
382 (int) (jiffies - gem_request->emitted_jiffies));
383 }
384 count++;
385 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000386 if (!list_empty(&dev_priv->ring[BCS].request_list)) {
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100387 seq_printf(m, "BLT requests:\n");
388 list_for_each_entry(gem_request,
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000389 &dev_priv->ring[BCS].request_list,
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100390 list) {
391 seq_printf(m, " %d @ %d\n",
392 gem_request->seqno,
393 (int) (jiffies - gem_request->emitted_jiffies));
394 }
395 count++;
Ben Gamari20172632009-02-17 20:08:50 -0500396 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100397 mutex_unlock(&dev->struct_mutex);
398
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100399 if (count == 0)
400 seq_printf(m, "No requests\n");
401
Ben Gamari20172632009-02-17 20:08:50 -0500402 return 0;
403}
404
Chris Wilsonb2223492010-10-27 15:27:33 +0100405static void i915_ring_seqno_info(struct seq_file *m,
406 struct intel_ring_buffer *ring)
407{
408 if (ring->get_seqno) {
409 seq_printf(m, "Current sequence (%s): %d\n",
Chris Wilsonb2eadbc2012-08-09 10:58:30 +0100410 ring->name, ring->get_seqno(ring, false));
Chris Wilsonb2223492010-10-27 15:27:33 +0100411 }
412}
413
Ben Gamari20172632009-02-17 20:08:50 -0500414static int i915_gem_seqno_info(struct seq_file *m, void *data)
415{
416 struct drm_info_node *node = (struct drm_info_node *) m->private;
417 struct drm_device *dev = node->minor->dev;
418 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000419 int ret, i;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100420
421 ret = mutex_lock_interruptible(&dev->struct_mutex);
422 if (ret)
423 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500424
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000425 for (i = 0; i < I915_NUM_RINGS; i++)
426 i915_ring_seqno_info(m, &dev_priv->ring[i]);
Chris Wilsonde227ef2010-07-03 07:58:38 +0100427
428 mutex_unlock(&dev->struct_mutex);
429
Ben Gamari20172632009-02-17 20:08:50 -0500430 return 0;
431}
432
433
434static int i915_interrupt_info(struct seq_file *m, void *data)
435{
436 struct drm_info_node *node = (struct drm_info_node *) m->private;
437 struct drm_device *dev = node->minor->dev;
438 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800439 int ret, i, pipe;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100440
441 ret = mutex_lock_interruptible(&dev->struct_mutex);
442 if (ret)
443 return ret;
Ben Gamari20172632009-02-17 20:08:50 -0500444
Jesse Barnes7e231dbe2012-03-28 13:39:38 -0700445 if (IS_VALLEYVIEW(dev)) {
446 seq_printf(m, "Display IER:\t%08x\n",
447 I915_READ(VLV_IER));
448 seq_printf(m, "Display IIR:\t%08x\n",
449 I915_READ(VLV_IIR));
450 seq_printf(m, "Display IIR_RW:\t%08x\n",
451 I915_READ(VLV_IIR_RW));
452 seq_printf(m, "Display IMR:\t%08x\n",
453 I915_READ(VLV_IMR));
454 for_each_pipe(pipe)
455 seq_printf(m, "Pipe %c stat:\t%08x\n",
456 pipe_name(pipe),
457 I915_READ(PIPESTAT(pipe)));
458
459 seq_printf(m, "Master IER:\t%08x\n",
460 I915_READ(VLV_MASTER_IER));
461
462 seq_printf(m, "Render IER:\t%08x\n",
463 I915_READ(GTIER));
464 seq_printf(m, "Render IIR:\t%08x\n",
465 I915_READ(GTIIR));
466 seq_printf(m, "Render IMR:\t%08x\n",
467 I915_READ(GTIMR));
468
469 seq_printf(m, "PM IER:\t\t%08x\n",
470 I915_READ(GEN6_PMIER));
471 seq_printf(m, "PM IIR:\t\t%08x\n",
472 I915_READ(GEN6_PMIIR));
473 seq_printf(m, "PM IMR:\t\t%08x\n",
474 I915_READ(GEN6_PMIMR));
475
476 seq_printf(m, "Port hotplug:\t%08x\n",
477 I915_READ(PORT_HOTPLUG_EN));
478 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
479 I915_READ(VLV_DPFLIPSTAT));
480 seq_printf(m, "DPINVGTT:\t%08x\n",
481 I915_READ(DPINVGTT));
482
483 } else if (!HAS_PCH_SPLIT(dev)) {
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800484 seq_printf(m, "Interrupt enable: %08x\n",
485 I915_READ(IER));
486 seq_printf(m, "Interrupt identity: %08x\n",
487 I915_READ(IIR));
488 seq_printf(m, "Interrupt mask: %08x\n",
489 I915_READ(IMR));
Jesse Barnes9db4a9c2011-02-07 12:26:52 -0800490 for_each_pipe(pipe)
491 seq_printf(m, "Pipe %c stat: %08x\n",
492 pipe_name(pipe),
493 I915_READ(PIPESTAT(pipe)));
Zhenyu Wang5f6a1692009-08-10 21:37:24 +0800494 } else {
495 seq_printf(m, "North Display Interrupt enable: %08x\n",
496 I915_READ(DEIER));
497 seq_printf(m, "North Display Interrupt identity: %08x\n",
498 I915_READ(DEIIR));
499 seq_printf(m, "North Display Interrupt mask: %08x\n",
500 I915_READ(DEIMR));
501 seq_printf(m, "South Display Interrupt enable: %08x\n",
502 I915_READ(SDEIER));
503 seq_printf(m, "South Display Interrupt identity: %08x\n",
504 I915_READ(SDEIIR));
505 seq_printf(m, "South Display Interrupt mask: %08x\n",
506 I915_READ(SDEIMR));
507 seq_printf(m, "Graphics Interrupt enable: %08x\n",
508 I915_READ(GTIER));
509 seq_printf(m, "Graphics Interrupt identity: %08x\n",
510 I915_READ(GTIIR));
511 seq_printf(m, "Graphics Interrupt mask: %08x\n",
512 I915_READ(GTIMR));
513 }
Ben Gamari20172632009-02-17 20:08:50 -0500514 seq_printf(m, "Interrupts received: %d\n",
515 atomic_read(&dev_priv->irq_received));
Chris Wilson9862e602011-01-04 22:22:17 +0000516 for (i = 0; i < I915_NUM_RINGS; i++) {
Jesse Barnesda64c6f2011-08-09 09:17:46 -0700517 if (IS_GEN6(dev) || IS_GEN7(dev)) {
Chris Wilson9862e602011-01-04 22:22:17 +0000518 seq_printf(m, "Graphics Interrupt mask (%s): %08x\n",
519 dev_priv->ring[i].name,
520 I915_READ_IMR(&dev_priv->ring[i]));
521 }
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000522 i915_ring_seqno_info(m, &dev_priv->ring[i]);
Chris Wilson9862e602011-01-04 22:22:17 +0000523 }
Chris Wilsonde227ef2010-07-03 07:58:38 +0100524 mutex_unlock(&dev->struct_mutex);
525
Ben Gamari20172632009-02-17 20:08:50 -0500526 return 0;
527}
528
Chris Wilsona6172a82009-02-11 14:26:38 +0000529static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
530{
531 struct drm_info_node *node = (struct drm_info_node *) m->private;
532 struct drm_device *dev = node->minor->dev;
533 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilsonde227ef2010-07-03 07:58:38 +0100534 int i, ret;
535
536 ret = mutex_lock_interruptible(&dev->struct_mutex);
537 if (ret)
538 return ret;
Chris Wilsona6172a82009-02-11 14:26:38 +0000539
540 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
541 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
542 for (i = 0; i < dev_priv->num_fence_regs; i++) {
Chris Wilson05394f32010-11-08 19:18:58 +0000543 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
Chris Wilsona6172a82009-02-11 14:26:38 +0000544
Chris Wilson6c085a72012-08-20 11:40:46 +0200545 seq_printf(m, "Fence %d, pin count = %d, object = ",
546 i, dev_priv->fence_regs[i].pin_count);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100547 if (obj == NULL)
548 seq_printf(m, "unused");
549 else
Chris Wilson05394f32010-11-08 19:18:58 +0000550 describe_obj(m, obj);
Chris Wilsonc2c347a92010-10-27 15:11:53 +0100551 seq_printf(m, "\n");
Chris Wilsona6172a82009-02-11 14:26:38 +0000552 }
553
Chris Wilson05394f32010-11-08 19:18:58 +0000554 mutex_unlock(&dev->struct_mutex);
Chris Wilsona6172a82009-02-11 14:26:38 +0000555 return 0;
556}
557
Ben Gamari20172632009-02-17 20:08:50 -0500558static int i915_hws_info(struct seq_file *m, void *data)
559{
560 struct drm_info_node *node = (struct drm_info_node *) m->private;
561 struct drm_device *dev = node->minor->dev;
562 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100563 struct intel_ring_buffer *ring;
Chris Wilson311bd682011-01-13 19:06:50 +0000564 const volatile u32 __iomem *hws;
Chris Wilson4066c0a2010-10-29 21:00:54 +0100565 int i;
Ben Gamari20172632009-02-17 20:08:50 -0500566
Chris Wilson1ec14ad2010-12-04 11:30:53 +0000567 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
Chris Wilson311bd682011-01-13 19:06:50 +0000568 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
Ben Gamari20172632009-02-17 20:08:50 -0500569 if (hws == NULL)
570 return 0;
571
572 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
573 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
574 i * 4,
575 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
576 }
577 return 0;
578}
579
Chris Wilsone5c65262010-11-01 11:35:28 +0000580static const char *ring_str(int ring)
581{
582 switch (ring) {
Daniel Vetter96154f22011-12-14 13:57:00 +0100583 case RCS: return "render";
584 case VCS: return "bsd";
585 case BCS: return "blt";
Chris Wilsone5c65262010-11-01 11:35:28 +0000586 default: return "";
587 }
588}
589
Chris Wilson9df30792010-02-18 10:24:56 +0000590static const char *pin_flag(int pinned)
591{
592 if (pinned > 0)
593 return " P";
594 else if (pinned < 0)
595 return " p";
596 else
597 return "";
598}
599
600static const char *tiling_flag(int tiling)
601{
602 switch (tiling) {
603 default:
604 case I915_TILING_NONE: return "";
605 case I915_TILING_X: return " X";
606 case I915_TILING_Y: return " Y";
607 }
608}
609
610static const char *dirty_flag(int dirty)
611{
612 return dirty ? " dirty" : "";
613}
614
615static const char *purgeable_flag(int purgeable)
616{
617 return purgeable ? " purgeable" : "";
618}
619
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000620static void print_error_buffers(struct seq_file *m,
621 const char *name,
622 struct drm_i915_error_buffer *err,
623 int count)
624{
625 seq_printf(m, "%s [%d]:\n", name, count);
626
627 while (count--) {
Chris Wilson0201f1e2012-07-20 12:41:01 +0100628 seq_printf(m, " %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000629 err->gtt_offset,
630 err->size,
631 err->read_domains,
632 err->write_domain,
Chris Wilson0201f1e2012-07-20 12:41:01 +0100633 err->rseqno, err->wseqno,
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000634 pin_flag(err->pinned),
635 tiling_flag(err->tiling),
636 dirty_flag(err->dirty),
637 purgeable_flag(err->purgeable),
Daniel Vetter96154f22011-12-14 13:57:00 +0100638 err->ring != -1 ? " " : "",
Chris Wilsona779e5a2011-01-09 21:07:49 +0000639 ring_str(err->ring),
Chris Wilson93dfb402011-03-29 16:59:50 -0700640 cache_level_str(err->cache_level));
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000641
642 if (err->name)
643 seq_printf(m, " (name: %d)", err->name);
644 if (err->fence_reg != I915_FENCE_REG_NONE)
645 seq_printf(m, " (fence: %d)", err->fence_reg);
646
647 seq_printf(m, "\n");
648 err++;
649 }
650}
651
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100652static void i915_ring_error_state(struct seq_file *m,
653 struct drm_device *dev,
654 struct drm_i915_error_state *error,
655 unsigned ring)
656{
Ben Widawskyec34a012012-04-03 23:03:00 -0700657 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100658 seq_printf(m, "%s command stream:\n", ring_str(ring));
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100659 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
660 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100661 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
662 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
663 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
664 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100665 if (ring == RCS && INTEL_INFO(dev)->gen >= 4) {
666 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
667 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100668 }
Daniel Vetterc1cd90e2011-12-14 13:57:02 +0100669 if (INTEL_INFO(dev)->gen >= 4)
670 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
671 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
Daniel Vetter9d2f41f2012-04-02 21:41:45 +0200672 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100673 if (INTEL_INFO(dev)->gen >= 6) {
Chris Wilson12f55812012-07-05 17:14:01 +0100674 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100675 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
Daniel Vetter7e3b8732012-02-01 22:26:45 +0100676 seq_printf(m, " SYNC_0: 0x%08x\n",
677 error->semaphore_mboxes[ring][0]);
678 seq_printf(m, " SYNC_1: 0x%08x\n",
679 error->semaphore_mboxes[ring][1]);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100680 }
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100681 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
Ben Widawsky9574b3f2012-04-26 16:03:01 -0700682 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
Daniel Vetter7e3b8732012-02-01 22:26:45 +0100683 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
684 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100685}
686
Daniel Vetterd5442302012-04-27 15:17:40 +0200687struct i915_error_state_file_priv {
688 struct drm_device *dev;
689 struct drm_i915_error_state *error;
690};
691
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700692static int i915_error_state(struct seq_file *m, void *unused)
693{
Daniel Vetterd5442302012-04-27 15:17:40 +0200694 struct i915_error_state_file_priv *error_priv = m->private;
695 struct drm_device *dev = error_priv->dev;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700696 drm_i915_private_t *dev_priv = dev->dev_private;
Daniel Vetterd5442302012-04-27 15:17:40 +0200697 struct drm_i915_error_state *error = error_priv->error;
Chris Wilsonb4519512012-05-11 14:29:30 +0100698 struct intel_ring_buffer *ring;
Chris Wilson52d39a22012-02-15 11:25:37 +0000699 int i, j, page, offset, elt;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700700
Daniel Vetter742cbee2012-04-27 15:17:39 +0200701 if (!error) {
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700702 seq_printf(m, "no error state collected\n");
Daniel Vetter742cbee2012-04-27 15:17:39 +0200703 return 0;
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700704 }
705
Jesse Barnes8a905232009-07-11 16:48:03 -0400706 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
707 error->time.tv_usec);
Chris Wilson9df30792010-02-18 10:24:56 +0000708 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100709 seq_printf(m, "EIR: 0x%08x\n", error->eir);
Ben Widawskybe998e22012-04-26 16:03:00 -0700710 seq_printf(m, "IER: 0x%08x\n", error->ier);
Chris Wilson1d8f38f2010-10-29 19:00:51 +0100711 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
Ben Widawskyb9a39062012-06-04 14:42:52 -0700712 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
Chris Wilson9df30792010-02-18 10:24:56 +0000713
Daniel Vetterbf3301a2011-05-12 22:17:12 +0100714 for (i = 0; i < dev_priv->num_fence_regs; i++)
Chris Wilson748ebc62010-10-24 10:28:47 +0100715 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
716
Daniel Vetter33f3f512011-12-14 13:57:39 +0100717 if (INTEL_INFO(dev)->gen >= 6) {
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100718 seq_printf(m, "ERROR: 0x%08x\n", error->error);
Daniel Vetter33f3f512011-12-14 13:57:39 +0100719 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
720 }
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100721
Ben Widawsky71e172e2012-08-20 16:15:13 -0700722 if (INTEL_INFO(dev)->gen == 7)
723 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
724
Chris Wilsonb4519512012-05-11 14:29:30 +0100725 for_each_ring(ring, dev_priv, i)
726 i915_ring_error_state(m, dev, error, i);
Daniel Vetterd27b1e02011-12-14 13:57:01 +0100727
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000728 if (error->active_bo)
729 print_error_buffers(m, "Active",
730 error->active_bo,
731 error->active_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000732
Chris Wilsonc724e8a2010-11-22 08:07:02 +0000733 if (error->pinned_bo)
734 print_error_buffers(m, "Pinned",
735 error->pinned_bo,
736 error->pinned_bo_count);
Chris Wilson9df30792010-02-18 10:24:56 +0000737
Chris Wilson52d39a22012-02-15 11:25:37 +0000738 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
739 struct drm_i915_error_object *obj;
Chris Wilson9df30792010-02-18 10:24:56 +0000740
Chris Wilson52d39a22012-02-15 11:25:37 +0000741 if ((obj = error->ring[i].batchbuffer)) {
Chris Wilsonbcfb2e22011-01-07 21:06:07 +0000742 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
743 dev_priv->ring[i].name,
744 obj->gtt_offset);
Chris Wilson9df30792010-02-18 10:24:56 +0000745 offset = 0;
746 for (page = 0; page < obj->page_count; page++) {
747 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
748 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
749 offset += 4;
750 }
751 }
752 }
Chris Wilson9df30792010-02-18 10:24:56 +0000753
Chris Wilson52d39a22012-02-15 11:25:37 +0000754 if (error->ring[i].num_requests) {
755 seq_printf(m, "%s --- %d requests\n",
756 dev_priv->ring[i].name,
757 error->ring[i].num_requests);
758 for (j = 0; j < error->ring[i].num_requests; j++) {
Chris Wilsonee4f42b2012-02-15 11:25:38 +0000759 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
Chris Wilson52d39a22012-02-15 11:25:37 +0000760 error->ring[i].requests[j].seqno,
Chris Wilsonee4f42b2012-02-15 11:25:38 +0000761 error->ring[i].requests[j].jiffies,
762 error->ring[i].requests[j].tail);
Chris Wilson52d39a22012-02-15 11:25:37 +0000763 }
764 }
765
766 if ((obj = error->ring[i].ringbuffer)) {
Chris Wilsone2f973d2011-01-27 19:15:11 +0000767 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
768 dev_priv->ring[i].name,
769 obj->gtt_offset);
770 offset = 0;
771 for (page = 0; page < obj->page_count; page++) {
772 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
773 seq_printf(m, "%08x : %08x\n",
774 offset,
775 obj->pages[page][elt]);
776 offset += 4;
777 }
Chris Wilson9df30792010-02-18 10:24:56 +0000778 }
779 }
780 }
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700781
Chris Wilson6ef3d422010-08-04 20:26:07 +0100782 if (error->overlay)
783 intel_overlay_print_error_state(m, error->overlay);
784
Chris Wilsonc4a1d9e2010-11-21 13:12:35 +0000785 if (error->display)
786 intel_display_print_error_state(m, dev, error->display);
787
Jesse Barnes63eeaf32009-06-18 16:56:52 -0700788 return 0;
789}
Ben Gamari6911a9b2009-04-02 11:24:54 -0700790
Daniel Vetterd5442302012-04-27 15:17:40 +0200791static ssize_t
792i915_error_state_write(struct file *filp,
793 const char __user *ubuf,
794 size_t cnt,
795 loff_t *ppos)
796{
797 struct seq_file *m = filp->private_data;
798 struct i915_error_state_file_priv *error_priv = m->private;
799 struct drm_device *dev = error_priv->dev;
Daniel Vetter22bcfc62012-08-09 15:07:02 +0200800 int ret;
Daniel Vetterd5442302012-04-27 15:17:40 +0200801
802 DRM_DEBUG_DRIVER("Resetting error state\n");
803
Daniel Vetter22bcfc62012-08-09 15:07:02 +0200804 ret = mutex_lock_interruptible(&dev->struct_mutex);
805 if (ret)
806 return ret;
807
Daniel Vetterd5442302012-04-27 15:17:40 +0200808 i915_destroy_error_state(dev);
809 mutex_unlock(&dev->struct_mutex);
810
811 return cnt;
812}
813
814static int i915_error_state_open(struct inode *inode, struct file *file)
815{
816 struct drm_device *dev = inode->i_private;
817 drm_i915_private_t *dev_priv = dev->dev_private;
818 struct i915_error_state_file_priv *error_priv;
819 unsigned long flags;
820
821 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
822 if (!error_priv)
823 return -ENOMEM;
824
825 error_priv->dev = dev;
826
827 spin_lock_irqsave(&dev_priv->error_lock, flags);
828 error_priv->error = dev_priv->first_error;
829 if (error_priv->error)
830 kref_get(&error_priv->error->ref);
831 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
832
833 return single_open(file, i915_error_state, error_priv);
834}
835
836static int i915_error_state_release(struct inode *inode, struct file *file)
837{
838 struct seq_file *m = file->private_data;
839 struct i915_error_state_file_priv *error_priv = m->private;
840
841 if (error_priv->error)
842 kref_put(&error_priv->error->ref, i915_error_state_free);
843 kfree(error_priv);
844
845 return single_release(inode, file);
846}
847
848static const struct file_operations i915_error_state_fops = {
849 .owner = THIS_MODULE,
850 .open = i915_error_state_open,
851 .read = seq_read,
852 .write = i915_error_state_write,
853 .llseek = default_llseek,
854 .release = i915_error_state_release,
855};
856
Jesse Barnesf97108d2010-01-29 11:27:07 -0800857static int i915_rstdby_delays(struct seq_file *m, void *unused)
858{
859 struct drm_info_node *node = (struct drm_info_node *) m->private;
860 struct drm_device *dev = node->minor->dev;
861 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700862 u16 crstanddelay;
863 int ret;
864
865 ret = mutex_lock_interruptible(&dev->struct_mutex);
866 if (ret)
867 return ret;
868
869 crstanddelay = I915_READ16(CRSTANDVID);
870
871 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800872
873 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
874
875 return 0;
876}
877
878static int i915_cur_delayinfo(struct seq_file *m, void *unused)
879{
880 struct drm_info_node *node = (struct drm_info_node *) m->private;
881 struct drm_device *dev = node->minor->dev;
882 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100883 int ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800884
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800885 if (IS_GEN5(dev)) {
886 u16 rgvswctl = I915_READ16(MEMSWCTL);
887 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
888
889 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
890 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
891 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
892 MEMSTAT_VID_SHIFT);
893 seq_printf(m, "Current P-state: %d\n",
894 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
Jesse Barnes1c70c0c2011-06-29 13:34:36 -0700895 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800896 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
897 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
898 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800899 u32 rpstat;
900 u32 rpupei, rpcurup, rpprevup;
901 u32 rpdownei, rpcurdown, rpprevdown;
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800902 int max_freq;
903
904 /* RPSTAT1 is in the GT power well */
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100905 ret = mutex_lock_interruptible(&dev->struct_mutex);
906 if (ret)
907 return ret;
908
Ben Widawskyfcca7922011-04-25 11:23:07 -0700909 gen6_gt_force_wake_get(dev_priv);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800910
Jesse Barnesccab5c82011-01-18 15:49:25 -0800911 rpstat = I915_READ(GEN6_RPSTAT1);
912 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
913 rpcurup = I915_READ(GEN6_RP_CUR_UP);
914 rpprevup = I915_READ(GEN6_RP_PREV_UP);
915 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
916 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
917 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
918
Ben Widawskyd1ebd8162011-04-25 20:11:50 +0100919 gen6_gt_force_wake_put(dev_priv);
920 mutex_unlock(&dev->struct_mutex);
921
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800922 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800923 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800924 seq_printf(m, "Render p-state ratio: %d\n",
925 (gt_perf_status & 0xff00) >> 8);
926 seq_printf(m, "Render p-state VID: %d\n",
927 gt_perf_status & 0xff);
928 seq_printf(m, "Render p-state limit: %d\n",
929 rp_state_limits & 0xff);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800930 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
Jesse Barnese281fca2011-03-18 10:32:07 -0700931 GEN6_CAGF_SHIFT) * 50);
Jesse Barnesccab5c82011-01-18 15:49:25 -0800932 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
933 GEN6_CURICONT_MASK);
934 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
935 GEN6_CURBSYTAVG_MASK);
936 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
937 GEN6_CURBSYTAVG_MASK);
938 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
939 GEN6_CURIAVG_MASK);
940 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
941 GEN6_CURBSYTAVG_MASK);
942 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
943 GEN6_CURBSYTAVG_MASK);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800944
945 max_freq = (rp_state_cap & 0xff0000) >> 16;
946 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700947 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800948
949 max_freq = (rp_state_cap & 0xff00) >> 8;
950 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700951 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800952
953 max_freq = rp_state_cap & 0xff;
954 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
Jesse Barnese281fca2011-03-18 10:32:07 -0700955 max_freq * 50);
Jesse Barnes3b8d8d92010-12-17 14:19:02 -0800956 } else {
957 seq_printf(m, "no P-state info available\n");
958 }
Jesse Barnesf97108d2010-01-29 11:27:07 -0800959
960 return 0;
961}
962
963static int i915_delayfreq_table(struct seq_file *m, void *unused)
964{
965 struct drm_info_node *node = (struct drm_info_node *) m->private;
966 struct drm_device *dev = node->minor->dev;
967 drm_i915_private_t *dev_priv = dev->dev_private;
968 u32 delayfreq;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700969 int ret, i;
970
971 ret = mutex_lock_interruptible(&dev->struct_mutex);
972 if (ret)
973 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -0800974
975 for (i = 0; i < 16; i++) {
976 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
Jesse Barnes7648fa92010-05-20 14:28:11 -0700977 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
978 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
Jesse Barnesf97108d2010-01-29 11:27:07 -0800979 }
980
Ben Widawsky616fdb52011-10-05 11:44:54 -0700981 mutex_unlock(&dev->struct_mutex);
982
Jesse Barnesf97108d2010-01-29 11:27:07 -0800983 return 0;
984}
985
986static inline int MAP_TO_MV(int map)
987{
988 return 1250 - (map * 25);
989}
990
991static int i915_inttoext_table(struct seq_file *m, void *unused)
992{
993 struct drm_info_node *node = (struct drm_info_node *) m->private;
994 struct drm_device *dev = node->minor->dev;
995 drm_i915_private_t *dev_priv = dev->dev_private;
996 u32 inttoext;
Ben Widawsky616fdb52011-10-05 11:44:54 -0700997 int ret, i;
998
999 ret = mutex_lock_interruptible(&dev->struct_mutex);
1000 if (ret)
1001 return ret;
Jesse Barnesf97108d2010-01-29 11:27:07 -08001002
1003 for (i = 1; i <= 32; i++) {
1004 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1005 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1006 }
1007
Ben Widawsky616fdb52011-10-05 11:44:54 -07001008 mutex_unlock(&dev->struct_mutex);
1009
Jesse Barnesf97108d2010-01-29 11:27:07 -08001010 return 0;
1011}
1012
Ben Widawsky4d855292011-12-12 19:34:16 -08001013static int ironlake_drpc_info(struct seq_file *m)
Jesse Barnesf97108d2010-01-29 11:27:07 -08001014{
1015 struct drm_info_node *node = (struct drm_info_node *) m->private;
1016 struct drm_device *dev = node->minor->dev;
1017 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001018 u32 rgvmodectl, rstdbyctl;
1019 u16 crstandvid;
1020 int ret;
1021
1022 ret = mutex_lock_interruptible(&dev->struct_mutex);
1023 if (ret)
1024 return ret;
1025
1026 rgvmodectl = I915_READ(MEMMODECTL);
1027 rstdbyctl = I915_READ(RSTDBYCTL);
1028 crstandvid = I915_READ16(CRSTANDVID);
1029
1030 mutex_unlock(&dev->struct_mutex);
Jesse Barnesf97108d2010-01-29 11:27:07 -08001031
1032 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1033 "yes" : "no");
1034 seq_printf(m, "Boost freq: %d\n",
1035 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1036 MEMMODE_BOOST_FREQ_SHIFT);
1037 seq_printf(m, "HW control enabled: %s\n",
1038 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1039 seq_printf(m, "SW control enabled: %s\n",
1040 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1041 seq_printf(m, "Gated voltage change: %s\n",
1042 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1043 seq_printf(m, "Starting frequency: P%d\n",
1044 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001045 seq_printf(m, "Max P-state: P%d\n",
Jesse Barnesf97108d2010-01-29 11:27:07 -08001046 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001047 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1048 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1049 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1050 seq_printf(m, "Render standby enabled: %s\n",
1051 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
Jesse Barnes88271da2011-01-05 12:01:24 -08001052 seq_printf(m, "Current RS state: ");
1053 switch (rstdbyctl & RSX_STATUS_MASK) {
1054 case RSX_STATUS_ON:
1055 seq_printf(m, "on\n");
1056 break;
1057 case RSX_STATUS_RC1:
1058 seq_printf(m, "RC1\n");
1059 break;
1060 case RSX_STATUS_RC1E:
1061 seq_printf(m, "RC1E\n");
1062 break;
1063 case RSX_STATUS_RS1:
1064 seq_printf(m, "RS1\n");
1065 break;
1066 case RSX_STATUS_RS2:
1067 seq_printf(m, "RS2 (RC6)\n");
1068 break;
1069 case RSX_STATUS_RS3:
1070 seq_printf(m, "RC3 (RC6+)\n");
1071 break;
1072 default:
1073 seq_printf(m, "unknown\n");
1074 break;
1075 }
Jesse Barnesf97108d2010-01-29 11:27:07 -08001076
1077 return 0;
1078}
1079
Ben Widawsky4d855292011-12-12 19:34:16 -08001080static int gen6_drpc_info(struct seq_file *m)
1081{
1082
1083 struct drm_info_node *node = (struct drm_info_node *) m->private;
1084 struct drm_device *dev = node->minor->dev;
1085 struct drm_i915_private *dev_priv = dev->dev_private;
1086 u32 rpmodectl1, gt_core_status, rcctl1;
Daniel Vetter93b525d2012-01-25 13:52:43 +01001087 unsigned forcewake_count;
Ben Widawsky4d855292011-12-12 19:34:16 -08001088 int count=0, ret;
1089
1090
1091 ret = mutex_lock_interruptible(&dev->struct_mutex);
1092 if (ret)
1093 return ret;
1094
Daniel Vetter93b525d2012-01-25 13:52:43 +01001095 spin_lock_irq(&dev_priv->gt_lock);
1096 forcewake_count = dev_priv->forcewake_count;
1097 spin_unlock_irq(&dev_priv->gt_lock);
1098
1099 if (forcewake_count) {
1100 seq_printf(m, "RC information inaccurate because somebody "
1101 "holds a forcewake reference \n");
Ben Widawsky4d855292011-12-12 19:34:16 -08001102 } else {
1103 /* NB: we cannot use forcewake, else we read the wrong values */
1104 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1105 udelay(10);
1106 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1107 }
1108
1109 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1110 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1111
1112 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1113 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1114 mutex_unlock(&dev->struct_mutex);
1115
1116 seq_printf(m, "Video Turbo Mode: %s\n",
1117 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1118 seq_printf(m, "HW control enabled: %s\n",
1119 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1120 seq_printf(m, "SW control enabled: %s\n",
1121 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1122 GEN6_RP_MEDIA_SW_MODE));
Eric Anholtfff24e22012-01-23 16:14:05 -08001123 seq_printf(m, "RC1e Enabled: %s\n",
Ben Widawsky4d855292011-12-12 19:34:16 -08001124 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1125 seq_printf(m, "RC6 Enabled: %s\n",
1126 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1127 seq_printf(m, "Deep RC6 Enabled: %s\n",
1128 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1129 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1130 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1131 seq_printf(m, "Current RC state: ");
1132 switch (gt_core_status & GEN6_RCn_MASK) {
1133 case GEN6_RC0:
1134 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1135 seq_printf(m, "Core Power Down\n");
1136 else
1137 seq_printf(m, "on\n");
1138 break;
1139 case GEN6_RC3:
1140 seq_printf(m, "RC3\n");
1141 break;
1142 case GEN6_RC6:
1143 seq_printf(m, "RC6\n");
1144 break;
1145 case GEN6_RC7:
1146 seq_printf(m, "RC7\n");
1147 break;
1148 default:
1149 seq_printf(m, "Unknown\n");
1150 break;
1151 }
1152
1153 seq_printf(m, "Core Power Down: %s\n",
1154 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
Ben Widawskycce66a22012-03-27 18:59:38 -07001155
1156 /* Not exactly sure what this is */
1157 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1158 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1159 seq_printf(m, "RC6 residency since boot: %u\n",
1160 I915_READ(GEN6_GT_GFX_RC6));
1161 seq_printf(m, "RC6+ residency since boot: %u\n",
1162 I915_READ(GEN6_GT_GFX_RC6p));
1163 seq_printf(m, "RC6++ residency since boot: %u\n",
1164 I915_READ(GEN6_GT_GFX_RC6pp));
1165
Ben Widawsky4d855292011-12-12 19:34:16 -08001166 return 0;
1167}
1168
1169static int i915_drpc_info(struct seq_file *m, void *unused)
1170{
1171 struct drm_info_node *node = (struct drm_info_node *) m->private;
1172 struct drm_device *dev = node->minor->dev;
1173
1174 if (IS_GEN6(dev) || IS_GEN7(dev))
1175 return gen6_drpc_info(m);
1176 else
1177 return ironlake_drpc_info(m);
1178}
1179
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001180static int i915_fbc_status(struct seq_file *m, void *unused)
1181{
1182 struct drm_info_node *node = (struct drm_info_node *) m->private;
1183 struct drm_device *dev = node->minor->dev;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001184 drm_i915_private_t *dev_priv = dev->dev_private;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001185
Adam Jacksonee5382a2010-04-23 11:17:39 -04001186 if (!I915_HAS_FBC(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001187 seq_printf(m, "FBC unsupported on this chipset\n");
1188 return 0;
1189 }
1190
Adam Jacksonee5382a2010-04-23 11:17:39 -04001191 if (intel_fbc_enabled(dev)) {
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001192 seq_printf(m, "FBC enabled\n");
1193 } else {
1194 seq_printf(m, "FBC disabled: ");
1195 switch (dev_priv->no_fbc_reason) {
Chris Wilsonbed4a672010-09-11 10:47:47 +01001196 case FBC_NO_OUTPUT:
1197 seq_printf(m, "no outputs");
1198 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001199 case FBC_STOLEN_TOO_SMALL:
1200 seq_printf(m, "not enough stolen memory");
1201 break;
1202 case FBC_UNSUPPORTED_MODE:
1203 seq_printf(m, "mode not supported");
1204 break;
1205 case FBC_MODE_TOO_LARGE:
1206 seq_printf(m, "mode too large");
1207 break;
1208 case FBC_BAD_PLANE:
1209 seq_printf(m, "FBC unsupported on plane");
1210 break;
1211 case FBC_NOT_TILED:
1212 seq_printf(m, "scanout buffer not tiled");
1213 break;
Jesse Barnes9c928d12010-07-23 15:20:00 -07001214 case FBC_MULTIPLE_PIPES:
1215 seq_printf(m, "multiple pipes are enabled");
1216 break;
Jesse Barnesc1a9f042011-05-05 15:24:21 -07001217 case FBC_MODULE_PARAM:
1218 seq_printf(m, "disabled per module param (default off)");
1219 break;
Jesse Barnesb5e50c32010-02-05 12:42:41 -08001220 default:
1221 seq_printf(m, "unknown reason");
1222 }
1223 seq_printf(m, "\n");
1224 }
1225 return 0;
1226}
1227
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001228static int i915_sr_status(struct seq_file *m, void *unused)
1229{
1230 struct drm_info_node *node = (struct drm_info_node *) m->private;
1231 struct drm_device *dev = node->minor->dev;
1232 drm_i915_private_t *dev_priv = dev->dev_private;
1233 bool sr_enabled = false;
1234
Yuanhan Liu13982612010-12-15 15:42:31 +08001235 if (HAS_PCH_SPLIT(dev))
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001236 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
Chris Wilsona6c45cf2010-09-17 00:32:17 +01001237 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001238 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1239 else if (IS_I915GM(dev))
1240 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1241 else if (IS_PINEVIEW(dev))
1242 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1243
Chris Wilson5ba2aaa2010-08-19 18:04:08 +01001244 seq_printf(m, "self-refresh: %s\n",
1245 sr_enabled ? "enabled" : "disabled");
Jesse Barnes4a9bef32010-02-05 12:47:35 -08001246
1247 return 0;
1248}
1249
Jesse Barnes7648fa92010-05-20 14:28:11 -07001250static int i915_emon_status(struct seq_file *m, void *unused)
1251{
1252 struct drm_info_node *node = (struct drm_info_node *) m->private;
1253 struct drm_device *dev = node->minor->dev;
1254 drm_i915_private_t *dev_priv = dev->dev_private;
1255 unsigned long temp, chipset, gfx;
Chris Wilsonde227ef2010-07-03 07:58:38 +01001256 int ret;
1257
Chris Wilson582be6b2012-04-30 19:35:02 +01001258 if (!IS_GEN5(dev))
1259 return -ENODEV;
1260
Chris Wilsonde227ef2010-07-03 07:58:38 +01001261 ret = mutex_lock_interruptible(&dev->struct_mutex);
1262 if (ret)
1263 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001264
1265 temp = i915_mch_val(dev_priv);
1266 chipset = i915_chipset_val(dev_priv);
1267 gfx = i915_gfx_val(dev_priv);
Chris Wilsonde227ef2010-07-03 07:58:38 +01001268 mutex_unlock(&dev->struct_mutex);
Jesse Barnes7648fa92010-05-20 14:28:11 -07001269
1270 seq_printf(m, "GMCH temp: %ld\n", temp);
1271 seq_printf(m, "Chipset power: %ld\n", chipset);
1272 seq_printf(m, "GFX power: %ld\n", gfx);
1273 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1274
1275 return 0;
1276}
1277
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001278static int i915_ring_freq_table(struct seq_file *m, void *unused)
1279{
1280 struct drm_info_node *node = (struct drm_info_node *) m->private;
1281 struct drm_device *dev = node->minor->dev;
1282 drm_i915_private_t *dev_priv = dev->dev_private;
1283 int ret;
1284 int gpu_freq, ia_freq;
1285
Jesse Barnes1c70c0c2011-06-29 13:34:36 -07001286 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001287 seq_printf(m, "unsupported on this chipset\n");
1288 return 0;
1289 }
1290
1291 ret = mutex_lock_interruptible(&dev->struct_mutex);
1292 if (ret)
1293 return ret;
1294
1295 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1296
Daniel Vetterc6a828d2012-08-08 23:35:35 +02001297 for (gpu_freq = dev_priv->rps.min_delay;
1298 gpu_freq <= dev_priv->rps.max_delay;
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07001299 gpu_freq++) {
1300 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1301 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1302 GEN6_PCODE_READ_MIN_FREQ_TABLE);
1303 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1304 GEN6_PCODE_READY) == 0, 10)) {
1305 DRM_ERROR("pcode read of freq table timed out\n");
1306 continue;
1307 }
1308 ia_freq = I915_READ(GEN6_PCODE_DATA);
1309 seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
1310 }
1311
1312 mutex_unlock(&dev->struct_mutex);
1313
1314 return 0;
1315}
1316
Jesse Barnes7648fa92010-05-20 14:28:11 -07001317static int i915_gfxec(struct seq_file *m, void *unused)
1318{
1319 struct drm_info_node *node = (struct drm_info_node *) m->private;
1320 struct drm_device *dev = node->minor->dev;
1321 drm_i915_private_t *dev_priv = dev->dev_private;
Ben Widawsky616fdb52011-10-05 11:44:54 -07001322 int ret;
1323
1324 ret = mutex_lock_interruptible(&dev->struct_mutex);
1325 if (ret)
1326 return ret;
Jesse Barnes7648fa92010-05-20 14:28:11 -07001327
1328 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1329
Ben Widawsky616fdb52011-10-05 11:44:54 -07001330 mutex_unlock(&dev->struct_mutex);
1331
Jesse Barnes7648fa92010-05-20 14:28:11 -07001332 return 0;
1333}
1334
Chris Wilson44834a62010-08-19 16:09:23 +01001335static int i915_opregion(struct seq_file *m, void *unused)
1336{
1337 struct drm_info_node *node = (struct drm_info_node *) m->private;
1338 struct drm_device *dev = node->minor->dev;
1339 drm_i915_private_t *dev_priv = dev->dev_private;
1340 struct intel_opregion *opregion = &dev_priv->opregion;
Daniel Vetter0d38f002012-04-21 22:49:10 +02001341 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
Chris Wilson44834a62010-08-19 16:09:23 +01001342 int ret;
1343
Daniel Vetter0d38f002012-04-21 22:49:10 +02001344 if (data == NULL)
1345 return -ENOMEM;
1346
Chris Wilson44834a62010-08-19 16:09:23 +01001347 ret = mutex_lock_interruptible(&dev->struct_mutex);
1348 if (ret)
Daniel Vetter0d38f002012-04-21 22:49:10 +02001349 goto out;
Chris Wilson44834a62010-08-19 16:09:23 +01001350
Daniel Vetter0d38f002012-04-21 22:49:10 +02001351 if (opregion->header) {
1352 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1353 seq_write(m, data, OPREGION_SIZE);
1354 }
Chris Wilson44834a62010-08-19 16:09:23 +01001355
1356 mutex_unlock(&dev->struct_mutex);
1357
Daniel Vetter0d38f002012-04-21 22:49:10 +02001358out:
1359 kfree(data);
Chris Wilson44834a62010-08-19 16:09:23 +01001360 return 0;
1361}
1362
Chris Wilson37811fc2010-08-25 22:45:57 +01001363static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1364{
1365 struct drm_info_node *node = (struct drm_info_node *) m->private;
1366 struct drm_device *dev = node->minor->dev;
1367 drm_i915_private_t *dev_priv = dev->dev_private;
1368 struct intel_fbdev *ifbdev;
1369 struct intel_framebuffer *fb;
1370 int ret;
1371
1372 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1373 if (ret)
1374 return ret;
1375
1376 ifbdev = dev_priv->fbdev;
1377 fb = to_intel_framebuffer(ifbdev->helper.fb);
1378
1379 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1380 fb->base.width,
1381 fb->base.height,
1382 fb->base.depth,
1383 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001384 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001385 seq_printf(m, "\n");
1386
1387 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1388 if (&fb->base == ifbdev->helper.fb)
1389 continue;
1390
1391 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1392 fb->base.width,
1393 fb->base.height,
1394 fb->base.depth,
1395 fb->base.bits_per_pixel);
Chris Wilson05394f32010-11-08 19:18:58 +00001396 describe_obj(m, fb->obj);
Chris Wilson37811fc2010-08-25 22:45:57 +01001397 seq_printf(m, "\n");
1398 }
1399
1400 mutex_unlock(&dev->mode_config.mutex);
1401
1402 return 0;
1403}
1404
Ben Widawskye76d3632011-03-19 18:14:29 -07001405static int i915_context_status(struct seq_file *m, void *unused)
1406{
1407 struct drm_info_node *node = (struct drm_info_node *) m->private;
1408 struct drm_device *dev = node->minor->dev;
1409 drm_i915_private_t *dev_priv = dev->dev_private;
1410 int ret;
1411
1412 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1413 if (ret)
1414 return ret;
1415
Ben Widawskydc501fb2011-06-29 11:41:51 -07001416 if (dev_priv->pwrctx) {
1417 seq_printf(m, "power context ");
1418 describe_obj(m, dev_priv->pwrctx);
1419 seq_printf(m, "\n");
1420 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001421
Ben Widawskydc501fb2011-06-29 11:41:51 -07001422 if (dev_priv->renderctx) {
1423 seq_printf(m, "render context ");
1424 describe_obj(m, dev_priv->renderctx);
1425 seq_printf(m, "\n");
1426 }
Ben Widawskye76d3632011-03-19 18:14:29 -07001427
1428 mutex_unlock(&dev->mode_config.mutex);
1429
1430 return 0;
1431}
1432
Ben Widawsky6d794d42011-04-25 11:25:56 -07001433static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1434{
1435 struct drm_info_node *node = (struct drm_info_node *) m->private;
1436 struct drm_device *dev = node->minor->dev;
1437 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter9f1f46a2011-12-14 13:57:03 +01001438 unsigned forcewake_count;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001439
Daniel Vetter9f1f46a2011-12-14 13:57:03 +01001440 spin_lock_irq(&dev_priv->gt_lock);
1441 forcewake_count = dev_priv->forcewake_count;
1442 spin_unlock_irq(&dev_priv->gt_lock);
1443
1444 seq_printf(m, "forcewake count = %u\n", forcewake_count);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001445
1446 return 0;
1447}
1448
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001449static const char *swizzle_string(unsigned swizzle)
1450{
1451 switch(swizzle) {
1452 case I915_BIT_6_SWIZZLE_NONE:
1453 return "none";
1454 case I915_BIT_6_SWIZZLE_9:
1455 return "bit9";
1456 case I915_BIT_6_SWIZZLE_9_10:
1457 return "bit9/bit10";
1458 case I915_BIT_6_SWIZZLE_9_11:
1459 return "bit9/bit11";
1460 case I915_BIT_6_SWIZZLE_9_10_11:
1461 return "bit9/bit10/bit11";
1462 case I915_BIT_6_SWIZZLE_9_17:
1463 return "bit9/bit17";
1464 case I915_BIT_6_SWIZZLE_9_10_17:
1465 return "bit9/bit10/bit17";
1466 case I915_BIT_6_SWIZZLE_UNKNOWN:
1467 return "unkown";
1468 }
1469
1470 return "bug";
1471}
1472
1473static int i915_swizzle_info(struct seq_file *m, void *data)
1474{
1475 struct drm_info_node *node = (struct drm_info_node *) m->private;
1476 struct drm_device *dev = node->minor->dev;
1477 struct drm_i915_private *dev_priv = dev->dev_private;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001478 int ret;
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001479
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001480 ret = mutex_lock_interruptible(&dev->struct_mutex);
1481 if (ret)
1482 return ret;
1483
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001484 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1485 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1486 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1487 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1488
1489 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1490 seq_printf(m, "DDC = 0x%08x\n",
1491 I915_READ(DCC));
1492 seq_printf(m, "C0DRB3 = 0x%04x\n",
1493 I915_READ16(C0DRB3));
1494 seq_printf(m, "C1DRB3 = 0x%04x\n",
1495 I915_READ16(C1DRB3));
Daniel Vetter3fa7d232012-01-31 16:47:56 +01001496 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1497 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1498 I915_READ(MAD_DIMM_C0));
1499 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1500 I915_READ(MAD_DIMM_C1));
1501 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1502 I915_READ(MAD_DIMM_C2));
1503 seq_printf(m, "TILECTL = 0x%08x\n",
1504 I915_READ(TILECTL));
1505 seq_printf(m, "ARB_MODE = 0x%08x\n",
1506 I915_READ(ARB_MODE));
1507 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1508 I915_READ(DISP_ARB_CTL));
Daniel Vetterea16a3c2011-12-14 13:57:16 +01001509 }
1510 mutex_unlock(&dev->struct_mutex);
1511
1512 return 0;
1513}
1514
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01001515static int i915_ppgtt_info(struct seq_file *m, void *data)
1516{
1517 struct drm_info_node *node = (struct drm_info_node *) m->private;
1518 struct drm_device *dev = node->minor->dev;
1519 struct drm_i915_private *dev_priv = dev->dev_private;
1520 struct intel_ring_buffer *ring;
1521 int i, ret;
1522
1523
1524 ret = mutex_lock_interruptible(&dev->struct_mutex);
1525 if (ret)
1526 return ret;
1527 if (INTEL_INFO(dev)->gen == 6)
1528 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1529
1530 for (i = 0; i < I915_NUM_RINGS; i++) {
1531 ring = &dev_priv->ring[i];
1532
1533 seq_printf(m, "%s\n", ring->name);
1534 if (INTEL_INFO(dev)->gen == 7)
1535 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1536 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1537 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1538 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1539 }
1540 if (dev_priv->mm.aliasing_ppgtt) {
1541 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1542
1543 seq_printf(m, "aliasing PPGTT:\n");
1544 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1545 }
1546 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1547 mutex_unlock(&dev->struct_mutex);
1548
1549 return 0;
1550}
1551
Jesse Barnes57f350b2012-03-28 13:39:25 -07001552static int i915_dpio_info(struct seq_file *m, void *data)
1553{
1554 struct drm_info_node *node = (struct drm_info_node *) m->private;
1555 struct drm_device *dev = node->minor->dev;
1556 struct drm_i915_private *dev_priv = dev->dev_private;
1557 int ret;
1558
1559
1560 if (!IS_VALLEYVIEW(dev)) {
1561 seq_printf(m, "unsupported\n");
1562 return 0;
1563 }
1564
1565 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1566 if (ret)
1567 return ret;
1568
1569 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1570
1571 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1572 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1573 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1574 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1575
1576 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1577 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1578 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1579 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1580
1581 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1582 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1583 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1584 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1585
1586 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1587 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1588 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1589 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1590
1591 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1592 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1593
1594 mutex_unlock(&dev->mode_config.mutex);
1595
1596 return 0;
1597}
1598
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001599static ssize_t
1600i915_wedged_read(struct file *filp,
1601 char __user *ubuf,
1602 size_t max,
1603 loff_t *ppos)
1604{
1605 struct drm_device *dev = filp->private_data;
1606 drm_i915_private_t *dev_priv = dev->dev_private;
1607 char buf[80];
1608 int len;
1609
Akshay Joshi0206e352011-08-16 15:34:10 -04001610 len = snprintf(buf, sizeof(buf),
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001611 "wedged : %d\n",
1612 atomic_read(&dev_priv->mm.wedged));
1613
Akshay Joshi0206e352011-08-16 15:34:10 -04001614 if (len > sizeof(buf))
1615 len = sizeof(buf);
Dan Carpenterf4433a82010-09-08 21:44:47 +02001616
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001617 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1618}
1619
1620static ssize_t
1621i915_wedged_write(struct file *filp,
1622 const char __user *ubuf,
1623 size_t cnt,
1624 loff_t *ppos)
1625{
1626 struct drm_device *dev = filp->private_data;
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001627 char buf[20];
1628 int val = 1;
1629
1630 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001631 if (cnt > sizeof(buf) - 1)
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001632 return -EINVAL;
1633
1634 if (copy_from_user(buf, ubuf, cnt))
1635 return -EFAULT;
1636 buf[cnt] = 0;
1637
1638 val = simple_strtoul(buf, NULL, 0);
1639 }
1640
1641 DRM_INFO("Manually setting wedged to %d\n", val);
Chris Wilson527f9e92010-11-11 01:16:58 +00001642 i915_handle_error(dev, val);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001643
1644 return cnt;
1645}
1646
1647static const struct file_operations i915_wedged_fops = {
1648 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001649 .open = simple_open,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001650 .read = i915_wedged_read,
1651 .write = i915_wedged_write,
Arnd Bergmann6038f372010-08-15 18:52:59 +02001652 .llseek = default_llseek,
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001653};
1654
Jesse Barnes358733e2011-07-27 11:53:01 -07001655static ssize_t
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001656i915_ring_stop_read(struct file *filp,
1657 char __user *ubuf,
1658 size_t max,
1659 loff_t *ppos)
1660{
1661 struct drm_device *dev = filp->private_data;
1662 drm_i915_private_t *dev_priv = dev->dev_private;
1663 char buf[20];
1664 int len;
1665
1666 len = snprintf(buf, sizeof(buf),
1667 "0x%08x\n", dev_priv->stop_rings);
1668
1669 if (len > sizeof(buf))
1670 len = sizeof(buf);
1671
1672 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1673}
1674
1675static ssize_t
1676i915_ring_stop_write(struct file *filp,
1677 const char __user *ubuf,
1678 size_t cnt,
1679 loff_t *ppos)
1680{
1681 struct drm_device *dev = filp->private_data;
1682 struct drm_i915_private *dev_priv = dev->dev_private;
1683 char buf[20];
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001684 int val = 0, ret;
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001685
1686 if (cnt > 0) {
1687 if (cnt > sizeof(buf) - 1)
1688 return -EINVAL;
1689
1690 if (copy_from_user(buf, ubuf, cnt))
1691 return -EFAULT;
1692 buf[cnt] = 0;
1693
1694 val = simple_strtoul(buf, NULL, 0);
1695 }
1696
1697 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1698
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001699 ret = mutex_lock_interruptible(&dev->struct_mutex);
1700 if (ret)
1701 return ret;
1702
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001703 dev_priv->stop_rings = val;
1704 mutex_unlock(&dev->struct_mutex);
1705
1706 return cnt;
1707}
1708
1709static const struct file_operations i915_ring_stop_fops = {
1710 .owner = THIS_MODULE,
1711 .open = simple_open,
1712 .read = i915_ring_stop_read,
1713 .write = i915_ring_stop_write,
1714 .llseek = default_llseek,
1715};
Daniel Vetterd5442302012-04-27 15:17:40 +02001716
Daniel Vettere5eb3d62012-05-03 14:48:16 +02001717static ssize_t
Jesse Barnes358733e2011-07-27 11:53:01 -07001718i915_max_freq_read(struct file *filp,
1719 char __user *ubuf,
1720 size_t max,
1721 loff_t *ppos)
1722{
1723 struct drm_device *dev = filp->private_data;
1724 drm_i915_private_t *dev_priv = dev->dev_private;
1725 char buf[80];
Daniel Vetter004777c2012-08-09 15:07:01 +02001726 int len, ret;
1727
1728 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1729 return -ENODEV;
1730
1731 ret = mutex_lock_interruptible(&dev->struct_mutex);
1732 if (ret)
1733 return ret;
Jesse Barnes358733e2011-07-27 11:53:01 -07001734
Akshay Joshi0206e352011-08-16 15:34:10 -04001735 len = snprintf(buf, sizeof(buf),
Daniel Vetterc6a828d2012-08-08 23:35:35 +02001736 "max freq: %d\n", dev_priv->rps.max_delay * 50);
Daniel Vetter004777c2012-08-09 15:07:01 +02001737 mutex_unlock(&dev->struct_mutex);
Jesse Barnes358733e2011-07-27 11:53:01 -07001738
Akshay Joshi0206e352011-08-16 15:34:10 -04001739 if (len > sizeof(buf))
1740 len = sizeof(buf);
Jesse Barnes358733e2011-07-27 11:53:01 -07001741
1742 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1743}
1744
1745static ssize_t
1746i915_max_freq_write(struct file *filp,
1747 const char __user *ubuf,
1748 size_t cnt,
1749 loff_t *ppos)
1750{
1751 struct drm_device *dev = filp->private_data;
1752 struct drm_i915_private *dev_priv = dev->dev_private;
1753 char buf[20];
Daniel Vetter004777c2012-08-09 15:07:01 +02001754 int val = 1, ret;
1755
1756 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1757 return -ENODEV;
Jesse Barnes358733e2011-07-27 11:53:01 -07001758
1759 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001760 if (cnt > sizeof(buf) - 1)
Jesse Barnes358733e2011-07-27 11:53:01 -07001761 return -EINVAL;
1762
1763 if (copy_from_user(buf, ubuf, cnt))
1764 return -EFAULT;
1765 buf[cnt] = 0;
1766
1767 val = simple_strtoul(buf, NULL, 0);
1768 }
1769
1770 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1771
Daniel Vetter004777c2012-08-09 15:07:01 +02001772 ret = mutex_lock_interruptible(&dev->struct_mutex);
1773 if (ret)
1774 return ret;
1775
Jesse Barnes358733e2011-07-27 11:53:01 -07001776 /*
1777 * Turbo will still be enabled, but won't go above the set value.
1778 */
Daniel Vetterc6a828d2012-08-08 23:35:35 +02001779 dev_priv->rps.max_delay = val / 50;
Jesse Barnes358733e2011-07-27 11:53:01 -07001780
1781 gen6_set_rps(dev, val / 50);
Daniel Vetter004777c2012-08-09 15:07:01 +02001782 mutex_unlock(&dev->struct_mutex);
Jesse Barnes358733e2011-07-27 11:53:01 -07001783
1784 return cnt;
1785}
1786
1787static const struct file_operations i915_max_freq_fops = {
1788 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001789 .open = simple_open,
Jesse Barnes358733e2011-07-27 11:53:01 -07001790 .read = i915_max_freq_read,
1791 .write = i915_max_freq_write,
1792 .llseek = default_llseek,
1793};
1794
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001795static ssize_t
Jesse Barnes1523c312012-05-25 12:34:54 -07001796i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1797 loff_t *ppos)
1798{
1799 struct drm_device *dev = filp->private_data;
1800 drm_i915_private_t *dev_priv = dev->dev_private;
1801 char buf[80];
Daniel Vetter004777c2012-08-09 15:07:01 +02001802 int len, ret;
1803
1804 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1805 return -ENODEV;
1806
1807 ret = mutex_lock_interruptible(&dev->struct_mutex);
1808 if (ret)
1809 return ret;
Jesse Barnes1523c312012-05-25 12:34:54 -07001810
1811 len = snprintf(buf, sizeof(buf),
Daniel Vetterc6a828d2012-08-08 23:35:35 +02001812 "min freq: %d\n", dev_priv->rps.min_delay * 50);
Daniel Vetter004777c2012-08-09 15:07:01 +02001813 mutex_unlock(&dev->struct_mutex);
Jesse Barnes1523c312012-05-25 12:34:54 -07001814
1815 if (len > sizeof(buf))
1816 len = sizeof(buf);
1817
1818 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1819}
1820
1821static ssize_t
1822i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1823 loff_t *ppos)
1824{
1825 struct drm_device *dev = filp->private_data;
1826 struct drm_i915_private *dev_priv = dev->dev_private;
1827 char buf[20];
Daniel Vetter004777c2012-08-09 15:07:01 +02001828 int val = 1, ret;
1829
1830 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1831 return -ENODEV;
Jesse Barnes1523c312012-05-25 12:34:54 -07001832
1833 if (cnt > 0) {
1834 if (cnt > sizeof(buf) - 1)
1835 return -EINVAL;
1836
1837 if (copy_from_user(buf, ubuf, cnt))
1838 return -EFAULT;
1839 buf[cnt] = 0;
1840
1841 val = simple_strtoul(buf, NULL, 0);
1842 }
1843
1844 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1845
Daniel Vetter004777c2012-08-09 15:07:01 +02001846 ret = mutex_lock_interruptible(&dev->struct_mutex);
1847 if (ret)
1848 return ret;
1849
Jesse Barnes1523c312012-05-25 12:34:54 -07001850 /*
1851 * Turbo will still be enabled, but won't go below the set value.
1852 */
Daniel Vetterc6a828d2012-08-08 23:35:35 +02001853 dev_priv->rps.min_delay = val / 50;
Jesse Barnes1523c312012-05-25 12:34:54 -07001854
1855 gen6_set_rps(dev, val / 50);
Daniel Vetter004777c2012-08-09 15:07:01 +02001856 mutex_unlock(&dev->struct_mutex);
Jesse Barnes1523c312012-05-25 12:34:54 -07001857
1858 return cnt;
1859}
1860
1861static const struct file_operations i915_min_freq_fops = {
1862 .owner = THIS_MODULE,
1863 .open = simple_open,
1864 .read = i915_min_freq_read,
1865 .write = i915_min_freq_write,
1866 .llseek = default_llseek,
1867};
1868
1869static ssize_t
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001870i915_cache_sharing_read(struct file *filp,
1871 char __user *ubuf,
1872 size_t max,
1873 loff_t *ppos)
1874{
1875 struct drm_device *dev = filp->private_data;
1876 drm_i915_private_t *dev_priv = dev->dev_private;
1877 char buf[80];
1878 u32 snpcr;
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001879 int len, ret;
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001880
Daniel Vetter004777c2012-08-09 15:07:01 +02001881 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1882 return -ENODEV;
1883
Daniel Vetter22bcfc62012-08-09 15:07:02 +02001884 ret = mutex_lock_interruptible(&dev->struct_mutex);
1885 if (ret)
1886 return ret;
1887
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001888 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1889 mutex_unlock(&dev_priv->dev->struct_mutex);
1890
Akshay Joshi0206e352011-08-16 15:34:10 -04001891 len = snprintf(buf, sizeof(buf),
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001892 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1893 GEN6_MBC_SNPCR_SHIFT);
1894
Akshay Joshi0206e352011-08-16 15:34:10 -04001895 if (len > sizeof(buf))
1896 len = sizeof(buf);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001897
1898 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1899}
1900
1901static ssize_t
1902i915_cache_sharing_write(struct file *filp,
1903 const char __user *ubuf,
1904 size_t cnt,
1905 loff_t *ppos)
1906{
1907 struct drm_device *dev = filp->private_data;
1908 struct drm_i915_private *dev_priv = dev->dev_private;
1909 char buf[20];
1910 u32 snpcr;
1911 int val = 1;
1912
Daniel Vetter004777c2012-08-09 15:07:01 +02001913 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1914 return -ENODEV;
1915
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001916 if (cnt > 0) {
Akshay Joshi0206e352011-08-16 15:34:10 -04001917 if (cnt > sizeof(buf) - 1)
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001918 return -EINVAL;
1919
1920 if (copy_from_user(buf, ubuf, cnt))
1921 return -EFAULT;
1922 buf[cnt] = 0;
1923
1924 val = simple_strtoul(buf, NULL, 0);
1925 }
1926
1927 if (val < 0 || val > 3)
1928 return -EINVAL;
1929
1930 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1931
1932 /* Update the cache sharing policy here as well */
1933 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1934 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1935 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1936 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1937
1938 return cnt;
1939}
1940
1941static const struct file_operations i915_cache_sharing_fops = {
1942 .owner = THIS_MODULE,
Stephen Boyd234e3402012-04-05 14:25:11 -07001943 .open = simple_open,
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07001944 .read = i915_cache_sharing_read,
1945 .write = i915_cache_sharing_write,
1946 .llseek = default_llseek,
1947};
1948
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001949/* As the drm_debugfs_init() routines are called before dev->dev_private is
1950 * allocated we need to hook into the minor for release. */
1951static int
1952drm_add_fake_info_node(struct drm_minor *minor,
1953 struct dentry *ent,
1954 const void *key)
1955{
1956 struct drm_info_node *node;
1957
1958 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1959 if (node == NULL) {
1960 debugfs_remove(ent);
1961 return -ENOMEM;
1962 }
1963
1964 node->minor = minor;
1965 node->dent = ent;
1966 node->info_ent = (void *) key;
Marcin Slusarzb3e067c2011-11-09 22:20:35 +01001967
1968 mutex_lock(&minor->debugfs_lock);
1969 list_add(&node->list, &minor->debugfs_list);
1970 mutex_unlock(&minor->debugfs_lock);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01001971
1972 return 0;
1973}
1974
Ben Widawsky6d794d42011-04-25 11:25:56 -07001975static int i915_forcewake_open(struct inode *inode, struct file *file)
1976{
1977 struct drm_device *dev = inode->i_private;
1978 struct drm_i915_private *dev_priv = dev->dev_private;
Ben Widawsky6d794d42011-04-25 11:25:56 -07001979
Daniel Vetter075edca2012-01-24 09:44:28 +01001980 if (INTEL_INFO(dev)->gen < 6)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001981 return 0;
1982
Ben Widawsky6d794d42011-04-25 11:25:56 -07001983 gen6_gt_force_wake_get(dev_priv);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001984
1985 return 0;
1986}
1987
Ben Widawskyc43b5632012-04-16 14:07:40 -07001988static int i915_forcewake_release(struct inode *inode, struct file *file)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001989{
1990 struct drm_device *dev = inode->i_private;
1991 struct drm_i915_private *dev_priv = dev->dev_private;
1992
Daniel Vetter075edca2012-01-24 09:44:28 +01001993 if (INTEL_INFO(dev)->gen < 6)
Ben Widawsky6d794d42011-04-25 11:25:56 -07001994 return 0;
1995
Ben Widawsky6d794d42011-04-25 11:25:56 -07001996 gen6_gt_force_wake_put(dev_priv);
Ben Widawsky6d794d42011-04-25 11:25:56 -07001997
1998 return 0;
1999}
2000
2001static const struct file_operations i915_forcewake_fops = {
2002 .owner = THIS_MODULE,
2003 .open = i915_forcewake_open,
2004 .release = i915_forcewake_release,
2005};
2006
2007static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2008{
2009 struct drm_device *dev = minor->dev;
2010 struct dentry *ent;
2011
2012 ent = debugfs_create_file("i915_forcewake_user",
Ben Widawsky8eb57292011-05-11 15:10:58 -07002013 S_IRUSR,
Ben Widawsky6d794d42011-04-25 11:25:56 -07002014 root, dev,
2015 &i915_forcewake_fops);
2016 if (IS_ERR(ent))
2017 return PTR_ERR(ent);
2018
Ben Widawsky8eb57292011-05-11 15:10:58 -07002019 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
Ben Widawsky6d794d42011-04-25 11:25:56 -07002020}
2021
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002022static int i915_debugfs_create(struct dentry *root,
2023 struct drm_minor *minor,
2024 const char *name,
2025 const struct file_operations *fops)
Jesse Barnes358733e2011-07-27 11:53:01 -07002026{
2027 struct drm_device *dev = minor->dev;
2028 struct dentry *ent;
2029
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002030 ent = debugfs_create_file(name,
Jesse Barnes358733e2011-07-27 11:53:01 -07002031 S_IRUGO | S_IWUSR,
2032 root, dev,
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002033 fops);
Jesse Barnes358733e2011-07-27 11:53:01 -07002034 if (IS_ERR(ent))
2035 return PTR_ERR(ent);
2036
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002037 return drm_add_fake_info_node(minor, ent, fops);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002038}
2039
Ben Gamari27c202a2009-07-01 22:26:52 -04002040static struct drm_info_list i915_debugfs_list[] = {
Chris Wilson311bd682011-01-13 19:06:50 +00002041 {"i915_capabilities", i915_capabilities, 0},
Chris Wilson73aa8082010-09-30 11:46:12 +01002042 {"i915_gem_objects", i915_gem_object_info, 0},
Chris Wilson08c18322011-01-10 00:00:24 +00002043 {"i915_gem_gtt", i915_gem_gtt_info, 0},
Chris Wilson1b502472012-04-24 15:47:30 +01002044 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -05002045 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
Ben Gamari433e12f2009-02-17 20:08:51 -05002046 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
Simon Farnsworth4e5359c2010-09-01 17:47:52 +01002047 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002048 {"i915_gem_request", i915_gem_request_info, 0},
2049 {"i915_gem_seqno", i915_gem_seqno_info, 0},
Chris Wilsona6172a82009-02-11 14:26:38 +00002050 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002051 {"i915_gem_interrupt", i915_interrupt_info, 0},
Chris Wilson1ec14ad2010-12-04 11:30:53 +00002052 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2053 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2054 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
Jesse Barnesf97108d2010-01-29 11:27:07 -08002055 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2056 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2057 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2058 {"i915_inttoext_table", i915_inttoext_table, 0},
2059 {"i915_drpc_info", i915_drpc_info, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07002060 {"i915_emon_status", i915_emon_status, 0},
Jesse Barnes23b2f8b2011-06-28 13:04:16 -07002061 {"i915_ring_freq_table", i915_ring_freq_table, 0},
Jesse Barnes7648fa92010-05-20 14:28:11 -07002062 {"i915_gfxec", i915_gfxec, 0},
Jesse Barnesb5e50c32010-02-05 12:42:41 -08002063 {"i915_fbc_status", i915_fbc_status, 0},
Jesse Barnes4a9bef32010-02-05 12:47:35 -08002064 {"i915_sr_status", i915_sr_status, 0},
Chris Wilson44834a62010-08-19 16:09:23 +01002065 {"i915_opregion", i915_opregion, 0},
Chris Wilson37811fc2010-08-25 22:45:57 +01002066 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
Ben Widawskye76d3632011-03-19 18:14:29 -07002067 {"i915_context_status", i915_context_status, 0},
Ben Widawsky6d794d42011-04-25 11:25:56 -07002068 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
Daniel Vetterea16a3c2011-12-14 13:57:16 +01002069 {"i915_swizzle_info", i915_swizzle_info, 0},
Daniel Vetter3cf17fc2012-02-09 17:15:49 +01002070 {"i915_ppgtt_info", i915_ppgtt_info, 0},
Jesse Barnes57f350b2012-03-28 13:39:25 -07002071 {"i915_dpio", i915_dpio_info, 0},
Ben Gamari20172632009-02-17 20:08:50 -05002072};
Ben Gamari27c202a2009-07-01 22:26:52 -04002073#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
Ben Gamari20172632009-02-17 20:08:50 -05002074
Ben Gamari27c202a2009-07-01 22:26:52 -04002075int i915_debugfs_init(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05002076{
Chris Wilsonf3cd4742009-10-13 22:20:20 +01002077 int ret;
2078
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002079 ret = i915_debugfs_create(minor->debugfs_root, minor,
2080 "i915_wedged",
2081 &i915_wedged_fops);
Chris Wilsonf3cd4742009-10-13 22:20:20 +01002082 if (ret)
2083 return ret;
2084
Ben Widawsky6d794d42011-04-25 11:25:56 -07002085 ret = i915_forcewake_create(minor->debugfs_root, minor);
2086 if (ret)
2087 return ret;
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002088
2089 ret = i915_debugfs_create(minor->debugfs_root, minor,
2090 "i915_max_freq",
2091 &i915_max_freq_fops);
Jesse Barnes358733e2011-07-27 11:53:01 -07002092 if (ret)
2093 return ret;
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002094
2095 ret = i915_debugfs_create(minor->debugfs_root, minor,
Jesse Barnes1523c312012-05-25 12:34:54 -07002096 "i915_min_freq",
2097 &i915_min_freq_fops);
2098 if (ret)
2099 return ret;
2100
2101 ret = i915_debugfs_create(minor->debugfs_root, minor,
Daniel Vetter6a9c3082011-12-14 13:57:11 +01002102 "i915_cache_sharing",
2103 &i915_cache_sharing_fops);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002104 if (ret)
2105 return ret;
Daniel Vetter004777c2012-08-09 15:07:01 +02002106
Daniel Vettere5eb3d62012-05-03 14:48:16 +02002107 ret = i915_debugfs_create(minor->debugfs_root, minor,
2108 "i915_ring_stop",
2109 &i915_ring_stop_fops);
2110 if (ret)
2111 return ret;
Ben Widawsky6d794d42011-04-25 11:25:56 -07002112
Daniel Vetterd5442302012-04-27 15:17:40 +02002113 ret = i915_debugfs_create(minor->debugfs_root, minor,
2114 "i915_error_state",
2115 &i915_error_state_fops);
2116 if (ret)
2117 return ret;
2118
Ben Gamari27c202a2009-07-01 22:26:52 -04002119 return drm_debugfs_create_files(i915_debugfs_list,
2120 I915_DEBUGFS_ENTRIES,
Ben Gamari20172632009-02-17 20:08:50 -05002121 minor->debugfs_root, minor);
2122}
2123
Ben Gamari27c202a2009-07-01 22:26:52 -04002124void i915_debugfs_cleanup(struct drm_minor *minor)
Ben Gamari20172632009-02-17 20:08:50 -05002125{
Ben Gamari27c202a2009-07-01 22:26:52 -04002126 drm_debugfs_remove_files(i915_debugfs_list,
2127 I915_DEBUGFS_ENTRIES, minor);
Ben Widawsky6d794d42011-04-25 11:25:56 -07002128 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2129 1, minor);
Kristian Høgsberg33db6792009-11-11 12:19:16 -05002130 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2131 1, minor);
Jesse Barnes358733e2011-07-27 11:53:01 -07002132 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2133 1, minor);
Jesse Barnes1523c312012-05-25 12:34:54 -07002134 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2135 1, minor);
Jesse Barnes07b7ddd2011-08-03 11:28:44 -07002136 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2137 1, minor);
Daniel Vettere5eb3d62012-05-03 14:48:16 +02002138 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2139 1, minor);
Daniel Vetter6bd459d2012-05-21 19:56:52 +02002140 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2141 1, minor);
Ben Gamari20172632009-02-17 20:08:50 -05002142}
2143
2144#endif /* CONFIG_DEBUG_FS */