Ralf Baechle | 73b4390 | 2008-07-16 16:12:25 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Miscellaneous functions for IDT EB434 board |
| 3 | * |
| 4 | * Copyright 2004 IDT Inc. (rischelp@idt.com) |
| 5 | * Copyright 2006 Phil Sutter <n0-1@freewrt.org> |
| 6 | * Copyright 2007 Florian Fainelli <florian@openwrt.org> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | * |
| 13 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 14 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 15 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 16 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 17 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 18 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 19 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 20 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 21 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 22 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License along |
| 25 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 26 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 27 | */ |
| 28 | |
| 29 | #include <linux/kernel.h> |
| 30 | #include <linux/gpio.h> |
| 31 | #include <linux/init.h> |
| 32 | #include <linux/types.h> |
| 33 | #include <linux/pci.h> |
| 34 | #include <linux/spinlock.h> |
| 35 | #include <linux/io.h> |
| 36 | #include <linux/platform_device.h> |
| 37 | |
| 38 | #include <asm/addrspace.h> |
| 39 | |
| 40 | #include <asm/mach-rc32434/rb.h> |
| 41 | |
| 42 | struct rb532_gpio_reg __iomem *rb532_gpio_reg0; |
| 43 | EXPORT_SYMBOL(rb532_gpio_reg0); |
| 44 | |
| 45 | struct mpmc_device dev3; |
| 46 | |
| 47 | static struct resource rb532_gpio_reg0_res[] = { |
| 48 | { |
| 49 | .name = "gpio_reg0", |
| 50 | .start = (u32)(IDT434_REG_BASE + GPIOBASE), |
| 51 | .end = (u32)(IDT434_REG_BASE + GPIOBASE + sizeof(struct rb532_gpio_reg)), |
| 52 | .flags = IORESOURCE_MEM, |
| 53 | } |
| 54 | }; |
| 55 | |
| 56 | static struct resource rb532_dev3_ctl_res[] = { |
| 57 | { |
| 58 | .name = "dev3_ctl", |
| 59 | .start = (u32)(IDT434_REG_BASE + DEV3BASE), |
| 60 | .end = (u32)(IDT434_REG_BASE + DEV3BASE + sizeof(struct dev_reg)), |
| 61 | .flags = IORESOURCE_MEM, |
| 62 | } |
| 63 | }; |
| 64 | |
| 65 | void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val) |
| 66 | { |
| 67 | unsigned flags, data; |
| 68 | unsigned i = 0; |
| 69 | |
| 70 | spin_lock_irqsave(&dev3.lock, flags); |
| 71 | |
| 72 | data = *(volatile unsigned *) (IDT434_REG_BASE + reg_offs); |
| 73 | for (i = 0; i != len; ++i) { |
| 74 | if (val & (1 << i)) |
| 75 | data |= (1 << (i + bit)); |
| 76 | else |
| 77 | data &= ~(1 << (i + bit)); |
| 78 | } |
| 79 | writel(data, (IDT434_REG_BASE + reg_offs)); |
| 80 | |
| 81 | spin_unlock_irqrestore(&dev3.lock, flags); |
| 82 | } |
| 83 | EXPORT_SYMBOL(set_434_reg); |
| 84 | |
| 85 | unsigned get_434_reg(unsigned reg_offs) |
| 86 | { |
| 87 | return readl(IDT434_REG_BASE + reg_offs); |
| 88 | } |
| 89 | EXPORT_SYMBOL(get_434_reg); |
| 90 | |
| 91 | void set_latch_u5(unsigned char or_mask, unsigned char nand_mask) |
| 92 | { |
| 93 | unsigned flags; |
| 94 | |
| 95 | spin_lock_irqsave(&dev3.lock, flags); |
| 96 | |
| 97 | dev3.state = (dev3.state | or_mask) & ~nand_mask; |
| 98 | writel(dev3.state, &dev3.base); |
| 99 | |
| 100 | spin_unlock_irqrestore(&dev3.lock, flags); |
| 101 | } |
| 102 | EXPORT_SYMBOL(set_latch_u5); |
| 103 | |
| 104 | unsigned char get_latch_u5(void) |
| 105 | { |
| 106 | return dev3.state; |
| 107 | } |
| 108 | EXPORT_SYMBOL(get_latch_u5); |
| 109 | |
| 110 | int rb532_gpio_get_value(unsigned gpio) |
| 111 | { |
| 112 | return readl(&rb532_gpio_reg0->gpiod) & (1 << gpio); |
| 113 | } |
| 114 | EXPORT_SYMBOL(rb532_gpio_get_value); |
| 115 | |
| 116 | void rb532_gpio_set_value(unsigned gpio, int value) |
| 117 | { |
| 118 | unsigned tmp; |
| 119 | |
| 120 | tmp = readl(&rb532_gpio_reg0->gpiod) & ~(1 << gpio); |
| 121 | if (value) |
| 122 | tmp |= 1 << gpio; |
| 123 | |
| 124 | writel(tmp, (void *)&rb532_gpio_reg0->gpiod); |
| 125 | } |
| 126 | EXPORT_SYMBOL(rb532_gpio_set_value); |
| 127 | |
| 128 | int rb532_gpio_direction_input(unsigned gpio) |
| 129 | { |
| 130 | writel(readl(&rb532_gpio_reg0->gpiocfg) & ~(1 << gpio), |
| 131 | (void *)&rb532_gpio_reg0->gpiocfg); |
| 132 | |
| 133 | return 0; |
| 134 | } |
| 135 | EXPORT_SYMBOL(rb532_gpio_direction_input); |
| 136 | |
| 137 | int rb532_gpio_direction_output(unsigned gpio, int value) |
| 138 | { |
| 139 | gpio_set_value(gpio, value); |
| 140 | writel(readl(&rb532_gpio_reg0->gpiocfg) | (1 << gpio), |
| 141 | (void *)&rb532_gpio_reg0->gpiocfg); |
| 142 | |
| 143 | return 0; |
| 144 | } |
| 145 | EXPORT_SYMBOL(rb532_gpio_direction_output); |
| 146 | |
| 147 | void rb532_gpio_set_int_level(unsigned gpio, int value) |
| 148 | { |
| 149 | unsigned tmp; |
| 150 | |
| 151 | tmp = readl(&rb532_gpio_reg0->gpioilevel) & ~(1 << gpio); |
| 152 | if (value) |
| 153 | tmp |= 1 << gpio; |
| 154 | writel(tmp, (void *)&rb532_gpio_reg0->gpioilevel); |
| 155 | } |
| 156 | EXPORT_SYMBOL(rb532_gpio_set_int_level); |
| 157 | |
| 158 | int rb532_gpio_get_int_level(unsigned gpio) |
| 159 | { |
| 160 | return readl(&rb532_gpio_reg0->gpioilevel) & (1 << gpio); |
| 161 | } |
| 162 | EXPORT_SYMBOL(rb532_gpio_get_int_level); |
| 163 | |
| 164 | void rb532_gpio_set_int_status(unsigned gpio, int value) |
| 165 | { |
| 166 | unsigned tmp; |
| 167 | |
| 168 | tmp = readl(&rb532_gpio_reg0->gpioistat); |
| 169 | if (value) |
| 170 | tmp |= 1 << gpio; |
| 171 | writel(tmp, (void *)&rb532_gpio_reg0->gpioistat); |
| 172 | } |
| 173 | EXPORT_SYMBOL(rb532_gpio_set_int_status); |
| 174 | |
| 175 | int rb532_gpio_get_int_status(unsigned gpio) |
| 176 | { |
| 177 | return readl(&rb532_gpio_reg0->gpioistat) & (1 << gpio); |
| 178 | } |
| 179 | EXPORT_SYMBOL(rb532_gpio_get_int_status); |
| 180 | |
| 181 | void rb532_gpio_set_func(unsigned gpio, int value) |
| 182 | { |
| 183 | unsigned tmp; |
| 184 | |
| 185 | tmp = readl(&rb532_gpio_reg0->gpiofunc); |
| 186 | if (value) |
| 187 | tmp |= 1 << gpio; |
| 188 | writel(tmp, (void *)&rb532_gpio_reg0->gpiofunc); |
| 189 | } |
| 190 | EXPORT_SYMBOL(rb532_gpio_set_func); |
| 191 | |
| 192 | int rb532_gpio_get_func(unsigned gpio) |
| 193 | { |
| 194 | return readl(&rb532_gpio_reg0->gpiofunc) & (1 << gpio); |
| 195 | } |
| 196 | EXPORT_SYMBOL(rb532_gpio_get_func); |
| 197 | |
| 198 | int __init rb532_gpio_init(void) |
| 199 | { |
| 200 | rb532_gpio_reg0 = ioremap_nocache(rb532_gpio_reg0_res[0].start, |
| 201 | rb532_gpio_reg0_res[0].end - |
| 202 | rb532_gpio_reg0_res[0].start); |
| 203 | |
| 204 | if (!rb532_gpio_reg0) { |
| 205 | printk(KERN_ERR "rb532: cannot remap GPIO register 0\n"); |
| 206 | return -ENXIO; |
| 207 | } |
| 208 | |
| 209 | dev3.base = ioremap_nocache(rb532_dev3_ctl_res[0].start, |
| 210 | rb532_dev3_ctl_res[0].end - |
| 211 | rb532_dev3_ctl_res[0].start); |
| 212 | |
| 213 | if (!dev3.base) { |
| 214 | printk(KERN_ERR "rb532: cannot remap device controller 3\n"); |
| 215 | return -ENXIO; |
| 216 | } |
| 217 | |
| 218 | return 0; |
| 219 | } |
| 220 | arch_initcall(rb532_gpio_init); |