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Linus Walleij4980f9b2012-09-06 09:08:24 +01001/*
2 * Device Tree for the ARM Integrator/CP platform
3 */
4
5/dts-v1/;
6/include/ "integrator.dtsi"
7
8/ {
9 model = "ARM Integrator/CP";
10 compatible = "arm,integrator-cp";
11
12 aliases {
13 arm,timer-primary = &timer2;
14 arm,timer-secondary = &timer1;
15 };
16
17 chosen {
18 bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
19 };
20
21 timer0: timer@13000000 {
22 compatible = "arm,sp804", "arm,primecell";
23 };
24
25 timer1: timer@13000100 {
26 compatible = "arm,sp804", "arm,primecell";
27 };
28
29 timer2: timer@13000200 {
30 compatible = "arm,sp804", "arm,primecell";
31 };
32
33 pic: pic@14000000 {
34 valid-mask = <0x1fc003ff>;
35 };
36
37 cic: cic@10000040 {
38 compatible = "arm,versatile-fpga-irq";
39 #interrupt-cells = <1>;
40 interrupt-controller;
41 reg = <0x10000040 0x100>;
42 clear-mask = <0xffffffff>;
43 valid-mask = <0x00000007>;
44 };
45
46 sic: sic@ca000000 {
47 compatible = "arm,versatile-fpga-irq";
48 #interrupt-cells = <1>;
49 interrupt-controller;
50 reg = <0xca000000 0x100>;
51 clear-mask = <0x00000fff>;
52 valid-mask = <0x00000fff>;
53 };
Linus Walleij4672cdd2012-09-06 09:08:47 +010054
Linus Walleij73efd532012-09-06 09:09:11 +010055 ethernet@c8000000 {
56 compatible = "smsc,lan91c111";
57 reg = <0xc8000000 0x10>;
58 interrupt-parent = <&pic>;
59 interrupts = <27>;
60 };
61
Linus Walleij4672cdd2012-09-06 09:08:47 +010062 fpga {
63 /*
64 * These PrimeCells are at the same location and using
65 * the same interrupts in all Integrators, but in the CP
66 * slightly newer versions are deployed.
67 */
68 rtc@15000000 {
69 compatible = "arm,pl031", "arm,primecell";
70 };
71
72 uart@16000000 {
73 compatible = "arm,pl011", "arm,primecell";
74 };
75
76 uart@17000000 {
77 compatible = "arm,pl011", "arm,primecell";
78 };
79
80 kmi@18000000 {
81 compatible = "arm,pl050", "arm,primecell";
82 };
83
84 kmi@19000000 {
85 compatible = "arm,pl050", "arm,primecell";
86 };
87
88 /*
89 * These PrimeCells are only available on the Integrator/CP
90 */
91 mmc@1c000000 {
92 compatible = "arm,pl180", "arm,primecell";
93 reg = <0x1c000000 0x1000>;
94 interrupts = <23 24>;
95 max-frequency = <515633>;
96 };
97
98 aaci@1d000000 {
99 compatible = "arm,pl041", "arm,primecell";
100 reg = <0x1d000000 0x1000>;
101 interrupts = <25>;
102 };
103
104 clcd@c0000000 {
105 compatible = "arm,pl110", "arm,primecell";
106 reg = <0xC0000000 0x1000>;
107 interrupts = <22>;
108 };
109 };
Linus Walleij4980f9b2012-09-06 09:08:24 +0100110};