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John Linn0bcb6062008-11-12 13:25:38 -08001/*
Michal Simek74600ee2013-06-03 14:31:17 +02002 * Xilinx gpio driver for xps/axi_gpio IP.
John Linn0bcb6062008-11-12 13:25:38 -08003 *
Michal Simek74600ee2013-06-03 14:31:17 +02004 * Copyright 2008 - 2013 Xilinx, Inc.
John Linn0bcb6062008-11-12 13:25:38 -08005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program; if not, write to the Free Software
12 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
13 */
14
Michal Simek74600ee2013-06-03 14:31:17 +020015#include <linux/bitops.h>
John Linn0bcb6062008-11-12 13:25:38 -080016#include <linux/init.h>
17#include <linux/errno.h>
Paul Gortmakerbb207ef2011-07-03 13:38:09 -040018#include <linux/module.h>
John Linn0bcb6062008-11-12 13:25:38 -080019#include <linux/of_device.h>
20#include <linux/of_platform.h>
21#include <linux/of_gpio.h>
22#include <linux/io.h>
23#include <linux/gpio.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090024#include <linux/slab.h>
John Linn0bcb6062008-11-12 13:25:38 -080025
26/* Register Offset Definitions */
27#define XGPIO_DATA_OFFSET (0x0) /* Data register */
28#define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */
29
Michal Simek74600ee2013-06-03 14:31:17 +020030#define XGPIO_CHANNEL_OFFSET 0x8
31
32/* Read/Write access to the GPIO registers */
33#define xgpio_readreg(offset) in_be32(offset)
34#define xgpio_writereg(offset, val) out_be32(offset, val)
35
36/**
37 * struct xgpio_instance - Stores information about GPIO device
38 * struct of_mm_gpio_chip mmchip: OF GPIO chip for memory mapped banks
39 * gpio_state: GPIO state shadow register
40 * gpio_dir: GPIO direction shadow register
41 * offset: GPIO channel offset
42 * gpio_lock: Lock used for synchronization
43 */
John Linn0bcb6062008-11-12 13:25:38 -080044struct xgpio_instance {
45 struct of_mm_gpio_chip mmchip;
Michal Simek74600ee2013-06-03 14:31:17 +020046 u32 gpio_state;
47 u32 gpio_dir;
48 u32 offset;
49 spinlock_t gpio_lock;
John Linn0bcb6062008-11-12 13:25:38 -080050};
51
52/**
53 * xgpio_get - Read the specified signal of the GPIO device.
54 * @gc: Pointer to gpio_chip device structure.
55 * @gpio: GPIO signal number.
56 *
57 * This function reads the specified signal of the GPIO device. It returns 0 if
58 * the signal clear, 1 if signal is set or negative value on error.
59 */
60static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
61{
62 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
Michal Simek74600ee2013-06-03 14:31:17 +020063 struct xgpio_instance *chip =
64 container_of(mm_gc, struct xgpio_instance, mmchip);
John Linn0bcb6062008-11-12 13:25:38 -080065
Michal Simek74600ee2013-06-03 14:31:17 +020066 void __iomem *regs = mm_gc->regs + chip->offset;
67
68 return !!(xgpio_readreg(regs + XGPIO_DATA_OFFSET) & BIT(gpio));
John Linn0bcb6062008-11-12 13:25:38 -080069}
70
71/**
72 * xgpio_set - Write the specified signal of the GPIO device.
73 * @gc: Pointer to gpio_chip device structure.
74 * @gpio: GPIO signal number.
75 * @val: Value to be written to specified signal.
76 *
77 * This function writes the specified value in to the specified signal of the
78 * GPIO device.
79 */
80static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
81{
82 unsigned long flags;
83 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
84 struct xgpio_instance *chip =
85 container_of(mm_gc, struct xgpio_instance, mmchip);
Michal Simek74600ee2013-06-03 14:31:17 +020086 void __iomem *regs = mm_gc->regs;
John Linn0bcb6062008-11-12 13:25:38 -080087
88 spin_lock_irqsave(&chip->gpio_lock, flags);
89
90 /* Write to GPIO signal and set its direction to output */
91 if (val)
92 chip->gpio_state |= 1 << gpio;
93 else
94 chip->gpio_state &= ~(1 << gpio);
Michal Simek74600ee2013-06-03 14:31:17 +020095
96 xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
97 chip->gpio_state);
John Linn0bcb6062008-11-12 13:25:38 -080098
99 spin_unlock_irqrestore(&chip->gpio_lock, flags);
100}
101
102/**
103 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
104 * @gc: Pointer to gpio_chip device structure.
105 * @gpio: GPIO signal number.
106 *
107 * This function sets the direction of specified GPIO signal as input.
108 * It returns 0 if direction of GPIO signals is set as input otherwise it
109 * returns negative error value.
110 */
111static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
112{
113 unsigned long flags;
114 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
115 struct xgpio_instance *chip =
116 container_of(mm_gc, struct xgpio_instance, mmchip);
Michal Simek74600ee2013-06-03 14:31:17 +0200117 void __iomem *regs = mm_gc->regs;
John Linn0bcb6062008-11-12 13:25:38 -0800118
119 spin_lock_irqsave(&chip->gpio_lock, flags);
120
121 /* Set the GPIO bit in shadow register and set direction as input */
122 chip->gpio_dir |= (1 << gpio);
Michal Simek74600ee2013-06-03 14:31:17 +0200123 xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
John Linn0bcb6062008-11-12 13:25:38 -0800124
125 spin_unlock_irqrestore(&chip->gpio_lock, flags);
126
127 return 0;
128}
129
130/**
131 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
132 * @gc: Pointer to gpio_chip device structure.
133 * @gpio: GPIO signal number.
134 * @val: Value to be written to specified signal.
135 *
136 * This function sets the direction of specified GPIO signal as output. If all
137 * GPIO signals of GPIO chip is configured as input then it returns
138 * error otherwise it returns 0.
139 */
140static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
141{
142 unsigned long flags;
143 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
144 struct xgpio_instance *chip =
145 container_of(mm_gc, struct xgpio_instance, mmchip);
Michal Simek74600ee2013-06-03 14:31:17 +0200146 void __iomem *regs = mm_gc->regs;
John Linn0bcb6062008-11-12 13:25:38 -0800147
148 spin_lock_irqsave(&chip->gpio_lock, flags);
149
150 /* Write state of GPIO signal */
151 if (val)
152 chip->gpio_state |= 1 << gpio;
153 else
154 chip->gpio_state &= ~(1 << gpio);
Michal Simek74600ee2013-06-03 14:31:17 +0200155 xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET,
156 chip->gpio_state);
John Linn0bcb6062008-11-12 13:25:38 -0800157
158 /* Clear the GPIO bit in shadow register and set direction as output */
159 chip->gpio_dir &= (~(1 << gpio));
Michal Simek74600ee2013-06-03 14:31:17 +0200160 xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir);
John Linn0bcb6062008-11-12 13:25:38 -0800161
162 spin_unlock_irqrestore(&chip->gpio_lock, flags);
163
164 return 0;
165}
166
167/**
168 * xgpio_save_regs - Set initial values of GPIO pins
169 * @mm_gc: pointer to memory mapped GPIO chip structure
170 */
171static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc)
172{
173 struct xgpio_instance *chip =
174 container_of(mm_gc, struct xgpio_instance, mmchip);
175
Michal Simek74600ee2013-06-03 14:31:17 +0200176 xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_DATA_OFFSET,
177 chip->gpio_state);
178 xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_TRI_OFFSET,
179 chip->gpio_dir);
John Linn0bcb6062008-11-12 13:25:38 -0800180}
181
182/**
183 * xgpio_of_probe - Probe method for the GPIO device.
184 * @np: pointer to device tree node
185 *
186 * This function probes the GPIO device in the device tree. It initializes the
187 * driver data structure. It returns 0, if the driver is bound to the GPIO
188 * device, or a negative value if there is an error.
189 */
Bill Pemberton38363092012-11-19 13:22:34 -0500190static int xgpio_of_probe(struct device_node *np)
John Linn0bcb6062008-11-12 13:25:38 -0800191{
192 struct xgpio_instance *chip;
John Linn0bcb6062008-11-12 13:25:38 -0800193 int status = 0;
194 const u32 *tree_info;
195
196 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
197 if (!chip)
198 return -ENOMEM;
John Linn0bcb6062008-11-12 13:25:38 -0800199
200 /* Update GPIO state shadow register with default value */
Michal Simek6f8bf502013-06-03 14:31:16 +0200201 of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state);
202
203 /* By default, all pins are inputs */
204 chip->gpio_dir = 0xFFFFFFFF;
John Linn0bcb6062008-11-12 13:25:38 -0800205
206 /* Update GPIO direction shadow register with default value */
Michal Simek6f8bf502013-06-03 14:31:16 +0200207 of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir);
208
209 /* By default assume full GPIO controller */
210 chip->mmchip.gc.ngpio = 32;
John Linn0bcb6062008-11-12 13:25:38 -0800211
212 /* Check device node and parent device node for device width */
Michal Simek6f8bf502013-06-03 14:31:16 +0200213 of_property_read_u32(np, "xlnx,gpio-width",
214 (u32 *)&chip->mmchip.gc.ngpio);
John Linn0bcb6062008-11-12 13:25:38 -0800215
216 spin_lock_init(&chip->gpio_lock);
217
Anton Vorontsova19e3da2010-06-08 07:48:16 -0600218 chip->mmchip.gc.direction_input = xgpio_dir_in;
219 chip->mmchip.gc.direction_output = xgpio_dir_out;
220 chip->mmchip.gc.get = xgpio_get;
221 chip->mmchip.gc.set = xgpio_set;
John Linn0bcb6062008-11-12 13:25:38 -0800222
223 chip->mmchip.save_regs = xgpio_save_regs;
224
225 /* Call the OF gpio helper to setup and register the GPIO device */
226 status = of_mm_gpiochip_add(np, &chip->mmchip);
227 if (status) {
228 kfree(chip);
229 pr_err("%s: error in probe function with status %d\n",
230 np->full_name, status);
231 return status;
232 }
Michal Simek74600ee2013-06-03 14:31:17 +0200233
234 pr_info("XGpio: %s: registered, base is %d\n", np->full_name,
235 chip->mmchip.gc.base);
236
237 tree_info = of_get_property(np, "xlnx,is-dual", NULL);
238 if (tree_info && be32_to_cpup(tree_info)) {
239 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
240 if (!chip)
241 return -ENOMEM;
242
243 /* Add dual channel offset */
244 chip->offset = XGPIO_CHANNEL_OFFSET;
245
246 /* Update GPIO state shadow register with default value */
247 of_property_read_u32(np, "xlnx,dout-default-2",
248 &chip->gpio_state);
249
250 /* By default, all pins are inputs */
251 chip->gpio_dir = 0xFFFFFFFF;
252
253 /* Update GPIO direction shadow register with default value */
254 of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir);
255
256 /* By default assume full GPIO controller */
257 chip->mmchip.gc.ngpio = 32;
258
259 /* Check device node and parent device node for device width */
260 of_property_read_u32(np, "xlnx,gpio2-width",
261 (u32 *)&chip->mmchip.gc.ngpio);
262
263 spin_lock_init(&chip->gpio_lock);
264
265 chip->mmchip.gc.direction_input = xgpio_dir_in;
266 chip->mmchip.gc.direction_output = xgpio_dir_out;
267 chip->mmchip.gc.get = xgpio_get;
268 chip->mmchip.gc.set = xgpio_set;
269
270 chip->mmchip.save_regs = xgpio_save_regs;
271
272 /* Call the OF gpio helper to setup and register the GPIO dev */
273 status = of_mm_gpiochip_add(np, &chip->mmchip);
274 if (status) {
275 kfree(chip);
276 pr_err("%s: error in probe function with status %d\n",
277 np->full_name, status);
278 return status;
279 }
280 pr_info("XGpio: %s: dual channel registered, base is %d\n",
281 np->full_name, chip->mmchip.gc.base);
282 }
283
John Linn0bcb6062008-11-12 13:25:38 -0800284 return 0;
285}
286
Bill Pembertonaeca8ad2012-11-19 13:24:14 -0500287static struct of_device_id xgpio_of_match[] = {
John Linn0bcb6062008-11-12 13:25:38 -0800288 { .compatible = "xlnx,xps-gpio-1.00.a", },
289 { /* end of list */ },
290};
291
292static int __init xgpio_init(void)
293{
294 struct device_node *np;
295
296 for_each_matching_node(np, xgpio_of_match)
297 xgpio_of_probe(np);
298
299 return 0;
300}
301
302/* Make sure we get initialized before anyone else tries to use us */
303subsys_initcall(xgpio_init);
304/* No exit call at the moment as we cannot unregister of GPIO chips */
305
306MODULE_AUTHOR("Xilinx, Inc.");
307MODULE_DESCRIPTION("Xilinx GPIO driver");
308MODULE_LICENSE("GPL");