Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Generic Generic NCR5380 driver defines |
| 3 | * |
| 4 | * Copyright 1993, Drew Eckhardt |
| 5 | * Visionary Computing |
| 6 | * (Unix and Linux consulting and custom programming) |
| 7 | * drew@colorado.edu |
| 8 | * +1 (303) 440-4894 |
| 9 | * |
| 10 | * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin |
| 11 | * K.Lentin@cs.monash.edu.au |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | */ |
| 13 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | #ifndef GENERIC_NCR5380_H |
| 15 | #define GENERIC_NCR5380_H |
| 16 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #define __STRVAL(x) #x |
| 18 | #define STRVAL(x) __STRVAL(x) |
| 19 | |
Ondrej Zary | 702a98c | 2010-08-10 18:01:16 -0700 | [diff] [blame] | 20 | #ifndef SCSI_G_NCR5380_MEM |
Finn Thain | aa2e2cb | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 21 | #define DRV_MODULE_NAME "g_NCR5380" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #define NCR5380_map_type int |
| 24 | #define NCR5380_map_name port |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
Finn Thain | 54d8fe4 | 2016-01-03 16:05:06 +1100 | [diff] [blame] | 26 | #define NCR5380_read(reg) \ |
| 27 | inb(instance->io_port + (reg)) |
| 28 | #define NCR5380_write(reg, value) \ |
| 29 | outb(value, instance->io_port + (reg)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 31 | #define NCR5380_implementation_fields \ |
| 32 | int c400_ctl_status; \ |
| 33 | int c400_blk_cnt; \ |
Ondrej Zary | aeb5115 | 2016-01-03 16:06:17 +1100 | [diff] [blame] | 34 | int c400_host_buf; \ |
| 35 | int io_width; |
Al Viro | c818cb6 | 2006-03-24 03:15:37 -0800 | [diff] [blame] | 36 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | #else |
Ondrej Zary | 702a98c | 2010-08-10 18:01:16 -0700 | [diff] [blame] | 38 | /* therefore SCSI_G_NCR5380_MEM */ |
Finn Thain | aa2e2cb | 2016-01-03 16:05:48 +1100 | [diff] [blame] | 39 | #define DRV_MODULE_NAME "g_NCR5380_mmio" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #define NCR5380_map_type unsigned long |
| 42 | #define NCR5380_map_name base |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #define NCR53C400_mem_base 0x3880 |
| 44 | #define NCR53C400_host_buffer 0x3900 |
Finn Thain | 9d37640 | 2016-03-23 21:10:10 +1100 | [diff] [blame] | 45 | #define NCR53C400_region_size 0x3a00 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | |
Finn Thain | 54d8fe4 | 2016-01-03 16:05:06 +1100 | [diff] [blame] | 47 | #define NCR5380_read(reg) \ |
| 48 | readb(((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \ |
| 49 | NCR53C400_mem_base + (reg)) |
| 50 | #define NCR5380_write(reg, value) \ |
| 51 | writeb(value, ((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \ |
| 52 | NCR53C400_mem_base + (reg)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | |
| 54 | #define NCR5380_implementation_fields \ |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 55 | void __iomem *iomem; \ |
Finn Thain | 9d37640 | 2016-03-23 21:10:10 +1100 | [diff] [blame] | 56 | resource_size_t iomem_size; \ |
Ondrej Zary | 1215079 | 2016-01-03 16:06:15 +1100 | [diff] [blame] | 57 | int c400_ctl_status; \ |
| 58 | int c400_blk_cnt; \ |
| 59 | int c400_host_buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
Al Viro | c818cb6 | 2006-03-24 03:15:37 -0800 | [diff] [blame] | 61 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 63 | #define NCR5380_dma_xfer_len(instance, cmd, phase) \ |
Finn Thain | 7e9ec8d | 2016-03-23 21:10:11 +1100 | [diff] [blame] | 64 | generic_NCR5380_dma_xfer_len(instance, cmd) |
Finn Thain | 6c4b88c | 2016-03-23 21:10:17 +1100 | [diff] [blame] | 65 | #define NCR5380_dma_recv_setup generic_NCR5380_pread |
| 66 | #define NCR5380_dma_send_setup generic_NCR5380_pwrite |
Finn Thain | 8053b0e | 2016-03-23 21:10:19 +1100 | [diff] [blame] | 67 | #define NCR5380_dma_residual(instance) (0) |
Finn Thain | ff3d457 | 2016-01-03 16:05:25 +1100 | [diff] [blame] | 68 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | #define NCR5380_intr generic_NCR5380_intr |
| 70 | #define NCR5380_queue_command generic_NCR5380_queue_command |
| 71 | #define NCR5380_abort generic_NCR5380_abort |
| 72 | #define NCR5380_bus_reset generic_NCR5380_bus_reset |
Finn Thain | 8c32513 | 2014-11-12 16:11:58 +1100 | [diff] [blame] | 73 | #define NCR5380_info generic_NCR5380_info |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | |
Finn Thain | e5d55d1 | 2016-03-23 21:10:16 +1100 | [diff] [blame] | 75 | #define NCR5380_io_delay(x) udelay(x) |
| 76 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | #define BOARD_NCR5380 0 |
| 78 | #define BOARD_NCR53C400 1 |
| 79 | #define BOARD_NCR53C400A 2 |
| 80 | #define BOARD_DTC3181E 3 |
Ondrej Zary | c6084cb | 2016-01-03 16:06:19 +1100 | [diff] [blame] | 81 | #define BOARD_HP_C2502 4 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | #endif /* GENERIC_NCR5380_H */ |
| 84 | |