Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1 | /* |
| 2 | * CXL Flash Device Driver |
| 3 | * |
| 4 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation |
| 5 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation |
| 6 | * |
| 7 | * Copyright (C) 2015 IBM Corporation |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License |
| 11 | * as published by the Free Software Foundation; either version |
| 12 | * 2 of the License, or (at your option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/pci.h> |
| 19 | |
| 20 | #include <asm/unaligned.h> |
| 21 | |
| 22 | #include <misc/cxl.h> |
| 23 | |
| 24 | #include <scsi/scsi_cmnd.h> |
| 25 | #include <scsi/scsi_host.h> |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 26 | #include <uapi/scsi/cxlflash_ioctl.h> |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 27 | |
| 28 | #include "main.h" |
| 29 | #include "sislite.h" |
| 30 | #include "common.h" |
| 31 | |
| 32 | MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME); |
| 33 | MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>"); |
| 34 | MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>"); |
| 35 | MODULE_LICENSE("GPL"); |
| 36 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 37 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 38 | * process_cmd_err() - command error handler |
| 39 | * @cmd: AFU command that experienced the error. |
| 40 | * @scp: SCSI command associated with the AFU command in error. |
| 41 | * |
| 42 | * Translates error bits from AFU command to SCSI command results. |
| 43 | */ |
| 44 | static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp) |
| 45 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 46 | struct afu *afu = cmd->parent; |
| 47 | struct cxlflash_cfg *cfg = afu->parent; |
| 48 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 49 | struct sisl_ioarcb *ioarcb; |
| 50 | struct sisl_ioasa *ioasa; |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 51 | u32 resid; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 52 | |
| 53 | if (unlikely(!cmd)) |
| 54 | return; |
| 55 | |
| 56 | ioarcb = &(cmd->rcb); |
| 57 | ioasa = &(cmd->sa); |
| 58 | |
| 59 | if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) { |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 60 | resid = ioasa->resid; |
| 61 | scsi_set_resid(scp, resid); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 62 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n", |
| 63 | __func__, cmd, scp, resid); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 67 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n", |
| 68 | __func__, cmd, scp); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 69 | scp->result = (DID_ERROR << 16); |
| 70 | } |
| 71 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 72 | dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x " |
| 73 | "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__, |
| 74 | ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc, |
| 75 | ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 76 | |
| 77 | if (ioasa->rc.scsi_rc) { |
| 78 | /* We have a SCSI status */ |
| 79 | if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) { |
| 80 | memcpy(scp->sense_buffer, ioasa->sense_data, |
| 81 | SISL_SENSE_DATA_LEN); |
| 82 | scp->result = ioasa->rc.scsi_rc; |
| 83 | } else |
| 84 | scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16); |
| 85 | } |
| 86 | |
| 87 | /* |
| 88 | * We encountered an error. Set scp->result based on nature |
| 89 | * of error. |
| 90 | */ |
| 91 | if (ioasa->rc.fc_rc) { |
| 92 | /* We have an FC status */ |
| 93 | switch (ioasa->rc.fc_rc) { |
| 94 | case SISL_FC_RC_LINKDOWN: |
| 95 | scp->result = (DID_REQUEUE << 16); |
| 96 | break; |
| 97 | case SISL_FC_RC_RESID: |
| 98 | /* This indicates an FCP resid underrun */ |
| 99 | if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) { |
| 100 | /* If the SISL_RC_FLAGS_OVERRUN flag was set, |
| 101 | * then we will handle this error else where. |
| 102 | * If not then we must handle it here. |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 103 | * This is probably an AFU bug. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 104 | */ |
| 105 | scp->result = (DID_ERROR << 16); |
| 106 | } |
| 107 | break; |
| 108 | case SISL_FC_RC_RESIDERR: |
| 109 | /* Resid mismatch between adapter and device */ |
| 110 | case SISL_FC_RC_TGTABORT: |
| 111 | case SISL_FC_RC_ABORTOK: |
| 112 | case SISL_FC_RC_ABORTFAIL: |
| 113 | case SISL_FC_RC_NOLOGI: |
| 114 | case SISL_FC_RC_ABORTPEND: |
| 115 | case SISL_FC_RC_WRABORTPEND: |
| 116 | case SISL_FC_RC_NOEXP: |
| 117 | case SISL_FC_RC_INUSE: |
| 118 | scp->result = (DID_ERROR << 16); |
| 119 | break; |
| 120 | } |
| 121 | } |
| 122 | |
| 123 | if (ioasa->rc.afu_rc) { |
| 124 | /* We have an AFU error */ |
| 125 | switch (ioasa->rc.afu_rc) { |
| 126 | case SISL_AFU_RC_NO_CHANNELS: |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 127 | scp->result = (DID_NO_CONNECT << 16); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 128 | break; |
| 129 | case SISL_AFU_RC_DATA_DMA_ERR: |
| 130 | switch (ioasa->afu_extra) { |
| 131 | case SISL_AFU_DMA_ERR_PAGE_IN: |
| 132 | /* Retry */ |
| 133 | scp->result = (DID_IMM_RETRY << 16); |
| 134 | break; |
| 135 | case SISL_AFU_DMA_ERR_INVALID_EA: |
| 136 | default: |
| 137 | scp->result = (DID_ERROR << 16); |
| 138 | } |
| 139 | break; |
| 140 | case SISL_AFU_RC_OUT_OF_DATA_BUFS: |
| 141 | /* Retry */ |
| 142 | scp->result = (DID_ALLOC_FAILURE << 16); |
| 143 | break; |
| 144 | default: |
| 145 | scp->result = (DID_ERROR << 16); |
| 146 | } |
| 147 | } |
| 148 | } |
| 149 | |
| 150 | /** |
| 151 | * cmd_complete() - command completion handler |
| 152 | * @cmd: AFU command that has completed. |
| 153 | * |
| 154 | * Prepares and submits command that has either completed or timed out to |
| 155 | * the SCSI stack. Checks AFU command back into command pool for non-internal |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 156 | * (cmd->scp populated) commands. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 157 | */ |
| 158 | static void cmd_complete(struct afu_cmd *cmd) |
| 159 | { |
| 160 | struct scsi_cmnd *scp; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 161 | ulong lock_flags; |
| 162 | struct afu *afu = cmd->parent; |
| 163 | struct cxlflash_cfg *cfg = afu->parent; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 164 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 165 | bool cmd_is_tmf; |
| 166 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 167 | if (cmd->scp) { |
| 168 | scp = cmd->scp; |
Matthew R. Ochs | 8396012 | 2015-10-21 15:13:29 -0500 | [diff] [blame] | 169 | if (unlikely(cmd->sa.ioasc)) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 170 | process_cmd_err(cmd, scp); |
| 171 | else |
| 172 | scp->result = (DID_OK << 16); |
| 173 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 174 | cmd_is_tmf = cmd->cmd_tmf; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 175 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 176 | dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n", |
| 177 | __func__, scp, scp->result, cmd->sa.ioasc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 178 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 179 | scsi_dma_unmap(scp); |
| 180 | scp->scsi_done(scp); |
| 181 | |
| 182 | if (cmd_is_tmf) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 183 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 184 | cfg->tmf_active = false; |
| 185 | wake_up_all_locked(&cfg->tmf_waitq); |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 186 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 187 | } |
| 188 | } else |
| 189 | complete(&cmd->cevent); |
| 190 | } |
| 191 | |
| 192 | /** |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 193 | * context_reset() - reset command owner context via specified register |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 194 | * @cmd: AFU command that timed out. |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 195 | * @reset_reg: MMIO register to perform reset. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 196 | */ |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 197 | static void context_reset(struct afu_cmd *cmd, __be64 __iomem *reset_reg) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 198 | { |
| 199 | int nretry = 0; |
| 200 | u64 rrin = 0x1; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 201 | struct afu *afu = cmd->parent; |
Uma Krishnan | 3d2f617 | 2016-11-28 18:41:36 -0600 | [diff] [blame] | 202 | struct cxlflash_cfg *cfg = afu->parent; |
| 203 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 204 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 205 | dev_dbg(dev, "%s: cmd=%p\n", __func__, cmd); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 206 | |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 207 | writeq_be(rrin, reset_reg); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 208 | do { |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 209 | rrin = readq_be(reset_reg); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 210 | if (rrin != 0x1) |
| 211 | break; |
| 212 | /* Double delay each time */ |
Manoj N. Kumar | ea76543 | 2016-03-25 14:26:49 -0500 | [diff] [blame] | 213 | udelay(1 << nretry); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 214 | } while (nretry++ < MC_ROOM_RETRY_CNT); |
Uma Krishnan | 3d2f617 | 2016-11-28 18:41:36 -0600 | [diff] [blame] | 215 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 216 | dev_dbg(dev, "%s: returning rrin=%016llx nretry=%d\n", |
Uma Krishnan | 3d2f617 | 2016-11-28 18:41:36 -0600 | [diff] [blame] | 217 | __func__, rrin, nretry); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | /** |
Matthew R. Ochs | 9c7d1ee | 2017-01-11 19:19:08 -0600 | [diff] [blame] | 221 | * context_reset_ioarrin() - reset command owner context via IOARRIN register |
| 222 | * @cmd: AFU command that timed out. |
| 223 | */ |
| 224 | static void context_reset_ioarrin(struct afu_cmd *cmd) |
| 225 | { |
| 226 | struct afu *afu = cmd->parent; |
| 227 | |
| 228 | context_reset(cmd, &afu->host_map->ioarrin); |
| 229 | } |
| 230 | |
| 231 | /** |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 232 | * context_reset_sq() - reset command owner context w/ SQ Context Reset register |
| 233 | * @cmd: AFU command that timed out. |
| 234 | */ |
| 235 | static void context_reset_sq(struct afu_cmd *cmd) |
| 236 | { |
| 237 | struct afu *afu = cmd->parent; |
| 238 | |
| 239 | context_reset(cmd, &afu->host_map->sq_ctx_reset); |
| 240 | } |
| 241 | |
| 242 | /** |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 243 | * send_cmd_ioarrin() - sends an AFU command via IOARRIN register |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 244 | * @afu: AFU associated with the host. |
| 245 | * @cmd: AFU command to send. |
| 246 | * |
| 247 | * Return: |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 248 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 249 | */ |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 250 | static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 251 | { |
| 252 | struct cxlflash_cfg *cfg = afu->parent; |
| 253 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 254 | int rc = 0; |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 255 | s64 room; |
| 256 | ulong lock_flags; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 257 | |
| 258 | /* |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 259 | * To avoid the performance penalty of MMIO, spread the update of |
| 260 | * 'room' over multiple commands. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 261 | */ |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 262 | spin_lock_irqsave(&afu->rrin_slock, lock_flags); |
| 263 | if (--afu->room < 0) { |
| 264 | room = readq_be(&afu->host_map->cmd_room); |
| 265 | if (room <= 0) { |
| 266 | dev_dbg_ratelimited(dev, "%s: no cmd_room to send " |
| 267 | "0x%02X, room=0x%016llX\n", |
| 268 | __func__, cmd->rcb.cdb[0], room); |
| 269 | afu->room = 0; |
| 270 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 271 | goto out; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 272 | } |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 273 | afu->room = room - 1; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 274 | } |
| 275 | |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 276 | writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin); |
| 277 | out: |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 278 | spin_unlock_irqrestore(&afu->rrin_slock, lock_flags); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 279 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__, |
| 280 | cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 281 | return rc; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 282 | } |
| 283 | |
| 284 | /** |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 285 | * send_cmd_sq() - sends an AFU command via SQ ring |
| 286 | * @afu: AFU associated with the host. |
| 287 | * @cmd: AFU command to send. |
| 288 | * |
| 289 | * Return: |
| 290 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
| 291 | */ |
| 292 | static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd) |
| 293 | { |
| 294 | struct cxlflash_cfg *cfg = afu->parent; |
| 295 | struct device *dev = &cfg->dev->dev; |
| 296 | int rc = 0; |
| 297 | int newval; |
| 298 | ulong lock_flags; |
| 299 | |
| 300 | newval = atomic_dec_if_positive(&afu->hsq_credits); |
| 301 | if (newval <= 0) { |
| 302 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 303 | goto out; |
| 304 | } |
| 305 | |
| 306 | cmd->rcb.ioasa = &cmd->sa; |
| 307 | |
| 308 | spin_lock_irqsave(&afu->hsq_slock, lock_flags); |
| 309 | |
| 310 | *afu->hsq_curr = cmd->rcb; |
| 311 | if (afu->hsq_curr < afu->hsq_end) |
| 312 | afu->hsq_curr++; |
| 313 | else |
| 314 | afu->hsq_curr = afu->hsq_start; |
| 315 | writeq_be((u64)afu->hsq_curr, &afu->host_map->sq_tail); |
| 316 | |
| 317 | spin_unlock_irqrestore(&afu->hsq_slock, lock_flags); |
| 318 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 319 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p " |
| 320 | "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len, |
| 321 | cmd->rcb.data_ea, cmd->rcb.ioasa, rc, afu->hsq_curr, |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 322 | readq_be(&afu->host_map->sq_head), |
| 323 | readq_be(&afu->host_map->sq_tail)); |
| 324 | return rc; |
| 325 | } |
| 326 | |
| 327 | /** |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 328 | * wait_resp() - polls for a response or timeout to a sent AFU command |
| 329 | * @afu: AFU associated with the host. |
| 330 | * @cmd: AFU command that was sent. |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 331 | * |
| 332 | * Return: |
| 333 | * 0 on success, -1 on timeout/error |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 334 | */ |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 335 | static int wait_resp(struct afu *afu, struct afu_cmd *cmd) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 336 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 337 | struct cxlflash_cfg *cfg = afu->parent; |
| 338 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 339 | int rc = 0; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 340 | ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000); |
| 341 | |
| 342 | timeout = wait_for_completion_timeout(&cmd->cevent, timeout); |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 343 | if (!timeout) { |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 344 | afu->context_reset(cmd); |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 345 | rc = -1; |
| 346 | } |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 347 | |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 348 | if (unlikely(cmd->sa.ioasc != 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 349 | dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n", |
| 350 | __func__, cmd->rcb.cdb[0], cmd->sa.ioasc); |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 351 | rc = -1; |
| 352 | } |
| 353 | |
| 354 | return rc; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 355 | } |
| 356 | |
| 357 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 358 | * send_tmf() - sends a Task Management Function (TMF) |
| 359 | * @afu: AFU to checkout from. |
| 360 | * @scp: SCSI command from stack. |
| 361 | * @tmfcmd: TMF command to send. |
| 362 | * |
| 363 | * Return: |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 364 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 365 | */ |
| 366 | static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd) |
| 367 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 368 | u32 port_sel = scp->device->channel + 1; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 369 | struct cxlflash_cfg *cfg = shost_priv(scp->device->host); |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 370 | struct afu_cmd *cmd = sc_to_afucz(scp); |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 371 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 372 | ulong lock_flags; |
| 373 | int rc = 0; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 374 | ulong to; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 375 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 376 | /* When Task Management Function is active do not send another */ |
| 377 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 378 | if (cfg->tmf_active) |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 379 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
| 380 | !cfg->tmf_active, |
| 381 | cfg->tmf_slock); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 382 | cfg->tmf_active = true; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 383 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 384 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 385 | cmd->scp = scp; |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 386 | cmd->parent = afu; |
| 387 | cmd->cmd_tmf = true; |
| 388 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 389 | cmd->rcb.ctx_id = afu->ctx_hndl; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 390 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 391 | cmd->rcb.port_sel = port_sel; |
| 392 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 393 | cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID | |
Matthew R. Ochs | d4ace35 | 2016-11-28 18:42:50 -0600 | [diff] [blame] | 394 | SISL_REQ_FLAGS_SUP_UNDERRUN | |
| 395 | SISL_REQ_FLAGS_TMF_CMD); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 396 | memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd)); |
| 397 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 398 | rc = afu->send_cmd(afu, cmd); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 399 | if (unlikely(rc)) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 400 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 401 | cfg->tmf_active = false; |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 402 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 403 | goto out; |
| 404 | } |
| 405 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 406 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
| 407 | to = msecs_to_jiffies(5000); |
| 408 | to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq, |
| 409 | !cfg->tmf_active, |
| 410 | cfg->tmf_slock, |
| 411 | to); |
| 412 | if (!to) { |
| 413 | cfg->tmf_active = false; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 414 | dev_err(dev, "%s: TMF timed out\n", __func__); |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 415 | rc = -1; |
| 416 | } |
| 417 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 418 | out: |
| 419 | return rc; |
| 420 | } |
| 421 | |
| 422 | /** |
| 423 | * cxlflash_driver_info() - information handler for this host driver |
| 424 | * @host: SCSI host associated with device. |
| 425 | * |
| 426 | * Return: A string describing the device. |
| 427 | */ |
| 428 | static const char *cxlflash_driver_info(struct Scsi_Host *host) |
| 429 | { |
| 430 | return CXLFLASH_ADAPTER_NAME; |
| 431 | } |
| 432 | |
| 433 | /** |
| 434 | * cxlflash_queuecommand() - sends a mid-layer request |
| 435 | * @host: SCSI host associated with device. |
| 436 | * @scp: SCSI command to send. |
| 437 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 438 | * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 439 | */ |
| 440 | static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) |
| 441 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 442 | struct cxlflash_cfg *cfg = shost_priv(host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 443 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 444 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 445 | struct afu_cmd *cmd = sc_to_afucz(scp); |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 446 | struct scatterlist *sg = scsi_sglist(scp); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 447 | u32 port_sel = scp->device->channel + 1; |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 448 | u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 449 | ulong lock_flags; |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 450 | int nseg = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 451 | int rc = 0; |
| 452 | |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 453 | dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 454 | "cdb=(%08x-%08x-%08x-%08x)\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 455 | __func__, scp, host->host_no, scp->device->channel, |
| 456 | scp->device->id, scp->device->lun, |
| 457 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 458 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 459 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 460 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 461 | |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 462 | /* |
| 463 | * If a Task Management Function is active, wait for it to complete |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 464 | * before continuing with regular commands. |
| 465 | */ |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 466 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 467 | if (cfg->tmf_active) { |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 468 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 469 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 470 | goto out; |
| 471 | } |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 472 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 473 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 474 | switch (cfg->state) { |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 475 | case STATE_RESET: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 476 | dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 477 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 478 | goto out; |
| 479 | case STATE_FAILTERM: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 480 | dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 481 | scp->result = (DID_NO_CONNECT << 16); |
| 482 | scp->scsi_done(scp); |
| 483 | rc = 0; |
| 484 | goto out; |
| 485 | default: |
| 486 | break; |
| 487 | } |
| 488 | |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 489 | if (likely(sg)) { |
| 490 | nseg = scsi_dma_map(scp); |
| 491 | if (unlikely(nseg < 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 492 | dev_err(dev, "%s: Fail DMA map\n", __func__); |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 493 | rc = SCSI_MLQUEUE_HOST_BUSY; |
| 494 | goto out; |
| 495 | } |
| 496 | |
| 497 | cmd->rcb.data_len = sg_dma_len(sg); |
| 498 | cmd->rcb.data_ea = sg_dma_address(sg); |
| 499 | } |
| 500 | |
Matthew R. Ochs | fe7f969 | 2016-11-28 18:43:18 -0600 | [diff] [blame] | 501 | cmd->scp = scp; |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 502 | cmd->parent = afu; |
| 503 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 504 | cmd->rcb.ctx_id = afu->ctx_hndl; |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 505 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 506 | cmd->rcb.port_sel = port_sel; |
| 507 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
| 508 | |
| 509 | if (scp->sc_data_direction == DMA_TO_DEVICE) |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 510 | req_flags |= SISL_REQ_FLAGS_HOST_WRITE; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 511 | |
Matthew R. Ochs | 9d89326 | 2016-11-28 18:43:01 -0600 | [diff] [blame] | 512 | cmd->rcb.req_flags = req_flags; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 513 | memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb)); |
| 514 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 515 | rc = afu->send_cmd(afu, cmd); |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 516 | if (unlikely(rc)) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 517 | scsi_dma_unmap(scp); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 518 | out: |
| 519 | return rc; |
| 520 | } |
| 521 | |
| 522 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 523 | * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 524 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 525 | */ |
| 526 | static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg) |
| 527 | { |
| 528 | struct pci_dev *pdev = cfg->dev; |
| 529 | |
| 530 | if (pci_channel_offline(pdev)) |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 531 | wait_event_timeout(cfg->reset_waitq, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 532 | !pci_channel_offline(pdev), |
| 533 | CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT); |
| 534 | } |
| 535 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 536 | /** |
| 537 | * free_mem() - free memory associated with the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 538 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 539 | */ |
| 540 | static void free_mem(struct cxlflash_cfg *cfg) |
| 541 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 542 | struct afu *afu = cfg->afu; |
| 543 | |
| 544 | if (cfg->afu) { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 545 | free_pages((ulong)afu, get_order(sizeof(struct afu))); |
| 546 | cfg->afu = NULL; |
| 547 | } |
| 548 | } |
| 549 | |
| 550 | /** |
| 551 | * stop_afu() - stops the AFU command timers and unmaps the MMIO space |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 552 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 553 | * |
| 554 | * Safe to call with AFU in a partially allocated/initialized state. |
Manoj Kumar | ee91e33 | 2015-12-14 15:07:02 -0600 | [diff] [blame] | 555 | * |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 556 | * Cancels scheduled worker threads, waits for any active internal AFU |
| 557 | * commands to timeout and then unmaps the MMIO space. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 558 | */ |
| 559 | static void stop_afu(struct cxlflash_cfg *cfg) |
| 560 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 561 | struct afu *afu = cfg->afu; |
| 562 | |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 563 | cancel_work_sync(&cfg->work_q); |
| 564 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 565 | if (likely(afu)) { |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 566 | while (atomic_read(&afu->cmds_active)) |
| 567 | ssleep(1); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 568 | if (likely(afu->afu_map)) { |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 569 | cxl_psa_unmap((void __iomem *)afu->afu_map); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 570 | afu->afu_map = NULL; |
| 571 | } |
| 572 | } |
| 573 | } |
| 574 | |
| 575 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 576 | * term_intr() - disables all AFU interrupts |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 577 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 578 | * @level: Depth of allocation, where to begin waterfall tear down. |
| 579 | * |
| 580 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 581 | */ |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 582 | static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 583 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 584 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 585 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 586 | |
| 587 | if (!afu || !cfg->mcctx) { |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 588 | dev_err(dev, "%s: returning with NULL afu or MC\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 589 | return; |
| 590 | } |
| 591 | |
| 592 | switch (level) { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 593 | case UNMAP_THREE: |
| 594 | cxl_unmap_afu_irq(cfg->mcctx, 3, afu); |
| 595 | case UNMAP_TWO: |
| 596 | cxl_unmap_afu_irq(cfg->mcctx, 2, afu); |
| 597 | case UNMAP_ONE: |
| 598 | cxl_unmap_afu_irq(cfg->mcctx, 1, afu); |
| 599 | case FREE_IRQ: |
| 600 | cxl_free_afu_irqs(cfg->mcctx); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 601 | /* fall through */ |
| 602 | case UNDO_NOOP: |
| 603 | /* No action required */ |
| 604 | break; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 605 | } |
| 606 | } |
| 607 | |
| 608 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 609 | * term_mc() - terminates the master context |
| 610 | * @cfg: Internal structure associated with the host. |
| 611 | * @level: Depth of allocation, where to begin waterfall tear down. |
| 612 | * |
| 613 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 614 | */ |
| 615 | static void term_mc(struct cxlflash_cfg *cfg) |
| 616 | { |
| 617 | int rc = 0; |
| 618 | struct afu *afu = cfg->afu; |
| 619 | struct device *dev = &cfg->dev->dev; |
| 620 | |
| 621 | if (!afu || !cfg->mcctx) { |
| 622 | dev_err(dev, "%s: returning with NULL afu or MC\n", __func__); |
| 623 | return; |
| 624 | } |
| 625 | |
| 626 | rc = cxl_stop_context(cfg->mcctx); |
| 627 | WARN_ON(rc); |
| 628 | cfg->mcctx = NULL; |
| 629 | } |
| 630 | |
| 631 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 632 | * term_afu() - terminates the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 633 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 634 | * |
| 635 | * Safe to call with AFU/MC in partially allocated/initialized state. |
| 636 | */ |
| 637 | static void term_afu(struct cxlflash_cfg *cfg) |
| 638 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 639 | struct device *dev = &cfg->dev->dev; |
| 640 | |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 641 | /* |
| 642 | * Tear down is carefully orchestrated to ensure |
| 643 | * no interrupts can come in when the problem state |
| 644 | * area is unmapped. |
| 645 | * |
| 646 | * 1) Disable all AFU interrupts |
| 647 | * 2) Unmap the problem state area |
| 648 | * 3) Stop the master context |
| 649 | */ |
| 650 | term_intr(cfg, UNMAP_THREE); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 651 | if (cfg->afu) |
| 652 | stop_afu(cfg); |
| 653 | |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 654 | term_mc(cfg); |
Uma Krishnan | 6ded8b3 | 2016-03-04 15:55:15 -0600 | [diff] [blame] | 655 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 656 | dev_dbg(dev, "%s: returning\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 657 | } |
| 658 | |
| 659 | /** |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 660 | * notify_shutdown() - notifies device of pending shutdown |
| 661 | * @cfg: Internal structure associated with the host. |
| 662 | * @wait: Whether to wait for shutdown processing to complete. |
| 663 | * |
| 664 | * This function will notify the AFU that the adapter is being shutdown |
| 665 | * and will wait for shutdown processing to complete if wait is true. |
| 666 | * This notification should flush pending I/Os to the device and halt |
| 667 | * further I/Os until the next AFU reset is issued and device restarted. |
| 668 | */ |
| 669 | static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) |
| 670 | { |
| 671 | struct afu *afu = cfg->afu; |
| 672 | struct device *dev = &cfg->dev->dev; |
Uma Krishnan | 1bd2b28 | 2016-07-21 15:44:04 -0500 | [diff] [blame] | 673 | struct sisl_global_map __iomem *global; |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 674 | struct dev_dependent_vals *ddv; |
| 675 | u64 reg, status; |
| 676 | int i, retry_cnt = 0; |
| 677 | |
| 678 | ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data; |
| 679 | if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN)) |
| 680 | return; |
| 681 | |
Uma Krishnan | 1bd2b28 | 2016-07-21 15:44:04 -0500 | [diff] [blame] | 682 | if (!afu || !afu->afu_map) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 683 | dev_dbg(dev, "%s: Problem state area not mapped\n", __func__); |
Uma Krishnan | 1bd2b28 | 2016-07-21 15:44:04 -0500 | [diff] [blame] | 684 | return; |
| 685 | } |
| 686 | |
| 687 | global = &afu->afu_map->global; |
| 688 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 689 | /* Notify AFU */ |
| 690 | for (i = 0; i < NUM_FC_PORTS; i++) { |
| 691 | reg = readq_be(&global->fc_regs[i][FC_CONFIG2 / 8]); |
| 692 | reg |= SISL_FC_SHUTDOWN_NORMAL; |
| 693 | writeq_be(reg, &global->fc_regs[i][FC_CONFIG2 / 8]); |
| 694 | } |
| 695 | |
| 696 | if (!wait) |
| 697 | return; |
| 698 | |
| 699 | /* Wait up to 1.5 seconds for shutdown processing to complete */ |
| 700 | for (i = 0; i < NUM_FC_PORTS; i++) { |
| 701 | retry_cnt = 0; |
| 702 | while (true) { |
| 703 | status = readq_be(&global->fc_regs[i][FC_STATUS / 8]); |
| 704 | if (status & SISL_STATUS_SHUTDOWN_COMPLETE) |
| 705 | break; |
| 706 | if (++retry_cnt >= MC_RETRY_CNT) { |
| 707 | dev_dbg(dev, "%s: port %d shutdown processing " |
| 708 | "not yet completed\n", __func__, i); |
| 709 | break; |
| 710 | } |
| 711 | msleep(100 * retry_cnt); |
| 712 | } |
| 713 | } |
| 714 | } |
| 715 | |
| 716 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 717 | * cxlflash_remove() - PCI entry point to tear down host |
| 718 | * @pdev: PCI device associated with the host. |
| 719 | * |
| 720 | * Safe to use as a cleanup in partially allocated/initialized state. |
| 721 | */ |
| 722 | static void cxlflash_remove(struct pci_dev *pdev) |
| 723 | { |
| 724 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 725 | struct device *dev = &pdev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 726 | ulong lock_flags; |
| 727 | |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 728 | if (!pci_is_enabled(pdev)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 729 | dev_dbg(dev, "%s: Device is disabled\n", __func__); |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 730 | return; |
| 731 | } |
| 732 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 733 | /* If a Task Management Function is active, wait for it to complete |
| 734 | * before continuing with remove. |
| 735 | */ |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 736 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 737 | if (cfg->tmf_active) |
Matthew R. Ochs | 018d1dc95 | 2015-10-21 15:13:21 -0500 | [diff] [blame] | 738 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
| 739 | !cfg->tmf_active, |
| 740 | cfg->tmf_slock); |
| 741 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 742 | |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 743 | /* Notify AFU and wait for shutdown processing to complete */ |
| 744 | notify_shutdown(cfg, true); |
| 745 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 746 | cfg->state = STATE_FAILTERM; |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 747 | cxlflash_stop_term_user_contexts(cfg); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 748 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 749 | switch (cfg->init_state) { |
| 750 | case INIT_STATE_SCSI: |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 751 | cxlflash_term_local_luns(cfg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 752 | scsi_remove_host(cfg->host); |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 753 | /* fall through */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 754 | case INIT_STATE_AFU: |
Manoj Kumar | b45cdbaf | 2015-12-14 15:07:23 -0600 | [diff] [blame] | 755 | term_afu(cfg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 756 | case INIT_STATE_PCI: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 757 | pci_disable_device(pdev); |
| 758 | case INIT_STATE_NONE: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 759 | free_mem(cfg); |
Matthew R. Ochs | 8b5b1e8 | 2015-10-21 15:14:09 -0500 | [diff] [blame] | 760 | scsi_host_put(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 761 | break; |
| 762 | } |
| 763 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 764 | dev_dbg(dev, "%s: returning\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 765 | } |
| 766 | |
| 767 | /** |
| 768 | * alloc_mem() - allocates the AFU and its command pool |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 769 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 770 | * |
| 771 | * A partially allocated state remains on failure. |
| 772 | * |
| 773 | * Return: |
| 774 | * 0 on success |
| 775 | * -ENOMEM on failure to allocate memory |
| 776 | */ |
| 777 | static int alloc_mem(struct cxlflash_cfg *cfg) |
| 778 | { |
| 779 | int rc = 0; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 780 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 781 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 782 | /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 783 | cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
| 784 | get_order(sizeof(struct afu))); |
| 785 | if (unlikely(!cfg->afu)) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 786 | dev_err(dev, "%s: cannot get %d free pages\n", |
| 787 | __func__, get_order(sizeof(struct afu))); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 788 | rc = -ENOMEM; |
| 789 | goto out; |
| 790 | } |
| 791 | cfg->afu->parent = cfg; |
| 792 | cfg->afu->afu_map = NULL; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 793 | out: |
| 794 | return rc; |
| 795 | } |
| 796 | |
| 797 | /** |
| 798 | * init_pci() - initializes the host as a PCI device |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 799 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 800 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 801 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 802 | */ |
| 803 | static int init_pci(struct cxlflash_cfg *cfg) |
| 804 | { |
| 805 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 806 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 807 | int rc = 0; |
| 808 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 809 | rc = pci_enable_device(pdev); |
| 810 | if (rc || pci_channel_offline(pdev)) { |
| 811 | if (pci_channel_offline(pdev)) { |
| 812 | cxlflash_wait_for_pci_err_recovery(cfg); |
| 813 | rc = pci_enable_device(pdev); |
| 814 | } |
| 815 | |
| 816 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 817 | dev_err(dev, "%s: Cannot enable adapter\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 818 | cxlflash_wait_for_pci_err_recovery(cfg); |
Manoj N. Kumar | 961487e | 2016-03-04 15:55:14 -0600 | [diff] [blame] | 819 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 820 | } |
| 821 | } |
| 822 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 823 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 824 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 825 | return rc; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 826 | } |
| 827 | |
| 828 | /** |
| 829 | * init_scsi() - adds the host to the SCSI stack and kicks off host scan |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 830 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 831 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 832 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 833 | */ |
| 834 | static int init_scsi(struct cxlflash_cfg *cfg) |
| 835 | { |
| 836 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 837 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 838 | int rc = 0; |
| 839 | |
| 840 | rc = scsi_add_host(cfg->host, &pdev->dev); |
| 841 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 842 | dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 843 | goto out; |
| 844 | } |
| 845 | |
| 846 | scsi_scan_host(cfg->host); |
| 847 | |
| 848 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 849 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 850 | return rc; |
| 851 | } |
| 852 | |
| 853 | /** |
| 854 | * set_port_online() - transitions the specified host FC port to online state |
| 855 | * @fc_regs: Top of MMIO region defined for specified port. |
| 856 | * |
| 857 | * The provided MMIO region must be mapped prior to call. Online state means |
| 858 | * that the FC link layer has synced, completed the handshaking process, and |
| 859 | * is ready for login to start. |
| 860 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 861 | static void set_port_online(__be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 862 | { |
| 863 | u64 cmdcfg; |
| 864 | |
| 865 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 866 | cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */ |
| 867 | cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */ |
| 868 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 869 | } |
| 870 | |
| 871 | /** |
| 872 | * set_port_offline() - transitions the specified host FC port to offline state |
| 873 | * @fc_regs: Top of MMIO region defined for specified port. |
| 874 | * |
| 875 | * The provided MMIO region must be mapped prior to call. |
| 876 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 877 | static void set_port_offline(__be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 878 | { |
| 879 | u64 cmdcfg; |
| 880 | |
| 881 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 882 | cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */ |
| 883 | cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */ |
| 884 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); |
| 885 | } |
| 886 | |
| 887 | /** |
| 888 | * wait_port_online() - waits for the specified host FC port come online |
| 889 | * @fc_regs: Top of MMIO region defined for specified port. |
| 890 | * @delay_us: Number of microseconds to delay between reading port status. |
| 891 | * @nretry: Number of cycles to retry reading port status. |
| 892 | * |
| 893 | * The provided MMIO region must be mapped prior to call. This will timeout |
| 894 | * when the cable is not plugged in. |
| 895 | * |
| 896 | * Return: |
| 897 | * TRUE (1) when the specified port is online |
| 898 | * FALSE (0) when the specified port fails to come online after timeout |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 899 | */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 900 | static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 901 | { |
| 902 | u64 status; |
| 903 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 904 | WARN_ON(delay_us < 1000); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 905 | |
| 906 | do { |
| 907 | msleep(delay_us / 1000); |
| 908 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); |
Matthew R. Ochs | 05dab43 | 2016-09-02 15:40:03 -0500 | [diff] [blame] | 909 | if (status == U64_MAX) |
| 910 | nretry /= 2; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 911 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE && |
| 912 | nretry--); |
| 913 | |
| 914 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE); |
| 915 | } |
| 916 | |
| 917 | /** |
| 918 | * wait_port_offline() - waits for the specified host FC port go offline |
| 919 | * @fc_regs: Top of MMIO region defined for specified port. |
| 920 | * @delay_us: Number of microseconds to delay between reading port status. |
| 921 | * @nretry: Number of cycles to retry reading port status. |
| 922 | * |
| 923 | * The provided MMIO region must be mapped prior to call. |
| 924 | * |
| 925 | * Return: |
| 926 | * TRUE (1) when the specified port is offline |
| 927 | * FALSE (0) when the specified port fails to go offline after timeout |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 928 | */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 929 | static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 930 | { |
| 931 | u64 status; |
| 932 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 933 | WARN_ON(delay_us < 1000); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 934 | |
| 935 | do { |
| 936 | msleep(delay_us / 1000); |
| 937 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); |
Matthew R. Ochs | 05dab43 | 2016-09-02 15:40:03 -0500 | [diff] [blame] | 938 | if (status == U64_MAX) |
| 939 | nretry /= 2; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 940 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE && |
| 941 | nretry--); |
| 942 | |
| 943 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE); |
| 944 | } |
| 945 | |
| 946 | /** |
| 947 | * afu_set_wwpn() - configures the WWPN for the specified host FC port |
| 948 | * @afu: AFU associated with the host that owns the specified FC port. |
| 949 | * @port: Port number being configured. |
| 950 | * @fc_regs: Top of MMIO region defined for specified port. |
| 951 | * @wwpn: The world-wide-port-number previously discovered for port. |
| 952 | * |
| 953 | * The provided MMIO region must be mapped prior to call. As part of the |
| 954 | * sequence to configure the WWPN, the port is toggled offline and then back |
| 955 | * online. This toggling action can cause this routine to delay up to a few |
| 956 | * seconds. When configured to use the internal LUN feature of the AFU, a |
| 957 | * failure to come online is overridden. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 958 | */ |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 959 | static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs, |
| 960 | u64 wwpn) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 961 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 962 | struct cxlflash_cfg *cfg = afu->parent; |
| 963 | struct device *dev = &cfg->dev->dev; |
| 964 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 965 | set_port_offline(fc_regs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 966 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 967 | FC_PORT_STATUS_RETRY_CNT)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 968 | dev_dbg(dev, "%s: wait on port %d to go offline timed out\n", |
| 969 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 970 | } |
| 971 | |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 972 | writeq_be(wwpn, &fc_regs[FC_PNAME / 8]); |
Matthew R. Ochs | 964497b | 2015-10-21 15:13:54 -0500 | [diff] [blame] | 973 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 974 | set_port_online(fc_regs); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 975 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 976 | FC_PORT_STATUS_RETRY_CNT)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 977 | dev_dbg(dev, "%s: wait on port %d to go online timed out\n", |
| 978 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 979 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 980 | } |
| 981 | |
| 982 | /** |
| 983 | * afu_link_reset() - resets the specified host FC port |
| 984 | * @afu: AFU associated with the host that owns the specified FC port. |
| 985 | * @port: Port number being configured. |
| 986 | * @fc_regs: Top of MMIO region defined for specified port. |
| 987 | * |
| 988 | * The provided MMIO region must be mapped prior to call. The sequence to |
| 989 | * reset the port involves toggling it offline and then back online. This |
| 990 | * action can cause this routine to delay up to a few seconds. An effort |
| 991 | * is made to maintain link with the device by switching to host to use |
| 992 | * the alternate port exclusively while the reset takes place. |
| 993 | * failure to come online is overridden. |
| 994 | */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 995 | static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 996 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 997 | struct cxlflash_cfg *cfg = afu->parent; |
| 998 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 999 | u64 port_sel; |
| 1000 | |
| 1001 | /* first switch the AFU to the other links, if any */ |
| 1002 | port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel); |
Dan Carpenter | 4da74db | 2015-08-18 11:57:43 +0300 | [diff] [blame] | 1003 | port_sel &= ~(1ULL << port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1004 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
| 1005 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); |
| 1006 | |
| 1007 | set_port_offline(fc_regs); |
| 1008 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 1009 | FC_PORT_STATUS_RETRY_CNT)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1010 | dev_err(dev, "%s: wait on port %d to go offline timed out\n", |
| 1011 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1012 | |
| 1013 | set_port_online(fc_regs); |
| 1014 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
| 1015 | FC_PORT_STATUS_RETRY_CNT)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1016 | dev_err(dev, "%s: wait on port %d to go online timed out\n", |
| 1017 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1018 | |
| 1019 | /* switch back to include this port */ |
Dan Carpenter | 4da74db | 2015-08-18 11:57:43 +0300 | [diff] [blame] | 1020 | port_sel |= (1ULL << port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1021 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
| 1022 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); |
| 1023 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1024 | dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1025 | } |
| 1026 | |
| 1027 | /* |
| 1028 | * Asynchronous interrupt information table |
| 1029 | */ |
| 1030 | static const struct asyc_intr_info ainfo[] = { |
| 1031 | {SISL_ASTATUS_FC0_OTHER, "other error", 0, CLR_FC_ERROR | LINK_RESET}, |
| 1032 | {SISL_ASTATUS_FC0_LOGO, "target initiated LOGO", 0, 0}, |
| 1033 | {SISL_ASTATUS_FC0_CRC_T, "CRC threshold exceeded", 0, LINK_RESET}, |
Manoj Kumar | e6e6df3 | 2015-10-21 15:16:07 -0500 | [diff] [blame] | 1034 | {SISL_ASTATUS_FC0_LOGI_R, "login timed out, retrying", 0, LINK_RESET}, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1035 | {SISL_ASTATUS_FC0_LOGI_F, "login failed", 0, CLR_FC_ERROR}, |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 1036 | {SISL_ASTATUS_FC0_LOGI_S, "login succeeded", 0, SCAN_HOST}, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1037 | {SISL_ASTATUS_FC0_LINK_DN, "link down", 0, 0}, |
Uma Krishnan | bbbfae9 | 2016-09-02 15:38:48 -0500 | [diff] [blame] | 1038 | {SISL_ASTATUS_FC0_LINK_UP, "link up", 0, 0}, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1039 | {SISL_ASTATUS_FC1_OTHER, "other error", 1, CLR_FC_ERROR | LINK_RESET}, |
| 1040 | {SISL_ASTATUS_FC1_LOGO, "target initiated LOGO", 1, 0}, |
| 1041 | {SISL_ASTATUS_FC1_CRC_T, "CRC threshold exceeded", 1, LINK_RESET}, |
Manoj Kumar | a9be294 | 2015-12-14 14:55:09 -0600 | [diff] [blame] | 1042 | {SISL_ASTATUS_FC1_LOGI_R, "login timed out, retrying", 1, LINK_RESET}, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1043 | {SISL_ASTATUS_FC1_LOGI_F, "login failed", 1, CLR_FC_ERROR}, |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 1044 | {SISL_ASTATUS_FC1_LOGI_S, "login succeeded", 1, SCAN_HOST}, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1045 | {SISL_ASTATUS_FC1_LINK_DN, "link down", 1, 0}, |
Uma Krishnan | bbbfae9 | 2016-09-02 15:38:48 -0500 | [diff] [blame] | 1046 | {SISL_ASTATUS_FC1_LINK_UP, "link up", 1, 0}, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1047 | {0x0, "", 0, 0} /* terminator */ |
| 1048 | }; |
| 1049 | |
| 1050 | /** |
| 1051 | * find_ainfo() - locates and returns asynchronous interrupt information |
| 1052 | * @status: Status code set by AFU on error. |
| 1053 | * |
| 1054 | * Return: The located information or NULL when the status code is invalid. |
| 1055 | */ |
| 1056 | static const struct asyc_intr_info *find_ainfo(u64 status) |
| 1057 | { |
| 1058 | const struct asyc_intr_info *info; |
| 1059 | |
| 1060 | for (info = &ainfo[0]; info->status; info++) |
| 1061 | if (info->status == status) |
| 1062 | return info; |
| 1063 | |
| 1064 | return NULL; |
| 1065 | } |
| 1066 | |
| 1067 | /** |
| 1068 | * afu_err_intr_init() - clears and initializes the AFU for error interrupts |
| 1069 | * @afu: AFU associated with the host. |
| 1070 | */ |
| 1071 | static void afu_err_intr_init(struct afu *afu) |
| 1072 | { |
| 1073 | int i; |
| 1074 | u64 reg; |
| 1075 | |
| 1076 | /* global async interrupts: AFU clears afu_ctrl on context exit |
| 1077 | * if async interrupts were sent to that context. This prevents |
| 1078 | * the AFU form sending further async interrupts when |
| 1079 | * there is |
| 1080 | * nobody to receive them. |
| 1081 | */ |
| 1082 | |
| 1083 | /* mask all */ |
| 1084 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask); |
| 1085 | /* set LISN# to send and point to master context */ |
| 1086 | reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40); |
| 1087 | |
| 1088 | if (afu->internal_lun) |
| 1089 | reg |= 1; /* Bit 63 indicates local lun */ |
| 1090 | writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl); |
| 1091 | /* clear all */ |
| 1092 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); |
| 1093 | /* unmask bits that are of interest */ |
| 1094 | /* note: afu can send an interrupt after this step */ |
| 1095 | writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask); |
| 1096 | /* clear again in case a bit came on after previous clear but before */ |
| 1097 | /* unmask */ |
| 1098 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); |
| 1099 | |
| 1100 | /* Clear/Set internal lun bits */ |
| 1101 | reg = readq_be(&afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]); |
| 1102 | reg &= SISL_FC_INTERNAL_MASK; |
| 1103 | if (afu->internal_lun) |
| 1104 | reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT); |
| 1105 | writeq_be(reg, &afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]); |
| 1106 | |
| 1107 | /* now clear FC errors */ |
| 1108 | for (i = 0; i < NUM_FC_PORTS; i++) { |
| 1109 | writeq_be(0xFFFFFFFFU, |
| 1110 | &afu->afu_map->global.fc_regs[i][FC_ERROR / 8]); |
| 1111 | writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRCAP / 8]); |
| 1112 | } |
| 1113 | |
| 1114 | /* sync interrupts for master's IOARRIN write */ |
| 1115 | /* note that unlike asyncs, there can be no pending sync interrupts */ |
| 1116 | /* at this time (this is a fresh context and master has not written */ |
| 1117 | /* IOARRIN yet), so there is nothing to clear. */ |
| 1118 | |
| 1119 | /* set LISN#, it is always sent to the context that wrote IOARRIN */ |
| 1120 | writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl); |
| 1121 | writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask); |
| 1122 | } |
| 1123 | |
| 1124 | /** |
| 1125 | * cxlflash_sync_err_irq() - interrupt handler for synchronous errors |
| 1126 | * @irq: Interrupt number. |
| 1127 | * @data: Private data provided at interrupt registration, the AFU. |
| 1128 | * |
| 1129 | * Return: Always return IRQ_HANDLED. |
| 1130 | */ |
| 1131 | static irqreturn_t cxlflash_sync_err_irq(int irq, void *data) |
| 1132 | { |
| 1133 | struct afu *afu = (struct afu *)data; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1134 | struct cxlflash_cfg *cfg = afu->parent; |
| 1135 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1136 | u64 reg; |
| 1137 | u64 reg_unmasked; |
| 1138 | |
| 1139 | reg = readq_be(&afu->host_map->intr_status); |
| 1140 | reg_unmasked = (reg & SISL_ISTATUS_UNMASK); |
| 1141 | |
| 1142 | if (reg_unmasked == 0UL) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1143 | dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n", |
| 1144 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1145 | goto cxlflash_sync_err_irq_exit; |
| 1146 | } |
| 1147 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1148 | dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n", |
| 1149 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1150 | |
| 1151 | writeq_be(reg_unmasked, &afu->host_map->intr_clear); |
| 1152 | |
| 1153 | cxlflash_sync_err_irq_exit: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1154 | return IRQ_HANDLED; |
| 1155 | } |
| 1156 | |
| 1157 | /** |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame^] | 1158 | * process_hrrq() - process the read-response queue |
| 1159 | * @afu: AFU associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1160 | * |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame^] | 1161 | * Return: The number of entries processed. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1162 | */ |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame^] | 1163 | static int process_hrrq(struct afu *afu) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1164 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1165 | struct afu_cmd *cmd; |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1166 | struct sisl_ioasa *ioasa; |
| 1167 | struct sisl_ioarcb *ioarcb; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1168 | bool toggle = afu->toggle; |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame^] | 1169 | int num_hrrq = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1170 | u64 entry, |
| 1171 | *hrrq_start = afu->hrrq_start, |
| 1172 | *hrrq_end = afu->hrrq_end, |
| 1173 | *hrrq_curr = afu->hrrq_curr; |
| 1174 | |
| 1175 | /* Process however many RRQ entries that are ready */ |
| 1176 | while (true) { |
| 1177 | entry = *hrrq_curr; |
| 1178 | |
| 1179 | if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle) |
| 1180 | break; |
| 1181 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1182 | entry &= ~SISL_RESP_HANDLE_T_BIT; |
| 1183 | |
| 1184 | if (afu_is_sq_cmd_mode(afu)) { |
| 1185 | ioasa = (struct sisl_ioasa *)entry; |
| 1186 | cmd = container_of(ioasa, struct afu_cmd, sa); |
| 1187 | } else { |
| 1188 | ioarcb = (struct sisl_ioarcb *)entry; |
| 1189 | cmd = container_of(ioarcb, struct afu_cmd, rcb); |
| 1190 | } |
| 1191 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1192 | cmd_complete(cmd); |
| 1193 | |
| 1194 | /* Advance to next entry or wrap and flip the toggle bit */ |
| 1195 | if (hrrq_curr < hrrq_end) |
| 1196 | hrrq_curr++; |
| 1197 | else { |
| 1198 | hrrq_curr = hrrq_start; |
| 1199 | toggle ^= SISL_RESP_HANDLE_T_BIT; |
| 1200 | } |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1201 | |
| 1202 | atomic_inc(&afu->hsq_credits); |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame^] | 1203 | num_hrrq++; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1204 | } |
| 1205 | |
| 1206 | afu->hrrq_curr = hrrq_curr; |
| 1207 | afu->toggle = toggle; |
| 1208 | |
Matthew R. Ochs | 76a6ebb | 2017-04-12 14:11:44 -0500 | [diff] [blame^] | 1209 | return num_hrrq; |
| 1210 | } |
| 1211 | |
| 1212 | /** |
| 1213 | * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path) |
| 1214 | * @irq: Interrupt number. |
| 1215 | * @data: Private data provided at interrupt registration, the AFU. |
| 1216 | * |
| 1217 | * Return: Always return IRQ_HANDLED. |
| 1218 | */ |
| 1219 | static irqreturn_t cxlflash_rrq_irq(int irq, void *data) |
| 1220 | { |
| 1221 | struct afu *afu = (struct afu *)data; |
| 1222 | |
| 1223 | process_hrrq(afu); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1224 | return IRQ_HANDLED; |
| 1225 | } |
| 1226 | |
| 1227 | /** |
| 1228 | * cxlflash_async_err_irq() - interrupt handler for asynchronous errors |
| 1229 | * @irq: Interrupt number. |
| 1230 | * @data: Private data provided at interrupt registration, the AFU. |
| 1231 | * |
| 1232 | * Return: Always return IRQ_HANDLED. |
| 1233 | */ |
| 1234 | static irqreturn_t cxlflash_async_err_irq(int irq, void *data) |
| 1235 | { |
| 1236 | struct afu *afu = (struct afu *)data; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1237 | struct cxlflash_cfg *cfg = afu->parent; |
| 1238 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1239 | u64 reg_unmasked; |
| 1240 | const struct asyc_intr_info *info; |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1241 | struct sisl_global_map __iomem *global = &afu->afu_map->global; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1242 | u64 reg; |
| 1243 | u8 port; |
| 1244 | int i; |
| 1245 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1246 | reg = readq_be(&global->regs.aintr_status); |
| 1247 | reg_unmasked = (reg & SISL_ASTATUS_UNMASK); |
| 1248 | |
| 1249 | if (reg_unmasked == 0) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1250 | dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1251 | __func__, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1252 | goto out; |
| 1253 | } |
| 1254 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1255 | /* FYI, it is 'okay' to clear AFU status before FC_ERROR */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1256 | writeq_be(reg_unmasked, &global->regs.aintr_clear); |
| 1257 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1258 | /* Check each bit that is on */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1259 | for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) { |
| 1260 | info = find_ainfo(1ULL << i); |
Matthew R. Ochs | 16798d3 | 2015-10-21 15:13:45 -0500 | [diff] [blame] | 1261 | if (((reg_unmasked & 0x1) == 0) || !info) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1262 | continue; |
| 1263 | |
| 1264 | port = info->port; |
| 1265 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1266 | dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1267 | __func__, port, info->desc, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1268 | readq_be(&global->fc_regs[port][FC_STATUS / 8])); |
| 1269 | |
| 1270 | /* |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1271 | * Do link reset first, some OTHER errors will set FC_ERROR |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1272 | * again if cleared before or w/o a reset |
| 1273 | */ |
| 1274 | if (info->action & LINK_RESET) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1275 | dev_err(dev, "%s: FC Port %d: resetting link\n", |
| 1276 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1277 | cfg->lr_state = LINK_RESET_REQUIRED; |
| 1278 | cfg->lr_port = port; |
| 1279 | schedule_work(&cfg->work_q); |
| 1280 | } |
| 1281 | |
| 1282 | if (info->action & CLR_FC_ERROR) { |
| 1283 | reg = readq_be(&global->fc_regs[port][FC_ERROR / 8]); |
| 1284 | |
| 1285 | /* |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1286 | * Since all errors are unmasked, FC_ERROR and FC_ERRCAP |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1287 | * should be the same and tracing one is sufficient. |
| 1288 | */ |
| 1289 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1290 | dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n", |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1291 | __func__, port, reg); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1292 | |
| 1293 | writeq_be(reg, &global->fc_regs[port][FC_ERROR / 8]); |
| 1294 | writeq_be(0, &global->fc_regs[port][FC_ERRCAP / 8]); |
| 1295 | } |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 1296 | |
| 1297 | if (info->action & SCAN_HOST) { |
| 1298 | atomic_inc(&cfg->scan_host_needed); |
| 1299 | schedule_work(&cfg->work_q); |
| 1300 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1301 | } |
| 1302 | |
| 1303 | out: |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1304 | return IRQ_HANDLED; |
| 1305 | } |
| 1306 | |
| 1307 | /** |
| 1308 | * start_context() - starts the master context |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1309 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1310 | * |
| 1311 | * Return: A success or failure value from CXL services. |
| 1312 | */ |
| 1313 | static int start_context(struct cxlflash_cfg *cfg) |
| 1314 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1315 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1316 | int rc = 0; |
| 1317 | |
| 1318 | rc = cxl_start_context(cfg->mcctx, |
| 1319 | cfg->afu->work.work_element_descriptor, |
| 1320 | NULL); |
| 1321 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1322 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1323 | return rc; |
| 1324 | } |
| 1325 | |
| 1326 | /** |
| 1327 | * read_vpd() - obtains the WWPNs from VPD |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1328 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1329 | * @wwpn: Array of size NUM_FC_PORTS to pass back WWPNs |
| 1330 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1331 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1332 | */ |
| 1333 | static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) |
| 1334 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1335 | struct device *dev = &cfg->dev->dev; |
| 1336 | struct pci_dev *pdev = cfg->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1337 | int rc = 0; |
| 1338 | int ro_start, ro_size, i, j, k; |
| 1339 | ssize_t vpd_size; |
| 1340 | char vpd_data[CXLFLASH_VPD_LEN]; |
| 1341 | char tmp_buf[WWPN_BUF_LEN] = { 0 }; |
| 1342 | char *wwpn_vpd_tags[NUM_FC_PORTS] = { "V5", "V6" }; |
| 1343 | |
| 1344 | /* Get the VPD data from the device */ |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1345 | vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data)); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1346 | if (unlikely(vpd_size <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1347 | dev_err(dev, "%s: Unable to read VPD (size = %ld)\n", |
| 1348 | __func__, vpd_size); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1349 | rc = -ENODEV; |
| 1350 | goto out; |
| 1351 | } |
| 1352 | |
| 1353 | /* Get the read only section offset */ |
| 1354 | ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, |
| 1355 | PCI_VPD_LRDT_RO_DATA); |
| 1356 | if (unlikely(ro_start < 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1357 | dev_err(dev, "%s: VPD Read-only data not found\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1358 | rc = -ENODEV; |
| 1359 | goto out; |
| 1360 | } |
| 1361 | |
| 1362 | /* Get the read only section size, cap when extends beyond read VPD */ |
| 1363 | ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); |
| 1364 | j = ro_size; |
| 1365 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; |
| 1366 | if (unlikely((i + j) > vpd_size)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1367 | dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n", |
| 1368 | __func__, (i + j), vpd_size); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1369 | ro_size = vpd_size - i; |
| 1370 | } |
| 1371 | |
| 1372 | /* |
| 1373 | * Find the offset of the WWPN tag within the read only |
| 1374 | * VPD data and validate the found field (partials are |
| 1375 | * no good to us). Convert the ASCII data to an integer |
| 1376 | * value. Note that we must copy to a temporary buffer |
| 1377 | * because the conversion service requires that the ASCII |
| 1378 | * string be terminated. |
| 1379 | */ |
| 1380 | for (k = 0; k < NUM_FC_PORTS; k++) { |
| 1381 | j = ro_size; |
| 1382 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; |
| 1383 | |
| 1384 | i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]); |
| 1385 | if (unlikely(i < 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1386 | dev_err(dev, "%s: Port %d WWPN not found in VPD\n", |
| 1387 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1388 | rc = -ENODEV; |
| 1389 | goto out; |
| 1390 | } |
| 1391 | |
| 1392 | j = pci_vpd_info_field_size(&vpd_data[i]); |
| 1393 | i += PCI_VPD_INFO_FLD_HDR_SIZE; |
| 1394 | if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1395 | dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n", |
| 1396 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1397 | rc = -ENODEV; |
| 1398 | goto out; |
| 1399 | } |
| 1400 | |
| 1401 | memcpy(tmp_buf, &vpd_data[i], WWPN_LEN); |
| 1402 | rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]); |
| 1403 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1404 | dev_err(dev, "%s: WWPN conversion failed for port %d\n", |
| 1405 | __func__, k); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1406 | rc = -ENODEV; |
| 1407 | goto out; |
| 1408 | } |
| 1409 | } |
| 1410 | |
| 1411 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1412 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1413 | return rc; |
| 1414 | } |
| 1415 | |
| 1416 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1417 | * init_pcr() - initialize the provisioning and control registers |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1418 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1419 | * |
| 1420 | * Also sets up fast access to the mapped registers and initializes AFU |
| 1421 | * command fields that never change. |
| 1422 | */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1423 | static void init_pcr(struct cxlflash_cfg *cfg) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1424 | { |
| 1425 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1426 | struct sisl_ctrl_map __iomem *ctrl_map; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1427 | int i; |
| 1428 | |
| 1429 | for (i = 0; i < MAX_CONTEXT; i++) { |
| 1430 | ctrl_map = &afu->afu_map->ctrls[i].ctrl; |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1431 | /* Disrupt any clients that could be running */ |
| 1432 | /* e.g. clients that survived a master restart */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1433 | writeq_be(0, &ctrl_map->rht_start); |
| 1434 | writeq_be(0, &ctrl_map->rht_cnt_id); |
| 1435 | writeq_be(0, &ctrl_map->ctx_cap); |
| 1436 | } |
| 1437 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1438 | /* Copy frequently used fields into afu */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1439 | afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1440 | afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host; |
| 1441 | afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl; |
| 1442 | |
| 1443 | /* Program the Endian Control for the master context */ |
| 1444 | writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1445 | } |
| 1446 | |
| 1447 | /** |
| 1448 | * init_global() - initialize AFU global registers |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1449 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1450 | */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1451 | static int init_global(struct cxlflash_cfg *cfg) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1452 | { |
| 1453 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1454 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1455 | u64 wwpn[NUM_FC_PORTS]; /* wwpn of AFU ports */ |
| 1456 | int i = 0, num_ports = 0; |
| 1457 | int rc = 0; |
| 1458 | u64 reg; |
| 1459 | |
| 1460 | rc = read_vpd(cfg, &wwpn[0]); |
| 1461 | if (rc) { |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1462 | dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1463 | goto out; |
| 1464 | } |
| 1465 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1466 | dev_dbg(dev, "%s: wwpn0=%016llx wwpn1=%016llx\n", |
| 1467 | __func__, wwpn[0], wwpn[1]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1468 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1469 | /* Set up RRQ and SQ in AFU for master issued cmds */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1470 | writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start); |
| 1471 | writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end); |
| 1472 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1473 | if (afu_is_sq_cmd_mode(afu)) { |
| 1474 | writeq_be((u64)afu->hsq_start, &afu->host_map->sq_start); |
| 1475 | writeq_be((u64)afu->hsq_end, &afu->host_map->sq_end); |
| 1476 | } |
| 1477 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1478 | /* AFU configuration */ |
| 1479 | reg = readq_be(&afu->afu_map->global.regs.afu_config); |
| 1480 | reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN; |
| 1481 | /* enable all auto retry options and control endianness */ |
| 1482 | /* leave others at default: */ |
| 1483 | /* CTX_CAP write protected, mbox_r does not clear on read and */ |
| 1484 | /* checker on if dual afu */ |
| 1485 | writeq_be(reg, &afu->afu_map->global.regs.afu_config); |
| 1486 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1487 | /* Global port select: select either port */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1488 | if (afu->internal_lun) { |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1489 | /* Only use port 0 */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1490 | writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel); |
| 1491 | num_ports = NUM_FC_PORTS - 1; |
| 1492 | } else { |
| 1493 | writeq_be(BOTH_PORTS, &afu->afu_map->global.regs.afu_port_sel); |
| 1494 | num_ports = NUM_FC_PORTS; |
| 1495 | } |
| 1496 | |
| 1497 | for (i = 0; i < num_ports; i++) { |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1498 | /* Unmask all errors (but they are still masked at AFU) */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1499 | writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRMSK / 8]); |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1500 | /* Clear CRC error cnt & set a threshold */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1501 | (void)readq_be(&afu->afu_map->global. |
| 1502 | fc_regs[i][FC_CNT_CRCERR / 8]); |
| 1503 | writeq_be(MC_CRC_THRESH, &afu->afu_map->global.fc_regs[i] |
| 1504 | [FC_CRC_THRESH / 8]); |
| 1505 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1506 | /* Set WWPNs. If already programmed, wwpn[i] is 0 */ |
Matthew R. Ochs | f801326 | 2016-09-02 15:40:20 -0500 | [diff] [blame] | 1507 | if (wwpn[i] != 0) |
| 1508 | afu_set_wwpn(afu, i, |
| 1509 | &afu->afu_map->global.fc_regs[i][0], |
| 1510 | wwpn[i]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1511 | /* Programming WWPN back to back causes additional |
| 1512 | * offline/online transitions and a PLOGI |
| 1513 | */ |
| 1514 | msleep(100); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1515 | } |
| 1516 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1517 | /* Set up master's own CTX_CAP to allow real mode, host translation */ |
| 1518 | /* tables, afu cmds and read/write GSCSI cmds. */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1519 | /* First, unlock ctx_cap write by reading mbox */ |
| 1520 | (void)readq_be(&afu->ctrl_map->mbox_r); /* unlock ctx_cap */ |
| 1521 | writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE | |
| 1522 | SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD | |
| 1523 | SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD), |
| 1524 | &afu->ctrl_map->ctx_cap); |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1525 | /* Initialize heartbeat */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1526 | afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1527 | out: |
| 1528 | return rc; |
| 1529 | } |
| 1530 | |
| 1531 | /** |
| 1532 | * start_afu() - initializes and starts the AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1533 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1534 | */ |
| 1535 | static int start_afu(struct cxlflash_cfg *cfg) |
| 1536 | { |
| 1537 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1538 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1539 | int rc = 0; |
| 1540 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1541 | init_pcr(cfg); |
| 1542 | |
Matthew R. Ochs | af10483 | 2015-10-21 15:15:14 -0500 | [diff] [blame] | 1543 | /* After an AFU reset, RRQ entries are stale, clear them */ |
| 1544 | memset(&afu->rrq_entry, 0, sizeof(afu->rrq_entry)); |
| 1545 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1546 | /* Initialize RRQ pointers */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1547 | afu->hrrq_start = &afu->rrq_entry[0]; |
| 1548 | afu->hrrq_end = &afu->rrq_entry[NUM_RRQ_ENTRY - 1]; |
| 1549 | afu->hrrq_curr = afu->hrrq_start; |
| 1550 | afu->toggle = 1; |
| 1551 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1552 | /* Initialize SQ */ |
| 1553 | if (afu_is_sq_cmd_mode(afu)) { |
| 1554 | memset(&afu->sq, 0, sizeof(afu->sq)); |
| 1555 | afu->hsq_start = &afu->sq[0]; |
| 1556 | afu->hsq_end = &afu->sq[NUM_SQ_ENTRY - 1]; |
| 1557 | afu->hsq_curr = afu->hsq_start; |
| 1558 | |
| 1559 | spin_lock_init(&afu->hsq_slock); |
| 1560 | atomic_set(&afu->hsq_credits, NUM_SQ_ENTRY - 1); |
| 1561 | } |
| 1562 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1563 | rc = init_global(cfg); |
| 1564 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1565 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1566 | return rc; |
| 1567 | } |
| 1568 | |
| 1569 | /** |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1570 | * init_intr() - setup interrupt handlers for the master context |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1571 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1572 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1573 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1574 | */ |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1575 | static enum undo_level init_intr(struct cxlflash_cfg *cfg, |
| 1576 | struct cxl_context *ctx) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1577 | { |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1578 | struct afu *afu = cfg->afu; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1579 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1580 | int rc = 0; |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1581 | enum undo_level level = UNDO_NOOP; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1582 | |
| 1583 | rc = cxl_allocate_afu_irqs(ctx, 3); |
| 1584 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1585 | dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n", |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1586 | __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1587 | level = UNDO_NOOP; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1588 | goto out; |
| 1589 | } |
| 1590 | |
| 1591 | rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, afu, |
| 1592 | "SISL_MSI_SYNC_ERROR"); |
| 1593 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1594 | dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1595 | level = FREE_IRQ; |
| 1596 | goto out; |
| 1597 | } |
| 1598 | |
| 1599 | rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, afu, |
| 1600 | "SISL_MSI_RRQ_UPDATED"); |
| 1601 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1602 | dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1603 | level = UNMAP_ONE; |
| 1604 | goto out; |
| 1605 | } |
| 1606 | |
| 1607 | rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, afu, |
| 1608 | "SISL_MSI_ASYNC_ERROR"); |
| 1609 | if (unlikely(rc <= 0)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1610 | dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1611 | level = UNMAP_TWO; |
| 1612 | goto out; |
| 1613 | } |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1614 | out: |
| 1615 | return level; |
| 1616 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1617 | |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1618 | /** |
| 1619 | * init_mc() - create and register as the master context |
| 1620 | * @cfg: Internal structure associated with the host. |
| 1621 | * |
| 1622 | * Return: 0 on success, -errno on failure |
| 1623 | */ |
| 1624 | static int init_mc(struct cxlflash_cfg *cfg) |
| 1625 | { |
| 1626 | struct cxl_context *ctx; |
| 1627 | struct device *dev = &cfg->dev->dev; |
| 1628 | int rc = 0; |
| 1629 | enum undo_level level; |
| 1630 | |
| 1631 | ctx = cxl_get_context(cfg->dev); |
| 1632 | if (unlikely(!ctx)) { |
| 1633 | rc = -ENOMEM; |
| 1634 | goto ret; |
| 1635 | } |
| 1636 | cfg->mcctx = ctx; |
| 1637 | |
| 1638 | /* Set it up as a master with the CXL */ |
| 1639 | cxl_set_master(ctx); |
| 1640 | |
| 1641 | /* During initialization reset the AFU to start from a clean slate */ |
| 1642 | rc = cxl_afu_reset(cfg->mcctx); |
| 1643 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1644 | dev_err(dev, "%s: AFU reset failed rc=%d\n", __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1645 | goto ret; |
| 1646 | } |
| 1647 | |
| 1648 | level = init_intr(cfg, ctx); |
| 1649 | if (unlikely(level)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1650 | dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1651 | goto out; |
| 1652 | } |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1653 | |
| 1654 | /* This performs the equivalent of the CXL_IOCTL_START_WORK. |
| 1655 | * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process |
| 1656 | * element (pe) that is embedded in the context (ctx) |
| 1657 | */ |
| 1658 | rc = start_context(cfg); |
| 1659 | if (unlikely(rc)) { |
| 1660 | dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc); |
| 1661 | level = UNMAP_THREE; |
| 1662 | goto out; |
| 1663 | } |
| 1664 | ret: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1665 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1666 | return rc; |
| 1667 | out: |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1668 | term_intr(cfg, level); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1669 | goto ret; |
| 1670 | } |
| 1671 | |
| 1672 | /** |
| 1673 | * init_afu() - setup as master context and start AFU |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1674 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1675 | * |
| 1676 | * This routine is a higher level of control for configuring the |
| 1677 | * AFU on probe and reset paths. |
| 1678 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1679 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1680 | */ |
| 1681 | static int init_afu(struct cxlflash_cfg *cfg) |
| 1682 | { |
| 1683 | u64 reg; |
| 1684 | int rc = 0; |
| 1685 | struct afu *afu = cfg->afu; |
| 1686 | struct device *dev = &cfg->dev->dev; |
| 1687 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1688 | cxl_perst_reloads_same_image(cfg->cxl_afu, true); |
| 1689 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1690 | rc = init_mc(cfg); |
| 1691 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1692 | dev_err(dev, "%s: init_mc failed rc=%d\n", |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1693 | __func__, rc); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1694 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1695 | } |
| 1696 | |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1697 | /* Map the entire MMIO space of the AFU */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1698 | afu->afu_map = cxl_psa_map(cfg->mcctx); |
| 1699 | if (!afu->afu_map) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1700 | dev_err(dev, "%s: cxl_psa_map failed\n", __func__); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1701 | rc = -ENOMEM; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1702 | goto err1; |
| 1703 | } |
| 1704 | |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 1705 | /* No byte reverse on reading afu_version or string will be backwards */ |
| 1706 | reg = readq(&afu->afu_map->global.regs.afu_version); |
| 1707 | memcpy(afu->version, ®, sizeof(reg)); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1708 | afu->interface_version = |
| 1709 | readq_be(&afu->afu_map->global.regs.interface_version); |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 1710 | if ((afu->interface_version + 1) == 0) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1711 | dev_err(dev, "Back level AFU, please upgrade. AFU version %s " |
| 1712 | "interface version %016llx\n", afu->version, |
Matthew R. Ochs | e5ce067 | 2015-10-21 15:14:01 -0500 | [diff] [blame] | 1713 | afu->interface_version); |
| 1714 | rc = -EINVAL; |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 1715 | goto err1; |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1716 | } |
| 1717 | |
Matthew R. Ochs | 696d0b0 | 2017-01-11 19:19:33 -0600 | [diff] [blame] | 1718 | if (afu_is_sq_cmd_mode(afu)) { |
| 1719 | afu->send_cmd = send_cmd_sq; |
| 1720 | afu->context_reset = context_reset_sq; |
| 1721 | } else { |
| 1722 | afu->send_cmd = send_cmd_ioarrin; |
| 1723 | afu->context_reset = context_reset_ioarrin; |
| 1724 | } |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 1725 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1726 | dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__, |
| 1727 | afu->version, afu->interface_version); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1728 | |
| 1729 | rc = start_afu(cfg); |
| 1730 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1731 | dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc); |
Uma Krishnan | 0df5bef | 2017-01-11 19:20:03 -0600 | [diff] [blame] | 1732 | goto err1; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1733 | } |
| 1734 | |
| 1735 | afu_err_intr_init(cfg->afu); |
Uma Krishnan | 11f7b18 | 2016-11-28 18:41:45 -0600 | [diff] [blame] | 1736 | spin_lock_init(&afu->rrin_slock); |
| 1737 | afu->room = readq_be(&afu->host_map->cmd_room); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1738 | |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 1739 | /* Restore the LUN mappings */ |
| 1740 | cxlflash_restore_luntable(cfg); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1741 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1742 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1743 | return rc; |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1744 | |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1745 | err1: |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 1746 | term_intr(cfg, UNMAP_THREE); |
| 1747 | term_mc(cfg); |
Matthew R. Ochs | ee3491b | 2015-10-21 15:16:00 -0500 | [diff] [blame] | 1748 | goto out; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1749 | } |
| 1750 | |
| 1751 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1752 | * cxlflash_afu_sync() - builds and sends an AFU sync command |
| 1753 | * @afu: AFU associated with the host. |
| 1754 | * @ctx_hndl_u: Identifies context requesting sync. |
| 1755 | * @res_hndl_u: Identifies resource requesting sync. |
| 1756 | * @mode: Type of sync to issue (lightweight, heavyweight, global). |
| 1757 | * |
| 1758 | * The AFU can only take 1 sync command at a time. This routine enforces this |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 1759 | * limitation by using a mutex to provide exclusive access to the AFU during |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1760 | * the sync. This design point requires calling threads to not be on interrupt |
| 1761 | * context due to the possibility of sleeping during concurrent sync operations. |
| 1762 | * |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1763 | * AFU sync operations are only necessary and allowed when the device is |
| 1764 | * operating normally. When not operating normally, sync requests can occur as |
| 1765 | * part of cleaning up resources associated with an adapter prior to removal. |
| 1766 | * In this scenario, these requests are simply ignored (safe due to the AFU |
| 1767 | * going away). |
| 1768 | * |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1769 | * Return: |
| 1770 | * 0 on success |
| 1771 | * -1 on failure |
| 1772 | */ |
| 1773 | int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u, |
| 1774 | res_hndl_t res_hndl_u, u8 mode) |
| 1775 | { |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1776 | struct cxlflash_cfg *cfg = afu->parent; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 1777 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1778 | struct afu_cmd *cmd = NULL; |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1779 | char *buf = NULL; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1780 | int rc = 0; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1781 | static DEFINE_MUTEX(sync_active); |
| 1782 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1783 | if (cfg->state != STATE_NORMAL) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1784 | dev_dbg(dev, "%s: Sync not required state=%u\n", |
| 1785 | __func__, cfg->state); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 1786 | return 0; |
| 1787 | } |
| 1788 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1789 | mutex_lock(&sync_active); |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 1790 | atomic_inc(&afu->cmds_active); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1791 | buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL); |
| 1792 | if (unlikely(!buf)) { |
| 1793 | dev_err(dev, "%s: no memory for command\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1794 | rc = -1; |
| 1795 | goto out; |
| 1796 | } |
| 1797 | |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1798 | cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd)); |
| 1799 | init_completion(&cmd->cevent); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1800 | cmd->parent = afu; |
| 1801 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1802 | dev_dbg(dev, "%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1803 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1804 | cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD; |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1805 | cmd->rcb.ctx_id = afu->ctx_hndl; |
| 1806 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1807 | cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT; |
| 1808 | |
| 1809 | cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */ |
| 1810 | cmd->rcb.cdb[1] = mode; |
| 1811 | |
| 1812 | /* The cdb is aligned, no unaligned accessors required */ |
Matthew R. Ochs | 1786f4a | 2015-10-21 15:14:48 -0500 | [diff] [blame] | 1813 | *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u); |
| 1814 | *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1815 | |
Matthew R. Ochs | 48b4be3 | 2016-11-28 18:43:09 -0600 | [diff] [blame] | 1816 | rc = afu->send_cmd(afu, cmd); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1817 | if (unlikely(rc)) |
| 1818 | goto out; |
| 1819 | |
Matthew R. Ochs | 9ba848a | 2016-11-28 18:42:42 -0600 | [diff] [blame] | 1820 | rc = wait_resp(afu, cmd); |
| 1821 | if (unlikely(rc)) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1822 | rc = -1; |
| 1823 | out: |
Matthew R. Ochs | de01283 | 2016-11-28 18:42:33 -0600 | [diff] [blame] | 1824 | atomic_dec(&afu->cmds_active); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1825 | mutex_unlock(&sync_active); |
Matthew R. Ochs | 350bb47 | 2016-11-28 18:42:11 -0600 | [diff] [blame] | 1826 | kfree(buf); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1827 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1828 | return rc; |
| 1829 | } |
| 1830 | |
| 1831 | /** |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1832 | * afu_reset() - resets the AFU |
| 1833 | * @cfg: Internal structure associated with the host. |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1834 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 1835 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1836 | */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1837 | static int afu_reset(struct cxlflash_cfg *cfg) |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1838 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1839 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1840 | int rc = 0; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1841 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1842 | /* Stop the context before the reset. Since the context is |
| 1843 | * no longer available restart it after the reset is complete |
| 1844 | */ |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1845 | term_afu(cfg); |
| 1846 | |
| 1847 | rc = init_afu(cfg); |
| 1848 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1849 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 1850 | return rc; |
| 1851 | } |
| 1852 | |
| 1853 | /** |
Manoj N. Kumar | f411396 | 2016-06-15 18:49:20 -0500 | [diff] [blame] | 1854 | * drain_ioctls() - wait until all currently executing ioctls have completed |
| 1855 | * @cfg: Internal structure associated with the host. |
| 1856 | * |
| 1857 | * Obtain write access to read/write semaphore that wraps ioctl |
| 1858 | * handling to 'drain' ioctls currently executing. |
| 1859 | */ |
| 1860 | static void drain_ioctls(struct cxlflash_cfg *cfg) |
| 1861 | { |
| 1862 | down_write(&cfg->ioctl_rwsem); |
| 1863 | up_write(&cfg->ioctl_rwsem); |
| 1864 | } |
| 1865 | |
| 1866 | /** |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1867 | * cxlflash_eh_device_reset_handler() - reset a single LUN |
| 1868 | * @scp: SCSI command to send. |
| 1869 | * |
| 1870 | * Return: |
| 1871 | * SUCCESS as defined in scsi/scsi.h |
| 1872 | * FAILED as defined in scsi/scsi.h |
| 1873 | */ |
| 1874 | static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp) |
| 1875 | { |
| 1876 | int rc = SUCCESS; |
| 1877 | struct Scsi_Host *host = scp->device->host; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1878 | struct cxlflash_cfg *cfg = shost_priv(host); |
| 1879 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1880 | struct afu *afu = cfg->afu; |
| 1881 | int rcr = 0; |
| 1882 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1883 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
| 1884 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, |
| 1885 | scp->device->channel, scp->device->id, scp->device->lun, |
| 1886 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 1887 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 1888 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 1889 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1890 | |
Matthew R. Ochs | ed486da | 2015-10-21 15:14:24 -0500 | [diff] [blame] | 1891 | retry: |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1892 | switch (cfg->state) { |
| 1893 | case STATE_NORMAL: |
| 1894 | rcr = send_tmf(afu, scp, TMF_LUN_RESET); |
| 1895 | if (unlikely(rcr)) |
| 1896 | rc = FAILED; |
| 1897 | break; |
| 1898 | case STATE_RESET: |
| 1899 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
Matthew R. Ochs | ed486da | 2015-10-21 15:14:24 -0500 | [diff] [blame] | 1900 | goto retry; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1901 | default: |
| 1902 | rc = FAILED; |
| 1903 | break; |
| 1904 | } |
| 1905 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1906 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1907 | return rc; |
| 1908 | } |
| 1909 | |
| 1910 | /** |
| 1911 | * cxlflash_eh_host_reset_handler() - reset the host adapter |
| 1912 | * @scp: SCSI command from stack identifying host. |
| 1913 | * |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 1914 | * Following a reset, the state is evaluated again in case an EEH occurred |
| 1915 | * during the reset. In such a scenario, the host reset will either yield |
| 1916 | * until the EEH recovery is complete or return success or failure based |
| 1917 | * upon the current device state. |
| 1918 | * |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1919 | * Return: |
| 1920 | * SUCCESS as defined in scsi/scsi.h |
| 1921 | * FAILED as defined in scsi/scsi.h |
| 1922 | */ |
| 1923 | static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp) |
| 1924 | { |
| 1925 | int rc = SUCCESS; |
| 1926 | int rcr = 0; |
| 1927 | struct Scsi_Host *host = scp->device->host; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1928 | struct cxlflash_cfg *cfg = shost_priv(host); |
| 1929 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1930 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1931 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
| 1932 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, |
| 1933 | scp->device->channel, scp->device->id, scp->device->lun, |
| 1934 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), |
| 1935 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), |
| 1936 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), |
| 1937 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1938 | |
| 1939 | switch (cfg->state) { |
| 1940 | case STATE_NORMAL: |
| 1941 | cfg->state = STATE_RESET; |
Manoj N. Kumar | f411396 | 2016-06-15 18:49:20 -0500 | [diff] [blame] | 1942 | drain_ioctls(cfg); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1943 | cxlflash_mark_contexts_error(cfg); |
| 1944 | rcr = afu_reset(cfg); |
| 1945 | if (rcr) { |
| 1946 | rc = FAILED; |
| 1947 | cfg->state = STATE_FAILTERM; |
| 1948 | } else |
| 1949 | cfg->state = STATE_NORMAL; |
| 1950 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 1951 | ssleep(1); |
| 1952 | /* fall through */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1953 | case STATE_RESET: |
| 1954 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
| 1955 | if (cfg->state == STATE_NORMAL) |
| 1956 | break; |
| 1957 | /* fall through */ |
| 1958 | default: |
| 1959 | rc = FAILED; |
| 1960 | break; |
| 1961 | } |
| 1962 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 1963 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1964 | return rc; |
| 1965 | } |
| 1966 | |
| 1967 | /** |
| 1968 | * cxlflash_change_queue_depth() - change the queue depth for the device |
| 1969 | * @sdev: SCSI device destined for queue depth change. |
| 1970 | * @qdepth: Requested queue depth value to set. |
| 1971 | * |
| 1972 | * The requested queue depth is capped to the maximum supported value. |
| 1973 | * |
| 1974 | * Return: The actual queue depth set. |
| 1975 | */ |
| 1976 | static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth) |
| 1977 | { |
| 1978 | |
| 1979 | if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN) |
| 1980 | qdepth = CXLFLASH_MAX_CMDS_PER_LUN; |
| 1981 | |
| 1982 | scsi_change_queue_depth(sdev, qdepth); |
| 1983 | return sdev->queue_depth; |
| 1984 | } |
| 1985 | |
| 1986 | /** |
| 1987 | * cxlflash_show_port_status() - queries and presents the current port status |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 1988 | * @port: Desired port for status reporting. |
| 1989 | * @afu: AFU owning the specified port. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1990 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 1991 | * |
| 1992 | * Return: The size of the ASCII string returned in @buf. |
| 1993 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 1994 | static ssize_t cxlflash_show_port_status(u32 port, struct afu *afu, char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1995 | { |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1996 | char *disp_status; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1997 | u64 status; |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 1998 | __be64 __iomem *fc_regs; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 1999 | |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2000 | if (port >= NUM_FC_PORTS) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2001 | return 0; |
| 2002 | |
| 2003 | fc_regs = &afu->afu_map->global.fc_regs[port][0]; |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2004 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); |
| 2005 | status &= FC_MTIP_STATUS_MASK; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2006 | |
| 2007 | if (status == FC_MTIP_STATUS_ONLINE) |
| 2008 | disp_status = "online"; |
| 2009 | else if (status == FC_MTIP_STATUS_OFFLINE) |
| 2010 | disp_status = "offline"; |
| 2011 | else |
| 2012 | disp_status = "unknown"; |
| 2013 | |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2014 | return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2015 | } |
| 2016 | |
| 2017 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2018 | * port0_show() - queries and presents the current status of port 0 |
| 2019 | * @dev: Generic device associated with the host owning the port. |
| 2020 | * @attr: Device attribute representing the port. |
| 2021 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2022 | * |
| 2023 | * Return: The size of the ASCII string returned in @buf. |
| 2024 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2025 | static ssize_t port0_show(struct device *dev, |
| 2026 | struct device_attribute *attr, |
| 2027 | char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2028 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2029 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2030 | struct afu *afu = cfg->afu; |
| 2031 | |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2032 | return cxlflash_show_port_status(0, afu, buf); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2033 | } |
| 2034 | |
| 2035 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2036 | * port1_show() - queries and presents the current status of port 1 |
| 2037 | * @dev: Generic device associated with the host owning the port. |
| 2038 | * @attr: Device attribute representing the port. |
| 2039 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2040 | * |
| 2041 | * Return: The size of the ASCII string returned in @buf. |
| 2042 | */ |
| 2043 | static ssize_t port1_show(struct device *dev, |
| 2044 | struct device_attribute *attr, |
| 2045 | char *buf) |
| 2046 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2047 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2048 | struct afu *afu = cfg->afu; |
| 2049 | |
| 2050 | return cxlflash_show_port_status(1, afu, buf); |
| 2051 | } |
| 2052 | |
| 2053 | /** |
| 2054 | * lun_mode_show() - presents the current LUN mode of the host |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2055 | * @dev: Generic device associated with the host. |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2056 | * @attr: Device attribute representing the LUN mode. |
| 2057 | * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII. |
| 2058 | * |
| 2059 | * Return: The size of the ASCII string returned in @buf. |
| 2060 | */ |
| 2061 | static ssize_t lun_mode_show(struct device *dev, |
| 2062 | struct device_attribute *attr, char *buf) |
| 2063 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2064 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2065 | struct afu *afu = cfg->afu; |
| 2066 | |
| 2067 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun); |
| 2068 | } |
| 2069 | |
| 2070 | /** |
| 2071 | * lun_mode_store() - sets the LUN mode of the host |
| 2072 | * @dev: Generic device associated with the host. |
| 2073 | * @attr: Device attribute representing the LUN mode. |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2074 | * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII. |
| 2075 | * @count: Length of data resizing in @buf. |
| 2076 | * |
| 2077 | * The CXL Flash AFU supports a dummy LUN mode where the external |
| 2078 | * links and storage are not required. Space on the FPGA is used |
| 2079 | * to create 1 or 2 small LUNs which are presented to the system |
| 2080 | * as if they were a normal storage device. This feature is useful |
| 2081 | * during development and also provides manufacturing with a way |
| 2082 | * to test the AFU without an actual device. |
| 2083 | * |
| 2084 | * 0 = external LUN[s] (default) |
| 2085 | * 1 = internal LUN (1 x 64K, 512B blocks, id 0) |
| 2086 | * 2 = internal LUN (1 x 64K, 4K blocks, id 0) |
| 2087 | * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1) |
| 2088 | * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1) |
| 2089 | * |
| 2090 | * Return: The size of the ASCII string returned in @buf. |
| 2091 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2092 | static ssize_t lun_mode_store(struct device *dev, |
| 2093 | struct device_attribute *attr, |
| 2094 | const char *buf, size_t count) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2095 | { |
| 2096 | struct Scsi_Host *shost = class_to_shost(dev); |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2097 | struct cxlflash_cfg *cfg = shost_priv(shost); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2098 | struct afu *afu = cfg->afu; |
| 2099 | int rc; |
| 2100 | u32 lun_mode; |
| 2101 | |
| 2102 | rc = kstrtouint(buf, 10, &lun_mode); |
| 2103 | if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) { |
| 2104 | afu->internal_lun = lun_mode; |
Manoj N. Kumar | 603ecce | 2016-03-04 15:55:19 -0600 | [diff] [blame] | 2105 | |
| 2106 | /* |
| 2107 | * When configured for internal LUN, there is only one channel, |
| 2108 | * channel number 0, else there will be 2 (default). |
| 2109 | */ |
| 2110 | if (afu->internal_lun) |
| 2111 | shost->max_channel = 0; |
| 2112 | else |
| 2113 | shost->max_channel = NUM_FC_PORTS - 1; |
| 2114 | |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2115 | afu_reset(cfg); |
| 2116 | scsi_scan_host(cfg->host); |
| 2117 | } |
| 2118 | |
| 2119 | return count; |
| 2120 | } |
| 2121 | |
| 2122 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2123 | * ioctl_version_show() - presents the current ioctl version of the host |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2124 | * @dev: Generic device associated with the host. |
| 2125 | * @attr: Device attribute representing the ioctl version. |
| 2126 | * @buf: Buffer of length PAGE_SIZE to report back the ioctl version. |
| 2127 | * |
| 2128 | * Return: The size of the ASCII string returned in @buf. |
| 2129 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2130 | static ssize_t ioctl_version_show(struct device *dev, |
| 2131 | struct device_attribute *attr, char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2132 | { |
| 2133 | return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0); |
| 2134 | } |
| 2135 | |
| 2136 | /** |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2137 | * cxlflash_show_port_lun_table() - queries and presents the port LUN table |
| 2138 | * @port: Desired port for status reporting. |
| 2139 | * @afu: AFU owning the specified port. |
| 2140 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2141 | * |
| 2142 | * Return: The size of the ASCII string returned in @buf. |
| 2143 | */ |
| 2144 | static ssize_t cxlflash_show_port_lun_table(u32 port, |
| 2145 | struct afu *afu, |
| 2146 | char *buf) |
| 2147 | { |
| 2148 | int i; |
| 2149 | ssize_t bytes = 0; |
| 2150 | __be64 __iomem *fc_port; |
| 2151 | |
| 2152 | if (port >= NUM_FC_PORTS) |
| 2153 | return 0; |
| 2154 | |
| 2155 | fc_port = &afu->afu_map->global.fc_port[port][0]; |
| 2156 | |
| 2157 | for (i = 0; i < CXLFLASH_NUM_VLUNS; i++) |
| 2158 | bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2159 | "%03d: %016llx\n", i, readq_be(&fc_port[i])); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2160 | return bytes; |
| 2161 | } |
| 2162 | |
| 2163 | /** |
| 2164 | * port0_lun_table_show() - presents the current LUN table of port 0 |
| 2165 | * @dev: Generic device associated with the host owning the port. |
| 2166 | * @attr: Device attribute representing the port. |
| 2167 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2168 | * |
| 2169 | * Return: The size of the ASCII string returned in @buf. |
| 2170 | */ |
| 2171 | static ssize_t port0_lun_table_show(struct device *dev, |
| 2172 | struct device_attribute *attr, |
| 2173 | char *buf) |
| 2174 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2175 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2176 | struct afu *afu = cfg->afu; |
| 2177 | |
| 2178 | return cxlflash_show_port_lun_table(0, afu, buf); |
| 2179 | } |
| 2180 | |
| 2181 | /** |
| 2182 | * port1_lun_table_show() - presents the current LUN table of port 1 |
| 2183 | * @dev: Generic device associated with the host owning the port. |
| 2184 | * @attr: Device attribute representing the port. |
| 2185 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
| 2186 | * |
| 2187 | * Return: The size of the ASCII string returned in @buf. |
| 2188 | */ |
| 2189 | static ssize_t port1_lun_table_show(struct device *dev, |
| 2190 | struct device_attribute *attr, |
| 2191 | char *buf) |
| 2192 | { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2193 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2194 | struct afu *afu = cfg->afu; |
| 2195 | |
| 2196 | return cxlflash_show_port_lun_table(1, afu, buf); |
| 2197 | } |
| 2198 | |
| 2199 | /** |
| 2200 | * mode_show() - presents the current mode of the device |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2201 | * @dev: Generic device associated with the device. |
| 2202 | * @attr: Device attribute representing the device mode. |
| 2203 | * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII. |
| 2204 | * |
| 2205 | * Return: The size of the ASCII string returned in @buf. |
| 2206 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2207 | static ssize_t mode_show(struct device *dev, |
| 2208 | struct device_attribute *attr, char *buf) |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2209 | { |
| 2210 | struct scsi_device *sdev = to_scsi_device(dev); |
| 2211 | |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2212 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
| 2213 | sdev->hostdata ? "superpipe" : "legacy"); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2214 | } |
| 2215 | |
| 2216 | /* |
| 2217 | * Host attributes |
| 2218 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2219 | static DEVICE_ATTR_RO(port0); |
| 2220 | static DEVICE_ATTR_RO(port1); |
| 2221 | static DEVICE_ATTR_RW(lun_mode); |
| 2222 | static DEVICE_ATTR_RO(ioctl_version); |
| 2223 | static DEVICE_ATTR_RO(port0_lun_table); |
| 2224 | static DEVICE_ATTR_RO(port1_lun_table); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2225 | |
| 2226 | static struct device_attribute *cxlflash_host_attrs[] = { |
| 2227 | &dev_attr_port0, |
| 2228 | &dev_attr_port1, |
| 2229 | &dev_attr_lun_mode, |
| 2230 | &dev_attr_ioctl_version, |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2231 | &dev_attr_port0_lun_table, |
| 2232 | &dev_attr_port1_lun_table, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2233 | NULL |
| 2234 | }; |
| 2235 | |
| 2236 | /* |
| 2237 | * Device attributes |
| 2238 | */ |
Matthew R. Ochs | e0f01a2 | 2015-10-21 15:12:39 -0500 | [diff] [blame] | 2239 | static DEVICE_ATTR_RO(mode); |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2240 | |
| 2241 | static struct device_attribute *cxlflash_dev_attrs[] = { |
| 2242 | &dev_attr_mode, |
| 2243 | NULL |
| 2244 | }; |
| 2245 | |
| 2246 | /* |
| 2247 | * Host template |
| 2248 | */ |
| 2249 | static struct scsi_host_template driver_template = { |
| 2250 | .module = THIS_MODULE, |
| 2251 | .name = CXLFLASH_ADAPTER_NAME, |
| 2252 | .info = cxlflash_driver_info, |
| 2253 | .ioctl = cxlflash_ioctl, |
| 2254 | .proc_name = CXLFLASH_NAME, |
| 2255 | .queuecommand = cxlflash_queuecommand, |
| 2256 | .eh_device_reset_handler = cxlflash_eh_device_reset_handler, |
| 2257 | .eh_host_reset_handler = cxlflash_eh_host_reset_handler, |
| 2258 | .change_queue_depth = cxlflash_change_queue_depth, |
Manoj N. Kumar | 8343083 | 2016-03-04 15:55:20 -0600 | [diff] [blame] | 2259 | .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2260 | .can_queue = CXLFLASH_MAX_CMDS, |
Matthew R. Ochs | 5fbb96c | 2016-11-28 18:42:19 -0600 | [diff] [blame] | 2261 | .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2262 | .this_id = -1, |
Uma Krishnan | 68ab2d7 | 2016-11-28 18:41:06 -0600 | [diff] [blame] | 2263 | .sg_tablesize = 1, /* No scatter gather support */ |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2264 | .max_sectors = CXLFLASH_MAX_SECTORS, |
| 2265 | .use_clustering = ENABLE_CLUSTERING, |
| 2266 | .shost_attrs = cxlflash_host_attrs, |
| 2267 | .sdev_attrs = cxlflash_dev_attrs, |
| 2268 | }; |
| 2269 | |
| 2270 | /* |
| 2271 | * Device dependent values |
| 2272 | */ |
Uma Krishnan | 96e1b66 | 2016-06-15 18:49:38 -0500 | [diff] [blame] | 2273 | static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS, |
| 2274 | 0ULL }; |
| 2275 | static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS, |
Uma Krishnan | 704c4b0 | 2016-06-15 18:49:57 -0500 | [diff] [blame] | 2276 | CXLFLASH_NOTIFY_SHUTDOWN }; |
Matthew R. Ochs | 9434452 | 2017-02-16 21:39:32 -0600 | [diff] [blame] | 2277 | static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS, |
| 2278 | CXLFLASH_NOTIFY_SHUTDOWN }; |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2279 | |
| 2280 | /* |
| 2281 | * PCI device binding table |
| 2282 | */ |
| 2283 | static struct pci_device_id cxlflash_pci_table[] = { |
| 2284 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA, |
| 2285 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals}, |
Manoj Kumar | a2746fb | 2015-12-14 15:07:43 -0600 | [diff] [blame] | 2286 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT, |
| 2287 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals}, |
Matthew R. Ochs | 9434452 | 2017-02-16 21:39:32 -0600 | [diff] [blame] | 2288 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD, |
| 2289 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals}, |
Matthew R. Ochs | 1530551 | 2015-10-21 15:12:10 -0500 | [diff] [blame] | 2290 | {} |
| 2291 | }; |
| 2292 | |
| 2293 | MODULE_DEVICE_TABLE(pci, cxlflash_pci_table); |
| 2294 | |
| 2295 | /** |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2296 | * cxlflash_worker_thread() - work thread handler for the AFU |
| 2297 | * @work: Work structure contained within cxlflash associated with host. |
| 2298 | * |
| 2299 | * Handles the following events: |
| 2300 | * - Link reset which cannot be performed on interrupt context due to |
| 2301 | * blocking up to a few seconds |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 2302 | * - Rescan the host |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2303 | */ |
| 2304 | static void cxlflash_worker_thread(struct work_struct *work) |
| 2305 | { |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2306 | struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg, |
| 2307 | work_q); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2308 | struct afu *afu = cfg->afu; |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 2309 | struct device *dev = &cfg->dev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2310 | int port; |
| 2311 | ulong lock_flags; |
| 2312 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2313 | /* Avoid MMIO if the device has failed */ |
| 2314 | |
| 2315 | if (cfg->state != STATE_NORMAL) |
| 2316 | return; |
| 2317 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2318 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
| 2319 | |
| 2320 | if (cfg->lr_state == LINK_RESET_REQUIRED) { |
| 2321 | port = cfg->lr_port; |
| 2322 | if (port < 0) |
Matthew R. Ochs | 4392ba4 | 2015-10-21 15:13:11 -0500 | [diff] [blame] | 2323 | dev_err(dev, "%s: invalid port index %d\n", |
| 2324 | __func__, port); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2325 | else { |
| 2326 | spin_unlock_irqrestore(cfg->host->host_lock, |
| 2327 | lock_flags); |
| 2328 | |
| 2329 | /* The reset can block... */ |
| 2330 | afu_link_reset(afu, port, |
Matthew R. Ochs | f15fbf8 | 2015-10-21 15:15:06 -0500 | [diff] [blame] | 2331 | &afu->afu_map->global.fc_regs[port][0]); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2332 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
| 2333 | } |
| 2334 | |
| 2335 | cfg->lr_state = LINK_RESET_COMPLETE; |
| 2336 | } |
| 2337 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2338 | spin_unlock_irqrestore(cfg->host->host_lock, lock_flags); |
Matthew R. Ochs | ef51074 | 2015-10-21 15:13:37 -0500 | [diff] [blame] | 2339 | |
| 2340 | if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0) |
| 2341 | scsi_scan_host(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2342 | } |
| 2343 | |
| 2344 | /** |
| 2345 | * cxlflash_probe() - PCI entry point to add host |
| 2346 | * @pdev: PCI device associated with the host. |
| 2347 | * @dev_id: PCI device id associated with device. |
| 2348 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 2349 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2350 | */ |
| 2351 | static int cxlflash_probe(struct pci_dev *pdev, |
| 2352 | const struct pci_device_id *dev_id) |
| 2353 | { |
| 2354 | struct Scsi_Host *host; |
| 2355 | struct cxlflash_cfg *cfg = NULL; |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2356 | struct device *dev = &pdev->dev; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2357 | struct dev_dependent_vals *ddv; |
| 2358 | int rc = 0; |
| 2359 | |
| 2360 | dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n", |
| 2361 | __func__, pdev->irq); |
| 2362 | |
| 2363 | ddv = (struct dev_dependent_vals *)dev_id->driver_data; |
| 2364 | driver_template.max_sectors = ddv->max_sectors; |
| 2365 | |
| 2366 | host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg)); |
| 2367 | if (!host) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2368 | dev_err(dev, "%s: scsi_host_alloc failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2369 | rc = -ENOMEM; |
| 2370 | goto out; |
| 2371 | } |
| 2372 | |
| 2373 | host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS; |
| 2374 | host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET; |
| 2375 | host->max_channel = NUM_FC_PORTS - 1; |
| 2376 | host->unique_id = host->host_no; |
| 2377 | host->max_cmd_len = CXLFLASH_MAX_CDB_LEN; |
| 2378 | |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2379 | cfg = shost_priv(host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2380 | cfg->host = host; |
| 2381 | rc = alloc_mem(cfg); |
| 2382 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2383 | dev_err(dev, "%s: alloc_mem failed\n", __func__); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2384 | rc = -ENOMEM; |
Matthew R. Ochs | 8b5b1e8 | 2015-10-21 15:14:09 -0500 | [diff] [blame] | 2385 | scsi_host_put(cfg->host); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2386 | goto out; |
| 2387 | } |
| 2388 | |
| 2389 | cfg->init_state = INIT_STATE_NONE; |
| 2390 | cfg->dev = pdev; |
Matthew R. Ochs | 17ead26 | 2015-10-21 15:15:37 -0500 | [diff] [blame] | 2391 | cfg->cxl_fops = cxlflash_cxl_fops; |
Matthew R. Ochs | 2cb7926 | 2015-08-13 21:47:53 -0500 | [diff] [blame] | 2392 | |
| 2393 | /* |
| 2394 | * The promoted LUNs move to the top of the LUN table. The rest stay |
| 2395 | * on the bottom half. The bottom half grows from the end |
| 2396 | * (index = 255), whereas the top half grows from the beginning |
| 2397 | * (index = 0). |
| 2398 | */ |
| 2399 | cfg->promote_lun_index = 0; |
| 2400 | cfg->last_lun_index[0] = CXLFLASH_NUM_VLUNS/2 - 1; |
| 2401 | cfg->last_lun_index[1] = CXLFLASH_NUM_VLUNS/2 - 1; |
| 2402 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2403 | cfg->dev_id = (struct pci_device_id *)dev_id; |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2404 | |
| 2405 | init_waitqueue_head(&cfg->tmf_waitq); |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 2406 | init_waitqueue_head(&cfg->reset_waitq); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2407 | |
| 2408 | INIT_WORK(&cfg->work_q, cxlflash_worker_thread); |
| 2409 | cfg->lr_state = LINK_RESET_INVALID; |
| 2410 | cfg->lr_port = -1; |
Matthew R. Ochs | 0d73122 | 2015-10-21 15:16:24 -0500 | [diff] [blame] | 2411 | spin_lock_init(&cfg->tmf_slock); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2412 | mutex_init(&cfg->ctx_tbl_list_mutex); |
| 2413 | mutex_init(&cfg->ctx_recovery_mutex); |
Matthew R. Ochs | 0a27ae5 | 2015-10-21 15:11:52 -0500 | [diff] [blame] | 2414 | init_rwsem(&cfg->ioctl_rwsem); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2415 | INIT_LIST_HEAD(&cfg->ctx_err_recovery); |
| 2416 | INIT_LIST_HEAD(&cfg->lluns); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2417 | |
| 2418 | pci_set_drvdata(pdev, cfg); |
| 2419 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2420 | cfg->cxl_afu = cxl_pci_to_afu(pdev); |
| 2421 | |
| 2422 | rc = init_pci(cfg); |
| 2423 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2424 | dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2425 | goto out_remove; |
| 2426 | } |
| 2427 | cfg->init_state = INIT_STATE_PCI; |
| 2428 | |
| 2429 | rc = init_afu(cfg); |
| 2430 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2431 | dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2432 | goto out_remove; |
| 2433 | } |
| 2434 | cfg->init_state = INIT_STATE_AFU; |
| 2435 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2436 | rc = init_scsi(cfg); |
| 2437 | if (rc) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2438 | dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2439 | goto out_remove; |
| 2440 | } |
| 2441 | cfg->init_state = INIT_STATE_SCSI; |
| 2442 | |
| 2443 | out: |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2444 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2445 | return rc; |
| 2446 | |
| 2447 | out_remove: |
| 2448 | cxlflash_remove(pdev); |
| 2449 | goto out; |
| 2450 | } |
| 2451 | |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2452 | /** |
| 2453 | * cxlflash_pci_error_detected() - called when a PCI error is detected |
| 2454 | * @pdev: PCI device struct. |
| 2455 | * @state: PCI channel state. |
| 2456 | * |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 2457 | * When an EEH occurs during an active reset, wait until the reset is |
| 2458 | * complete and then take action based upon the device state. |
| 2459 | * |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2460 | * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT |
| 2461 | */ |
| 2462 | static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev, |
| 2463 | pci_channel_state_t state) |
| 2464 | { |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2465 | int rc = 0; |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2466 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 2467 | struct device *dev = &cfg->dev->dev; |
| 2468 | |
| 2469 | dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state); |
| 2470 | |
| 2471 | switch (state) { |
| 2472 | case pci_channel_io_frozen: |
Matthew R. Ochs | 1d3324c | 2016-09-02 15:39:30 -0500 | [diff] [blame] | 2473 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); |
| 2474 | if (cfg->state == STATE_FAILTERM) |
| 2475 | return PCI_ERS_RESULT_DISCONNECT; |
| 2476 | |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 2477 | cfg->state = STATE_RESET; |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2478 | scsi_block_requests(cfg->host); |
Matthew R. Ochs | 0a27ae5 | 2015-10-21 15:11:52 -0500 | [diff] [blame] | 2479 | drain_ioctls(cfg); |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2480 | rc = cxlflash_mark_contexts_error(cfg); |
| 2481 | if (unlikely(rc)) |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2482 | dev_err(dev, "%s: Failed to mark user contexts rc=%d\n", |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2483 | __func__, rc); |
Manoj N. Kumar | 9526f36 | 2016-03-25 14:26:34 -0500 | [diff] [blame] | 2484 | term_afu(cfg); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2485 | return PCI_ERS_RESULT_NEED_RESET; |
| 2486 | case pci_channel_io_perm_failure: |
| 2487 | cfg->state = STATE_FAILTERM; |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 2488 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2489 | scsi_unblock_requests(cfg->host); |
| 2490 | return PCI_ERS_RESULT_DISCONNECT; |
| 2491 | default: |
| 2492 | break; |
| 2493 | } |
| 2494 | return PCI_ERS_RESULT_NEED_RESET; |
| 2495 | } |
| 2496 | |
| 2497 | /** |
| 2498 | * cxlflash_pci_slot_reset() - called when PCI slot has been reset |
| 2499 | * @pdev: PCI device struct. |
| 2500 | * |
| 2501 | * This routine is called by the pci error recovery code after the PCI |
| 2502 | * slot has been reset, just before we should resume normal operations. |
| 2503 | * |
| 2504 | * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT |
| 2505 | */ |
| 2506 | static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev) |
| 2507 | { |
| 2508 | int rc = 0; |
| 2509 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 2510 | struct device *dev = &cfg->dev->dev; |
| 2511 | |
| 2512 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); |
| 2513 | |
| 2514 | rc = init_afu(cfg); |
| 2515 | if (unlikely(rc)) { |
Matthew R. Ochs | fb67d44 | 2017-01-11 19:19:47 -0600 | [diff] [blame] | 2516 | dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2517 | return PCI_ERS_RESULT_DISCONNECT; |
| 2518 | } |
| 2519 | |
| 2520 | return PCI_ERS_RESULT_RECOVERED; |
| 2521 | } |
| 2522 | |
| 2523 | /** |
| 2524 | * cxlflash_pci_resume() - called when normal operation can resume |
| 2525 | * @pdev: PCI device struct |
| 2526 | */ |
| 2527 | static void cxlflash_pci_resume(struct pci_dev *pdev) |
| 2528 | { |
| 2529 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
| 2530 | struct device *dev = &cfg->dev->dev; |
| 2531 | |
| 2532 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); |
| 2533 | |
| 2534 | cfg->state = STATE_NORMAL; |
Matthew R. Ochs | 439e85c | 2015-10-21 15:12:00 -0500 | [diff] [blame] | 2535 | wake_up_all(&cfg->reset_waitq); |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2536 | scsi_unblock_requests(cfg->host); |
| 2537 | } |
| 2538 | |
| 2539 | static const struct pci_error_handlers cxlflash_err_handler = { |
| 2540 | .error_detected = cxlflash_pci_error_detected, |
| 2541 | .slot_reset = cxlflash_pci_slot_reset, |
| 2542 | .resume = cxlflash_pci_resume, |
| 2543 | }; |
| 2544 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2545 | /* |
| 2546 | * PCI device structure |
| 2547 | */ |
| 2548 | static struct pci_driver cxlflash_driver = { |
| 2549 | .name = CXLFLASH_NAME, |
| 2550 | .id_table = cxlflash_pci_table, |
| 2551 | .probe = cxlflash_probe, |
| 2552 | .remove = cxlflash_remove, |
Uma Krishnan | babf985 | 2016-09-02 15:39:16 -0500 | [diff] [blame] | 2553 | .shutdown = cxlflash_remove, |
Matthew R. Ochs | 5cdac81 | 2015-08-13 21:47:34 -0500 | [diff] [blame] | 2554 | .err_handler = &cxlflash_err_handler, |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2555 | }; |
| 2556 | |
| 2557 | /** |
| 2558 | * init_cxlflash() - module entry point |
| 2559 | * |
Matthew R. Ochs | 1284fb0 | 2015-10-21 15:14:40 -0500 | [diff] [blame] | 2560 | * Return: 0 on success, -errno on failure |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2561 | */ |
| 2562 | static int __init init_cxlflash(void) |
| 2563 | { |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2564 | cxlflash_list_init(); |
| 2565 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2566 | return pci_register_driver(&cxlflash_driver); |
| 2567 | } |
| 2568 | |
| 2569 | /** |
| 2570 | * exit_cxlflash() - module exit point |
| 2571 | */ |
| 2572 | static void __exit exit_cxlflash(void) |
| 2573 | { |
Matthew R. Ochs | 65be2c7 | 2015-08-13 21:47:43 -0500 | [diff] [blame] | 2574 | cxlflash_term_global_luns(); |
| 2575 | cxlflash_free_errpage(); |
| 2576 | |
Matthew R. Ochs | c21e0bb | 2015-06-09 17:15:52 -0500 | [diff] [blame] | 2577 | pci_unregister_driver(&cxlflash_driver); |
| 2578 | } |
| 2579 | |
| 2580 | module_init(init_cxlflash); |
| 2581 | module_exit(exit_cxlflash); |