Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-5.4 / 76f14d0a70a664d15243b065d1926a54677b3449 / . / arch / arm / boot / dts / sun4i-a10.dtsi
blob: 68a27fc4491fbe6b909681493b21809bcce71fba [file] [log] [blame]
Stefan Roese7423d2d2012-11-26 15:46:12 +0100[diff] [blame]1/*
2 * Copyright 2012 Stefan Roese
3 * Stefan Roese <sr@denx.de>
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/include/ "sunxi.dtsi"
14
15/ {
16 memory {
17 reg = <0x40000000 0x80000000>;
18 };
Maxime Ripard874b4e42013-01-26 15:36:54 +0100[diff] [blame]19
20 soc {
Maxime Riparde10911e2013-01-27 19:26:05 +0100[diff] [blame]21 pio: pinctrl@01c20800 {
Maxime Ripard874b4e42013-01-26 15:36:54 +0100[diff] [blame]22 compatible = "allwinner,sun4i-a10-pinctrl";
23 reg = <0x01c20800 0x400>;
Maxime Riparde10911e2013-01-27 19:26:05 +0100[diff] [blame]24 gpio-controller;
Maxime Ripard874b4e42013-01-26 15:36:54 +0100[diff] [blame]25 #address-cells = <1>;
26 #size-cells = <0>;
Maxime Riparde10911e2013-01-27 19:26:05 +0100[diff] [blame]27 #gpio-cells = <3>;
Maxime Ripard581981b2013-01-26 15:36:55 +0100[diff] [blame]28
29 uart0_pins_a: uart0@0 {
30 allwinner,pins = "PB22", "PB23";
31 allwinner,function = "uart0";
32 allwinner,drive = <0>;
33 allwinner,pull = <0>;
34 };
35
36 uart0_pins_b: uart0@1 {
37 allwinner,pins = "PF2", "PF4";
38 allwinner,function = "uart0";
39 allwinner,drive = <0>;
40 allwinner,pull = <0>;
41 };
42
43 uart1_pins_a: uart1@0 {
44 allwinner,pins = "PA10", "PA11";
45 allwinner,function = "uart1";
46 allwinner,drive = <0>;
47 allwinner,pull = <0>;
48 };
Maxime Ripard874b4e42013-01-26 15:36:54 +0100[diff] [blame]49 };
Maxime Ripard89b3c992013-02-20 17:25:03 -0800[diff] [blame]50
51 uart0: serial@01c28000 {
52 compatible = "snps,dw-apb-uart";
53 reg = <0x01c28000 0x400>;
54 interrupts = <1>;
55 reg-shift = <2>;
56 reg-io-width = <4>;
57 clocks = <&osc>;
58 status = "disabled";
59 };
Maxime Ripard76f14d0a2013-02-20 17:38:27 -0800[diff] [blame^]60
61 uart2: serial@01c28800 {
62 compatible = "snps,dw-apb-uart";
63 reg = <0x01c28800 0x400>;
64 interrupts = <3>;
65 reg-shift = <2>;
66 reg-io-width = <4>;
67 clocks = <&osc>;
68 status = "disabled";
69 };
70
71 uart4: serial@01c29000 {
72 compatible = "snps,dw-apb-uart";
73 reg = <0x01c29000 0x400>;
74 interrupts = <17>;
75 reg-shift = <2>;
76 reg-io-width = <4>;
77 clocks = <&osc>;
78 status = "disabled";
79 };
80
81 uart5: serial@01c29400 {
82 compatible = "snps,dw-apb-uart";
83 reg = <0x01c29400 0x400>;
84 interrupts = <18>;
85 reg-shift = <2>;
86 reg-io-width = <4>;
87 clocks = <&osc>;
88 status = "disabled";
89 };
90
91 uart6: serial@01c29800 {
92 compatible = "snps,dw-apb-uart";
93 reg = <0x01c29800 0x400>;
94 interrupts = <19>;
95 reg-shift = <2>;
96 reg-io-width = <4>;
97 clocks = <&osc>;
98 status = "disabled";
99 };
100
101 uart7: serial@01c29c00 {
102 compatible = "snps,dw-apb-uart";
103 reg = <0x01c29c00 0x400>;
104 interrupts = <20>;
105 reg-shift = <2>;
106 reg-io-width = <4>;
107 clocks = <&osc>;
108 status = "disabled";
109 };
Maxime Ripard874b4e42013-01-26 15:36:54 +0100[diff] [blame]110 };
Stefan Roese7423d2d2012-11-26 15:46:12 +0100[diff] [blame]111};