blob: 70e4f5f0c1225f82d9495aa670037e1e88cfdbe3 [file] [log] [blame]
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +00001/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "drmP.h"
29#include "vmwgfx_drv.h"
30#include "ttm/ttm_placement.h"
31#include "ttm/ttm_bo_driver.h"
32#include "ttm/ttm_object.h"
33#include "ttm/ttm_module.h"
34
35#define VMWGFX_DRIVER_NAME "vmwgfx"
36#define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
37#define VMWGFX_CHIP_SVGAII 0
38#define VMW_FB_RESERVATION 0
39
40/**
41 * Fully encoded drm commands. Might move to vmw_drm.h
42 */
43
44#define DRM_IOCTL_VMW_GET_PARAM \
45 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM, \
46 struct drm_vmw_getparam_arg)
47#define DRM_IOCTL_VMW_ALLOC_DMABUF \
48 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF, \
49 union drm_vmw_alloc_dmabuf_arg)
50#define DRM_IOCTL_VMW_UNREF_DMABUF \
51 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF, \
52 struct drm_vmw_unref_dmabuf_arg)
53#define DRM_IOCTL_VMW_CURSOR_BYPASS \
54 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS, \
55 struct drm_vmw_cursor_bypass_arg)
56
57#define DRM_IOCTL_VMW_CONTROL_STREAM \
58 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM, \
59 struct drm_vmw_control_stream_arg)
60#define DRM_IOCTL_VMW_CLAIM_STREAM \
61 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM, \
62 struct drm_vmw_stream_arg)
63#define DRM_IOCTL_VMW_UNREF_STREAM \
64 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM, \
65 struct drm_vmw_stream_arg)
66
67#define DRM_IOCTL_VMW_CREATE_CONTEXT \
68 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT, \
69 struct drm_vmw_context_arg)
70#define DRM_IOCTL_VMW_UNREF_CONTEXT \
71 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT, \
72 struct drm_vmw_context_arg)
73#define DRM_IOCTL_VMW_CREATE_SURFACE \
74 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE, \
75 union drm_vmw_surface_create_arg)
76#define DRM_IOCTL_VMW_UNREF_SURFACE \
77 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE, \
78 struct drm_vmw_surface_arg)
79#define DRM_IOCTL_VMW_REF_SURFACE \
80 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE, \
81 union drm_vmw_surface_reference_arg)
82#define DRM_IOCTL_VMW_EXECBUF \
83 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF, \
84 struct drm_vmw_execbuf_arg)
85#define DRM_IOCTL_VMW_FIFO_DEBUG \
86 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG, \
87 struct drm_vmw_fifo_debug_arg)
88#define DRM_IOCTL_VMW_FENCE_WAIT \
89 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT, \
90 struct drm_vmw_fence_wait_arg)
91
92
93/**
94 * The core DRM version of this macro doesn't account for
95 * DRM_COMMAND_BASE.
96 */
97
98#define VMW_IOCTL_DEF(ioctl, func, flags) \
99 [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
100
101/**
102 * Ioctl definitions.
103 */
104
105static struct drm_ioctl_desc vmw_ioctls[] = {
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100106 VMW_IOCTL_DEF(DRM_IOCTL_VMW_GET_PARAM, vmw_getparam_ioctl,
107 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000108 VMW_IOCTL_DEF(DRM_IOCTL_VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100109 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000110 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100111 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000112 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CURSOR_BYPASS,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100113 vmw_kms_cursor_bypass_ioctl,
114 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000115
116 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CONTROL_STREAM, vmw_overlay_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100117 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000118 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100119 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000120 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100121 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000122
123 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100124 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000125 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100126 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000127 VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100128 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000129 VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100130 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000131 VMW_IOCTL_DEF(DRM_IOCTL_VMW_REF_SURFACE, vmw_surface_reference_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100132 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000133 VMW_IOCTL_DEF(DRM_IOCTL_VMW_EXECBUF, vmw_execbuf_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100134 DRM_AUTH | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000135 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100136 DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000137 VMW_IOCTL_DEF(DRM_IOCTL_VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100138 DRM_AUTH | DRM_UNLOCKED)
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000139};
140
141static struct pci_device_id vmw_pci_id_list[] = {
142 {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
143 {0, 0, 0}
144};
145
146static char *vmw_devname = "vmwgfx";
147
148static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
149static void vmw_master_init(struct vmw_master *);
150
151static void vmw_print_capabilities(uint32_t capabilities)
152{
153 DRM_INFO("Capabilities:\n");
154 if (capabilities & SVGA_CAP_RECT_COPY)
155 DRM_INFO(" Rect copy.\n");
156 if (capabilities & SVGA_CAP_CURSOR)
157 DRM_INFO(" Cursor.\n");
158 if (capabilities & SVGA_CAP_CURSOR_BYPASS)
159 DRM_INFO(" Cursor bypass.\n");
160 if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
161 DRM_INFO(" Cursor bypass 2.\n");
162 if (capabilities & SVGA_CAP_8BIT_EMULATION)
163 DRM_INFO(" 8bit emulation.\n");
164 if (capabilities & SVGA_CAP_ALPHA_CURSOR)
165 DRM_INFO(" Alpha cursor.\n");
166 if (capabilities & SVGA_CAP_3D)
167 DRM_INFO(" 3D.\n");
168 if (capabilities & SVGA_CAP_EXTENDED_FIFO)
169 DRM_INFO(" Extended Fifo.\n");
170 if (capabilities & SVGA_CAP_MULTIMON)
171 DRM_INFO(" Multimon.\n");
172 if (capabilities & SVGA_CAP_PITCHLOCK)
173 DRM_INFO(" Pitchlock.\n");
174 if (capabilities & SVGA_CAP_IRQMASK)
175 DRM_INFO(" Irq mask.\n");
176 if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
177 DRM_INFO(" Display Topology.\n");
178 if (capabilities & SVGA_CAP_GMR)
179 DRM_INFO(" GMR.\n");
180 if (capabilities & SVGA_CAP_TRACES)
181 DRM_INFO(" Traces.\n");
182}
183
184static int vmw_request_device(struct vmw_private *dev_priv)
185{
186 int ret;
187
188 vmw_kms_save_vga(dev_priv);
189
190 ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
191 if (unlikely(ret != 0)) {
192 DRM_ERROR("Unable to initialize FIFO.\n");
193 return ret;
194 }
195
196 return 0;
197}
198
199static void vmw_release_device(struct vmw_private *dev_priv)
200{
201 vmw_fifo_release(dev_priv, &dev_priv->fifo);
202 vmw_kms_restore_vga(dev_priv);
203}
204
205
206static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
207{
208 struct vmw_private *dev_priv;
209 int ret;
210
211 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
212 if (unlikely(dev_priv == NULL)) {
213 DRM_ERROR("Failed allocating a device private struct.\n");
214 return -ENOMEM;
215 }
216 memset(dev_priv, 0, sizeof(*dev_priv));
217
218 dev_priv->dev = dev;
219 dev_priv->vmw_chipset = chipset;
Thomas Hellstrom7704bef2010-01-13 22:28:38 +0100220 dev_priv->last_read_sequence = (uint32_t) -100;
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000221 mutex_init(&dev_priv->hw_mutex);
222 mutex_init(&dev_priv->cmdbuf_mutex);
223 rwlock_init(&dev_priv->resource_lock);
224 idr_init(&dev_priv->context_idr);
225 idr_init(&dev_priv->surface_idr);
226 idr_init(&dev_priv->stream_idr);
227 ida_init(&dev_priv->gmr_ida);
228 mutex_init(&dev_priv->init_mutex);
229 init_waitqueue_head(&dev_priv->fence_queue);
230 init_waitqueue_head(&dev_priv->fifo_queue);
231 atomic_set(&dev_priv->fence_queue_waiters, 0);
232 atomic_set(&dev_priv->fifo_queue_waiters, 0);
233 INIT_LIST_HEAD(&dev_priv->gmr_lru);
234
235 dev_priv->io_start = pci_resource_start(dev->pdev, 0);
236 dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
237 dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
238
239 mutex_lock(&dev_priv->hw_mutex);
240 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
241
242 if (dev_priv->capabilities & SVGA_CAP_GMR) {
243 dev_priv->max_gmr_descriptors =
244 vmw_read(dev_priv,
245 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
246 dev_priv->max_gmr_ids =
247 vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
248 }
249
250 dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
251 dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
252 dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
253 dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
254
255 mutex_unlock(&dev_priv->hw_mutex);
256
257 vmw_print_capabilities(dev_priv->capabilities);
258
259 if (dev_priv->capabilities & SVGA_CAP_GMR) {
260 DRM_INFO("Max GMR ids is %u\n",
261 (unsigned)dev_priv->max_gmr_ids);
262 DRM_INFO("Max GMR descriptors is %u\n",
263 (unsigned)dev_priv->max_gmr_descriptors);
264 }
265 DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
266 dev_priv->vram_start, dev_priv->vram_size / 1024);
267 DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
268 dev_priv->mmio_start, dev_priv->mmio_size / 1024);
269
270 ret = vmw_ttm_global_init(dev_priv);
271 if (unlikely(ret != 0))
272 goto out_err0;
273
274
275 vmw_master_init(&dev_priv->fbdev_master);
276 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
277 dev_priv->active_master = &dev_priv->fbdev_master;
278
279
280 ret = ttm_bo_device_init(&dev_priv->bdev,
281 dev_priv->bo_global_ref.ref.object,
282 &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
283 false);
284 if (unlikely(ret != 0)) {
285 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
286 goto out_err1;
287 }
288
289 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
290 (dev_priv->vram_size >> PAGE_SHIFT));
291 if (unlikely(ret != 0)) {
292 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
293 goto out_err2;
294 }
295
296 dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
297 dev_priv->mmio_size, DRM_MTRR_WC);
298
299 dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
300 dev_priv->mmio_size);
301
302 if (unlikely(dev_priv->mmio_virt == NULL)) {
303 ret = -ENOMEM;
304 DRM_ERROR("Failed mapping MMIO.\n");
305 goto out_err3;
306 }
307
308 dev_priv->tdev = ttm_object_device_init
309 (dev_priv->mem_global_ref.object, 12);
310
311 if (unlikely(dev_priv->tdev == NULL)) {
312 DRM_ERROR("Unable to initialize TTM object management.\n");
313 ret = -ENOMEM;
314 goto out_err4;
315 }
316
317 dev->dev_private = dev_priv;
318
319 if (!dev->devname)
320 dev->devname = vmw_devname;
321
322 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
323 ret = drm_irq_install(dev);
324 if (unlikely(ret != 0)) {
325 DRM_ERROR("Failed installing irq: %d\n", ret);
326 goto out_no_irq;
327 }
328 }
329
330 ret = pci_request_regions(dev->pdev, "vmwgfx probe");
331 dev_priv->stealth = (ret != 0);
332 if (dev_priv->stealth) {
333 /**
334 * Request at least the mmio PCI resource.
335 */
336
337 DRM_INFO("It appears like vesafb is loaded. "
338 "Ignore above error if any. Entering stealth mode.\n");
339 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
340 if (unlikely(ret != 0)) {
341 DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
342 goto out_no_device;
343 }
344 vmw_kms_init(dev_priv);
345 vmw_overlay_init(dev_priv);
346 } else {
347 ret = vmw_request_device(dev_priv);
348 if (unlikely(ret != 0))
349 goto out_no_device;
350 vmw_kms_init(dev_priv);
351 vmw_overlay_init(dev_priv);
352 vmw_fb_init(dev_priv);
353 }
354
355 return 0;
356
357out_no_device:
358 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
359 drm_irq_uninstall(dev_priv->dev);
360 if (dev->devname == vmw_devname)
361 dev->devname = NULL;
362out_no_irq:
363 ttm_object_device_release(&dev_priv->tdev);
364out_err4:
365 iounmap(dev_priv->mmio_virt);
366out_err3:
367 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
368 dev_priv->mmio_size, DRM_MTRR_WC);
369 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
370out_err2:
371 (void)ttm_bo_device_release(&dev_priv->bdev);
372out_err1:
373 vmw_ttm_global_release(dev_priv);
374out_err0:
375 ida_destroy(&dev_priv->gmr_ida);
376 idr_destroy(&dev_priv->surface_idr);
377 idr_destroy(&dev_priv->context_idr);
378 idr_destroy(&dev_priv->stream_idr);
379 kfree(dev_priv);
380 return ret;
381}
382
383static int vmw_driver_unload(struct drm_device *dev)
384{
385 struct vmw_private *dev_priv = vmw_priv(dev);
386
387 DRM_INFO(VMWGFX_DRIVER_NAME " unload.\n");
388
389 if (!dev_priv->stealth) {
390 vmw_fb_close(dev_priv);
391 vmw_kms_close(dev_priv);
392 vmw_overlay_close(dev_priv);
393 vmw_release_device(dev_priv);
394 pci_release_regions(dev->pdev);
395 } else {
396 vmw_kms_close(dev_priv);
397 vmw_overlay_close(dev_priv);
398 pci_release_region(dev->pdev, 2);
399 }
400 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
401 drm_irq_uninstall(dev_priv->dev);
402 if (dev->devname == vmw_devname)
403 dev->devname = NULL;
404 ttm_object_device_release(&dev_priv->tdev);
405 iounmap(dev_priv->mmio_virt);
406 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
407 dev_priv->mmio_size, DRM_MTRR_WC);
408 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
409 (void)ttm_bo_device_release(&dev_priv->bdev);
410 vmw_ttm_global_release(dev_priv);
411 ida_destroy(&dev_priv->gmr_ida);
412 idr_destroy(&dev_priv->surface_idr);
413 idr_destroy(&dev_priv->context_idr);
414 idr_destroy(&dev_priv->stream_idr);
415
416 kfree(dev_priv);
417
418 return 0;
419}
420
421static void vmw_postclose(struct drm_device *dev,
422 struct drm_file *file_priv)
423{
424 struct vmw_fpriv *vmw_fp;
425
426 vmw_fp = vmw_fpriv(file_priv);
427 ttm_object_file_release(&vmw_fp->tfile);
428 if (vmw_fp->locked_master)
429 drm_master_put(&vmw_fp->locked_master);
430 kfree(vmw_fp);
431}
432
433static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
434{
435 struct vmw_private *dev_priv = vmw_priv(dev);
436 struct vmw_fpriv *vmw_fp;
437 int ret = -ENOMEM;
438
439 vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
440 if (unlikely(vmw_fp == NULL))
441 return ret;
442
443 vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
444 if (unlikely(vmw_fp->tfile == NULL))
445 goto out_no_tfile;
446
447 file_priv->driver_priv = vmw_fp;
448
449 if (unlikely(dev_priv->bdev.dev_mapping == NULL))
450 dev_priv->bdev.dev_mapping =
451 file_priv->filp->f_path.dentry->d_inode->i_mapping;
452
453 return 0;
454
455out_no_tfile:
456 kfree(vmw_fp);
457 return ret;
458}
459
460static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
461 unsigned long arg)
462{
463 struct drm_file *file_priv = filp->private_data;
464 struct drm_device *dev = file_priv->minor->dev;
465 unsigned int nr = DRM_IOCTL_NR(cmd);
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000466
467 /*
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100468 * Do extra checking on driver private ioctls.
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000469 */
470
471 if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
472 && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
473 struct drm_ioctl_desc *ioctl =
474 &vmw_ioctls[nr - DRM_COMMAND_BASE];
475
476 if (unlikely(ioctl->cmd != cmd)) {
477 DRM_ERROR("Invalid command format, ioctl %d\n",
478 nr - DRM_COMMAND_BASE);
479 return -EINVAL;
480 }
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000481 }
482
Thomas Hellstrome1f78002009-12-08 12:57:51 +0100483 return drm_ioctl(filp, cmd, arg);
Jakob Bornecrantzfb1d9732009-12-10 00:19:58 +0000484}
485
486static int vmw_firstopen(struct drm_device *dev)
487{
488 struct vmw_private *dev_priv = vmw_priv(dev);
489 dev_priv->is_opened = true;
490
491 return 0;
492}
493
494static void vmw_lastclose(struct drm_device *dev)
495{
496 struct vmw_private *dev_priv = vmw_priv(dev);
497 struct drm_crtc *crtc;
498 struct drm_mode_set set;
499 int ret;
500
501 /**
502 * Do nothing on the lastclose call from drm_unload.
503 */
504
505 if (!dev_priv->is_opened)
506 return;
507
508 dev_priv->is_opened = false;
509 set.x = 0;
510 set.y = 0;
511 set.fb = NULL;
512 set.mode = NULL;
513 set.connectors = NULL;
514 set.num_connectors = 0;
515
516 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
517 set.crtc = crtc;
518 ret = crtc->funcs->set_config(&set);
519 WARN_ON(ret != 0);
520 }
521
522}
523
524static void vmw_master_init(struct vmw_master *vmaster)
525{
526 ttm_lock_init(&vmaster->lock);
527}
528
529static int vmw_master_create(struct drm_device *dev,
530 struct drm_master *master)
531{
532 struct vmw_master *vmaster;
533
534 DRM_INFO("Master create.\n");
535 vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
536 if (unlikely(vmaster == NULL))
537 return -ENOMEM;
538
539 ttm_lock_init(&vmaster->lock);
540 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
541 master->driver_priv = vmaster;
542
543 return 0;
544}
545
546static void vmw_master_destroy(struct drm_device *dev,
547 struct drm_master *master)
548{
549 struct vmw_master *vmaster = vmw_master(master);
550
551 DRM_INFO("Master destroy.\n");
552 master->driver_priv = NULL;
553 kfree(vmaster);
554}
555
556
557static int vmw_master_set(struct drm_device *dev,
558 struct drm_file *file_priv,
559 bool from_open)
560{
561 struct vmw_private *dev_priv = vmw_priv(dev);
562 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
563 struct vmw_master *active = dev_priv->active_master;
564 struct vmw_master *vmaster = vmw_master(file_priv->master);
565 int ret = 0;
566
567 DRM_INFO("Master set.\n");
568 if (dev_priv->stealth) {
569 ret = vmw_request_device(dev_priv);
570 if (unlikely(ret != 0))
571 return ret;
572 }
573
574 if (active) {
575 BUG_ON(active != &dev_priv->fbdev_master);
576 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
577 if (unlikely(ret != 0))
578 goto out_no_active_lock;
579
580 ttm_lock_set_kill(&active->lock, true, SIGTERM);
581 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
582 if (unlikely(ret != 0)) {
583 DRM_ERROR("Unable to clean VRAM on "
584 "master drop.\n");
585 }
586
587 dev_priv->active_master = NULL;
588 }
589
590 ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
591 if (!from_open) {
592 ttm_vt_unlock(&vmaster->lock);
593 BUG_ON(vmw_fp->locked_master != file_priv->master);
594 drm_master_put(&vmw_fp->locked_master);
595 }
596
597 dev_priv->active_master = vmaster;
598
599 return 0;
600
601out_no_active_lock:
602 vmw_release_device(dev_priv);
603 return ret;
604}
605
606static void vmw_master_drop(struct drm_device *dev,
607 struct drm_file *file_priv,
608 bool from_release)
609{
610 struct vmw_private *dev_priv = vmw_priv(dev);
611 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
612 struct vmw_master *vmaster = vmw_master(file_priv->master);
613 int ret;
614
615 DRM_INFO("Master drop.\n");
616
617 /**
618 * Make sure the master doesn't disappear while we have
619 * it locked.
620 */
621
622 vmw_fp->locked_master = drm_master_get(file_priv->master);
623 ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
624
625 if (unlikely((ret != 0))) {
626 DRM_ERROR("Unable to lock TTM at VT switch.\n");
627 drm_master_put(&vmw_fp->locked_master);
628 }
629
630 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
631
632 if (dev_priv->stealth) {
633 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
634 if (unlikely(ret != 0))
635 DRM_ERROR("Unable to clean VRAM on master drop.\n");
636 vmw_release_device(dev_priv);
637 }
638 dev_priv->active_master = &dev_priv->fbdev_master;
639 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
640 ttm_vt_unlock(&dev_priv->fbdev_master.lock);
641
642 if (!dev_priv->stealth)
643 vmw_fb_on(dev_priv);
644}
645
646
647static void vmw_remove(struct pci_dev *pdev)
648{
649 struct drm_device *dev = pci_get_drvdata(pdev);
650
651 drm_put_dev(dev);
652}
653
654static struct drm_driver driver = {
655 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
656 DRIVER_MODESET,
657 .load = vmw_driver_load,
658 .unload = vmw_driver_unload,
659 .firstopen = vmw_firstopen,
660 .lastclose = vmw_lastclose,
661 .irq_preinstall = vmw_irq_preinstall,
662 .irq_postinstall = vmw_irq_postinstall,
663 .irq_uninstall = vmw_irq_uninstall,
664 .irq_handler = vmw_irq_handler,
665 .reclaim_buffers_locked = NULL,
666 .get_map_ofs = drm_core_get_map_ofs,
667 .get_reg_ofs = drm_core_get_reg_ofs,
668 .ioctls = vmw_ioctls,
669 .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
670 .dma_quiescent = NULL, /*vmw_dma_quiescent, */
671 .master_create = vmw_master_create,
672 .master_destroy = vmw_master_destroy,
673 .master_set = vmw_master_set,
674 .master_drop = vmw_master_drop,
675 .open = vmw_driver_open,
676 .postclose = vmw_postclose,
677 .fops = {
678 .owner = THIS_MODULE,
679 .open = drm_open,
680 .release = drm_release,
681 .unlocked_ioctl = vmw_unlocked_ioctl,
682 .mmap = vmw_mmap,
683 .poll = drm_poll,
684 .fasync = drm_fasync,
685#if defined(CONFIG_COMPAT)
686 .compat_ioctl = drm_compat_ioctl,
687#endif
688 },
689 .pci_driver = {
690 .name = VMWGFX_DRIVER_NAME,
691 .id_table = vmw_pci_id_list,
692 .probe = vmw_probe,
693 .remove = vmw_remove
694 },
695 .name = VMWGFX_DRIVER_NAME,
696 .desc = VMWGFX_DRIVER_DESC,
697 .date = VMWGFX_DRIVER_DATE,
698 .major = VMWGFX_DRIVER_MAJOR,
699 .minor = VMWGFX_DRIVER_MINOR,
700 .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
701};
702
703static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
704{
705 return drm_get_dev(pdev, ent, &driver);
706}
707
708static int __init vmwgfx_init(void)
709{
710 int ret;
711 ret = drm_init(&driver);
712 if (ret)
713 DRM_ERROR("Failed initializing DRM.\n");
714 return ret;
715}
716
717static void __exit vmwgfx_exit(void)
718{
719 drm_exit(&driver);
720}
721
722module_init(vmwgfx_init);
723module_exit(vmwgfx_exit);
724
725MODULE_AUTHOR("VMware Inc. and others");
726MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
727MODULE_LICENSE("GPL and additional rights");