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Michael Hennerichb5a49482010-11-22 11:15:23 +01001/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
Michael Hennerichd8462632010-11-23 11:14:16 +01008#ifndef IIO_DAC_AD5446_H_
9#define IIO_DAC_AD5446_H_
Michael Hennerichb5a49482010-11-22 11:15:23 +010010
11/* DAC Control Bits */
12
13#define AD5446_LOAD (0x0 << 14) /* Load and update */
14#define AD5446_SDO_DIS (0x1 << 14) /* Disable SDO */
15#define AD5446_NOP (0x2 << 14) /* No operation */
16#define AD5446_CLK_RISING (0x3 << 14) /* Clock data on rising edge */
17
Michael Hennerichd8462632010-11-23 11:14:16 +010018#define AD5620_LOAD (0x0 << 14) /* Load and update Norm Operation*/
19#define AD5620_PWRDWN_1k (0x1 << 14) /* Power-down: 1kOhm to GND */
20#define AD5620_PWRDWN_100k (0x2 << 14) /* Power-down: 100kOhm to GND */
21#define AD5620_PWRDWN_TRISTATE (0x3 << 14) /* Power-down: Three-state */
22
23#define AD5660_LOAD (0x0 << 16) /* Load and update Norm Operation*/
24#define AD5660_PWRDWN_1k (0x1 << 16) /* Power-down: 1kOhm to GND */
25#define AD5660_PWRDWN_100k (0x2 << 16) /* Power-down: 100kOhm to GND */
26#define AD5660_PWRDWN_TRISTATE (0x3 << 16) /* Power-down: Three-state */
27
Michael Hennerichbbed4dc2011-03-10 13:26:47 +010028#define MODE_PWRDWN_1k 0x1
29#define MODE_PWRDWN_100k 0x2
30#define MODE_PWRDWN_TRISTATE 0x3
31
Michael Hennerichd8462632010-11-23 11:14:16 +010032/**
33 * struct ad5446_state - driver instance specific data
Michael Hennerichd8462632010-11-23 11:14:16 +010034 * @spi: spi_device
35 * @chip_info: chip model specific constants, available modes etc
36 * @reg: supply regulator
Michael Hennerichd8462632010-11-23 11:14:16 +010037 * @vref_mv: actual reference voltage used
Michael Hennerichd8462632010-11-23 11:14:16 +010038 */
Michael Hennerichb5a49482010-11-22 11:15:23 +010039
40struct ad5446_state {
Michael Hennerichb5a49482010-11-22 11:15:23 +010041 struct spi_device *spi;
42 const struct ad5446_chip_info *chip_info;
43 struct regulator *reg;
Michael Hennerichb5a49482010-11-22 11:15:23 +010044 unsigned short vref_mv;
Michael Hennerichbbed4dc2011-03-10 13:26:47 +010045 unsigned cached_val;
46 unsigned pwr_down_mode;
47 unsigned pwr_down;
Michael Hennerichb5a49482010-11-22 11:15:23 +010048};
49
Michael Hennerichd8462632010-11-23 11:14:16 +010050/**
Michael Hennerich4f765482010-11-23 11:40:13 +010051 * struct ad5446_chip_info - chip specific information
Lars-Peter Clausen33ad6b22011-11-15 16:31:22 +010052 * @channel: channel spec for the DAC
Michael Hennerichd8462632010-11-23 11:14:16 +010053 * @int_vref_mv: AD5620/40/60: the internal reference voltage
Lars-Peter Clausencae329e2012-04-25 09:44:59 +020054 * @write: chip specific helper function to write to the register
Michael Hennerichd8462632010-11-23 11:14:16 +010055 */
56
57struct ad5446_chip_info {
Lars-Peter Clausen33ad6b22011-11-15 16:31:22 +010058 struct iio_chan_spec channel;
Michael Hennerichbbed4dc2011-03-10 13:26:47 +010059 u16 int_vref_mv;
Lars-Peter Clausencae329e2012-04-25 09:44:59 +020060 int (*write)(struct ad5446_state *st, unsigned val);
Michael Hennerichd8462632010-11-23 11:14:16 +010061};
62
63/**
64 * ad5446_supported_device_ids:
65 * The AD5620/40/60 parts are available in different fixed internal reference
66 * voltage options. The actual part numbers may look differently
67 * (and a bit cryptic), however this style is used to make clear which
68 * parts are supported here.
69 */
70
Michael Hennerichb5a49482010-11-22 11:15:23 +010071enum ad5446_supported_device_ids {
72 ID_AD5444,
73 ID_AD5446,
Lars-Peter Clausen779c0c42012-06-26 10:45:43 +020074 ID_AD5450,
75 ID_AD5451,
Michael Hennerich67d1c1f42011-04-15 13:51:07 +020076 ID_AD5541A,
Michael Hennerichb5a49482010-11-22 11:15:23 +010077 ID_AD5512A,
Michael Hennerich07722682011-02-23 10:45:47 +010078 ID_AD5553,
Michael Hennerich2b615352011-03-10 13:26:48 +010079 ID_AD5601,
80 ID_AD5611,
81 ID_AD5621,
Michael Hennerichd8462632010-11-23 11:14:16 +010082 ID_AD5620_2500,
83 ID_AD5620_1250,
84 ID_AD5640_2500,
85 ID_AD5640_1250,
86 ID_AD5660_2500,
87 ID_AD5660_1250,
Lars-Peter Clausen18e5ab32012-04-25 09:45:01 +020088 ID_AD5662,
Michael Hennerichb5a49482010-11-22 11:15:23 +010089};
90
Michael Hennerichd8462632010-11-23 11:14:16 +010091#endif /* IIO_DAC_AD5446_H_ */