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Hugh Blemings6bbc5472007-12-21 15:39:28 +11001/*
2 * Device Tree Source for IBM/AMCC Taishan
3 *
4 * Copyright 2007 IBM Corp.
5 * Hugh Blemings <hugh@au.ibm.com> based off code by
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without
10 * any warranty of any kind, whether express or implied.
11 */
12
13/ {
14 #address-cells = <2>;
15 #size-cells = <1>;
16 model = "amcc,taishan";
17 compatible = "amcc,taishan";
Josh Boyer72fda112007-12-06 13:20:05 -060018 dcr-parent = <&/cpus/cpu@0>;
Hugh Blemings6bbc5472007-12-21 15:39:28 +110019
Stefan Roese8aaed982007-12-15 18:55:16 +110020 aliases {
21 ethernet0 = &EMAC2;
22 ethernet1 = &EMAC3;
23 serial0 = &UART0;
24 serial1 = &UART1;
25 };
26
Hugh Blemings6bbc5472007-12-21 15:39:28 +110027 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
Josh Boyer72fda112007-12-06 13:20:05 -060031 cpu@0 {
Hugh Blemings6bbc5472007-12-21 15:39:28 +110032 device_type = "cpu";
Josh Boyer72fda112007-12-06 13:20:05 -060033 model = "PowerPC,440GX";
Hugh Blemings6bbc5472007-12-21 15:39:28 +110034 reg = <0>;
35 clock-frequency = <2FAF0800>; // 800MHz
36 timebase-frequency = <0>; // Filled in by zImage
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
39 i-cache-size = <8000>; /* 32 kB */
40 d-cache-size = <8000>; /* 32 kB */
41 dcr-controller;
42 dcr-access-method = "native";
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0 0 0>; // Filled in by zImage
49 };
50
51
52 UICB0: interrupt-controller-base {
53 compatible = "ibm,uic-440gx", "ibm,uic";
54 interrupt-controller;
55 cell-index = <3>;
56 dcr-reg = <200 009>;
57 #address-cells = <0>;
58 #size-cells = <0>;
59 #interrupt-cells = <2>;
60 };
61
62
63 UIC0: interrupt-controller0 {
64 compatible = "ibm,uic-440gx", "ibm,uic";
65 interrupt-controller;
66 cell-index = <0>;
67 dcr-reg = <0c0 009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
70 #interrupt-cells = <2>;
71 interrupts = <01 4 00 4>; /* cascade - first non-critical */
72 interrupt-parent = <&UICB0>;
73
74 };
75
76 UIC1: interrupt-controller1 {
77 compatible = "ibm,uic-440gx", "ibm,uic";
78 interrupt-controller;
79 cell-index = <1>;
80 dcr-reg = <0d0 009>;
81 #address-cells = <0>;
82 #size-cells = <0>;
83 #interrupt-cells = <2>;
84 interrupts = <03 4 02 4>; /* cascade */
85 interrupt-parent = <&UICB0>;
86 };
87
88 UIC2: interrupt-controller2 {
89 compatible = "ibm,uic-440gx", "ibm,uic";
90 interrupt-controller;
91 cell-index = <2>; /* was 1 */
92 dcr-reg = <210 009>;
93 #address-cells = <0>;
94 #size-cells = <0>;
95 #interrupt-cells = <2>;
96 interrupts = <05 4 04 4>; /* cascade */
97 interrupt-parent = <&UICB0>;
98 };
99
100
101 CPC0: cpc {
102 compatible = "ibm,cpc-440gp";
103 dcr-reg = <0b0 003 0e0 010>;
104 // FIXME: anything else?
105 };
106
107 plb {
108 compatible = "ibm,plb-440gx", "ibm,plb4";
109 #address-cells = <2>;
110 #size-cells = <1>;
111 ranges;
112 clock-frequency = <9896800>; // 160MHz
113
114 SDRAM0: memory-controller {
115 compatible = "ibm,sdram-440gp";
116 dcr-reg = <010 2>;
117 // FIXME: anything else?
118 };
119
120 SRAM0: sram {
121 compatible = "ibm,sram-440gp";
122 dcr-reg = <020 8 00a 1>;
123 };
124
125 DMA0: dma {
126 // FIXME: ???
127 compatible = "ibm,dma-440gp";
128 dcr-reg = <100 027>;
129 };
130
131 MAL0: mcmal {
132 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
133 dcr-reg = <180 62>;
134 num-tx-chans = <4>;
135 num-rx-chans = <4>;
136 interrupt-parent = <&MAL0>;
137 interrupts = <0 1 2 3 4>;
138 #interrupt-cells = <1>;
139 #address-cells = <0>;
140 #size-cells = <0>;
141 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
142 /*RXEOB*/ 1 &UIC0 b 4
143 /*SERR*/ 2 &UIC1 0 4
144 /*TXDE*/ 3 &UIC1 1 4
145 /*RXDE*/ 4 &UIC1 2 4>;
146 interrupt-map-mask = <ffffffff>;
147 };
148
149 POB0: opb {
150 compatible = "ibm,opb-440gx", "ibm,opb";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 /* Wish there was a nicer way of specifying a full 32-bit
154 range */
155 ranges = <00000000 1 00000000 80000000
156 80000000 1 80000000 80000000>;
157 dcr-reg = <090 00b>;
158 interrupt-parent = <&UIC1>;
159 interrupts = <7 4>;
160 clock-frequency = <4C4B400>; // 80MHz
161
162
163 EBC0: ebc {
164 compatible = "ibm,ebc-440gx", "ibm,ebc";
165 dcr-reg = <012 2>;
166 #address-cells = <2>;
167 #size-cells = <1>;
168 clock-frequency = <4C4B400>; // 80MHz
169
170 /* ranges property is supplied by zImage
171 * based on firmware's configuration of the
172 * EBC bridge */
173
174 interrupts = <5 4>;
175 interrupt-parent = <&UIC1>;
176
177 /* TODO: Add other EBC devices */
178 };
179
180
181
182 UART0: serial@40000200 {
183 device_type = "serial";
184 compatible = "ns16550";
185 reg = <40000200 8>;
186 virtual-reg = <e0000200>;
187 clock-frequency = <A8C000>;
188 current-speed = <1C200>; /* 115200 */
189 interrupt-parent = <&UIC0>;
190 interrupts = <0 4>;
191 };
192
193 UART1: serial@40000300 {
194 device_type = "serial";
195 compatible = "ns16550";
196 reg = <40000300 8>;
197 virtual-reg = <e0000300>;
198 clock-frequency = <A8C000>;
199 current-speed = <1C200>; /* 115200 */
200 interrupt-parent = <&UIC0>;
201 interrupts = <1 4>;
202 };
203
204 IIC0: i2c@40000400 {
205 /* FIXME */
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100206 compatible = "ibm,iic-440gp", "ibm,iic";
207 reg = <40000400 14>;
208 interrupt-parent = <&UIC0>;
209 interrupts = <2 4>;
210 };
211 IIC1: i2c@40000500 {
212 /* FIXME */
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100213 compatible = "ibm,iic-440gp", "ibm,iic";
214 reg = <40000500 14>;
215 interrupt-parent = <&UIC0>;
216 interrupts = <3 4>;
217 };
218
219 GPIO0: gpio@40000700 {
220 /* FIXME */
221 compatible = "ibm,gpio-440gp";
222 reg = <40000700 20>;
223 };
224
225 ZMII0: emac-zmii@40000780 {
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100226 compatible = "ibm,zmii-440gx", "ibm,zmii";
227 reg = <40000780 c>;
228 };
229
230 RGMII0: emac-rgmii@40000790 {
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100231 compatible = "ibm,rgmii";
232 reg = <40000790 8>;
233 };
234
Stefan Roese78314262008-03-14 03:00:03 +1100235 TAH0: emac-tah@40000b50 {
236 compatible = "ibm,tah-440gx", "ibm,tah";
237 reg = <40000b50 30>;
238 };
239
240 TAH1: emac-tah@40000d50 {
241 compatible = "ibm,tah-440gx", "ibm,tah";
242 reg = <40000d50 30>;
243 };
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100244
245 EMAC0: ethernet@40000800 {
246 unused = <1>;
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100247 device_type = "network";
248 compatible = "ibm,emac-440gx", "ibm,emac4";
249 interrupt-parent = <&UIC1>;
250 interrupts = <1c 4 1d 4>;
251 reg = <40000800 70>;
252 local-mac-address = [000000000000]; // Filled in by zImage
253 mal-device = <&MAL0>;
254 mal-tx-channel = <0>;
255 mal-rx-channel = <0>;
256 cell-index = <0>;
257 max-frame-size = <5dc>;
258 rx-fifo-size = <1000>;
259 tx-fifo-size = <800>;
260 phy-mode = "rmii";
261 phy-map = <00000001>;
262 zmii-device = <&ZMII0>;
263 zmii-channel = <0>;
264 };
265 EMAC1: ethernet@40000900 {
266 unused = <1>;
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100267 device_type = "network";
268 compatible = "ibm,emac-440gx", "ibm,emac4";
269 interrupt-parent = <&UIC1>;
270 interrupts = <1e 4 1f 4>;
271 reg = <40000900 70>;
272 local-mac-address = [000000000000]; // Filled in by zImage
273 mal-device = <&MAL0>;
274 mal-tx-channel = <1>;
275 mal-rx-channel = <1>;
276 cell-index = <1>;
277 max-frame-size = <5dc>;
278 rx-fifo-size = <1000>;
279 tx-fifo-size = <800>;
280 phy-mode = "rmii";
281 phy-map = <00000001>;
282 zmii-device = <&ZMII0>;
283 zmii-channel = <1>;
284 };
285
286 EMAC2: ethernet@40000c00 {
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100287 device_type = "network";
288 compatible = "ibm,emac-440gx", "ibm,emac4";
289 interrupt-parent = <&UIC2>;
290 interrupts = <0 4 1 4>;
291 reg = <40000c00 70>;
292 local-mac-address = [000000000000]; // Filled in by zImage
293 mal-device = <&MAL0>;
294 mal-tx-channel = <2>;
295 mal-rx-channel = <2>;
296 cell-index = <2>;
297 max-frame-size = <5dc>;
298 rx-fifo-size = <1000>;
299 tx-fifo-size = <800>;
300 phy-mode = "rgmii";
301 phy-map = <00000001>;
302 rgmii-device = <&RGMII0>;
303 rgmii-channel = <0>;
304 zmii-device = <&ZMII0>;
305 zmii-channel = <2>;
Stefan Roese78314262008-03-14 03:00:03 +1100306 tah-device = <&TAH0>;
307 tah-channel = <0>;
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100308 };
309
310 EMAC3: ethernet@40000e00 {
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100311 device_type = "network";
312 compatible = "ibm,emac-440gx", "ibm,emac4";
313 interrupt-parent = <&UIC2>;
314 interrupts = <2 4 3 4>;
315 reg = <40000e00 70>;
316 local-mac-address = [000000000000]; // Filled in by zImage
317 mal-device = <&MAL0>;
318 mal-tx-channel = <3>;
319 mal-rx-channel = <3>;
320 cell-index = <3>;
321 max-frame-size = <5dc>;
322 rx-fifo-size = <1000>;
323 tx-fifo-size = <800>;
324 phy-mode = "rgmii";
325 phy-map = <00000003>;
326 rgmii-device = <&RGMII0>;
327 rgmii-channel = <1>;
328 zmii-device = <&ZMII0>;
329 zmii-channel = <3>;
Stefan Roese78314262008-03-14 03:00:03 +1100330 tah-device = <&TAH1>;
331 tah-channel = <0>;
Hugh Blemings6bbc5472007-12-21 15:39:28 +1100332 };
333
334
335 GPT0: gpt@40000a00 {
336 /* FIXME */
337 reg = <40000a00 d4>;
338 interrupt-parent = <&UIC0>;
339 interrupts = <12 4 13 4 14 4 15 4 16 4>;
340 };
341
342 };
343
344 PCIX0: pci@20ec00000 {
345 device_type = "pci";
346 #interrupt-cells = <1>;
347 #size-cells = <2>;
348 #address-cells = <3>;
349 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
350 primary;
351 large-inbound-windows;
352 enable-msi-hole;
353 reg = <2 0ec00000 8 /* Config space access */
354 0 0 0 /* no IACK cycles */
355 2 0ed00000 4 /* Special cycles */
356 2 0ec80000 100 /* Internal registers */
357 2 0ec80100 fc>; /* Internal messaging registers */
358
359 /* Outbound ranges, one memory and one IO,
360 * later cannot be changed
361 */
362 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
363 01000000 0 00000000 00000002 08000000 0 00010000>;
364
365 /* Inbound 2GB range starting at 0 */
366 dma-ranges = <42000000 0 0 0 0 0 80000000>;
367
368 interrupt-map-mask = <f800 0 0 7>;
369 interrupt-map = <
370 /* IDSEL 1 */
371 0800 0 0 1 &UIC0 17 8
372 0800 0 0 2 &UIC0 18 8
373 0800 0 0 3 &UIC0 19 8
374 0800 0 0 4 &UIC0 1a 8
375
376 /* IDSEL 2 */
377 1000 0 0 1 &UIC0 18 8
378 1000 0 0 2 &UIC0 19 8
379 1000 0 0 3 &UIC0 1a 8
380 1000 0 0 4 &UIC0 17 8
381 >;
382 };
383 };
384
385 chosen {
386 linux,stdout-path = "/plb/opb/serial@40000300";
387 };
388};