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Greg Rose92915f72010-01-09 02:24:10 +00001/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
Greg Rose5c47a2b2012-01-06 02:53:30 +00004 Copyright(c) 1999 - 2012 Intel Corporation.
Greg Rose92915f72010-01-09 02:24:10 +00005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
Jeff Kirsherdbd96362011-10-21 19:38:18 +000032
33#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
Greg Rose92915f72010-01-09 02:24:10 +000035#include <linux/types.h>
Jiri Pirkodadcd652011-07-21 03:25:09 +000036#include <linux/bitops.h>
Greg Rose92915f72010-01-09 02:24:10 +000037#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/vmalloc.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
Alexander Duyck70a10e22012-05-11 08:33:21 +000045#include <linux/sctp.h>
Greg Rose92915f72010-01-09 02:24:10 +000046#include <linux/ipv6.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090047#include <linux/slab.h>
Greg Rose92915f72010-01-09 02:24:10 +000048#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
Jiri Pirko01789342011-08-16 06:29:00 +000051#include <linux/if.h>
Greg Rose92915f72010-01-09 02:24:10 +000052#include <linux/if_vlan.h>
Paul Gortmaker70c71602011-05-22 16:47:17 -040053#include <linux/prefetch.h>
Greg Rose92915f72010-01-09 02:24:10 +000054
55#include "ixgbevf.h"
56
Stephen Hemminger3d8fe982012-01-18 22:13:34 +000057const char ixgbevf_driver_name[] = "ixgbevf";
Greg Rose92915f72010-01-09 02:24:10 +000058static const char ixgbevf_driver_string[] =
Greg Rose422e05d2011-03-12 02:01:29 +000059 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
Greg Rose92915f72010-01-09 02:24:10 +000060
Greg Rose1b3d2d72012-10-04 02:10:53 +000061#define DRV_VERSION "2.7.12-k"
Greg Rose92915f72010-01-09 02:24:10 +000062const char ixgbevf_driver_version[] = DRV_VERSION;
Greg Rose66c87bd2010-11-16 19:26:43 -080063static char ixgbevf_copyright[] =
Greg Rose5c47a2b2012-01-06 02:53:30 +000064 "Copyright (c) 2009 - 2012 Intel Corporation.";
Greg Rose92915f72010-01-09 02:24:10 +000065
66static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
Greg Rose2316aa22010-12-02 07:12:26 +000067 [board_82599_vf] = &ixgbevf_82599_vf_info,
68 [board_X540_vf] = &ixgbevf_X540_vf_info,
Greg Rose92915f72010-01-09 02:24:10 +000069};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
Stephen Hemminger39ba22b2013-02-06 02:37:04 +000079static DEFINE_PCI_DEVICE_TABLE(ixgbevf_pci_tbl) = {
80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
Greg Rose92915f72010-01-09 02:24:10 +000082 /* required last entry */
83 {0, }
84};
85MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
86
87MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
88MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
stephen hemmingerb3f4d592012-03-13 06:04:20 +000092#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
93static int debug = -1;
94module_param(debug, int, 0);
95MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
Greg Rose92915f72010-01-09 02:24:10 +000096
97/* forward decls */
Alexander Duyckfa71ae22012-05-11 08:32:50 +000098static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
Alexander Duyck56e94092012-07-20 08:10:03 +000099static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
Greg Rose92915f72010-01-09 02:24:10 +0000100
101static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
102 struct ixgbevf_ring *rx_ring,
103 u32 val)
104{
105 /*
106 * Force memory writes to complete before letting h/w
107 * know there are new descriptors to fetch. (Only
108 * applicable for weak-ordered memory model archs,
109 * such as IA-64).
110 */
111 wmb();
112 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
113}
114
Ben Hutchings49ce9c22012-07-10 10:56:00 +0000115/**
Greg Rose65d676c2011-02-03 06:54:13 +0000116 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
Greg Rose92915f72010-01-09 02:24:10 +0000117 * @adapter: pointer to adapter struct
118 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
119 * @queue: queue to map the corresponding interrupt to
120 * @msix_vector: the vector to map to the corresponding queue
Greg Rose92915f72010-01-09 02:24:10 +0000121 */
122static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
123 u8 queue, u8 msix_vector)
124{
125 u32 ivar, index;
126 struct ixgbe_hw *hw = &adapter->hw;
127 if (direction == -1) {
128 /* other causes */
129 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
130 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
131 ivar &= ~0xFF;
132 ivar |= msix_vector;
133 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
134 } else {
135 /* tx or rx causes */
136 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
137 index = ((16 * (queue & 1)) + (8 * direction));
138 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
139 ivar &= ~(0xFF << index);
140 ivar |= (msix_vector << index);
141 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
142 }
143}
144
Alexander Duyck70a10e22012-05-11 08:33:21 +0000145static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
Greg Rose92915f72010-01-09 02:24:10 +0000146 struct ixgbevf_tx_buffer
147 *tx_buffer_info)
148{
149 if (tx_buffer_info->dma) {
150 if (tx_buffer_info->mapped_as_page)
Alexander Duyck70a10e22012-05-11 08:33:21 +0000151 dma_unmap_page(tx_ring->dev,
Greg Rose92915f72010-01-09 02:24:10 +0000152 tx_buffer_info->dma,
153 tx_buffer_info->length,
Nick Nunley2a1f8792010-04-27 13:10:50 +0000154 DMA_TO_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +0000155 else
Alexander Duyck70a10e22012-05-11 08:33:21 +0000156 dma_unmap_single(tx_ring->dev,
Greg Rose92915f72010-01-09 02:24:10 +0000157 tx_buffer_info->dma,
158 tx_buffer_info->length,
Nick Nunley2a1f8792010-04-27 13:10:50 +0000159 DMA_TO_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +0000160 tx_buffer_info->dma = 0;
161 }
162 if (tx_buffer_info->skb) {
163 dev_kfree_skb_any(tx_buffer_info->skb);
164 tx_buffer_info->skb = NULL;
165 }
166 tx_buffer_info->time_stamp = 0;
167 /* tx_buffer_info must be completely set up in the transmit path */
168}
169
Greg Rose92915f72010-01-09 02:24:10 +0000170#define IXGBE_MAX_TXD_PWR 14
171#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
172
173/* Tx Descriptors needed, worst case */
Alexander Duyck35959902012-05-11 08:32:40 +0000174#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
175#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
Greg Rose92915f72010-01-09 02:24:10 +0000176
177static void ixgbevf_tx_timeout(struct net_device *netdev);
178
179/**
180 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000181 * @q_vector: board private structure
Greg Rose92915f72010-01-09 02:24:10 +0000182 * @tx_ring: tx ring to clean
183 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000184static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
Greg Rose92915f72010-01-09 02:24:10 +0000185 struct ixgbevf_ring *tx_ring)
186{
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000187 struct ixgbevf_adapter *adapter = q_vector->adapter;
Greg Rose92915f72010-01-09 02:24:10 +0000188 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
189 struct ixgbevf_tx_buffer *tx_buffer_info;
Alexander Duycke757e3e2013-01-31 07:43:22 +0000190 unsigned int i, count = 0;
Greg Rose92915f72010-01-09 02:24:10 +0000191 unsigned int total_bytes = 0, total_packets = 0;
192
Alexander Duyck10cc1bd2012-07-16 23:44:48 +0000193 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
194 return true;
195
Greg Rose92915f72010-01-09 02:24:10 +0000196 i = tx_ring->next_to_clean;
Alexander Duycke757e3e2013-01-31 07:43:22 +0000197 tx_buffer_info = &tx_ring->tx_buffer_info[i];
198 eop_desc = tx_buffer_info->next_to_watch;
Greg Rose92915f72010-01-09 02:24:10 +0000199
Alexander Duycke757e3e2013-01-31 07:43:22 +0000200 do {
Greg Rose92915f72010-01-09 02:24:10 +0000201 bool cleaned = false;
Alexander Duycke757e3e2013-01-31 07:43:22 +0000202
203 /* if next_to_watch is not set then there is no work pending */
204 if (!eop_desc)
205 break;
206
207 /* prevent any other reads prior to eop_desc */
208 read_barrier_depends();
209
210 /* if DD is not set pending work has not been completed */
211 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
212 break;
213
214 /* clear next_to_watch to prevent false hangs */
215 tx_buffer_info->next_to_watch = NULL;
216
Greg Rose92915f72010-01-09 02:24:10 +0000217 for ( ; !cleaned; count++) {
218 struct sk_buff *skb;
Alexander Duyck908421f2012-05-11 08:33:00 +0000219 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
Alexander Duycke757e3e2013-01-31 07:43:22 +0000220 cleaned = (tx_desc == eop_desc);
Greg Rose92915f72010-01-09 02:24:10 +0000221 skb = tx_buffer_info->skb;
222
223 if (cleaned && skb) {
224 unsigned int segs, bytecount;
225
226 /* gso_segs is currently only valid for tcp */
227 segs = skb_shinfo(skb)->gso_segs ?: 1;
228 /* multiply data chunks by size of headers */
229 bytecount = ((segs - 1) * skb_headlen(skb)) +
230 skb->len;
231 total_packets += segs;
232 total_bytes += bytecount;
233 }
234
Alexander Duyck70a10e22012-05-11 08:33:21 +0000235 ixgbevf_unmap_and_free_tx_resource(tx_ring,
Greg Rose92915f72010-01-09 02:24:10 +0000236 tx_buffer_info);
237
238 tx_desc->wb.status = 0;
239
240 i++;
241 if (i == tx_ring->count)
242 i = 0;
Alexander Duycke757e3e2013-01-31 07:43:22 +0000243
244 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Greg Rose92915f72010-01-09 02:24:10 +0000245 }
246
Alexander Duycke757e3e2013-01-31 07:43:22 +0000247 eop_desc = tx_buffer_info->next_to_watch;
248 } while (count < tx_ring->count);
Greg Rose92915f72010-01-09 02:24:10 +0000249
250 tx_ring->next_to_clean = i;
251
252#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
Alexander Duyckfb401952012-05-11 08:33:16 +0000253 if (unlikely(count && netif_carrier_ok(tx_ring->netdev) &&
Greg Rose92915f72010-01-09 02:24:10 +0000254 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
255 /* Make sure that anybody stopping the queue after this
256 * sees the new next_to_clean.
257 */
258 smp_mb();
Alexander Duyckfb401952012-05-11 08:33:16 +0000259 if (__netif_subqueue_stopped(tx_ring->netdev,
260 tx_ring->queue_index) &&
Greg Rose92915f72010-01-09 02:24:10 +0000261 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
Alexander Duyckfb401952012-05-11 08:33:16 +0000262 netif_wake_subqueue(tx_ring->netdev,
263 tx_ring->queue_index);
Greg Rose92915f72010-01-09 02:24:10 +0000264 ++adapter->restart_queue;
265 }
Greg Rose92915f72010-01-09 02:24:10 +0000266 }
267
Eric Dumazet4197aa72011-06-22 05:01:35 +0000268 u64_stats_update_begin(&tx_ring->syncp);
Greg Rose92915f72010-01-09 02:24:10 +0000269 tx_ring->total_bytes += total_bytes;
270 tx_ring->total_packets += total_packets;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000271 u64_stats_update_end(&tx_ring->syncp);
Greg Roseac6ed8f2012-08-31 05:59:28 +0000272 q_vector->tx.total_bytes += total_bytes;
273 q_vector->tx.total_packets += total_packets;
Greg Rose92915f72010-01-09 02:24:10 +0000274
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000275 return count < tx_ring->count;
Greg Rose92915f72010-01-09 02:24:10 +0000276}
277
278/**
279 * ixgbevf_receive_skb - Send a completed packet up the stack
280 * @q_vector: structure containing interrupt and ring information
281 * @skb: packet to send up
282 * @status: hardware indication of status of receive
Greg Rose92915f72010-01-09 02:24:10 +0000283 * @rx_desc: rx descriptor
284 **/
285static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
286 struct sk_buff *skb, u8 status,
Greg Rose92915f72010-01-09 02:24:10 +0000287 union ixgbe_adv_rx_desc *rx_desc)
288{
289 struct ixgbevf_adapter *adapter = q_vector->adapter;
290 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
Greg Rosedd1ed3b2011-08-27 02:06:25 +0000291 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
Greg Rose92915f72010-01-09 02:24:10 +0000292
Pascal Bouchareine5d9a5332012-06-14 02:18:18 +0000293 if (is_vlan && test_bit(tag & VLAN_VID_MASK, adapter->active_vlans))
Patrick McHardy86a9bad2013-04-19 02:04:30 +0000294 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
Jiri Pirkodadcd652011-07-21 03:25:09 +0000295
Greg Rose366c1092012-11-13 04:03:18 +0000296 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
297 napi_gro_receive(&q_vector->napi, skb);
298 else
299 netif_rx(skb);
Greg Rose92915f72010-01-09 02:24:10 +0000300}
301
302/**
303 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
Greg Rose55fb2772012-11-06 05:53:32 +0000304 * @ring: pointer to Rx descriptor ring structure
Greg Rose92915f72010-01-09 02:24:10 +0000305 * @status_err: hardware indication of status of receive
306 * @skb: skb currently being received and modified
307 **/
Greg Rose55fb2772012-11-06 05:53:32 +0000308static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
Greg Rose92915f72010-01-09 02:24:10 +0000309 u32 status_err, struct sk_buff *skb)
310{
Eric Dumazetbc8acf22010-09-02 13:07:41 -0700311 skb_checksum_none_assert(skb);
Greg Rose92915f72010-01-09 02:24:10 +0000312
313 /* Rx csum disabled */
Alexander Duyckfb401952012-05-11 08:33:16 +0000314 if (!(ring->netdev->features & NETIF_F_RXCSUM))
Greg Rose92915f72010-01-09 02:24:10 +0000315 return;
316
317 /* if IP and error */
318 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
319 (status_err & IXGBE_RXDADV_ERR_IPE)) {
Greg Rose55fb2772012-11-06 05:53:32 +0000320 ring->hw_csum_rx_error++;
Greg Rose92915f72010-01-09 02:24:10 +0000321 return;
322 }
323
324 if (!(status_err & IXGBE_RXD_STAT_L4CS))
325 return;
326
327 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
Greg Rose55fb2772012-11-06 05:53:32 +0000328 ring->hw_csum_rx_error++;
Greg Rose92915f72010-01-09 02:24:10 +0000329 return;
330 }
331
332 /* It must be a TCP or UDP packet with a valid checksum */
333 skb->ip_summed = CHECKSUM_UNNECESSARY;
Greg Rose55fb2772012-11-06 05:53:32 +0000334 ring->hw_csum_rx_good++;
Greg Rose92915f72010-01-09 02:24:10 +0000335}
336
337/**
338 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
339 * @adapter: address of board private structure
340 **/
341static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
342 struct ixgbevf_ring *rx_ring,
343 int cleaned_count)
344{
345 struct pci_dev *pdev = adapter->pdev;
346 union ixgbe_adv_rx_desc *rx_desc;
347 struct ixgbevf_rx_buffer *bi;
Alexander Duyckfb401952012-05-11 08:33:16 +0000348 unsigned int i = rx_ring->next_to_use;
Greg Rose92915f72010-01-09 02:24:10 +0000349
Greg Rose92915f72010-01-09 02:24:10 +0000350 bi = &rx_ring->rx_buffer_info[i];
351
352 while (cleaned_count--) {
Alexander Duyck908421f2012-05-11 08:33:00 +0000353 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
Greg Roseb9dd2452012-11-02 05:50:21 +0000354
355 if (!bi->skb) {
356 struct sk_buff *skb;
357
Alexander Duyckfb401952012-05-11 08:33:16 +0000358 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
359 rx_ring->rx_buf_len);
Greg Rose92915f72010-01-09 02:24:10 +0000360 if (!skb) {
361 adapter->alloc_rx_buff_failed++;
362 goto no_buffers;
363 }
Greg Rose92915f72010-01-09 02:24:10 +0000364 bi->skb = skb;
Greg Roseb9dd2452012-11-02 05:50:21 +0000365
Nick Nunley2a1f8792010-04-27 13:10:50 +0000366 bi->dma = dma_map_single(&pdev->dev, skb->data,
Greg Rose92915f72010-01-09 02:24:10 +0000367 rx_ring->rx_buf_len,
Nick Nunley2a1f8792010-04-27 13:10:50 +0000368 DMA_FROM_DEVICE);
Greg Rose6132ee82012-09-21 00:14:14 +0000369 if (dma_mapping_error(&pdev->dev, bi->dma)) {
370 dev_kfree_skb(skb);
371 bi->skb = NULL;
372 dev_err(&pdev->dev, "RX DMA map failed\n");
373 break;
374 }
Greg Rose92915f72010-01-09 02:24:10 +0000375 }
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000376 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
Greg Rose92915f72010-01-09 02:24:10 +0000377
378 i++;
379 if (i == rx_ring->count)
380 i = 0;
381 bi = &rx_ring->rx_buffer_info[i];
382 }
383
384no_buffers:
385 if (rx_ring->next_to_use != i) {
386 rx_ring->next_to_use = i;
Greg Rose92915f72010-01-09 02:24:10 +0000387 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
388 }
389}
390
391static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000392 u32 qmask)
Greg Rose92915f72010-01-09 02:24:10 +0000393{
Greg Rose92915f72010-01-09 02:24:10 +0000394 struct ixgbe_hw *hw = &adapter->hw;
395
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000396 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
Greg Rose92915f72010-01-09 02:24:10 +0000397}
398
Greg Rose92915f72010-01-09 02:24:10 +0000399static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
400 struct ixgbevf_ring *rx_ring,
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000401 int budget)
Greg Rose92915f72010-01-09 02:24:10 +0000402{
403 struct ixgbevf_adapter *adapter = q_vector->adapter;
404 struct pci_dev *pdev = adapter->pdev;
405 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
406 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
407 struct sk_buff *skb;
408 unsigned int i;
409 u32 len, staterr;
Greg Rose92915f72010-01-09 02:24:10 +0000410 int cleaned_count = 0;
411 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
412
413 i = rx_ring->next_to_clean;
Alexander Duyck908421f2012-05-11 08:33:00 +0000414 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +0000415 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
416 rx_buffer_info = &rx_ring->rx_buffer_info[i];
417
418 while (staterr & IXGBE_RXD_STAT_DD) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000419 if (!budget)
Greg Rose92915f72010-01-09 02:24:10 +0000420 break;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000421 budget--;
Greg Rose92915f72010-01-09 02:24:10 +0000422
Jeff Kirsher2d0bb1c2010-08-08 16:02:31 +0000423 rmb(); /* read descriptor and rx_buffer_info after status DD */
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000424 len = le16_to_cpu(rx_desc->wb.upper.length);
Greg Rose92915f72010-01-09 02:24:10 +0000425 skb = rx_buffer_info->skb;
426 prefetch(skb->data - NET_IP_ALIGN);
427 rx_buffer_info->skb = NULL;
428
429 if (rx_buffer_info->dma) {
Nick Nunley2a1f8792010-04-27 13:10:50 +0000430 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
Greg Rose92915f72010-01-09 02:24:10 +0000431 rx_ring->rx_buf_len,
Nick Nunley2a1f8792010-04-27 13:10:50 +0000432 DMA_FROM_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +0000433 rx_buffer_info->dma = 0;
434 skb_put(skb, len);
435 }
436
Greg Rose92915f72010-01-09 02:24:10 +0000437 i++;
438 if (i == rx_ring->count)
439 i = 0;
440
Alexander Duyck908421f2012-05-11 08:33:00 +0000441 next_rxd = IXGBEVF_RX_DESC(rx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +0000442 prefetch(next_rxd);
443 cleaned_count++;
444
445 next_buffer = &rx_ring->rx_buffer_info[i];
446
447 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000448 skb->next = next_buffer->skb;
Alexander Duyck5c60f812012-09-01 05:12:38 +0000449 IXGBE_CB(skb->next)->prev = skb;
Greg Rose92915f72010-01-09 02:24:10 +0000450 adapter->non_eop_descs++;
451 goto next_desc;
452 }
453
Alexander Duyck5c60f812012-09-01 05:12:38 +0000454 /* we should not be chaining buffers, if we did drop the skb */
455 if (IXGBE_CB(skb)->prev) {
456 do {
457 struct sk_buff *this = skb;
458 skb = IXGBE_CB(skb)->prev;
459 dev_kfree_skb(this);
460 } while (skb);
461 goto next_desc;
462 }
463
Greg Rose92915f72010-01-09 02:24:10 +0000464 /* ERR_MASK will only have valid bits if EOP set */
465 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
466 dev_kfree_skb_irq(skb);
467 goto next_desc;
468 }
469
Greg Rose55fb2772012-11-06 05:53:32 +0000470 ixgbevf_rx_checksum(rx_ring, staterr, skb);
Greg Rose92915f72010-01-09 02:24:10 +0000471
472 /* probably a little skewed due to removing CRC */
473 total_rx_bytes += skb->len;
474 total_rx_packets++;
475
476 /*
477 * Work around issue of some types of VM to VM loop back
478 * packets not getting split correctly
479 */
480 if (staterr & IXGBE_RXD_STAT_LB) {
Eric Dumazete743d312010-04-14 15:59:40 -0700481 u32 header_fixup_len = skb_headlen(skb);
Greg Rose92915f72010-01-09 02:24:10 +0000482 if (header_fixup_len < 14)
483 skb_push(skb, header_fixup_len);
484 }
Alexander Duyckfb401952012-05-11 08:33:16 +0000485 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
Greg Rose92915f72010-01-09 02:24:10 +0000486
John Fastabend815cccb2012-10-24 08:13:09 +0000487 /* Workaround hardware that can't do proper VEPA multicast
488 * source pruning.
489 */
490 if ((skb->pkt_type & (PACKET_BROADCAST | PACKET_MULTICAST)) &&
Joe Perches7367d0b2013-09-01 11:51:23 -0700491 ether_addr_equal(adapter->netdev->dev_addr,
492 eth_hdr(skb)->h_source)) {
John Fastabend815cccb2012-10-24 08:13:09 +0000493 dev_kfree_skb_irq(skb);
494 goto next_desc;
495 }
496
Narendra Kb3d58a82012-08-14 00:00:14 +0000497 ixgbevf_receive_skb(q_vector, skb, staterr, rx_desc);
Greg Rose92915f72010-01-09 02:24:10 +0000498
499next_desc:
500 rx_desc->wb.upper.status_error = 0;
501
502 /* return some buffers to hardware, one at a time is too slow */
503 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
504 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
505 cleaned_count);
506 cleaned_count = 0;
507 }
508
509 /* use prefetched values */
510 rx_desc = next_rxd;
511 rx_buffer_info = &rx_ring->rx_buffer_info[i];
512
513 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
514 }
515
516 rx_ring->next_to_clean = i;
517 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
518
519 if (cleaned_count)
520 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
521
Eric Dumazet4197aa72011-06-22 05:01:35 +0000522 u64_stats_update_begin(&rx_ring->syncp);
Greg Rose92915f72010-01-09 02:24:10 +0000523 rx_ring->total_packets += total_rx_packets;
524 rx_ring->total_bytes += total_rx_bytes;
Eric Dumazet4197aa72011-06-22 05:01:35 +0000525 u64_stats_update_end(&rx_ring->syncp);
Greg Roseac6ed8f2012-08-31 05:59:28 +0000526 q_vector->rx.total_packets += total_rx_packets;
527 q_vector->rx.total_bytes += total_rx_bytes;
Greg Rose92915f72010-01-09 02:24:10 +0000528
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000529 return !!budget;
Greg Rose92915f72010-01-09 02:24:10 +0000530}
531
532/**
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000533 * ixgbevf_poll - NAPI polling calback
Greg Rose92915f72010-01-09 02:24:10 +0000534 * @napi: napi struct with our devices info in it
535 * @budget: amount of work driver is allowed to do this pass, in packets
536 *
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000537 * This function will clean more than one or more rings associated with a
Greg Rose92915f72010-01-09 02:24:10 +0000538 * q_vector.
539 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000540static int ixgbevf_poll(struct napi_struct *napi, int budget)
Greg Rose92915f72010-01-09 02:24:10 +0000541{
542 struct ixgbevf_q_vector *q_vector =
543 container_of(napi, struct ixgbevf_q_vector, napi);
544 struct ixgbevf_adapter *adapter = q_vector->adapter;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000545 struct ixgbevf_ring *ring;
546 int per_ring_budget;
547 bool clean_complete = true;
548
549 ixgbevf_for_each_ring(ring, q_vector->tx)
550 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
Greg Rose92915f72010-01-09 02:24:10 +0000551
552 /* attempt to distribute budget to each queue fairly, but don't allow
553 * the budget to go below 1 because we'll exit polling */
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000554 if (q_vector->rx.count > 1)
555 per_ring_budget = max(budget/q_vector->rx.count, 1);
556 else
557 per_ring_budget = budget;
Greg Rose92915f72010-01-09 02:24:10 +0000558
Greg Rose366c1092012-11-13 04:03:18 +0000559 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000560 ixgbevf_for_each_ring(ring, q_vector->rx)
561 clean_complete &= ixgbevf_clean_rx_irq(q_vector, ring,
562 per_ring_budget);
Greg Rose366c1092012-11-13 04:03:18 +0000563 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
Greg Rose92915f72010-01-09 02:24:10 +0000564
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000565 /* If all work not completed, return budget and keep polling */
566 if (!clean_complete)
567 return budget;
568 /* all work done, exit the polling mode */
569 napi_complete(napi);
570 if (adapter->rx_itr_setting & 1)
571 ixgbevf_set_itr(q_vector);
572 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
573 ixgbevf_irq_enable_queues(adapter,
574 1 << q_vector->v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000575
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000576 return 0;
Greg Rose92915f72010-01-09 02:24:10 +0000577}
578
Greg Rosece422602012-05-22 02:17:49 +0000579/**
580 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
581 * @q_vector: structure containing interrupt and ring information
582 */
583static void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
584{
585 struct ixgbevf_adapter *adapter = q_vector->adapter;
586 struct ixgbe_hw *hw = &adapter->hw;
587 int v_idx = q_vector->v_idx;
588 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
589
590 /*
591 * set the WDIS bit to not clear the timer bits and cause an
592 * immediate assertion of the interrupt
593 */
594 itr_reg |= IXGBE_EITR_CNT_WDIS;
595
596 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
597}
Greg Rose92915f72010-01-09 02:24:10 +0000598
599/**
600 * ixgbevf_configure_msix - Configure MSI-X hardware
601 * @adapter: board private structure
602 *
603 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
604 * interrupts.
605 **/
606static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
607{
608 struct ixgbevf_q_vector *q_vector;
Alexander Duyck6b43c442012-05-11 08:32:45 +0000609 int q_vectors, v_idx;
Greg Rose92915f72010-01-09 02:24:10 +0000610
611 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000612 adapter->eims_enable_mask = 0;
Greg Rose92915f72010-01-09 02:24:10 +0000613
614 /*
615 * Populate the IVAR table and set the ITR values to the
616 * corresponding register.
617 */
618 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
Alexander Duyck6b43c442012-05-11 08:32:45 +0000619 struct ixgbevf_ring *ring;
Greg Rose92915f72010-01-09 02:24:10 +0000620 q_vector = adapter->q_vector[v_idx];
Greg Rose92915f72010-01-09 02:24:10 +0000621
Alexander Duyck6b43c442012-05-11 08:32:45 +0000622 ixgbevf_for_each_ring(ring, q_vector->rx)
623 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000624
Alexander Duyck6b43c442012-05-11 08:32:45 +0000625 ixgbevf_for_each_ring(ring, q_vector->tx)
626 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
Greg Rose92915f72010-01-09 02:24:10 +0000627
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000628 if (q_vector->tx.ring && !q_vector->rx.ring) {
629 /* tx only vector */
630 if (adapter->tx_itr_setting == 1)
631 q_vector->itr = IXGBE_10K_ITR;
632 else
633 q_vector->itr = adapter->tx_itr_setting;
634 } else {
635 /* rx or rx/tx vector */
636 if (adapter->rx_itr_setting == 1)
637 q_vector->itr = IXGBE_20K_ITR;
638 else
639 q_vector->itr = adapter->rx_itr_setting;
640 }
Greg Rose92915f72010-01-09 02:24:10 +0000641
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000642 /* add q_vector eims value to global eims_enable_mask */
643 adapter->eims_enable_mask |= 1 << v_idx;
644
645 ixgbevf_write_eitr(q_vector);
Greg Rose92915f72010-01-09 02:24:10 +0000646 }
647
648 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000649 /* setup eims_other and add value to global eims_enable_mask */
650 adapter->eims_other = 1 << v_idx;
651 adapter->eims_enable_mask |= adapter->eims_other;
Greg Rose92915f72010-01-09 02:24:10 +0000652}
653
654enum latency_range {
655 lowest_latency = 0,
656 low_latency = 1,
657 bulk_latency = 2,
658 latency_invalid = 255
659};
660
661/**
662 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000663 * @q_vector: structure containing interrupt and ring information
664 * @ring_container: structure containing ring performance data
Greg Rose92915f72010-01-09 02:24:10 +0000665 *
666 * Stores a new ITR value based on packets and byte
667 * counts during the last interrupt. The advantage of per interrupt
668 * computation is faster updates and more accurate ITR for the current
669 * traffic pattern. Constants in this function were computed
670 * based on theoretical maximum wire speed and thresholds were set based
671 * on testing data as well as attempting to minimize response time
672 * while increasing bulk throughput.
673 **/
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000674static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
675 struct ixgbevf_ring_container *ring_container)
Greg Rose92915f72010-01-09 02:24:10 +0000676{
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000677 int bytes = ring_container->total_bytes;
678 int packets = ring_container->total_packets;
Greg Rose92915f72010-01-09 02:24:10 +0000679 u32 timepassed_us;
680 u64 bytes_perint;
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000681 u8 itr_setting = ring_container->itr;
Greg Rose92915f72010-01-09 02:24:10 +0000682
683 if (packets == 0)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000684 return;
Greg Rose92915f72010-01-09 02:24:10 +0000685
686 /* simple throttlerate management
687 * 0-20MB/s lowest (100000 ints/s)
688 * 20-100MB/s low (20000 ints/s)
689 * 100-1249MB/s bulk (8000 ints/s)
690 */
691 /* what was last interrupt timeslice? */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000692 timepassed_us = q_vector->itr >> 2;
Greg Rose92915f72010-01-09 02:24:10 +0000693 bytes_perint = bytes / timepassed_us; /* bytes/usec */
694
695 switch (itr_setting) {
696 case lowest_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000697 if (bytes_perint > 10)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000698 itr_setting = low_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000699 break;
700 case low_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000701 if (bytes_perint > 20)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000702 itr_setting = bulk_latency;
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000703 else if (bytes_perint <= 10)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000704 itr_setting = lowest_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000705 break;
706 case bulk_latency:
Alexander Duycke2c28ce2012-05-11 08:32:34 +0000707 if (bytes_perint <= 20)
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000708 itr_setting = low_latency;
Greg Rose92915f72010-01-09 02:24:10 +0000709 break;
710 }
711
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000712 /* clear work counters since we have the values we need */
713 ring_container->total_bytes = 0;
714 ring_container->total_packets = 0;
715
716 /* write updated itr to ring container */
717 ring_container->itr = itr_setting;
Greg Rose92915f72010-01-09 02:24:10 +0000718}
719
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000720static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
Greg Rose92915f72010-01-09 02:24:10 +0000721{
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000722 u32 new_itr = q_vector->itr;
723 u8 current_itr;
Greg Rose92915f72010-01-09 02:24:10 +0000724
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000725 ixgbevf_update_itr(q_vector, &q_vector->tx);
726 ixgbevf_update_itr(q_vector, &q_vector->rx);
Greg Rose92915f72010-01-09 02:24:10 +0000727
Alexander Duyck6b43c442012-05-11 08:32:45 +0000728 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
Greg Rose92915f72010-01-09 02:24:10 +0000729
730 switch (current_itr) {
731 /* counts and packets in update_itr are dependent on these numbers */
732 case lowest_latency:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000733 new_itr = IXGBE_100K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000734 break;
735 case low_latency:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000736 new_itr = IXGBE_20K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000737 break;
738 case bulk_latency:
739 default:
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000740 new_itr = IXGBE_8K_ITR;
Greg Rose92915f72010-01-09 02:24:10 +0000741 break;
742 }
743
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000744 if (new_itr != q_vector->itr) {
Greg Rose92915f72010-01-09 02:24:10 +0000745 /* do an exponential smoothing */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000746 new_itr = (10 * new_itr * q_vector->itr) /
747 ((9 * new_itr) + q_vector->itr);
748
749 /* save the algorithm value here */
750 q_vector->itr = new_itr;
751
752 ixgbevf_write_eitr(q_vector);
Greg Rose92915f72010-01-09 02:24:10 +0000753 }
Greg Rose92915f72010-01-09 02:24:10 +0000754}
755
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000756static irqreturn_t ixgbevf_msix_other(int irq, void *data)
Greg Rose92915f72010-01-09 02:24:10 +0000757{
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000758 struct ixgbevf_adapter *adapter = data;
Greg Rose92915f72010-01-09 02:24:10 +0000759 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +0000760
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000761 hw->mac.get_link_status = 1;
Greg Rose375b27c2012-01-18 22:13:31 +0000762
Don Skidmorec7bb4172013-10-01 04:33:49 -0700763 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
764 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rose3a2c4032012-02-01 01:28:15 +0000765
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000766 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
767
Greg Rose92915f72010-01-09 02:24:10 +0000768 return IRQ_HANDLED;
769}
770
Greg Rose92915f72010-01-09 02:24:10 +0000771/**
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000772 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
Greg Rose92915f72010-01-09 02:24:10 +0000773 * @irq: unused
774 * @data: pointer to our q_vector struct for this interrupt vector
775 **/
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000776static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
Greg Rose92915f72010-01-09 02:24:10 +0000777{
778 struct ixgbevf_q_vector *q_vector = data;
Greg Rose92915f72010-01-09 02:24:10 +0000779
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000780 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000781 if (q_vector->rx.ring || q_vector->tx.ring)
782 napi_schedule(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +0000783
784 return IRQ_HANDLED;
785}
786
787static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
788 int r_idx)
789{
790 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
791
Alexander Duyck6b43c442012-05-11 08:32:45 +0000792 a->rx_ring[r_idx].next = q_vector->rx.ring;
793 q_vector->rx.ring = &a->rx_ring[r_idx];
794 q_vector->rx.count++;
Greg Rose92915f72010-01-09 02:24:10 +0000795}
796
797static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
798 int t_idx)
799{
800 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
801
Alexander Duyck6b43c442012-05-11 08:32:45 +0000802 a->tx_ring[t_idx].next = q_vector->tx.ring;
803 q_vector->tx.ring = &a->tx_ring[t_idx];
804 q_vector->tx.count++;
Greg Rose92915f72010-01-09 02:24:10 +0000805}
806
807/**
808 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
809 * @adapter: board private structure to initialize
810 *
811 * This function maps descriptor rings to the queue-specific vectors
812 * we were allotted through the MSI-X enabling code. Ideally, we'd have
813 * one vector per ring/queue, but on a constrained vector budget, we
814 * group the rings as "efficiently" as possible. You would add new
815 * mapping configurations in here.
816 **/
817static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
818{
819 int q_vectors;
820 int v_start = 0;
821 int rxr_idx = 0, txr_idx = 0;
822 int rxr_remaining = adapter->num_rx_queues;
823 int txr_remaining = adapter->num_tx_queues;
824 int i, j;
825 int rqpv, tqpv;
826 int err = 0;
827
828 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
829
830 /*
831 * The ideal configuration...
832 * We have enough vectors to map one per queue.
833 */
834 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
835 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
836 map_vector_to_rxq(adapter, v_start, rxr_idx);
837
838 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
839 map_vector_to_txq(adapter, v_start, txr_idx);
840 goto out;
841 }
842
843 /*
844 * If we don't have enough vectors for a 1-to-1
845 * mapping, we'll have to group them so there are
846 * multiple queues per vector.
847 */
848 /* Re-adjusting *qpv takes care of the remainder. */
849 for (i = v_start; i < q_vectors; i++) {
850 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
851 for (j = 0; j < rqpv; j++) {
852 map_vector_to_rxq(adapter, i, rxr_idx);
853 rxr_idx++;
854 rxr_remaining--;
855 }
856 }
857 for (i = v_start; i < q_vectors; i++) {
858 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
859 for (j = 0; j < tqpv; j++) {
860 map_vector_to_txq(adapter, i, txr_idx);
861 txr_idx++;
862 txr_remaining--;
863 }
864 }
865
866out:
867 return err;
868}
869
870/**
871 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
872 * @adapter: board private structure
873 *
874 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
875 * interrupts from the kernel.
876 **/
877static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
878{
879 struct net_device *netdev = adapter->netdev;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000880 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
881 int vector, err;
Greg Rose92915f72010-01-09 02:24:10 +0000882 int ri = 0, ti = 0;
883
Greg Rose92915f72010-01-09 02:24:10 +0000884 for (vector = 0; vector < q_vectors; vector++) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000885 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
886 struct msix_entry *entry = &adapter->msix_entries[vector];
Greg Rose92915f72010-01-09 02:24:10 +0000887
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000888 if (q_vector->tx.ring && q_vector->rx.ring) {
889 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
890 "%s-%s-%d", netdev->name, "TxRx", ri++);
891 ti++;
892 } else if (q_vector->rx.ring) {
893 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
894 "%s-%s-%d", netdev->name, "rx", ri++);
895 } else if (q_vector->tx.ring) {
896 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
897 "%s-%s-%d", netdev->name, "tx", ti++);
Greg Rose92915f72010-01-09 02:24:10 +0000898 } else {
899 /* skip this unused q_vector */
900 continue;
901 }
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000902 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
903 q_vector->name, q_vector);
Greg Rose92915f72010-01-09 02:24:10 +0000904 if (err) {
905 hw_dbg(&adapter->hw,
906 "request_irq failed for MSIX interrupt "
907 "Error: %d\n", err);
908 goto free_queue_irqs;
909 }
910 }
911
Greg Rose92915f72010-01-09 02:24:10 +0000912 err = request_irq(adapter->msix_entries[vector].vector,
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000913 &ixgbevf_msix_other, 0, netdev->name, adapter);
Greg Rose92915f72010-01-09 02:24:10 +0000914 if (err) {
915 hw_dbg(&adapter->hw,
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000916 "request_irq for msix_other failed: %d\n", err);
Greg Rose92915f72010-01-09 02:24:10 +0000917 goto free_queue_irqs;
918 }
919
920 return 0;
921
922free_queue_irqs:
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000923 while (vector) {
924 vector--;
925 free_irq(adapter->msix_entries[vector].vector,
926 adapter->q_vector[vector]);
927 }
xunleera1f6c6b2013-03-05 07:44:20 +0000928 /* This failure is non-recoverable - it indicates the system is
929 * out of MSIX vector resources and the VF driver cannot run
930 * without them. Set the number of msix vectors to zero
931 * indicating that not enough can be allocated. The error
932 * will be returned to the user indicating device open failed.
933 * Any further attempts to force the driver to open will also
934 * fail. The only way to recover is to unload the driver and
935 * reload it again. If the system has recovered some MSIX
936 * vectors then it may succeed.
937 */
938 adapter->num_msix_vectors = 0;
Greg Rose92915f72010-01-09 02:24:10 +0000939 return err;
940}
941
942static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
943{
944 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
945
946 for (i = 0; i < q_vectors; i++) {
947 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
Alexander Duyck6b43c442012-05-11 08:32:45 +0000948 q_vector->rx.ring = NULL;
949 q_vector->tx.ring = NULL;
950 q_vector->rx.count = 0;
951 q_vector->tx.count = 0;
Greg Rose92915f72010-01-09 02:24:10 +0000952 }
953}
954
955/**
956 * ixgbevf_request_irq - initialize interrupts
957 * @adapter: board private structure
958 *
959 * Attempts to configure interrupts using the best available
960 * capabilities of the hardware and kernel.
961 **/
962static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
963{
964 int err = 0;
965
966 err = ixgbevf_request_msix_irqs(adapter);
967
968 if (err)
969 hw_dbg(&adapter->hw,
970 "request_irq failed, Error %d\n", err);
971
972 return err;
973}
974
975static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
976{
Greg Rose92915f72010-01-09 02:24:10 +0000977 int i, q_vectors;
978
979 q_vectors = adapter->num_msix_vectors;
Greg Rose92915f72010-01-09 02:24:10 +0000980 i = q_vectors - 1;
981
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000982 free_irq(adapter->msix_entries[i].vector, adapter);
Greg Rose92915f72010-01-09 02:24:10 +0000983 i--;
984
985 for (; i >= 0; i--) {
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000986 /* free only the irqs that were actually requested */
987 if (!adapter->q_vector[i]->rx.ring &&
988 !adapter->q_vector[i]->tx.ring)
989 continue;
990
Greg Rose92915f72010-01-09 02:24:10 +0000991 free_irq(adapter->msix_entries[i].vector,
992 adapter->q_vector[i]);
993 }
994
995 ixgbevf_reset_q_vectors(adapter);
996}
997
998/**
999 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1000 * @adapter: board private structure
1001 **/
1002static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1003{
Greg Rose92915f72010-01-09 02:24:10 +00001004 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001005 int i;
Greg Rose92915f72010-01-09 02:24:10 +00001006
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001007 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001008 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001009 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001010
1011 IXGBE_WRITE_FLUSH(hw);
1012
1013 for (i = 0; i < adapter->num_msix_vectors; i++)
1014 synchronize_irq(adapter->msix_entries[i].vector);
1015}
1016
1017/**
1018 * ixgbevf_irq_enable - Enable default interrupt generation settings
1019 * @adapter: board private structure
1020 **/
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001021static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001022{
1023 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001024
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001025 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1026 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1027 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
Greg Rose92915f72010-01-09 02:24:10 +00001028}
1029
1030/**
1031 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1032 * @adapter: board private structure
1033 *
1034 * Configure the Tx unit of the MAC after a reset.
1035 **/
1036static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1037{
1038 u64 tdba;
1039 struct ixgbe_hw *hw = &adapter->hw;
1040 u32 i, j, tdlen, txctrl;
1041
1042 /* Setup the HW Tx Head and Tail descriptor pointers */
1043 for (i = 0; i < adapter->num_tx_queues; i++) {
1044 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1045 j = ring->reg_idx;
1046 tdba = ring->dma;
1047 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1048 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1049 (tdba & DMA_BIT_MASK(32)));
1050 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1051 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1052 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1053 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1054 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1055 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1056 /* Disable Tx Head Writeback RO bit, since this hoses
1057 * bookkeeping if things aren't delivered in order.
1058 */
1059 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1060 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1061 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1062 }
1063}
1064
1065#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1066
1067static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1068{
1069 struct ixgbevf_ring *rx_ring;
1070 struct ixgbe_hw *hw = &adapter->hw;
1071 u32 srrctl;
1072
1073 rx_ring = &adapter->rx_ring[index];
1074
1075 srrctl = IXGBE_SRRCTL_DROP_EN;
1076
Alexander Duyck77d5dfc2012-05-11 08:32:19 +00001077 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
Greg Rose92915f72010-01-09 02:24:10 +00001078
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001079 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
1080 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1081
Greg Rose92915f72010-01-09 02:24:10 +00001082 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1083}
1084
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001085static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter)
1086{
1087 struct ixgbe_hw *hw = &adapter->hw;
1088 struct net_device *netdev = adapter->netdev;
1089 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1090 int i;
1091 u16 rx_buf_len;
1092
1093 /* notify the PF of our intent to use this size of frame */
1094 ixgbevf_rlpml_set_vf(hw, max_frame);
1095
1096 /* PF will allow an extra 4 bytes past for vlan tagged frames */
1097 max_frame += VLAN_HLEN;
1098
1099 /*
Greg Rose85624ca2012-11-13 04:03:19 +00001100 * Allocate buffer sizes that fit well into 32K and
1101 * take into account max frame size of 9.5K
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001102 */
1103 if ((hw->mac.type == ixgbe_mac_X540_vf) &&
1104 (max_frame <= MAXIMUM_ETHERNET_VLAN_SIZE))
1105 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
Greg Rose85624ca2012-11-13 04:03:19 +00001106 else if (max_frame <= IXGBEVF_RXBUFFER_2K)
1107 rx_buf_len = IXGBEVF_RXBUFFER_2K;
1108 else if (max_frame <= IXGBEVF_RXBUFFER_4K)
1109 rx_buf_len = IXGBEVF_RXBUFFER_4K;
1110 else if (max_frame <= IXGBEVF_RXBUFFER_8K)
1111 rx_buf_len = IXGBEVF_RXBUFFER_8K;
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001112 else
Greg Rose85624ca2012-11-13 04:03:19 +00001113 rx_buf_len = IXGBEVF_RXBUFFER_10K;
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001114
1115 for (i = 0; i < adapter->num_rx_queues; i++)
1116 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1117}
1118
Greg Rose92915f72010-01-09 02:24:10 +00001119/**
1120 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1121 * @adapter: board private structure
1122 *
1123 * Configure the Rx unit of the MAC after a reset.
1124 **/
1125static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1126{
1127 u64 rdba;
1128 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001129 int i, j;
1130 u32 rdlen;
Greg Rose92915f72010-01-09 02:24:10 +00001131
Alexander Duyck77d5dfc2012-05-11 08:32:19 +00001132 /* PSRTYPE must be initialized in 82599 */
1133 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
Alexander Duyckdd1fe112012-07-20 08:09:48 +00001134
1135 /* set_rx_buffer_len must be called before ring initialization */
1136 ixgbevf_set_rx_buffer_len(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001137
1138 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1139 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1140 * the Base and Length of the Rx Descriptor Ring */
1141 for (i = 0; i < adapter->num_rx_queues; i++) {
1142 rdba = adapter->rx_ring[i].dma;
1143 j = adapter->rx_ring[i].reg_idx;
1144 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1145 (rdba & DMA_BIT_MASK(32)));
1146 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1147 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1148 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1149 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1150 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1151 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
Greg Rose92915f72010-01-09 02:24:10 +00001152
1153 ixgbevf_configure_srrctl(adapter, j);
1154 }
1155}
1156
Patrick McHardy80d5c362013-04-19 02:04:28 +00001157static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1158 __be16 proto, u16 vid)
Greg Rose92915f72010-01-09 02:24:10 +00001159{
1160 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1161 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001162 int err;
1163
John Fastabend55fdd45b2012-10-01 14:52:20 +00001164 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001165
Greg Rose92915f72010-01-09 02:24:10 +00001166 /* add VID to filter table */
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001167 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001168
John Fastabend55fdd45b2012-10-01 14:52:20 +00001169 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001170
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001171 /* translate error return types so error makes sense */
1172 if (err == IXGBE_ERR_MBX)
1173 return -EIO;
1174
1175 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1176 return -EACCES;
1177
Jiri Pirkodadcd652011-07-21 03:25:09 +00001178 set_bit(vid, adapter->active_vlans);
Jiri Pirko8e586132011-12-08 19:52:37 -05001179
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001180 return err;
Greg Rose92915f72010-01-09 02:24:10 +00001181}
1182
Patrick McHardy80d5c362013-04-19 02:04:28 +00001183static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1184 __be16 proto, u16 vid)
Greg Rose92915f72010-01-09 02:24:10 +00001185{
1186 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1187 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001188 int err = -EOPNOTSUPP;
Greg Rose92915f72010-01-09 02:24:10 +00001189
John Fastabend55fdd45b2012-10-01 14:52:20 +00001190 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001191
Greg Rose92915f72010-01-09 02:24:10 +00001192 /* remove VID from filter table */
Greg Rose92fe0bf2012-11-02 05:50:47 +00001193 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001194
John Fastabend55fdd45b2012-10-01 14:52:20 +00001195 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001196
Jiri Pirkodadcd652011-07-21 03:25:09 +00001197 clear_bit(vid, adapter->active_vlans);
Jiri Pirko8e586132011-12-08 19:52:37 -05001198
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +00001199 return err;
Greg Rose92915f72010-01-09 02:24:10 +00001200}
1201
1202static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1203{
Jiri Pirkodadcd652011-07-21 03:25:09 +00001204 u16 vid;
Greg Rose92915f72010-01-09 02:24:10 +00001205
Jiri Pirkodadcd652011-07-21 03:25:09 +00001206 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
Patrick McHardy80d5c362013-04-19 02:04:28 +00001207 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1208 htons(ETH_P_8021Q), vid);
Greg Rose92915f72010-01-09 02:24:10 +00001209}
1210
Greg Rose46ec20f2011-05-13 01:33:42 +00001211static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1212{
1213 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1214 struct ixgbe_hw *hw = &adapter->hw;
1215 int count = 0;
1216
1217 if ((netdev_uc_count(netdev)) > 10) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00001218 pr_err("Too many unicast filters - No Space\n");
Greg Rose46ec20f2011-05-13 01:33:42 +00001219 return -ENOSPC;
1220 }
1221
1222 if (!netdev_uc_empty(netdev)) {
1223 struct netdev_hw_addr *ha;
1224 netdev_for_each_uc_addr(ha, netdev) {
1225 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1226 udelay(200);
1227 }
1228 } else {
1229 /*
1230 * If the list is empty then send message to PF driver to
1231 * clear all macvlans on this VF.
1232 */
1233 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1234 }
1235
1236 return count;
1237}
1238
Greg Rose92915f72010-01-09 02:24:10 +00001239/**
Greg Rosedee847f2012-11-02 05:50:57 +00001240 * ixgbevf_set_rx_mode - Multicast and unicast set
Greg Rose92915f72010-01-09 02:24:10 +00001241 * @netdev: network interface device structure
1242 *
1243 * The set_rx_method entry point is called whenever the multicast address
Greg Rosedee847f2012-11-02 05:50:57 +00001244 * list, unicast address list or the network interface flags are updated.
1245 * This routine is responsible for configuring the hardware for proper
1246 * multicast mode and configuring requested unicast filters.
Greg Rose92915f72010-01-09 02:24:10 +00001247 **/
1248static void ixgbevf_set_rx_mode(struct net_device *netdev)
1249{
1250 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1251 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose92915f72010-01-09 02:24:10 +00001252
John Fastabend55fdd45b2012-10-01 14:52:20 +00001253 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001254
Greg Rose92915f72010-01-09 02:24:10 +00001255 /* reprogram multicast list */
Greg Rose92fe0bf2012-11-02 05:50:47 +00001256 hw->mac.ops.update_mc_addr_list(hw, netdev);
Greg Rose46ec20f2011-05-13 01:33:42 +00001257
1258 ixgbevf_write_uc_addr_list(netdev);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001259
John Fastabend55fdd45b2012-10-01 14:52:20 +00001260 spin_unlock_bh(&adapter->mbx_lock);
Greg Rose92915f72010-01-09 02:24:10 +00001261}
1262
1263static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1264{
1265 int q_idx;
1266 struct ixgbevf_q_vector *q_vector;
1267 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1268
1269 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Greg Rose92915f72010-01-09 02:24:10 +00001270 q_vector = adapter->q_vector[q_idx];
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001271 napi_enable(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +00001272 }
1273}
1274
1275static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1276{
1277 int q_idx;
1278 struct ixgbevf_q_vector *q_vector;
1279 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1280
1281 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1282 q_vector = adapter->q_vector[q_idx];
Greg Rose92915f72010-01-09 02:24:10 +00001283 napi_disable(&q_vector->napi);
1284 }
1285}
1286
1287static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1288{
1289 struct net_device *netdev = adapter->netdev;
1290 int i;
1291
1292 ixgbevf_set_rx_mode(netdev);
1293
1294 ixgbevf_restore_vlan(adapter);
1295
1296 ixgbevf_configure_tx(adapter);
1297 ixgbevf_configure_rx(adapter);
1298 for (i = 0; i < adapter->num_rx_queues; i++) {
1299 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
Alexander Duyck18c63082012-05-11 08:33:11 +00001300 ixgbevf_alloc_rx_buffers(adapter, ring,
1301 IXGBE_DESC_UNUSED(ring));
Greg Rose92915f72010-01-09 02:24:10 +00001302 }
1303}
1304
Don Skidmore858c3dd2013-10-01 04:33:50 -07001305#define IXGBEVF_MAX_RX_DESC_POLL 10
1306static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1307 int rxr)
Greg Rose92915f72010-01-09 02:24:10 +00001308{
1309 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmore858c3dd2013-10-01 04:33:50 -07001310 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1311 u32 rxdctl;
Greg Rose92915f72010-01-09 02:24:10 +00001312 int j = adapter->rx_ring[rxr].reg_idx;
Greg Rose92915f72010-01-09 02:24:10 +00001313
Don Skidmore858c3dd2013-10-01 04:33:50 -07001314 do {
1315 usleep_range(1000, 2000);
1316 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1317 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
Greg Rose92915f72010-01-09 02:24:10 +00001318
Don Skidmore858c3dd2013-10-01 04:33:50 -07001319 if (!wait_loop)
1320 hw_dbg(hw, "RXDCTL.ENABLE queue %d not set while polling\n",
1321 rxr);
1322
1323 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1324 (adapter->rx_ring[rxr].count - 1));
1325}
1326
1327static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1328 struct ixgbevf_ring *ring)
1329{
1330 struct ixgbe_hw *hw = &adapter->hw;
1331 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1332 u32 rxdctl;
1333 u8 reg_idx = ring->reg_idx;
1334
1335 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1336 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1337
1338 /* write value back with RXDCTL.ENABLE bit cleared */
1339 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1340
1341 /* the hardware may take up to 100us to really disable the rx queue */
1342 do {
1343 udelay(10);
1344 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1345 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1346
1347 if (!wait_loop)
1348 hw_dbg(hw, "RXDCTL.ENABLE queue %d not cleared while polling\n",
1349 reg_idx);
Greg Rose92915f72010-01-09 02:24:10 +00001350}
1351
Greg Rose33bd9f62010-03-19 02:59:52 +00001352static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1353{
1354 /* Only save pre-reset stats if there are some */
1355 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1356 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1357 adapter->stats.base_vfgprc;
1358 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1359 adapter->stats.base_vfgptc;
1360 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1361 adapter->stats.base_vfgorc;
1362 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1363 adapter->stats.base_vfgotc;
1364 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1365 adapter->stats.base_vfmprc;
1366 }
1367}
1368
1369static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1370{
1371 struct ixgbe_hw *hw = &adapter->hw;
1372
1373 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1374 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1375 adapter->stats.last_vfgorc |=
1376 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1377 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1378 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1379 adapter->stats.last_vfgotc |=
1380 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1381 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1382
1383 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1384 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1385 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1386 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1387 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1388}
1389
Alexander Duyck31186782012-07-20 08:09:58 +00001390static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
1391{
1392 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck56e94092012-07-20 08:10:03 +00001393 int api[] = { ixgbe_mbox_api_11,
1394 ixgbe_mbox_api_10,
Alexander Duyck31186782012-07-20 08:09:58 +00001395 ixgbe_mbox_api_unknown };
1396 int err = 0, idx = 0;
1397
John Fastabend55fdd45b2012-10-01 14:52:20 +00001398 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck31186782012-07-20 08:09:58 +00001399
1400 while (api[idx] != ixgbe_mbox_api_unknown) {
1401 err = ixgbevf_negotiate_api_version(hw, api[idx]);
1402 if (!err)
1403 break;
1404 idx++;
1405 }
1406
John Fastabend55fdd45b2012-10-01 14:52:20 +00001407 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck31186782012-07-20 08:09:58 +00001408}
1409
Greg Rose795180d2012-04-17 04:29:34 +00001410static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001411{
1412 struct net_device *netdev = adapter->netdev;
1413 struct ixgbe_hw *hw = &adapter->hw;
1414 int i, j = 0;
1415 int num_rx_rings = adapter->num_rx_queues;
1416 u32 txdctl, rxdctl;
1417
1418 for (i = 0; i < adapter->num_tx_queues; i++) {
1419 j = adapter->tx_ring[i].reg_idx;
1420 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1421 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1422 txdctl |= (8 << 16);
1423 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1424 }
1425
1426 for (i = 0; i < adapter->num_tx_queues; i++) {
1427 j = adapter->tx_ring[i].reg_idx;
1428 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1429 txdctl |= IXGBE_TXDCTL_ENABLE;
1430 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1431 }
1432
1433 for (i = 0; i < num_rx_rings; i++) {
1434 j = adapter->rx_ring[i].reg_idx;
1435 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
Jiri Pirkodadcd652011-07-21 03:25:09 +00001436 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
Greg Rose69bfbec2011-01-26 01:06:12 +00001437 if (hw->mac.type == ixgbe_mac_X540_vf) {
1438 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1439 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
1440 IXGBE_RXDCTL_RLPML_EN);
1441 }
Greg Rose92915f72010-01-09 02:24:10 +00001442 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1443 ixgbevf_rx_desc_queue_enable(adapter, i);
1444 }
1445
1446 ixgbevf_configure_msix(adapter);
1447
John Fastabend55fdd45b2012-10-01 14:52:20 +00001448 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001449
Greg Rose92fe0bf2012-11-02 05:50:47 +00001450 if (is_valid_ether_addr(hw->mac.addr))
1451 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1452 else
1453 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
Greg Rose92915f72010-01-09 02:24:10 +00001454
John Fastabend55fdd45b2012-10-01 14:52:20 +00001455 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00001456
Greg Rose92915f72010-01-09 02:24:10 +00001457 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1458 ixgbevf_napi_enable_all(adapter);
1459
1460 /* enable transmits */
1461 netif_tx_start_all_queues(netdev);
1462
Greg Rose33bd9f62010-03-19 02:59:52 +00001463 ixgbevf_save_reset_stats(adapter);
1464 ixgbevf_init_last_counter_stats(adapter);
1465
Alexander Duyck4b2cd272012-08-02 01:16:59 +00001466 hw->mac.get_link_status = 1;
Greg Rose92915f72010-01-09 02:24:10 +00001467 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rose92915f72010-01-09 02:24:10 +00001468}
1469
Alexander Duyck56e94092012-07-20 08:10:03 +00001470static int ixgbevf_reset_queues(struct ixgbevf_adapter *adapter)
1471{
1472 struct ixgbe_hw *hw = &adapter->hw;
1473 struct ixgbevf_ring *rx_ring;
1474 unsigned int def_q = 0;
1475 unsigned int num_tcs = 0;
1476 unsigned int num_rx_queues = 1;
1477 int err, i;
1478
John Fastabend55fdd45b2012-10-01 14:52:20 +00001479 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck56e94092012-07-20 08:10:03 +00001480
1481 /* fetch queue configuration from the PF */
1482 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1483
John Fastabend55fdd45b2012-10-01 14:52:20 +00001484 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck56e94092012-07-20 08:10:03 +00001485
1486 if (err)
1487 return err;
1488
1489 if (num_tcs > 1) {
1490 /* update default Tx ring register index */
1491 adapter->tx_ring[0].reg_idx = def_q;
1492
1493 /* we need as many queues as traffic classes */
1494 num_rx_queues = num_tcs;
1495 }
1496
1497 /* nothing to do if we have the correct number of queues */
1498 if (adapter->num_rx_queues == num_rx_queues)
1499 return 0;
1500
1501 /* allocate new rings */
1502 rx_ring = kcalloc(num_rx_queues,
1503 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1504 if (!rx_ring)
1505 return -ENOMEM;
1506
1507 /* setup ring fields */
1508 for (i = 0; i < num_rx_queues; i++) {
1509 rx_ring[i].count = adapter->rx_ring_count;
1510 rx_ring[i].queue_index = i;
1511 rx_ring[i].reg_idx = i;
1512 rx_ring[i].dev = &adapter->pdev->dev;
1513 rx_ring[i].netdev = adapter->netdev;
1514
1515 /* allocate resources on the ring */
1516 err = ixgbevf_setup_rx_resources(adapter, &rx_ring[i]);
1517 if (err) {
1518 while (i) {
1519 i--;
1520 ixgbevf_free_rx_resources(adapter, &rx_ring[i]);
1521 }
1522 kfree(rx_ring);
1523 return err;
1524 }
1525 }
1526
1527 /* free the existing rings and queues */
1528 ixgbevf_free_all_rx_resources(adapter);
1529 adapter->num_rx_queues = 0;
1530 kfree(adapter->rx_ring);
1531
1532 /* move new rings into position on the adapter struct */
1533 adapter->rx_ring = rx_ring;
1534 adapter->num_rx_queues = num_rx_queues;
1535
1536 /* reset ring to vector mapping */
1537 ixgbevf_reset_q_vectors(adapter);
1538 ixgbevf_map_rings_to_vectors(adapter);
1539
1540 return 0;
1541}
1542
Greg Rose795180d2012-04-17 04:29:34 +00001543void ixgbevf_up(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00001544{
Greg Rose92915f72010-01-09 02:24:10 +00001545 struct ixgbe_hw *hw = &adapter->hw;
1546
Alexander Duyck56e94092012-07-20 08:10:03 +00001547 ixgbevf_reset_queues(adapter);
1548
Greg Rose92915f72010-01-09 02:24:10 +00001549 ixgbevf_configure(adapter);
1550
Greg Rose795180d2012-04-17 04:29:34 +00001551 ixgbevf_up_complete(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001552
1553 /* clear any pending interrupts, may auto mask */
1554 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1555
Alexander Duyck5f3600e2012-05-11 08:32:55 +00001556 ixgbevf_irq_enable(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001557}
1558
1559/**
1560 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1561 * @adapter: board private structure
1562 * @rx_ring: ring to free buffers from
1563 **/
1564static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1565 struct ixgbevf_ring *rx_ring)
1566{
1567 struct pci_dev *pdev = adapter->pdev;
1568 unsigned long size;
1569 unsigned int i;
1570
Greg Rosec0456c22010-01-22 22:47:18 +00001571 if (!rx_ring->rx_buffer_info)
1572 return;
Greg Rose92915f72010-01-09 02:24:10 +00001573
Greg Rosec0456c22010-01-22 22:47:18 +00001574 /* Free all the Rx ring sk_buffs */
Greg Rose92915f72010-01-09 02:24:10 +00001575 for (i = 0; i < rx_ring->count; i++) {
1576 struct ixgbevf_rx_buffer *rx_buffer_info;
1577
1578 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1579 if (rx_buffer_info->dma) {
Nick Nunley2a1f8792010-04-27 13:10:50 +00001580 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
Greg Rose92915f72010-01-09 02:24:10 +00001581 rx_ring->rx_buf_len,
Nick Nunley2a1f8792010-04-27 13:10:50 +00001582 DMA_FROM_DEVICE);
Greg Rose92915f72010-01-09 02:24:10 +00001583 rx_buffer_info->dma = 0;
1584 }
1585 if (rx_buffer_info->skb) {
1586 struct sk_buff *skb = rx_buffer_info->skb;
1587 rx_buffer_info->skb = NULL;
1588 do {
1589 struct sk_buff *this = skb;
Alexander Duyck5c60f812012-09-01 05:12:38 +00001590 skb = IXGBE_CB(skb)->prev;
Greg Rose92915f72010-01-09 02:24:10 +00001591 dev_kfree_skb(this);
1592 } while (skb);
1593 }
Greg Rose92915f72010-01-09 02:24:10 +00001594 }
1595
1596 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1597 memset(rx_ring->rx_buffer_info, 0, size);
1598
1599 /* Zero out the descriptor ring */
1600 memset(rx_ring->desc, 0, rx_ring->size);
1601
1602 rx_ring->next_to_clean = 0;
1603 rx_ring->next_to_use = 0;
1604
1605 if (rx_ring->head)
1606 writel(0, adapter->hw.hw_addr + rx_ring->head);
1607 if (rx_ring->tail)
1608 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1609}
1610
1611/**
1612 * ixgbevf_clean_tx_ring - Free Tx Buffers
1613 * @adapter: board private structure
1614 * @tx_ring: ring to be cleaned
1615 **/
1616static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1617 struct ixgbevf_ring *tx_ring)
1618{
1619 struct ixgbevf_tx_buffer *tx_buffer_info;
1620 unsigned long size;
1621 unsigned int i;
1622
Greg Rosec0456c22010-01-22 22:47:18 +00001623 if (!tx_ring->tx_buffer_info)
1624 return;
1625
Greg Rose92915f72010-01-09 02:24:10 +00001626 /* Free all the Tx ring sk_buffs */
Greg Rose92915f72010-01-09 02:24:10 +00001627 for (i = 0; i < tx_ring->count; i++) {
1628 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck70a10e22012-05-11 08:33:21 +00001629 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
Greg Rose92915f72010-01-09 02:24:10 +00001630 }
1631
1632 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1633 memset(tx_ring->tx_buffer_info, 0, size);
1634
1635 memset(tx_ring->desc, 0, tx_ring->size);
1636
1637 tx_ring->next_to_use = 0;
1638 tx_ring->next_to_clean = 0;
1639
1640 if (tx_ring->head)
1641 writel(0, adapter->hw.hw_addr + tx_ring->head);
1642 if (tx_ring->tail)
1643 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1644}
1645
1646/**
1647 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1648 * @adapter: board private structure
1649 **/
1650static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1651{
1652 int i;
1653
1654 for (i = 0; i < adapter->num_rx_queues; i++)
1655 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1656}
1657
1658/**
1659 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1660 * @adapter: board private structure
1661 **/
1662static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1663{
1664 int i;
1665
1666 for (i = 0; i < adapter->num_tx_queues; i++)
1667 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1668}
1669
1670void ixgbevf_down(struct ixgbevf_adapter *adapter)
1671{
1672 struct net_device *netdev = adapter->netdev;
1673 struct ixgbe_hw *hw = &adapter->hw;
1674 u32 txdctl;
1675 int i, j;
1676
1677 /* signal that we are down to the interrupt handler */
1678 set_bit(__IXGBEVF_DOWN, &adapter->state);
Don Skidmore858c3dd2013-10-01 04:33:50 -07001679
1680 /* disable all enabled rx queues */
1681 for (i = 0; i < adapter->num_rx_queues; i++)
1682 ixgbevf_disable_rx_queue(adapter, &adapter->rx_ring[i]);
Greg Rose92915f72010-01-09 02:24:10 +00001683
1684 netif_tx_disable(netdev);
1685
1686 msleep(10);
1687
1688 netif_tx_stop_all_queues(netdev);
1689
1690 ixgbevf_irq_disable(adapter);
1691
1692 ixgbevf_napi_disable_all(adapter);
1693
1694 del_timer_sync(&adapter->watchdog_timer);
1695 /* can't call flush scheduled work here because it can deadlock
1696 * if linkwatch_event tries to acquire the rtnl_lock which we are
1697 * holding */
1698 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1699 msleep(1);
1700
1701 /* disable transmits in the hardware now that interrupts are off */
1702 for (i = 0; i < adapter->num_tx_queues; i++) {
1703 j = adapter->tx_ring[i].reg_idx;
1704 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1705 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1706 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1707 }
1708
1709 netif_carrier_off(netdev);
1710
1711 if (!pci_channel_offline(adapter->pdev))
1712 ixgbevf_reset(adapter);
1713
1714 ixgbevf_clean_all_tx_rings(adapter);
1715 ixgbevf_clean_all_rx_rings(adapter);
1716}
1717
1718void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1719{
1720 WARN_ON(in_interrupt());
Greg Rosec0456c22010-01-22 22:47:18 +00001721
Greg Rose92915f72010-01-09 02:24:10 +00001722 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1723 msleep(1);
1724
Alexander Duyck4b2cd272012-08-02 01:16:59 +00001725 ixgbevf_down(adapter);
1726 ixgbevf_up(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00001727
1728 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1729}
1730
1731void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1732{
1733 struct ixgbe_hw *hw = &adapter->hw;
1734 struct net_device *netdev = adapter->netdev;
1735
Don Skidmore798e3812013-10-01 04:33:51 -07001736 if (hw->mac.ops.reset_hw(hw)) {
Greg Rose92915f72010-01-09 02:24:10 +00001737 hw_dbg(hw, "PF still resetting\n");
Don Skidmore798e3812013-10-01 04:33:51 -07001738 } else {
Greg Rose92915f72010-01-09 02:24:10 +00001739 hw->mac.ops.init_hw(hw);
Don Skidmore798e3812013-10-01 04:33:51 -07001740 ixgbevf_negotiate_api(adapter);
1741 }
Greg Rose92915f72010-01-09 02:24:10 +00001742
1743 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1744 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1745 netdev->addr_len);
1746 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1747 netdev->addr_len);
1748 }
1749}
1750
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001751static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1752 int vectors)
Greg Rose92915f72010-01-09 02:24:10 +00001753{
Emil Tantilova5f93372012-11-13 04:03:17 +00001754 int err = 0;
1755 int vector_threshold;
Greg Rose92915f72010-01-09 02:24:10 +00001756
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001757 /* We'll want at least 2 (vector_threshold):
1758 * 1) TxQ[0] + RxQ[0] handler
1759 * 2) Other (Link Status Change, etc.)
Greg Rose92915f72010-01-09 02:24:10 +00001760 */
1761 vector_threshold = MIN_MSIX_COUNT;
1762
1763 /* The more we get, the more we will assign to Tx/Rx Cleanup
1764 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1765 * Right now, we simply care about how many we'll get; we'll
1766 * set them up later while requesting irq's.
1767 */
1768 while (vectors >= vector_threshold) {
1769 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1770 vectors);
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001771 if (!err || err < 0) /* Success or a nasty failure. */
Greg Rose92915f72010-01-09 02:24:10 +00001772 break;
Greg Rose92915f72010-01-09 02:24:10 +00001773 else /* err == number of vectors we should try again with */
1774 vectors = err;
1775 }
1776
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001777 if (vectors < vector_threshold)
1778 err = -ENOMEM;
1779
1780 if (err) {
1781 dev_err(&adapter->pdev->dev,
1782 "Unable to allocate MSI-X interrupts\n");
Greg Rose92915f72010-01-09 02:24:10 +00001783 kfree(adapter->msix_entries);
1784 adapter->msix_entries = NULL;
1785 } else {
1786 /*
1787 * Adjust for only the vectors we'll use, which is minimum
1788 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1789 * vectors we were allocated.
1790 */
1791 adapter->num_msix_vectors = vectors;
1792 }
Greg Rosedee847f2012-11-02 05:50:57 +00001793
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001794 return err;
Greg Rose92915f72010-01-09 02:24:10 +00001795}
1796
Ben Hutchings49ce9c22012-07-10 10:56:00 +00001797/**
1798 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
Greg Rose92915f72010-01-09 02:24:10 +00001799 * @adapter: board private structure to initialize
1800 *
1801 * This is the top level queue allocation routine. The order here is very
1802 * important, starting with the "most" number of features turned on at once,
1803 * and ending with the smallest set of features. This way large combinations
1804 * can be allocated if they're turned on, and smaller combinations are the
1805 * fallthrough conditions.
1806 *
1807 **/
1808static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1809{
1810 /* Start with base case */
1811 adapter->num_rx_queues = 1;
1812 adapter->num_tx_queues = 1;
Greg Rose92915f72010-01-09 02:24:10 +00001813}
1814
1815/**
1816 * ixgbevf_alloc_queues - Allocate memory for all rings
1817 * @adapter: board private structure to initialize
1818 *
1819 * We allocate one ring per queue at run-time since we don't know the
1820 * number of queues at compile-time. The polling_netdev array is
1821 * intended for Multiqueue, but should work fine with a single queue.
1822 **/
1823static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1824{
1825 int i;
1826
1827 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1828 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1829 if (!adapter->tx_ring)
1830 goto err_tx_ring_allocation;
1831
1832 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1833 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1834 if (!adapter->rx_ring)
1835 goto err_rx_ring_allocation;
1836
1837 for (i = 0; i < adapter->num_tx_queues; i++) {
1838 adapter->tx_ring[i].count = adapter->tx_ring_count;
1839 adapter->tx_ring[i].queue_index = i;
Alexander Duyck56e94092012-07-20 08:10:03 +00001840 /* reg_idx may be remapped later by DCB config */
Greg Rose92915f72010-01-09 02:24:10 +00001841 adapter->tx_ring[i].reg_idx = i;
Alexander Duyckfb401952012-05-11 08:33:16 +00001842 adapter->tx_ring[i].dev = &adapter->pdev->dev;
1843 adapter->tx_ring[i].netdev = adapter->netdev;
Greg Rose92915f72010-01-09 02:24:10 +00001844 }
1845
1846 for (i = 0; i < adapter->num_rx_queues; i++) {
1847 adapter->rx_ring[i].count = adapter->rx_ring_count;
1848 adapter->rx_ring[i].queue_index = i;
1849 adapter->rx_ring[i].reg_idx = i;
Alexander Duyckfb401952012-05-11 08:33:16 +00001850 adapter->rx_ring[i].dev = &adapter->pdev->dev;
1851 adapter->rx_ring[i].netdev = adapter->netdev;
Greg Rose92915f72010-01-09 02:24:10 +00001852 }
1853
1854 return 0;
1855
1856err_rx_ring_allocation:
1857 kfree(adapter->tx_ring);
1858err_tx_ring_allocation:
1859 return -ENOMEM;
1860}
1861
1862/**
1863 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
1864 * @adapter: board private structure to initialize
1865 *
1866 * Attempt to configure the interrupts using the best available
1867 * capabilities of the hardware and the kernel.
1868 **/
1869static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
1870{
Greg Rose91e2b892012-10-03 00:57:23 +00001871 struct net_device *netdev = adapter->netdev;
Greg Rose92915f72010-01-09 02:24:10 +00001872 int err = 0;
1873 int vector, v_budget;
1874
1875 /*
1876 * It's easy to be greedy for MSI-X vectors, but it really
1877 * doesn't do us much good if we have a lot more vectors
1878 * than CPU's. So let's be conservative and only ask for
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001879 * (roughly) the same number of vectors as there are CPU's.
1880 * The default is to use pairs of vectors.
Greg Rose92915f72010-01-09 02:24:10 +00001881 */
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001882 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
1883 v_budget = min_t(int, v_budget, num_online_cpus());
1884 v_budget += NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00001885
1886 /* A failure in MSI-X entry allocation isn't fatal, but it does
1887 * mean we disable MSI-X capabilities of the adapter. */
1888 adapter->msix_entries = kcalloc(v_budget,
1889 sizeof(struct msix_entry), GFP_KERNEL);
1890 if (!adapter->msix_entries) {
1891 err = -ENOMEM;
1892 goto out;
1893 }
1894
1895 for (vector = 0; vector < v_budget; vector++)
1896 adapter->msix_entries[vector].entry = vector;
1897
Jakub Kicinskie45dd5f2012-11-13 04:03:16 +00001898 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
1899 if (err)
1900 goto out;
Greg Rose92915f72010-01-09 02:24:10 +00001901
Greg Rose91e2b892012-10-03 00:57:23 +00001902 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
1903 if (err)
1904 goto out;
1905
1906 err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
1907
Greg Rose92915f72010-01-09 02:24:10 +00001908out:
1909 return err;
1910}
1911
1912/**
1913 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
1914 * @adapter: board private structure to initialize
1915 *
1916 * We allocate one q_vector per queue interrupt. If allocation fails we
1917 * return -ENOMEM.
1918 **/
1919static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
1920{
1921 int q_idx, num_q_vectors;
1922 struct ixgbevf_q_vector *q_vector;
Greg Rose92915f72010-01-09 02:24:10 +00001923
1924 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00001925
1926 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
1927 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
1928 if (!q_vector)
1929 goto err_out;
1930 q_vector->adapter = adapter;
1931 q_vector->v_idx = q_idx;
Alexander Duyckfa71ae22012-05-11 08:32:50 +00001932 netif_napi_add(adapter->netdev, &q_vector->napi,
1933 ixgbevf_poll, 64);
Greg Rose92915f72010-01-09 02:24:10 +00001934 adapter->q_vector[q_idx] = q_vector;
1935 }
1936
1937 return 0;
1938
1939err_out:
1940 while (q_idx) {
1941 q_idx--;
1942 q_vector = adapter->q_vector[q_idx];
1943 netif_napi_del(&q_vector->napi);
1944 kfree(q_vector);
1945 adapter->q_vector[q_idx] = NULL;
1946 }
1947 return -ENOMEM;
1948}
1949
1950/**
1951 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
1952 * @adapter: board private structure to initialize
1953 *
1954 * This function frees the memory allocated to the q_vectors. In addition if
1955 * NAPI is enabled it will delete any references to the NAPI struct prior
1956 * to freeing the q_vector.
1957 **/
1958static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
1959{
John Fastabendf4477702012-09-16 08:19:46 +00001960 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Greg Rose92915f72010-01-09 02:24:10 +00001961
1962 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
1963 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
1964
1965 adapter->q_vector[q_idx] = NULL;
John Fastabendf4477702012-09-16 08:19:46 +00001966 netif_napi_del(&q_vector->napi);
Greg Rose92915f72010-01-09 02:24:10 +00001967 kfree(q_vector);
1968 }
1969}
1970
1971/**
1972 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
1973 * @adapter: board private structure
1974 *
1975 **/
1976static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
1977{
1978 pci_disable_msix(adapter->pdev);
1979 kfree(adapter->msix_entries);
1980 adapter->msix_entries = NULL;
Greg Rose92915f72010-01-09 02:24:10 +00001981}
1982
1983/**
1984 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
1985 * @adapter: board private structure to initialize
1986 *
1987 **/
1988static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
1989{
1990 int err;
1991
1992 /* Number of supported queues */
1993 ixgbevf_set_num_queues(adapter);
1994
1995 err = ixgbevf_set_interrupt_capability(adapter);
1996 if (err) {
1997 hw_dbg(&adapter->hw,
1998 "Unable to setup interrupt capabilities\n");
1999 goto err_set_interrupt;
2000 }
2001
2002 err = ixgbevf_alloc_q_vectors(adapter);
2003 if (err) {
2004 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2005 "vectors\n");
2006 goto err_alloc_q_vectors;
2007 }
2008
2009 err = ixgbevf_alloc_queues(adapter);
2010 if (err) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002011 pr_err("Unable to allocate memory for queues\n");
Greg Rose92915f72010-01-09 02:24:10 +00002012 goto err_alloc_queues;
2013 }
2014
2015 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2016 "Tx Queue count = %u\n",
2017 (adapter->num_rx_queues > 1) ? "Enabled" :
2018 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2019
2020 set_bit(__IXGBEVF_DOWN, &adapter->state);
2021
2022 return 0;
2023err_alloc_queues:
2024 ixgbevf_free_q_vectors(adapter);
2025err_alloc_q_vectors:
2026 ixgbevf_reset_interrupt_capability(adapter);
2027err_set_interrupt:
2028 return err;
2029}
2030
2031/**
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00002032 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2033 * @adapter: board private structure to clear interrupt scheme on
2034 *
2035 * We go through and clear interrupt specific resources and reset the structure
2036 * to pre-load conditions
2037 **/
2038static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2039{
2040 adapter->num_tx_queues = 0;
2041 adapter->num_rx_queues = 0;
2042
2043 ixgbevf_free_q_vectors(adapter);
2044 ixgbevf_reset_interrupt_capability(adapter);
2045}
2046
2047/**
Greg Rose92915f72010-01-09 02:24:10 +00002048 * ixgbevf_sw_init - Initialize general software structures
2049 * (struct ixgbevf_adapter)
2050 * @adapter: board private structure to initialize
2051 *
2052 * ixgbevf_sw_init initializes the Adapter private data structure.
2053 * Fields are initialized based on PCI device information and
2054 * OS network device settings (MTU size).
2055 **/
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05002056static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
Greg Rose92915f72010-01-09 02:24:10 +00002057{
2058 struct ixgbe_hw *hw = &adapter->hw;
2059 struct pci_dev *pdev = adapter->pdev;
Greg Rosee1941a72013-02-13 03:02:05 +00002060 struct net_device *netdev = adapter->netdev;
Greg Rose92915f72010-01-09 02:24:10 +00002061 int err;
2062
2063 /* PCI config space info */
2064
2065 hw->vendor_id = pdev->vendor;
2066 hw->device_id = pdev->device;
Sergei Shtylyovff938e42011-02-28 11:57:33 -08002067 hw->revision_id = pdev->revision;
Greg Rose92915f72010-01-09 02:24:10 +00002068 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2069 hw->subsystem_device_id = pdev->subsystem_device;
2070
2071 hw->mbx.ops.init_params(hw);
Alexander Duyck56e94092012-07-20 08:10:03 +00002072
2073 /* assume legacy case in which PF would only give VF 2 queues */
2074 hw->mac.max_tx_queues = 2;
2075 hw->mac.max_rx_queues = 2;
2076
Don Skidmore798e3812013-10-01 04:33:51 -07002077 /* lock to protect mailbox accesses */
2078 spin_lock_init(&adapter->mbx_lock);
2079
Greg Rose92915f72010-01-09 02:24:10 +00002080 err = hw->mac.ops.reset_hw(hw);
2081 if (err) {
2082 dev_info(&pdev->dev,
Greg Rosee1941a72013-02-13 03:02:05 +00002083 "PF still in reset state. Is the PF interface up?\n");
Greg Rose92915f72010-01-09 02:24:10 +00002084 } else {
2085 err = hw->mac.ops.init_hw(hw);
2086 if (err) {
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002087 pr_err("init_shared_code failed: %d\n", err);
Greg Rose92915f72010-01-09 02:24:10 +00002088 goto out;
2089 }
Don Skidmore798e3812013-10-01 04:33:51 -07002090 ixgbevf_negotiate_api(adapter);
Greg Rosee1941a72013-02-13 03:02:05 +00002091 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2092 if (err)
2093 dev_info(&pdev->dev, "Error reading MAC address\n");
2094 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2095 dev_info(&pdev->dev,
2096 "MAC address not assigned by administrator.\n");
2097 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2098 }
2099
2100 if (!is_valid_ether_addr(netdev->dev_addr)) {
2101 dev_info(&pdev->dev, "Assigning random MAC address\n");
2102 eth_hw_addr_random(netdev);
2103 memcpy(hw->mac.addr, netdev->dev_addr, netdev->addr_len);
Greg Rose92915f72010-01-09 02:24:10 +00002104 }
2105
2106 /* Enable dynamic interrupt throttling rates */
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002107 adapter->rx_itr_setting = 1;
2108 adapter->tx_itr_setting = 1;
Greg Rose92915f72010-01-09 02:24:10 +00002109
Greg Rose92915f72010-01-09 02:24:10 +00002110 /* set default ring sizes */
2111 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2112 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2113
Greg Rose92915f72010-01-09 02:24:10 +00002114 set_bit(__IXGBEVF_DOWN, &adapter->state);
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00002115 return 0;
Greg Rose92915f72010-01-09 02:24:10 +00002116
2117out:
2118 return err;
2119}
2120
Greg Rose92915f72010-01-09 02:24:10 +00002121#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2122 { \
2123 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2124 if (current_counter < last_counter) \
2125 counter += 0x100000000LL; \
2126 last_counter = current_counter; \
2127 counter &= 0xFFFFFFFF00000000LL; \
2128 counter |= current_counter; \
2129 }
2130
2131#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2132 { \
2133 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2134 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2135 u64 current_counter = (current_counter_msb << 32) | \
2136 current_counter_lsb; \
2137 if (current_counter < last_counter) \
2138 counter += 0x1000000000LL; \
2139 last_counter = current_counter; \
2140 counter &= 0xFFFFFFF000000000LL; \
2141 counter |= current_counter; \
2142 }
2143/**
2144 * ixgbevf_update_stats - Update the board statistics counters.
2145 * @adapter: board private structure
2146 **/
2147void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2148{
2149 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose55fb2772012-11-06 05:53:32 +00002150 int i;
Greg Rose92915f72010-01-09 02:24:10 +00002151
Greg Rose088245a2013-01-04 07:37:31 +00002152 if (!adapter->link_up)
2153 return;
2154
Greg Rose92915f72010-01-09 02:24:10 +00002155 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2156 adapter->stats.vfgprc);
2157 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2158 adapter->stats.vfgptc);
2159 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2160 adapter->stats.last_vfgorc,
2161 adapter->stats.vfgorc);
2162 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2163 adapter->stats.last_vfgotc,
2164 adapter->stats.vfgotc);
2165 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2166 adapter->stats.vfmprc);
Greg Rose55fb2772012-11-06 05:53:32 +00002167
2168 for (i = 0; i < adapter->num_rx_queues; i++) {
2169 adapter->hw_csum_rx_error +=
2170 adapter->rx_ring[i].hw_csum_rx_error;
2171 adapter->hw_csum_rx_good +=
2172 adapter->rx_ring[i].hw_csum_rx_good;
2173 adapter->rx_ring[i].hw_csum_rx_error = 0;
2174 adapter->rx_ring[i].hw_csum_rx_good = 0;
2175 }
Greg Rose92915f72010-01-09 02:24:10 +00002176}
2177
2178/**
2179 * ixgbevf_watchdog - Timer Call-back
2180 * @data: pointer to adapter cast into an unsigned long
2181 **/
2182static void ixgbevf_watchdog(unsigned long data)
2183{
2184 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2185 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002186 u32 eics = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002187 int i;
2188
2189 /*
2190 * Do the watchdog outside of interrupt context due to the lovely
2191 * delays that some of the newer hardware requires
2192 */
2193
2194 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2195 goto watchdog_short_circuit;
2196
2197 /* get one bit for every active tx/rx interrupt vector */
2198 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2199 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
Alexander Duyck6b43c442012-05-11 08:32:45 +00002200 if (qv->rx.ring || qv->tx.ring)
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002201 eics |= 1 << i;
Greg Rose92915f72010-01-09 02:24:10 +00002202 }
2203
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002204 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
Greg Rose92915f72010-01-09 02:24:10 +00002205
2206watchdog_short_circuit:
2207 schedule_work(&adapter->watchdog_task);
2208}
2209
2210/**
2211 * ixgbevf_tx_timeout - Respond to a Tx Hang
2212 * @netdev: network interface device structure
2213 **/
2214static void ixgbevf_tx_timeout(struct net_device *netdev)
2215{
2216 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2217
2218 /* Do the reset outside of interrupt context */
2219 schedule_work(&adapter->reset_task);
2220}
2221
2222static void ixgbevf_reset_task(struct work_struct *work)
2223{
2224 struct ixgbevf_adapter *adapter;
2225 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2226
2227 /* If we're already down or resetting, just bail */
2228 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2229 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2230 return;
2231
2232 adapter->tx_timeout_count++;
2233
2234 ixgbevf_reinit_locked(adapter);
2235}
2236
2237/**
2238 * ixgbevf_watchdog_task - worker thread to bring link up
2239 * @work: pointer to work_struct containing our data
2240 **/
2241static void ixgbevf_watchdog_task(struct work_struct *work)
2242{
2243 struct ixgbevf_adapter *adapter = container_of(work,
2244 struct ixgbevf_adapter,
2245 watchdog_task);
2246 struct net_device *netdev = adapter->netdev;
2247 struct ixgbe_hw *hw = &adapter->hw;
2248 u32 link_speed = adapter->link_speed;
2249 bool link_up = adapter->link_up;
Greg Rose92fe0bf2012-11-02 05:50:47 +00002250 s32 need_reset;
Greg Rose92915f72010-01-09 02:24:10 +00002251
2252 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2253
2254 /*
2255 * Always check the link on the watchdog because we have
2256 * no LSC interrupt
2257 */
Greg Rose92fe0bf2012-11-02 05:50:47 +00002258 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002259
Greg Rose92fe0bf2012-11-02 05:50:47 +00002260 need_reset = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002261
Greg Rose92fe0bf2012-11-02 05:50:47 +00002262 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00002263
Greg Rose92fe0bf2012-11-02 05:50:47 +00002264 if (need_reset) {
2265 adapter->link_up = link_up;
2266 adapter->link_speed = link_speed;
2267 netif_carrier_off(netdev);
2268 netif_tx_stop_all_queues(netdev);
2269 schedule_work(&adapter->reset_task);
2270 goto pf_has_reset;
Greg Rose92915f72010-01-09 02:24:10 +00002271 }
2272 adapter->link_up = link_up;
2273 adapter->link_speed = link_speed;
2274
2275 if (link_up) {
2276 if (!netif_carrier_ok(netdev)) {
Greg Roseb876a742013-01-19 06:40:22 +00002277 char *link_speed_string;
2278 switch (link_speed) {
2279 case IXGBE_LINK_SPEED_10GB_FULL:
2280 link_speed_string = "10 Gbps";
2281 break;
2282 case IXGBE_LINK_SPEED_1GB_FULL:
2283 link_speed_string = "1 Gbps";
2284 break;
2285 case IXGBE_LINK_SPEED_100_FULL:
2286 link_speed_string = "100 Mbps";
2287 break;
2288 default:
2289 link_speed_string = "unknown speed";
2290 break;
2291 }
Greg Rose6fe59672013-01-04 07:37:26 +00002292 dev_info(&adapter->pdev->dev,
Greg Roseb876a742013-01-19 06:40:22 +00002293 "NIC Link is Up, %s\n", link_speed_string);
Greg Rose92915f72010-01-09 02:24:10 +00002294 netif_carrier_on(netdev);
2295 netif_tx_wake_all_queues(netdev);
Greg Rose92915f72010-01-09 02:24:10 +00002296 }
2297 } else {
2298 adapter->link_up = false;
2299 adapter->link_speed = 0;
2300 if (netif_carrier_ok(netdev)) {
Greg Rose6fe59672013-01-04 07:37:26 +00002301 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
Greg Rose92915f72010-01-09 02:24:10 +00002302 netif_carrier_off(netdev);
2303 netif_tx_stop_all_queues(netdev);
2304 }
2305 }
2306
Greg Rose92915f72010-01-09 02:24:10 +00002307 ixgbevf_update_stats(adapter);
2308
Greg Rose33bd9f62010-03-19 02:59:52 +00002309pf_has_reset:
Greg Rose92915f72010-01-09 02:24:10 +00002310 /* Reset the timer */
2311 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2312 mod_timer(&adapter->watchdog_timer,
2313 round_jiffies(jiffies + (2 * HZ)));
2314
2315 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2316}
2317
2318/**
2319 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2320 * @adapter: board private structure
2321 * @tx_ring: Tx descriptor ring for a specific queue
2322 *
2323 * Free all transmit software resources
2324 **/
2325void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2326 struct ixgbevf_ring *tx_ring)
2327{
2328 struct pci_dev *pdev = adapter->pdev;
2329
Greg Rose92915f72010-01-09 02:24:10 +00002330 ixgbevf_clean_tx_ring(adapter, tx_ring);
2331
2332 vfree(tx_ring->tx_buffer_info);
2333 tx_ring->tx_buffer_info = NULL;
2334
Nick Nunley2a1f8792010-04-27 13:10:50 +00002335 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2336 tx_ring->dma);
Greg Rose92915f72010-01-09 02:24:10 +00002337
2338 tx_ring->desc = NULL;
2339}
2340
2341/**
2342 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2343 * @adapter: board private structure
2344 *
2345 * Free all transmit software resources
2346 **/
2347static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2348{
2349 int i;
2350
2351 for (i = 0; i < adapter->num_tx_queues; i++)
2352 if (adapter->tx_ring[i].desc)
2353 ixgbevf_free_tx_resources(adapter,
2354 &adapter->tx_ring[i]);
2355
2356}
2357
2358/**
2359 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2360 * @adapter: board private structure
2361 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2362 *
2363 * Return 0 on success, negative on failure
2364 **/
2365int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2366 struct ixgbevf_ring *tx_ring)
2367{
2368 struct pci_dev *pdev = adapter->pdev;
2369 int size;
2370
2371 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
Eric Dumazet89bf67f2010-11-22 00:15:06 +00002372 tx_ring->tx_buffer_info = vzalloc(size);
Greg Rose92915f72010-01-09 02:24:10 +00002373 if (!tx_ring->tx_buffer_info)
2374 goto err;
Greg Rose92915f72010-01-09 02:24:10 +00002375
2376 /* round up to nearest 4K */
2377 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2378 tx_ring->size = ALIGN(tx_ring->size, 4096);
2379
Nick Nunley2a1f8792010-04-27 13:10:50 +00002380 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2381 &tx_ring->dma, GFP_KERNEL);
Greg Rose92915f72010-01-09 02:24:10 +00002382 if (!tx_ring->desc)
2383 goto err;
2384
2385 tx_ring->next_to_use = 0;
2386 tx_ring->next_to_clean = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002387 return 0;
2388
2389err:
2390 vfree(tx_ring->tx_buffer_info);
2391 tx_ring->tx_buffer_info = NULL;
2392 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2393 "descriptor ring\n");
2394 return -ENOMEM;
2395}
2396
2397/**
2398 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2399 * @adapter: board private structure
2400 *
2401 * If this function returns with an error, then it's possible one or
2402 * more of the rings is populated (while the rest are not). It is the
2403 * callers duty to clean those orphaned rings.
2404 *
2405 * Return 0 on success, negative on failure
2406 **/
2407static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2408{
2409 int i, err = 0;
2410
2411 for (i = 0; i < adapter->num_tx_queues; i++) {
2412 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2413 if (!err)
2414 continue;
2415 hw_dbg(&adapter->hw,
2416 "Allocation for Tx Queue %u failed\n", i);
2417 break;
2418 }
2419
2420 return err;
2421}
2422
2423/**
2424 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2425 * @adapter: board private structure
2426 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2427 *
2428 * Returns 0 on success, negative on failure
2429 **/
2430int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2431 struct ixgbevf_ring *rx_ring)
2432{
2433 struct pci_dev *pdev = adapter->pdev;
2434 int size;
2435
2436 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
Eric Dumazet89bf67f2010-11-22 00:15:06 +00002437 rx_ring->rx_buffer_info = vzalloc(size);
Joe Perchese404dec2012-01-29 12:56:23 +00002438 if (!rx_ring->rx_buffer_info)
Greg Rose92915f72010-01-09 02:24:10 +00002439 goto alloc_failed;
Greg Rose92915f72010-01-09 02:24:10 +00002440
2441 /* Round up to nearest 4K */
2442 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2443 rx_ring->size = ALIGN(rx_ring->size, 4096);
2444
Nick Nunley2a1f8792010-04-27 13:10:50 +00002445 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2446 &rx_ring->dma, GFP_KERNEL);
Greg Rose92915f72010-01-09 02:24:10 +00002447
2448 if (!rx_ring->desc) {
Greg Rose92915f72010-01-09 02:24:10 +00002449 vfree(rx_ring->rx_buffer_info);
2450 rx_ring->rx_buffer_info = NULL;
2451 goto alloc_failed;
2452 }
2453
2454 rx_ring->next_to_clean = 0;
2455 rx_ring->next_to_use = 0;
2456
2457 return 0;
2458alloc_failed:
2459 return -ENOMEM;
2460}
2461
2462/**
2463 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2464 * @adapter: board private structure
2465 *
2466 * If this function returns with an error, then it's possible one or
2467 * more of the rings is populated (while the rest are not). It is the
2468 * callers duty to clean those orphaned rings.
2469 *
2470 * Return 0 on success, negative on failure
2471 **/
2472static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2473{
2474 int i, err = 0;
2475
2476 for (i = 0; i < adapter->num_rx_queues; i++) {
2477 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2478 if (!err)
2479 continue;
2480 hw_dbg(&adapter->hw,
2481 "Allocation for Rx Queue %u failed\n", i);
2482 break;
2483 }
2484 return err;
2485}
2486
2487/**
2488 * ixgbevf_free_rx_resources - Free Rx Resources
2489 * @adapter: board private structure
2490 * @rx_ring: ring to clean the resources from
2491 *
2492 * Free all receive software resources
2493 **/
2494void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2495 struct ixgbevf_ring *rx_ring)
2496{
2497 struct pci_dev *pdev = adapter->pdev;
2498
2499 ixgbevf_clean_rx_ring(adapter, rx_ring);
2500
2501 vfree(rx_ring->rx_buffer_info);
2502 rx_ring->rx_buffer_info = NULL;
2503
Nick Nunley2a1f8792010-04-27 13:10:50 +00002504 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2505 rx_ring->dma);
Greg Rose92915f72010-01-09 02:24:10 +00002506
2507 rx_ring->desc = NULL;
2508}
2509
2510/**
2511 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2512 * @adapter: board private structure
2513 *
2514 * Free all receive software resources
2515 **/
2516static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2517{
2518 int i;
2519
2520 for (i = 0; i < adapter->num_rx_queues; i++)
2521 if (adapter->rx_ring[i].desc)
2522 ixgbevf_free_rx_resources(adapter,
2523 &adapter->rx_ring[i]);
2524}
2525
Alexander Duyck56e94092012-07-20 08:10:03 +00002526static int ixgbevf_setup_queues(struct ixgbevf_adapter *adapter)
2527{
2528 struct ixgbe_hw *hw = &adapter->hw;
2529 struct ixgbevf_ring *rx_ring;
2530 unsigned int def_q = 0;
2531 unsigned int num_tcs = 0;
2532 unsigned int num_rx_queues = 1;
2533 int err, i;
2534
John Fastabend55fdd45b2012-10-01 14:52:20 +00002535 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck56e94092012-07-20 08:10:03 +00002536
2537 /* fetch queue configuration from the PF */
2538 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2539
John Fastabend55fdd45b2012-10-01 14:52:20 +00002540 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck56e94092012-07-20 08:10:03 +00002541
2542 if (err)
2543 return err;
2544
2545 if (num_tcs > 1) {
2546 /* update default Tx ring register index */
2547 adapter->tx_ring[0].reg_idx = def_q;
2548
2549 /* we need as many queues as traffic classes */
2550 num_rx_queues = num_tcs;
2551 }
2552
2553 /* nothing to do if we have the correct number of queues */
2554 if (adapter->num_rx_queues == num_rx_queues)
2555 return 0;
2556
2557 /* allocate new rings */
2558 rx_ring = kcalloc(num_rx_queues,
2559 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2560 if (!rx_ring)
2561 return -ENOMEM;
2562
2563 /* setup ring fields */
2564 for (i = 0; i < num_rx_queues; i++) {
2565 rx_ring[i].count = adapter->rx_ring_count;
2566 rx_ring[i].queue_index = i;
2567 rx_ring[i].reg_idx = i;
2568 rx_ring[i].dev = &adapter->pdev->dev;
2569 rx_ring[i].netdev = adapter->netdev;
2570 }
2571
2572 /* free the existing ring and queues */
2573 adapter->num_rx_queues = 0;
2574 kfree(adapter->rx_ring);
2575
2576 /* move new rings into position on the adapter struct */
2577 adapter->rx_ring = rx_ring;
2578 adapter->num_rx_queues = num_rx_queues;
2579
2580 return 0;
2581}
2582
Greg Rose92915f72010-01-09 02:24:10 +00002583/**
2584 * ixgbevf_open - Called when a network interface is made active
2585 * @netdev: network interface device structure
2586 *
2587 * Returns 0 on success, negative value on failure
2588 *
2589 * The open entry point is called when a network interface is made
2590 * active by the system (IFF_UP). At this point all resources needed
2591 * for transmit and receive operations are allocated, the interrupt
2592 * handler is registered with the OS, the watchdog timer is started,
2593 * and the stack is notified that the interface is ready.
2594 **/
2595static int ixgbevf_open(struct net_device *netdev)
2596{
2597 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2598 struct ixgbe_hw *hw = &adapter->hw;
2599 int err;
2600
xunleera1f6c6b2013-03-05 07:44:20 +00002601 /* A previous failure to open the device because of a lack of
2602 * available MSIX vector resources may have reset the number
2603 * of msix vectors variable to zero. The only way to recover
2604 * is to unload/reload the driver and hope that the system has
2605 * been able to recover some MSIX vector resources.
2606 */
2607 if (!adapter->num_msix_vectors)
2608 return -ENOMEM;
2609
Greg Rose92915f72010-01-09 02:24:10 +00002610 /* disallow open during test */
2611 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2612 return -EBUSY;
2613
2614 if (hw->adapter_stopped) {
2615 ixgbevf_reset(adapter);
2616 /* if adapter is still stopped then PF isn't up and
2617 * the vf can't start. */
2618 if (hw->adapter_stopped) {
2619 err = IXGBE_ERR_MBX;
Jeff Kirsherdbd96362011-10-21 19:38:18 +00002620 pr_err("Unable to start - perhaps the PF Driver isn't "
2621 "up yet\n");
Greg Rose92915f72010-01-09 02:24:10 +00002622 goto err_setup_reset;
2623 }
2624 }
2625
Alexander Duyck56e94092012-07-20 08:10:03 +00002626 /* setup queue reg_idx and Rx queue count */
2627 err = ixgbevf_setup_queues(adapter);
2628 if (err)
2629 goto err_setup_queues;
2630
Greg Rose92915f72010-01-09 02:24:10 +00002631 /* allocate transmit descriptors */
2632 err = ixgbevf_setup_all_tx_resources(adapter);
2633 if (err)
2634 goto err_setup_tx;
2635
2636 /* allocate receive descriptors */
2637 err = ixgbevf_setup_all_rx_resources(adapter);
2638 if (err)
2639 goto err_setup_rx;
2640
2641 ixgbevf_configure(adapter);
2642
2643 /*
2644 * Map the Tx/Rx rings to the vectors we were allotted.
2645 * if request_irq will be called in this function map_rings
2646 * must be called *before* up_complete
2647 */
2648 ixgbevf_map_rings_to_vectors(adapter);
2649
Greg Rose795180d2012-04-17 04:29:34 +00002650 ixgbevf_up_complete(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002651
2652 /* clear any pending interrupts, may auto mask */
2653 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2654 err = ixgbevf_request_irq(adapter);
2655 if (err)
2656 goto err_req_irq;
2657
Alexander Duyck5f3600e2012-05-11 08:32:55 +00002658 ixgbevf_irq_enable(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002659
2660 return 0;
2661
2662err_req_irq:
2663 ixgbevf_down(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00002664err_setup_rx:
2665 ixgbevf_free_all_rx_resources(adapter);
2666err_setup_tx:
2667 ixgbevf_free_all_tx_resources(adapter);
Alexander Duyck56e94092012-07-20 08:10:03 +00002668err_setup_queues:
Greg Rose92915f72010-01-09 02:24:10 +00002669 ixgbevf_reset(adapter);
2670
2671err_setup_reset:
2672
2673 return err;
2674}
2675
2676/**
2677 * ixgbevf_close - Disables a network interface
2678 * @netdev: network interface device structure
2679 *
2680 * Returns 0, this is not allowed to fail
2681 *
2682 * The close entry point is called when an interface is de-activated
2683 * by the OS. The hardware is still under the drivers control, but
2684 * needs to be disabled. A global MAC reset is issued to stop the
2685 * hardware, and all transmit and receive resources are freed.
2686 **/
2687static int ixgbevf_close(struct net_device *netdev)
2688{
2689 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2690
2691 ixgbevf_down(adapter);
2692 ixgbevf_free_irq(adapter);
2693
2694 ixgbevf_free_all_tx_resources(adapter);
2695 ixgbevf_free_all_rx_resources(adapter);
2696
2697 return 0;
2698}
2699
Alexander Duyck70a10e22012-05-11 08:33:21 +00002700static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
2701 u32 vlan_macip_lens, u32 type_tucmd,
2702 u32 mss_l4len_idx)
2703{
2704 struct ixgbe_adv_tx_context_desc *context_desc;
2705 u16 i = tx_ring->next_to_use;
2706
2707 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
2708
2709 i++;
2710 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2711
2712 /* set bits to identify this as an advanced context descriptor */
2713 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
2714
2715 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2716 context_desc->seqnum_seed = 0;
2717 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
2718 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2719}
2720
2721static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
Greg Rose92915f72010-01-09 02:24:10 +00002722 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2723{
Alexander Duyck70a10e22012-05-11 08:33:21 +00002724 u32 vlan_macip_lens, type_tucmd;
Greg Rose92915f72010-01-09 02:24:10 +00002725 u32 mss_l4len_idx, l4len;
2726
Alexander Duyck70a10e22012-05-11 08:33:21 +00002727 if (!skb_is_gso(skb))
2728 return 0;
Greg Rose92915f72010-01-09 02:24:10 +00002729
Alexander Duyck70a10e22012-05-11 08:33:21 +00002730 if (skb_header_cloned(skb)) {
2731 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2732 if (err)
2733 return err;
Greg Rose92915f72010-01-09 02:24:10 +00002734 }
2735
Alexander Duyck70a10e22012-05-11 08:33:21 +00002736 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2737 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
2738
2739 if (skb->protocol == htons(ETH_P_IP)) {
2740 struct iphdr *iph = ip_hdr(skb);
2741 iph->tot_len = 0;
2742 iph->check = 0;
2743 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2744 iph->daddr, 0,
2745 IPPROTO_TCP,
2746 0);
2747 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2748 } else if (skb_is_gso_v6(skb)) {
2749 ipv6_hdr(skb)->payload_len = 0;
2750 tcp_hdr(skb)->check =
2751 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2752 &ipv6_hdr(skb)->daddr,
2753 0, IPPROTO_TCP, 0);
2754 }
2755
2756 /* compute header lengths */
2757 l4len = tcp_hdrlen(skb);
2758 *hdr_len += l4len;
2759 *hdr_len = skb_transport_offset(skb) + l4len;
2760
2761 /* mss_l4len_id: use 1 as index for TSO */
2762 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
2763 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
2764 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
2765
2766 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
2767 vlan_macip_lens = skb_network_header_len(skb);
2768 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
2769 vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
2770
2771 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2772 type_tucmd, mss_l4len_idx);
2773
2774 return 1;
Greg Rose92915f72010-01-09 02:24:10 +00002775}
2776
Alexander Duyck70a10e22012-05-11 08:33:21 +00002777static bool ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
Greg Rose92915f72010-01-09 02:24:10 +00002778 struct sk_buff *skb, u32 tx_flags)
2779{
Alexander Duyck70a10e22012-05-11 08:33:21 +00002780 u32 vlan_macip_lens = 0;
2781 u32 mss_l4len_idx = 0;
2782 u32 type_tucmd = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002783
Alexander Duyck70a10e22012-05-11 08:33:21 +00002784 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2785 u8 l4_hdr = 0;
2786 switch (skb->protocol) {
2787 case __constant_htons(ETH_P_IP):
2788 vlan_macip_lens |= skb_network_header_len(skb);
2789 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
2790 l4_hdr = ip_hdr(skb)->protocol;
2791 break;
2792 case __constant_htons(ETH_P_IPV6):
2793 vlan_macip_lens |= skb_network_header_len(skb);
2794 l4_hdr = ipv6_hdr(skb)->nexthdr;
2795 break;
2796 default:
2797 if (unlikely(net_ratelimit())) {
2798 dev_warn(tx_ring->dev,
2799 "partial checksum but proto=%x!\n",
2800 skb->protocol);
Greg Rose92915f72010-01-09 02:24:10 +00002801 }
Alexander Duyck70a10e22012-05-11 08:33:21 +00002802 break;
Greg Rose92915f72010-01-09 02:24:10 +00002803 }
2804
Alexander Duyck70a10e22012-05-11 08:33:21 +00002805 switch (l4_hdr) {
2806 case IPPROTO_TCP:
2807 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2808 mss_l4len_idx = tcp_hdrlen(skb) <<
2809 IXGBE_ADVTXD_L4LEN_SHIFT;
2810 break;
2811 case IPPROTO_SCTP:
2812 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
2813 mss_l4len_idx = sizeof(struct sctphdr) <<
2814 IXGBE_ADVTXD_L4LEN_SHIFT;
2815 break;
2816 case IPPROTO_UDP:
2817 mss_l4len_idx = sizeof(struct udphdr) <<
2818 IXGBE_ADVTXD_L4LEN_SHIFT;
2819 break;
2820 default:
2821 if (unlikely(net_ratelimit())) {
2822 dev_warn(tx_ring->dev,
2823 "partial checksum but l4 proto=%x!\n",
2824 l4_hdr);
2825 }
2826 break;
2827 }
Greg Rose92915f72010-01-09 02:24:10 +00002828 }
2829
Alexander Duyck70a10e22012-05-11 08:33:21 +00002830 /* vlan_macip_lens: MACLEN, VLAN tag */
2831 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
2832 vlan_macip_lens |= tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
2833
2834 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
2835 type_tucmd, mss_l4len_idx);
2836
2837 return (skb->ip_summed == CHECKSUM_PARTIAL);
Greg Rose92915f72010-01-09 02:24:10 +00002838}
2839
Alexander Duyck70a10e22012-05-11 08:33:21 +00002840static int ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
Alexander Duycke757e3e2013-01-31 07:43:22 +00002841 struct sk_buff *skb, u32 tx_flags)
Greg Rose92915f72010-01-09 02:24:10 +00002842{
Greg Rose92915f72010-01-09 02:24:10 +00002843 struct ixgbevf_tx_buffer *tx_buffer_info;
2844 unsigned int len;
2845 unsigned int total = skb->len;
Kulikov Vasiliy2540ddb2010-07-15 08:45:57 +00002846 unsigned int offset = 0, size;
2847 int count = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002848 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2849 unsigned int f;
Greg Rose65deeed2010-03-24 09:35:42 +00002850 int i;
Greg Rose92915f72010-01-09 02:24:10 +00002851
2852 i = tx_ring->next_to_use;
2853
2854 len = min(skb_headlen(skb), total);
2855 while (len) {
2856 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2857 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2858
2859 tx_buffer_info->length = size;
2860 tx_buffer_info->mapped_as_page = false;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002861 tx_buffer_info->dma = dma_map_single(tx_ring->dev,
Greg Rose92915f72010-01-09 02:24:10 +00002862 skb->data + offset,
Nick Nunley2a1f8792010-04-27 13:10:50 +00002863 size, DMA_TO_DEVICE);
Alexander Duyck70a10e22012-05-11 08:33:21 +00002864 if (dma_mapping_error(tx_ring->dev, tx_buffer_info->dma))
Greg Rose92915f72010-01-09 02:24:10 +00002865 goto dma_error;
Greg Rose92915f72010-01-09 02:24:10 +00002866
2867 len -= size;
2868 total -= size;
2869 offset += size;
2870 count++;
2871 i++;
2872 if (i == tx_ring->count)
2873 i = 0;
2874 }
2875
2876 for (f = 0; f < nr_frags; f++) {
Eric Dumazet9e903e02011-10-18 21:00:24 +00002877 const struct skb_frag_struct *frag;
Greg Rose92915f72010-01-09 02:24:10 +00002878
2879 frag = &skb_shinfo(skb)->frags[f];
Eric Dumazet9e903e02011-10-18 21:00:24 +00002880 len = min((unsigned int)skb_frag_size(frag), total);
Ian Campbell877749b2011-08-29 23:18:26 +00002881 offset = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002882
2883 while (len) {
2884 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2885 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2886
2887 tx_buffer_info->length = size;
Ian Campbell877749b2011-08-29 23:18:26 +00002888 tx_buffer_info->dma =
Alexander Duyck70a10e22012-05-11 08:33:21 +00002889 skb_frag_dma_map(tx_ring->dev, frag,
Ian Campbell877749b2011-08-29 23:18:26 +00002890 offset, size, DMA_TO_DEVICE);
Alexander Duyck70a10e22012-05-11 08:33:21 +00002891 if (dma_mapping_error(tx_ring->dev,
2892 tx_buffer_info->dma))
Greg Rose92915f72010-01-09 02:24:10 +00002893 goto dma_error;
Greg Rose6132ee82012-09-21 00:14:14 +00002894 tx_buffer_info->mapped_as_page = true;
Greg Rose92915f72010-01-09 02:24:10 +00002895
2896 len -= size;
2897 total -= size;
2898 offset += size;
2899 count++;
2900 i++;
2901 if (i == tx_ring->count)
2902 i = 0;
2903 }
2904 if (total == 0)
2905 break;
2906 }
2907
2908 if (i == 0)
2909 i = tx_ring->count - 1;
2910 else
2911 i = i - 1;
2912 tx_ring->tx_buffer_info[i].skb = skb;
Greg Rose92915f72010-01-09 02:24:10 +00002913
2914 return count;
2915
2916dma_error:
Alexander Duyck70a10e22012-05-11 08:33:21 +00002917 dev_err(tx_ring->dev, "TX DMA map failed\n");
Greg Rose92915f72010-01-09 02:24:10 +00002918
2919 /* clear timestamp and dma mappings for failed tx_buffer_info map */
2920 tx_buffer_info->dma = 0;
Greg Rose92915f72010-01-09 02:24:10 +00002921 count--;
2922
2923 /* clear timestamp and dma mappings for remaining portion of packet */
2924 while (count >= 0) {
2925 count--;
2926 i--;
2927 if (i < 0)
2928 i += tx_ring->count;
2929 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck70a10e22012-05-11 08:33:21 +00002930 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
Greg Rose92915f72010-01-09 02:24:10 +00002931 }
2932
2933 return count;
2934}
2935
Alexander Duyck70a10e22012-05-11 08:33:21 +00002936static void ixgbevf_tx_queue(struct ixgbevf_ring *tx_ring, int tx_flags,
Alexander Duycke757e3e2013-01-31 07:43:22 +00002937 int count, unsigned int first, u32 paylen,
2938 u8 hdr_len)
Greg Rose92915f72010-01-09 02:24:10 +00002939{
2940 union ixgbe_adv_tx_desc *tx_desc = NULL;
2941 struct ixgbevf_tx_buffer *tx_buffer_info;
2942 u32 olinfo_status = 0, cmd_type_len = 0;
2943 unsigned int i;
2944
2945 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2946
2947 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2948
2949 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2950
2951 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2952 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2953
Alexander Duyck70a10e22012-05-11 08:33:21 +00002954 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2955 olinfo_status |= IXGBE_ADVTXD_POPTS_TXSM;
2956
Greg Rose92915f72010-01-09 02:24:10 +00002957 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2958 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2959
Greg Rose92915f72010-01-09 02:24:10 +00002960 /* use index 1 context for tso */
2961 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2962 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
Alexander Duyck70a10e22012-05-11 08:33:21 +00002963 olinfo_status |= IXGBE_ADVTXD_POPTS_IXSM;
Alexander Duyck70a10e22012-05-11 08:33:21 +00002964 }
2965
2966 /*
2967 * Check Context must be set if Tx switch is enabled, which it
2968 * always is for case where virtual functions are running
2969 */
2970 olinfo_status |= IXGBE_ADVTXD_CC;
Greg Rose92915f72010-01-09 02:24:10 +00002971
2972 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2973
2974 i = tx_ring->next_to_use;
2975 while (count--) {
2976 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck908421f2012-05-11 08:33:00 +00002977 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
Greg Rose92915f72010-01-09 02:24:10 +00002978 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2979 tx_desc->read.cmd_type_len =
2980 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2981 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2982 i++;
2983 if (i == tx_ring->count)
2984 i = 0;
2985 }
2986
2987 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2988
Alexander Duycke757e3e2013-01-31 07:43:22 +00002989 tx_ring->tx_buffer_info[first].time_stamp = jiffies;
2990
2991 /* Force memory writes to complete before letting h/w
2992 * know there are new descriptors to fetch. (Only
2993 * applicable for weak-ordered memory model archs,
2994 * such as IA-64).
2995 */
2996 wmb();
2997
2998 tx_ring->tx_buffer_info[first].next_to_watch = tx_desc;
Greg Rose92915f72010-01-09 02:24:10 +00002999 tx_ring->next_to_use = i;
Greg Rose92915f72010-01-09 02:24:10 +00003000}
3001
Alexander Duyckfb401952012-05-11 08:33:16 +00003002static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
Greg Rose92915f72010-01-09 02:24:10 +00003003{
Alexander Duyckfb401952012-05-11 08:33:16 +00003004 struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
Greg Rose92915f72010-01-09 02:24:10 +00003005
Alexander Duyckfb401952012-05-11 08:33:16 +00003006 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
Greg Rose92915f72010-01-09 02:24:10 +00003007 /* Herbert's original patch had:
3008 * smp_mb__after_netif_stop_queue();
3009 * but since that doesn't exist yet, just open code it. */
3010 smp_mb();
3011
3012 /* We need to check again in a case another CPU has just
3013 * made room available. */
3014 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3015 return -EBUSY;
3016
3017 /* A reprieve! - use start_queue because it doesn't call schedule */
Alexander Duyckfb401952012-05-11 08:33:16 +00003018 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
Greg Rose92915f72010-01-09 02:24:10 +00003019 ++adapter->restart_queue;
3020 return 0;
3021}
3022
Alexander Duyckfb401952012-05-11 08:33:16 +00003023static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
Greg Rose92915f72010-01-09 02:24:10 +00003024{
3025 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3026 return 0;
Alexander Duyckfb401952012-05-11 08:33:16 +00003027 return __ixgbevf_maybe_stop_tx(tx_ring, size);
Greg Rose92915f72010-01-09 02:24:10 +00003028}
3029
3030static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3031{
3032 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3033 struct ixgbevf_ring *tx_ring;
3034 unsigned int first;
3035 unsigned int tx_flags = 0;
3036 u8 hdr_len = 0;
3037 int r_idx = 0, tso;
Alexander Duyck35959902012-05-11 08:32:40 +00003038 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3039#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3040 unsigned short f;
3041#endif
Greg Rosef9d08f162012-10-02 00:50:52 +00003042 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
Ben Hutchings46acc462012-11-01 09:11:11 +00003043 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
Greg Rosef9d08f162012-10-02 00:50:52 +00003044 dev_kfree_skb(skb);
3045 return NETDEV_TX_OK;
3046 }
Greg Rose92915f72010-01-09 02:24:10 +00003047
3048 tx_ring = &adapter->tx_ring[r_idx];
3049
Alexander Duyck35959902012-05-11 08:32:40 +00003050 /*
3051 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3052 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3053 * + 2 desc gap to keep tail from touching head,
3054 * + 1 desc for context descriptor,
3055 * otherwise try next time
3056 */
3057#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3058 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3059 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3060#else
3061 count += skb_shinfo(skb)->nr_frags;
3062#endif
Alexander Duyckfb401952012-05-11 08:33:16 +00003063 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
Alexander Duyck35959902012-05-11 08:32:40 +00003064 adapter->tx_busy++;
3065 return NETDEV_TX_BUSY;
3066 }
3067
Jesse Grosseab6d182010-10-20 13:56:03 +00003068 if (vlan_tx_tag_present(skb)) {
Greg Rose92915f72010-01-09 02:24:10 +00003069 tx_flags |= vlan_tx_tag_get(skb);
3070 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3071 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3072 }
3073
Greg Rose92915f72010-01-09 02:24:10 +00003074 first = tx_ring->next_to_use;
3075
3076 if (skb->protocol == htons(ETH_P_IP))
3077 tx_flags |= IXGBE_TX_FLAGS_IPV4;
Alexander Duyck70a10e22012-05-11 08:33:21 +00003078 tso = ixgbevf_tso(tx_ring, skb, tx_flags, &hdr_len);
Greg Rose92915f72010-01-09 02:24:10 +00003079 if (tso < 0) {
3080 dev_kfree_skb_any(skb);
3081 return NETDEV_TX_OK;
3082 }
3083
3084 if (tso)
Alexander Duyck70a10e22012-05-11 08:33:21 +00003085 tx_flags |= IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_CSUM;
3086 else if (ixgbevf_tx_csum(tx_ring, skb, tx_flags))
Greg Rose92915f72010-01-09 02:24:10 +00003087 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3088
Alexander Duyck70a10e22012-05-11 08:33:21 +00003089 ixgbevf_tx_queue(tx_ring, tx_flags,
Alexander Duycke757e3e2013-01-31 07:43:22 +00003090 ixgbevf_tx_map(tx_ring, skb, tx_flags),
3091 first, skb->len, hdr_len);
Alexander Duyck70a10e22012-05-11 08:33:21 +00003092
3093 writel(tx_ring->next_to_use, adapter->hw.hw_addr + tx_ring->tail);
Greg Rose92915f72010-01-09 02:24:10 +00003094
Alexander Duyckfb401952012-05-11 08:33:16 +00003095 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
Greg Rose92915f72010-01-09 02:24:10 +00003096
3097 return NETDEV_TX_OK;
3098}
3099
3100/**
Greg Rose92915f72010-01-09 02:24:10 +00003101 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3102 * @netdev: network interface device structure
3103 * @p: pointer to an address structure
3104 *
3105 * Returns 0 on success, negative on failure
3106 **/
3107static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3108{
3109 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3110 struct ixgbe_hw *hw = &adapter->hw;
3111 struct sockaddr *addr = p;
3112
3113 if (!is_valid_ether_addr(addr->sa_data))
3114 return -EADDRNOTAVAIL;
3115
3116 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3117 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3118
John Fastabend55fdd45b2012-10-01 14:52:20 +00003119 spin_lock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00003120
Greg Rose92fe0bf2012-11-02 05:50:47 +00003121 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
Greg Rose92915f72010-01-09 02:24:10 +00003122
John Fastabend55fdd45b2012-10-01 14:52:20 +00003123 spin_unlock_bh(&adapter->mbx_lock);
Alexander Duyck1c55ed72012-05-11 08:33:06 +00003124
Greg Rose92915f72010-01-09 02:24:10 +00003125 return 0;
3126}
3127
3128/**
3129 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3130 * @netdev: network interface device structure
3131 * @new_mtu: new value for maximum frame size
3132 *
3133 * Returns 0 on success, negative on failure
3134 **/
3135static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3136{
3137 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3138 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
Greg Rose69bfbec2011-01-26 01:06:12 +00003139 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
Greg Rose69bfbec2011-01-26 01:06:12 +00003140
Alexander Duyck56e94092012-07-20 08:10:03 +00003141 switch (adapter->hw.api_version) {
3142 case ixgbe_mbox_api_11:
Greg Rose69bfbec2011-01-26 01:06:12 +00003143 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
Alexander Duyck56e94092012-07-20 08:10:03 +00003144 break;
3145 default:
3146 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
3147 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3148 break;
3149 }
Greg Rose92915f72010-01-09 02:24:10 +00003150
3151 /* MTU < 68 is an error and causes problems on some kernels */
Greg Rose69bfbec2011-01-26 01:06:12 +00003152 if ((new_mtu < 68) || (max_frame > max_possible_frame))
Greg Rose92915f72010-01-09 02:24:10 +00003153 return -EINVAL;
3154
3155 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3156 netdev->mtu, new_mtu);
3157 /* must set new MTU before calling down or up */
3158 netdev->mtu = new_mtu;
3159
3160 if (netif_running(netdev))
3161 ixgbevf_reinit_locked(adapter);
3162
3163 return 0;
3164}
3165
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003166static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
Greg Rose92915f72010-01-09 02:24:10 +00003167{
3168 struct net_device *netdev = pci_get_drvdata(pdev);
3169 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003170#ifdef CONFIG_PM
3171 int retval = 0;
3172#endif
Greg Rose92915f72010-01-09 02:24:10 +00003173
3174 netif_device_detach(netdev);
3175
3176 if (netif_running(netdev)) {
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003177 rtnl_lock();
Greg Rose92915f72010-01-09 02:24:10 +00003178 ixgbevf_down(adapter);
3179 ixgbevf_free_irq(adapter);
3180 ixgbevf_free_all_tx_resources(adapter);
3181 ixgbevf_free_all_rx_resources(adapter);
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003182 rtnl_unlock();
Greg Rose92915f72010-01-09 02:24:10 +00003183 }
3184
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003185 ixgbevf_clear_interrupt_scheme(adapter);
3186
3187#ifdef CONFIG_PM
3188 retval = pci_save_state(pdev);
3189 if (retval)
3190 return retval;
3191
3192#endif
3193 pci_disable_device(pdev);
3194
3195 return 0;
3196}
3197
3198#ifdef CONFIG_PM
3199static int ixgbevf_resume(struct pci_dev *pdev)
3200{
3201 struct ixgbevf_adapter *adapter = pci_get_drvdata(pdev);
3202 struct net_device *netdev = adapter->netdev;
3203 u32 err;
3204
3205 pci_set_power_state(pdev, PCI_D0);
3206 pci_restore_state(pdev);
3207 /*
3208 * pci_restore_state clears dev->state_saved so call
3209 * pci_save_state to restore it.
3210 */
Greg Rose92915f72010-01-09 02:24:10 +00003211 pci_save_state(pdev);
Greg Rose92915f72010-01-09 02:24:10 +00003212
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003213 err = pci_enable_device_mem(pdev);
3214 if (err) {
3215 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3216 return err;
3217 }
3218 pci_set_master(pdev);
3219
Don Skidmore798e3812013-10-01 04:33:51 -07003220 ixgbevf_reset(adapter);
3221
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003222 rtnl_lock();
3223 err = ixgbevf_init_interrupt_scheme(adapter);
3224 rtnl_unlock();
3225 if (err) {
3226 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3227 return err;
3228 }
3229
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003230 if (netif_running(netdev)) {
3231 err = ixgbevf_open(netdev);
3232 if (err)
3233 return err;
3234 }
3235
3236 netif_device_attach(netdev);
3237
3238 return err;
3239}
3240
3241#endif /* CONFIG_PM */
3242static void ixgbevf_shutdown(struct pci_dev *pdev)
3243{
3244 ixgbevf_suspend(pdev, PMSG_SUSPEND);
Greg Rose92915f72010-01-09 02:24:10 +00003245}
3246
Eric Dumazet4197aa72011-06-22 05:01:35 +00003247static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3248 struct rtnl_link_stats64 *stats)
3249{
3250 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3251 unsigned int start;
3252 u64 bytes, packets;
3253 const struct ixgbevf_ring *ring;
3254 int i;
3255
3256 ixgbevf_update_stats(adapter);
3257
3258 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3259
3260 for (i = 0; i < adapter->num_rx_queues; i++) {
3261 ring = &adapter->rx_ring[i];
3262 do {
3263 start = u64_stats_fetch_begin_bh(&ring->syncp);
3264 bytes = ring->total_bytes;
3265 packets = ring->total_packets;
3266 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3267 stats->rx_bytes += bytes;
3268 stats->rx_packets += packets;
3269 }
3270
3271 for (i = 0; i < adapter->num_tx_queues; i++) {
3272 ring = &adapter->tx_ring[i];
3273 do {
3274 start = u64_stats_fetch_begin_bh(&ring->syncp);
3275 bytes = ring->total_bytes;
3276 packets = ring->total_packets;
3277 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
3278 stats->tx_bytes += bytes;
3279 stats->tx_packets += packets;
3280 }
3281
3282 return stats;
3283}
3284
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003285static const struct net_device_ops ixgbevf_netdev_ops = {
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003286 .ndo_open = ixgbevf_open,
3287 .ndo_stop = ixgbevf_close,
3288 .ndo_start_xmit = ixgbevf_xmit_frame,
3289 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
Eric Dumazet4197aa72011-06-22 05:01:35 +00003290 .ndo_get_stats64 = ixgbevf_get_stats,
Greg Rose92915f72010-01-09 02:24:10 +00003291 .ndo_validate_addr = eth_validate_addr,
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003292 .ndo_set_mac_address = ixgbevf_set_mac,
3293 .ndo_change_mtu = ixgbevf_change_mtu,
3294 .ndo_tx_timeout = ixgbevf_tx_timeout,
Stephen Hemmingerc12db762011-06-09 02:58:39 +00003295 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3296 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
Greg Rose92915f72010-01-09 02:24:10 +00003297};
Greg Rose92915f72010-01-09 02:24:10 +00003298
3299static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3300{
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003301 dev->netdev_ops = &ixgbevf_netdev_ops;
Greg Rose92915f72010-01-09 02:24:10 +00003302 ixgbevf_set_ethtool_ops(dev);
3303 dev->watchdog_timeo = 5 * HZ;
3304}
3305
3306/**
3307 * ixgbevf_probe - Device Initialization Routine
3308 * @pdev: PCI device information struct
3309 * @ent: entry in ixgbevf_pci_tbl
3310 *
3311 * Returns 0 on success, negative on failure
3312 *
3313 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3314 * The OS initialization, configuring of the adapter private structure,
3315 * and a hardware reset occur.
3316 **/
Greg Kroah-Hartman1dd06ae2012-12-06 14:30:56 +00003317static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Greg Rose92915f72010-01-09 02:24:10 +00003318{
3319 struct net_device *netdev;
3320 struct ixgbevf_adapter *adapter = NULL;
3321 struct ixgbe_hw *hw = NULL;
3322 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3323 static int cards_found;
3324 int err, pci_using_dac;
3325
3326 err = pci_enable_device(pdev);
3327 if (err)
3328 return err;
3329
Nick Nunley2a1f8792010-04-27 13:10:50 +00003330 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3331 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
Greg Rose92915f72010-01-09 02:24:10 +00003332 pci_using_dac = 1;
3333 } else {
Nick Nunley2a1f8792010-04-27 13:10:50 +00003334 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
Greg Rose92915f72010-01-09 02:24:10 +00003335 if (err) {
Nick Nunley2a1f8792010-04-27 13:10:50 +00003336 err = dma_set_coherent_mask(&pdev->dev,
3337 DMA_BIT_MASK(32));
Greg Rose92915f72010-01-09 02:24:10 +00003338 if (err) {
3339 dev_err(&pdev->dev, "No usable DMA "
3340 "configuration, aborting\n");
3341 goto err_dma;
3342 }
3343 }
3344 pci_using_dac = 0;
3345 }
3346
3347 err = pci_request_regions(pdev, ixgbevf_driver_name);
3348 if (err) {
3349 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3350 goto err_pci_reg;
3351 }
3352
3353 pci_set_master(pdev);
3354
Greg Rose92915f72010-01-09 02:24:10 +00003355 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3356 MAX_TX_QUEUES);
Greg Rose92915f72010-01-09 02:24:10 +00003357 if (!netdev) {
3358 err = -ENOMEM;
3359 goto err_alloc_etherdev;
3360 }
3361
3362 SET_NETDEV_DEV(netdev, &pdev->dev);
3363
3364 pci_set_drvdata(pdev, netdev);
3365 adapter = netdev_priv(netdev);
3366
3367 adapter->netdev = netdev;
3368 adapter->pdev = pdev;
3369 hw = &adapter->hw;
3370 hw->back = adapter;
stephen hemmingerb3f4d592012-03-13 06:04:20 +00003371 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
Greg Rose92915f72010-01-09 02:24:10 +00003372
3373 /*
3374 * call save state here in standalone driver because it relies on
3375 * adapter struct to exist, and needs to call netdev_priv
3376 */
3377 pci_save_state(pdev);
3378
3379 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3380 pci_resource_len(pdev, 0));
3381 if (!hw->hw_addr) {
3382 err = -EIO;
3383 goto err_ioremap;
3384 }
3385
3386 ixgbevf_assign_netdev_ops(netdev);
3387
3388 adapter->bd_number = cards_found;
3389
3390 /* Setup hw api */
3391 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3392 hw->mac.type = ii->mac;
3393
3394 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
Greg Rosef416dfc2011-06-08 07:32:38 +00003395 sizeof(struct ixgbe_mbx_operations));
Greg Rose92915f72010-01-09 02:24:10 +00003396
Greg Rose92915f72010-01-09 02:24:10 +00003397 /* setup the private structure */
3398 err = ixgbevf_sw_init(adapter);
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00003399 if (err)
3400 goto err_sw_init;
3401
3402 /* The HW MAC address was set and/or determined in sw_init */
Danny Kukawka1a0d6ae2012-02-09 09:48:54 +00003403 if (!is_valid_ether_addr(netdev->dev_addr)) {
3404 pr_err("invalid MAC address\n");
3405 err = -EIO;
3406 goto err_sw_init;
3407 }
Greg Rose92915f72010-01-09 02:24:10 +00003408
Michał Mirosław471a76d2011-06-08 08:53:03 +00003409 netdev->hw_features = NETIF_F_SG |
Greg Rose92915f72010-01-09 02:24:10 +00003410 NETIF_F_IP_CSUM |
Michał Mirosław471a76d2011-06-08 08:53:03 +00003411 NETIF_F_IPV6_CSUM |
3412 NETIF_F_TSO |
3413 NETIF_F_TSO6 |
3414 NETIF_F_RXCSUM;
3415
3416 netdev->features = netdev->hw_features |
Patrick McHardyf6469682013-04-19 02:04:27 +00003417 NETIF_F_HW_VLAN_CTAG_TX |
3418 NETIF_F_HW_VLAN_CTAG_RX |
3419 NETIF_F_HW_VLAN_CTAG_FILTER;
Greg Rose92915f72010-01-09 02:24:10 +00003420
Greg Rose92915f72010-01-09 02:24:10 +00003421 netdev->vlan_features |= NETIF_F_TSO;
3422 netdev->vlan_features |= NETIF_F_TSO6;
3423 netdev->vlan_features |= NETIF_F_IP_CSUM;
Alexander Duyck3bfacf92010-08-02 14:59:04 +00003424 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
Greg Rose92915f72010-01-09 02:24:10 +00003425 netdev->vlan_features |= NETIF_F_SG;
3426
3427 if (pci_using_dac)
3428 netdev->features |= NETIF_F_HIGHDMA;
3429
Jiri Pirko01789342011-08-16 06:29:00 +00003430 netdev->priv_flags |= IFF_UNICAST_FLT;
3431
Greg Rose92915f72010-01-09 02:24:10 +00003432 init_timer(&adapter->watchdog_timer);
Joe Perchesc061b182010-08-23 18:20:03 +00003433 adapter->watchdog_timer.function = ixgbevf_watchdog;
Greg Rose92915f72010-01-09 02:24:10 +00003434 adapter->watchdog_timer.data = (unsigned long)adapter;
3435
3436 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3437 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3438
3439 err = ixgbevf_init_interrupt_scheme(adapter);
3440 if (err)
3441 goto err_sw_init;
3442
Greg Rose92915f72010-01-09 02:24:10 +00003443 strcpy(netdev->name, "eth%d");
3444
3445 err = register_netdev(netdev);
3446 if (err)
3447 goto err_register;
3448
Greg Rose5d426ad2010-11-16 19:27:19 -08003449 netif_carrier_off(netdev);
3450
Greg Rose33bd9f62010-03-19 02:59:52 +00003451 ixgbevf_init_last_counter_stats(adapter);
3452
Greg Rose92915f72010-01-09 02:24:10 +00003453 /* print the MAC address */
Danny Kukawkaf794e7e2012-02-24 03:45:56 +00003454 hw_dbg(hw, "%pM\n", netdev->dev_addr);
Greg Rose92915f72010-01-09 02:24:10 +00003455
3456 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3457
Greg Rose92915f72010-01-09 02:24:10 +00003458 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3459 cards_found++;
3460 return 0;
3461
3462err_register:
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003463 ixgbevf_clear_interrupt_scheme(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00003464err_sw_init:
3465 ixgbevf_reset_interrupt_capability(adapter);
3466 iounmap(hw->hw_addr);
3467err_ioremap:
3468 free_netdev(netdev);
3469err_alloc_etherdev:
3470 pci_release_regions(pdev);
3471err_pci_reg:
3472err_dma:
3473 pci_disable_device(pdev);
3474 return err;
3475}
3476
3477/**
3478 * ixgbevf_remove - Device Removal Routine
3479 * @pdev: PCI device information struct
3480 *
3481 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3482 * that it should release a PCI device. The could be caused by a
3483 * Hot-Plug event, or because the driver is going to be removed from
3484 * memory.
3485 **/
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05003486static void ixgbevf_remove(struct pci_dev *pdev)
Greg Rose92915f72010-01-09 02:24:10 +00003487{
3488 struct net_device *netdev = pci_get_drvdata(pdev);
3489 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3490
3491 set_bit(__IXGBEVF_DOWN, &adapter->state);
3492
3493 del_timer_sync(&adapter->watchdog_timer);
3494
Tejun Heo23f333a2010-12-12 16:45:14 +01003495 cancel_work_sync(&adapter->reset_task);
Greg Rose92915f72010-01-09 02:24:10 +00003496 cancel_work_sync(&adapter->watchdog_task);
3497
Alexander Duyckfd13a9a2012-05-11 08:32:24 +00003498 if (netdev->reg_state == NETREG_REGISTERED)
Greg Rose92915f72010-01-09 02:24:10 +00003499 unregister_netdev(netdev);
Greg Rose92915f72010-01-09 02:24:10 +00003500
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003501 ixgbevf_clear_interrupt_scheme(adapter);
Greg Rose92915f72010-01-09 02:24:10 +00003502 ixgbevf_reset_interrupt_capability(adapter);
3503
3504 iounmap(adapter->hw.hw_addr);
3505 pci_release_regions(pdev);
3506
3507 hw_dbg(&adapter->hw, "Remove complete\n");
3508
3509 kfree(adapter->tx_ring);
3510 kfree(adapter->rx_ring);
3511
3512 free_netdev(netdev);
3513
3514 pci_disable_device(pdev);
3515}
3516
Alexander Duyck9f19f312012-05-11 08:33:32 +00003517/**
3518 * ixgbevf_io_error_detected - called when PCI error is detected
3519 * @pdev: Pointer to PCI device
3520 * @state: The current pci connection state
3521 *
3522 * This function is called after a PCI bus error affecting
3523 * this device has been detected.
3524 */
3525static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
3526 pci_channel_state_t state)
3527{
3528 struct net_device *netdev = pci_get_drvdata(pdev);
3529 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3530
3531 netif_device_detach(netdev);
3532
3533 if (state == pci_channel_io_perm_failure)
3534 return PCI_ERS_RESULT_DISCONNECT;
3535
3536 if (netif_running(netdev))
3537 ixgbevf_down(adapter);
3538
3539 pci_disable_device(pdev);
3540
3541 /* Request a slot slot reset. */
3542 return PCI_ERS_RESULT_NEED_RESET;
3543}
3544
3545/**
3546 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
3547 * @pdev: Pointer to PCI device
3548 *
3549 * Restart the card from scratch, as if from a cold-boot. Implementation
3550 * resembles the first-half of the ixgbevf_resume routine.
3551 */
3552static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
3553{
3554 struct net_device *netdev = pci_get_drvdata(pdev);
3555 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3556
3557 if (pci_enable_device_mem(pdev)) {
3558 dev_err(&pdev->dev,
3559 "Cannot re-enable PCI device after reset.\n");
3560 return PCI_ERS_RESULT_DISCONNECT;
3561 }
3562
3563 pci_set_master(pdev);
3564
3565 ixgbevf_reset(adapter);
3566
3567 return PCI_ERS_RESULT_RECOVERED;
3568}
3569
3570/**
3571 * ixgbevf_io_resume - called when traffic can start flowing again.
3572 * @pdev: Pointer to PCI device
3573 *
3574 * This callback is called when the error recovery driver tells us that
3575 * its OK to resume normal operation. Implementation resembles the
3576 * second-half of the ixgbevf_resume routine.
3577 */
3578static void ixgbevf_io_resume(struct pci_dev *pdev)
3579{
3580 struct net_device *netdev = pci_get_drvdata(pdev);
3581 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3582
3583 if (netif_running(netdev))
3584 ixgbevf_up(adapter);
3585
3586 netif_device_attach(netdev);
3587}
3588
3589/* PCI Error Recovery (ERS) */
Stephen Hemminger3646f0e2012-09-07 09:33:15 -07003590static const struct pci_error_handlers ixgbevf_err_handler = {
Alexander Duyck9f19f312012-05-11 08:33:32 +00003591 .error_detected = ixgbevf_io_error_detected,
3592 .slot_reset = ixgbevf_io_slot_reset,
3593 .resume = ixgbevf_io_resume,
3594};
3595
Greg Rose92915f72010-01-09 02:24:10 +00003596static struct pci_driver ixgbevf_driver = {
3597 .name = ixgbevf_driver_name,
3598 .id_table = ixgbevf_pci_tbl,
3599 .probe = ixgbevf_probe,
Bill Pemberton9f9a12f2012-12-03 09:24:25 -05003600 .remove = ixgbevf_remove,
Alexander Duyck0ac1e8c2012-05-11 08:33:26 +00003601#ifdef CONFIG_PM
3602 /* Power Management Hooks */
3603 .suspend = ixgbevf_suspend,
3604 .resume = ixgbevf_resume,
3605#endif
Greg Rose92915f72010-01-09 02:24:10 +00003606 .shutdown = ixgbevf_shutdown,
Alexander Duyck9f19f312012-05-11 08:33:32 +00003607 .err_handler = &ixgbevf_err_handler
Greg Rose92915f72010-01-09 02:24:10 +00003608};
3609
3610/**
Greg Rose65d676c2011-02-03 06:54:13 +00003611 * ixgbevf_init_module - Driver Registration Routine
Greg Rose92915f72010-01-09 02:24:10 +00003612 *
Greg Rose65d676c2011-02-03 06:54:13 +00003613 * ixgbevf_init_module is the first routine called when the driver is
Greg Rose92915f72010-01-09 02:24:10 +00003614 * loaded. All it does is register with the PCI subsystem.
3615 **/
3616static int __init ixgbevf_init_module(void)
3617{
3618 int ret;
Jeff Kirsherdbd96362011-10-21 19:38:18 +00003619 pr_info("%s - version %s\n", ixgbevf_driver_string,
3620 ixgbevf_driver_version);
Greg Rose92915f72010-01-09 02:24:10 +00003621
Jeff Kirsherdbd96362011-10-21 19:38:18 +00003622 pr_info("%s\n", ixgbevf_copyright);
Greg Rose92915f72010-01-09 02:24:10 +00003623
3624 ret = pci_register_driver(&ixgbevf_driver);
3625 return ret;
3626}
3627
3628module_init(ixgbevf_init_module);
3629
3630/**
Greg Rose65d676c2011-02-03 06:54:13 +00003631 * ixgbevf_exit_module - Driver Exit Cleanup Routine
Greg Rose92915f72010-01-09 02:24:10 +00003632 *
Greg Rose65d676c2011-02-03 06:54:13 +00003633 * ixgbevf_exit_module is called just before the driver is removed
Greg Rose92915f72010-01-09 02:24:10 +00003634 * from memory.
3635 **/
3636static void __exit ixgbevf_exit_module(void)
3637{
3638 pci_unregister_driver(&ixgbevf_driver);
3639}
3640
3641#ifdef DEBUG
3642/**
Greg Rose65d676c2011-02-03 06:54:13 +00003643 * ixgbevf_get_hw_dev_name - return device name string
Greg Rose92915f72010-01-09 02:24:10 +00003644 * used by hardware layer to print debugging information
3645 **/
3646char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3647{
3648 struct ixgbevf_adapter *adapter = hw->back;
3649 return adapter->netdev->name;
3650}
3651
3652#endif
3653module_exit(ixgbevf_exit_module);
3654
3655/* ixgbevf_main.c */