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gerrit-public.fairphone.software / kernel / msm-5.4 / 7a88d6286240f1e8a0cf9c07252e1576169020f5 / . / drivers / rapidio / switches / idtcps.c
blob: 73c3677e5ac6275d196ccb9b14758b9ee1851c02 [file] [log] [blame]
Alexandre Bounine07590ff2010-05-26 14:43:57 -0700[diff] [blame]1/*
2 * IDT CPS RapidIO switches support
3 *
Alexandre Bounine058f88d62010-05-26 14:44:03 -0700[diff] [blame]4 * Copyright 2009-2010 Integrated Device Technology, Inc.
5 * Alexandre Bounine <alexandre.bounine@idt.com>
Alexandre Bounine07590ff2010-05-26 14:43:57 -0700[diff] [blame]6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/rio.h>
14#include <linux/rio_drv.h>
15#include <linux/rio_ids.h>
16#include "../rio.h"
17
18#define CPS_NO_ROUTE 0xdf
19
Alexandre Bounine7a88d622010-05-26 14:44:04 -0700[diff] [blame^]20#define IDTCPS_RIO_DOMAIN 0xf20020
21
Alexandre Bounine07590ff2010-05-26 14:43:57 -0700[diff] [blame]22static int
23idtcps_route_add_entry(struct rio_mport *mport, u16 destid, u8 hopcount,
24 u16 table, u16 route_destid, u8 route_port)
25{
26 u32 result;
27
28 if (table == RIO_GLOBAL_TABLE) {
29 rio_mport_write_config_32(mport, destid, hopcount,
30 RIO_STD_RTE_CONF_DESTID_SEL_CSR, route_destid);
31
32 rio_mport_read_config_32(mport, destid, hopcount,
33 RIO_STD_RTE_CONF_PORT_SEL_CSR, &result);
34
35 result = (0xffffff00 & result) | (u32)route_port;
36 rio_mport_write_config_32(mport, destid, hopcount,
37 RIO_STD_RTE_CONF_PORT_SEL_CSR, result);
38 }
39
40 return 0;
41}
42
43static int
44idtcps_route_get_entry(struct rio_mport *mport, u16 destid, u8 hopcount,
45 u16 table, u16 route_destid, u8 *route_port)
46{
47 u32 result;
48
49 if (table == RIO_GLOBAL_TABLE) {
50 rio_mport_write_config_32(mport, destid, hopcount,
51 RIO_STD_RTE_CONF_DESTID_SEL_CSR, route_destid);
52
53 rio_mport_read_config_32(mport, destid, hopcount,
54 RIO_STD_RTE_CONF_PORT_SEL_CSR, &result);
55
56 if (CPS_NO_ROUTE == (u8)result)
57 result = RIO_INVALID_ROUTE;
58
59 *route_port = (u8)result;
60 }
61
62 return 0;
63}
64
65static int
66idtcps_route_clr_table(struct rio_mport *mport, u16 destid, u8 hopcount,
67 u16 table)
68{
69 u32 i;
70
71 if (table == RIO_GLOBAL_TABLE) {
72 for (i = 0x80000000; i <= 0x800000ff;) {
73 rio_mport_write_config_32(mport, destid, hopcount,
74 RIO_STD_RTE_CONF_DESTID_SEL_CSR, i);
75 rio_mport_write_config_32(mport, destid, hopcount,
76 RIO_STD_RTE_CONF_PORT_SEL_CSR,
77 (RIO_INVALID_ROUTE << 24) |
78 (RIO_INVALID_ROUTE << 16) |
79 (RIO_INVALID_ROUTE << 8) | RIO_INVALID_ROUTE);
80 i += 4;
81 }
82 }
83
84 return 0;
85}
86
Alexandre Bounine7a88d622010-05-26 14:44:04 -0700[diff] [blame^]87static int
88idtcps_set_domain(struct rio_mport *mport, u16 destid, u8 hopcount,
89 u8 sw_domain)
90{
91 /*
92 * Switch domain configuration operates only at global level
93 */
94 rio_mport_write_config_32(mport, destid, hopcount,
95 IDTCPS_RIO_DOMAIN, (u32)sw_domain);
96 return 0;
97}
98
99static int
100idtcps_get_domain(struct rio_mport *mport, u16 destid, u8 hopcount,
101 u8 *sw_domain)
102{
103 u32 regval;
104
105 /*
106 * Switch domain configuration operates only at global level
107 */
108 rio_mport_read_config_32(mport, destid, hopcount,
109 IDTCPS_RIO_DOMAIN, &regval);
110
111 *sw_domain = (u8)(regval & 0xff);
112
113 return 0;
114}
115
Alexandre Bounine058f88d62010-05-26 14:44:03 -0700[diff] [blame]116static int idtcps_switch_init(struct rio_dev *rdev, int do_enum)
117{
118 pr_debug("RIO: %s for %s\n", __func__, rio_name(rdev));
119 rdev->rswitch->add_entry = idtcps_route_add_entry;
120 rdev->rswitch->get_entry = idtcps_route_get_entry;
121 rdev->rswitch->clr_table = idtcps_route_clr_table;
Alexandre Bounine7a88d622010-05-26 14:44:04 -0700[diff] [blame^]122 rdev->rswitch->set_domain = idtcps_set_domain;
123 rdev->rswitch->get_domain = idtcps_get_domain;
Alexandre Bounine058f88d62010-05-26 14:44:03 -0700[diff] [blame]124 rdev->rswitch->em_init = NULL;
125 rdev->rswitch->em_handle = NULL;
126
127 return 0;
128}
129
130DECLARE_RIO_SWITCH_INIT(RIO_VID_IDT, RIO_DID_IDTCPS6Q, idtcps_switch_init);
131DECLARE_RIO_SWITCH_INIT(RIO_VID_IDT, RIO_DID_IDTCPS8, idtcps_switch_init);
132DECLARE_RIO_SWITCH_INIT(RIO_VID_IDT, RIO_DID_IDTCPS10Q, idtcps_switch_init);
133DECLARE_RIO_SWITCH_INIT(RIO_VID_IDT, RIO_DID_IDTCPS12, idtcps_switch_init);
134DECLARE_RIO_SWITCH_INIT(RIO_VID_IDT, RIO_DID_IDTCPS16, idtcps_switch_init);
135DECLARE_RIO_SWITCH_INIT(RIO_VID_IDT, RIO_DID_IDT70K200, idtcps_switch_init);