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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nandids.c
3 *
4 * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de)
Thomas Gleixnerbd7bcf52005-06-23 10:38:54 +01005 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#include <linux/module.h>
12#include <linux/mtd/nand.h>
Artem Bityutskiy7d321ec2013-03-04 13:39:30 +020013
14#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
15#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
16
Brian Norris5bc7c332013-03-13 09:51:31 -070017#define SP_OPTIONS NAND_NEED_READRDY
18#define SP_OPTIONS16 (SP_OPTIONS | NAND_BUSWIDTH_16)
Thomas Gleixner1cf98272007-04-17 18:30:57 +010019
Artem Bityutskiy7d321ec2013-03-04 13:39:30 +020020/*
21 * The chip ID list:
22 * name, device ID, page size, chip size in MiB, eraseblock size, options
23 *
24 * If page size and eraseblock size are 0, the sizes are taken from the
25 * extended chip ID.
26 */
27struct nand_flash_dev nand_flash_ids[] = {
Thomas Gleixner1cf98272007-04-17 18:30:57 +010028#ifdef CONFIG_MTD_NAND_MUSEUM_IDS
Brian Norris5bc7c332013-03-13 09:51:31 -070029 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, SP_OPTIONS},
30 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, SP_OPTIONS},
31 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, SP_OPTIONS},
32 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, SP_OPTIONS},
33 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, SP_OPTIONS},
34 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, SP_OPTIONS},
35 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, SP_OPTIONS},
36 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, SP_OPTIONS},
37 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, SP_OPTIONS},
38 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, SP_OPTIONS},
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000039
Brian Norris5bc7c332013-03-13 09:51:31 -070040 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, SP_OPTIONS},
41 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, SP_OPTIONS},
42 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, SP_OPTIONS16},
43 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, SP_OPTIONS16},
Thomas Gleixner1cf98272007-04-17 18:30:57 +010044#endif
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000045
Brian Norris5bc7c332013-03-13 09:51:31 -070046 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, SP_OPTIONS},
47 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, SP_OPTIONS},
48 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, SP_OPTIONS16},
49 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, SP_OPTIONS16},
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000050
Brian Norris5bc7c332013-03-13 09:51:31 -070051 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, SP_OPTIONS},
52 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, SP_OPTIONS},
53 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, SP_OPTIONS16},
54 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, SP_OPTIONS16},
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000055
Brian Norris5bc7c332013-03-13 09:51:31 -070056 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, SP_OPTIONS},
57 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, SP_OPTIONS},
58 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, SP_OPTIONS16},
59 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, SP_OPTIONS16},
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000060
Brian Norris5bc7c332013-03-13 09:51:31 -070061 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, SP_OPTIONS},
62 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, SP_OPTIONS},
63 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, SP_OPTIONS},
64 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, SP_OPTIONS16},
65 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, SP_OPTIONS16},
66 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, SP_OPTIONS16},
67 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, SP_OPTIONS16},
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000068
Brian Norris5bc7c332013-03-13 09:51:31 -070069 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, SP_OPTIONS},
Linus Torvalds1da177e2005-04-16 15:20:36 -070070
Thomas Gleixner7a306012006-05-25 09:50:16 +020071 /*
Artem Bityutskiy7d321ec2013-03-04 13:39:30 +020072 * These are the new chips with large page size. Their page size and
73 * eraseblock size are determined from the extended ID bytes.
Thomas Gleixner7a306012006-05-25 09:50:16 +020074 */
Thomas Gleixner7a306012006-05-25 09:50:16 +020075
Brian Norrisc01804e2011-11-02 13:34:43 -070076 /* 512 Megabit */
Thomas Gleixner7a306012006-05-25 09:50:16 +020077 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS},
Brian Norris13ed7ae2010-08-20 12:36:12 -070078 {"NAND 64MiB 1,8V 8-bit", 0xA0, 0, 64, 0, LP_OPTIONS},
Thomas Gleixner7a306012006-05-25 09:50:16 +020079 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS},
Brian Norris13ed7ae2010-08-20 12:36:12 -070080 {"NAND 64MiB 3,3V 8-bit", 0xD0, 0, 64, 0, LP_OPTIONS},
Brian Norrisc01804e2011-11-02 13:34:43 -070081 {"NAND 64MiB 3,3V 8-bit", 0xF0, 0, 64, 0, LP_OPTIONS},
Thomas Gleixner7a306012006-05-25 09:50:16 +020082 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16},
Brian Norris13ed7ae2010-08-20 12:36:12 -070083 {"NAND 64MiB 1,8V 16-bit", 0xB0, 0, 64, 0, LP_OPTIONS16},
Thomas Gleixner7a306012006-05-25 09:50:16 +020084 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16},
Brian Norris13ed7ae2010-08-20 12:36:12 -070085 {"NAND 64MiB 3,3V 16-bit", 0xC0, 0, 64, 0, LP_OPTIONS16},
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000086
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 /* 1 Gigabit */
Thomas Gleixner7a306012006-05-25 09:50:16 +020088 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS},
89 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS},
Florian Fainellif6b173c2010-05-07 19:09:13 +020090 {"NAND 128MiB 3,3V 8-bit", 0xD1, 0, 128, 0, LP_OPTIONS},
Thomas Gleixner7a306012006-05-25 09:50:16 +020091 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16},
92 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16},
Brian Norris24cc7b82010-06-17 12:35:11 -070093 {"NAND 128MiB 1,8V 16-bit", 0xAD, 0, 128, 0, LP_OPTIONS16},
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
95 /* 2 Gigabit */
Thomas Gleixner7a306012006-05-25 09:50:16 +020096 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS},
97 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS},
98 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16},
99 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16},
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000100
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 /* 4 Gigabit */
Thomas Gleixner7a306012006-05-25 09:50:16 +0200102 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS},
103 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS},
104 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16},
105 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16},
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000106
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107 /* 8 Gigabit */
Thomas Gleixner7a306012006-05-25 09:50:16 +0200108 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS},
109 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS},
110 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16},
111 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112
113 /* 16 Gigabit */
Thomas Gleixner7a306012006-05-25 09:50:16 +0200114 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS},
115 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS},
116 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16},
117 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118
Brian Norris24cc7b82010-06-17 12:35:11 -0700119 /* 32 Gigabit */
Brian Norris13ed7ae2010-08-20 12:36:12 -0700120 {"NAND 4GiB 1,8V 8-bit", 0xA7, 0, 4096, 0, LP_OPTIONS},
Brian Norris84c4f462010-08-13 10:29:14 -0700121 {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS},
Brian Norris13ed7ae2010-08-20 12:36:12 -0700122 {"NAND 4GiB 1,8V 16-bit", 0xB7, 0, 4096, 0, LP_OPTIONS16},
123 {"NAND 4GiB 3,3V 16-bit", 0xC7, 0, 4096, 0, LP_OPTIONS16},
124
125 /* 64 Gigabit */
126 {"NAND 8GiB 1,8V 8-bit", 0xAE, 0, 8192, 0, LP_OPTIONS},
127 {"NAND 8GiB 3,3V 8-bit", 0xDE, 0, 8192, 0, LP_OPTIONS},
128 {"NAND 8GiB 1,8V 16-bit", 0xBE, 0, 8192, 0, LP_OPTIONS16},
129 {"NAND 8GiB 3,3V 16-bit", 0xCE, 0, 8192, 0, LP_OPTIONS16},
130
131 /* 128 Gigabit */
132 {"NAND 16GiB 1,8V 8-bit", 0x1A, 0, 16384, 0, LP_OPTIONS},
133 {"NAND 16GiB 3,3V 8-bit", 0x3A, 0, 16384, 0, LP_OPTIONS},
134 {"NAND 16GiB 1,8V 16-bit", 0x2A, 0, 16384, 0, LP_OPTIONS16},
135 {"NAND 16GiB 3,3V 16-bit", 0x4A, 0, 16384, 0, LP_OPTIONS16},
136
137 /* 256 Gigabit */
138 {"NAND 32GiB 1,8V 8-bit", 0x1C, 0, 32768, 0, LP_OPTIONS},
139 {"NAND 32GiB 3,3V 8-bit", 0x3C, 0, 32768, 0, LP_OPTIONS},
140 {"NAND 32GiB 1,8V 16-bit", 0x2C, 0, 32768, 0, LP_OPTIONS16},
141 {"NAND 32GiB 3,3V 16-bit", 0x4C, 0, 32768, 0, LP_OPTIONS16},
142
143 /* 512 Gigabit */
144 {"NAND 64GiB 1,8V 8-bit", 0x1E, 0, 65536, 0, LP_OPTIONS},
145 {"NAND 64GiB 3,3V 8-bit", 0x3E, 0, 65536, 0, LP_OPTIONS},
146 {"NAND 64GiB 1,8V 16-bit", 0x2E, 0, 65536, 0, LP_OPTIONS16},
147 {"NAND 64GiB 3,3V 16-bit", 0x4E, 0, 65536, 0, LP_OPTIONS16},
Brian Norris24cc7b82010-06-17 12:35:11 -0700148
Thomas Gleixner7a306012006-05-25 09:50:16 +0200149 /*
150 * Renesas AND 1 Gigabit. Those chips do not support extended id and
151 * have a strange page/block layout ! The chosen minimum erasesize is
152 * 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page
153 * planes 1 block = 2 pages, but due to plane arrangement the blocks
154 * 0-3 consists of page 0 + 4,1 + 5, 2 + 6, 3 + 7 Anyway JFFS2 would
155 * increase the eraseblock size so we chose a combined one which can be
156 * erased in one go There are more speed improvements for reads and
157 * writes possible, but not implemented now
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 */
Thomas Gleixner7a306012006-05-25 09:50:16 +0200159 {"AND 128MiB 3,3V 8-bit", 0x01, 2048, 128, 0x4000,
Brian Norris1696e6b2012-05-22 23:50:00 -0700160 NAND_IS_AND | NAND_4PAGE_ARRAY | BBT_AUTO_REFRESH},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161
162 {NULL,}
163};
164
Artem Bityutskiy7d321ec2013-03-04 13:39:30 +0200165/* Manufacturer IDs */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166struct nand_manufacturers nand_manuf_ids[] = {
167 {NAND_MFR_TOSHIBA, "Toshiba"},
168 {NAND_MFR_SAMSUNG, "Samsung"},
169 {NAND_MFR_FUJITSU, "Fujitsu"},
170 {NAND_MFR_NATIONAL, "National"},
171 {NAND_MFR_RENESAS, "Renesas"},
172 {NAND_MFR_STMICRO, "ST Micro"},
David Woodhousee0c7d762006-05-13 18:07:53 +0100173 {NAND_MFR_HYNIX, "Hynix"},
sshahrom@micron.com8c60e542007-03-21 18:48:02 -0700174 {NAND_MFR_MICRON, "Micron"},
Brian Norris9d9a8812012-06-20 16:14:02 -0700175 {NAND_MFR_AMD, "AMD/Spansion"},
Brian Norrisc1257b42011-11-02 13:34:42 -0700176 {NAND_MFR_MACRONIX, "Macronix"},
Brian Norrisb1ccfab2012-05-22 07:30:47 -0700177 {NAND_MFR_EON, "Eon"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 {0x0, "Unknown"}
179};
180
David Woodhousee0c7d762006-05-13 18:07:53 +0100181EXPORT_SYMBOL(nand_manuf_ids);
182EXPORT_SYMBOL(nand_flash_ids);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183
David Woodhousee0c7d762006-05-13 18:07:53 +0100184MODULE_LICENSE("GPL");
185MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>");
186MODULE_DESCRIPTION("Nand device & manufacturer IDs");