blob: eea0bb06052a8e971c3c7c83c1d52cba5ffac5af [file] [log] [blame]
Terje Bergstrom75471682013-03-22 16:34:01 +02001/*
2 * Copyright (c) 2012-2013, NVIDIA Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 *
16 */
17
18 /*
19 * Function naming determines intended use:
20 *
21 * <x>_r(void) : Returns the offset for register <x>.
22 *
23 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
24 *
25 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
26 *
27 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
28 * and masked to place it at field <y> of register <x>. This value
29 * can be |'d with others to produce a full register value for
30 * register <x>.
31 *
32 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
33 * value can be ~'d and then &'d to clear the value of field <y> for
34 * register <x>.
35 *
36 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
37 * to place it at field <y> of register <x>. This value can be |'d
38 * with others to produce a full register value for <x>.
39 *
40 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
41 * <x> value 'r' after being shifted to place its LSB at bit 0.
42 * This value is suitable for direct comparison with other unshifted
43 * values appropriate for use in field <y> of register <x>.
44 *
45 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
46 * field <y> of register <x>. This value is suitable for direct
47 * comparison with unshifted values appropriate for use in field <y>
48 * of register <x>.
49 */
50
51#ifndef __hw_host1x01_sync_h__
52#define __hw_host1x01_sync_h__
53
54#define REGISTER_STRIDE 4
55
56static inline u32 host1x_sync_syncpt_r(unsigned int id)
57{
58 return 0x400 + id * REGISTER_STRIDE;
59}
60#define HOST1X_SYNC_SYNCPT(id) \
61 host1x_sync_syncpt_r(id)
Terje Bergstrom7ede0b02013-03-22 16:34:02 +020062static inline u32 host1x_sync_syncpt_thresh_cpu0_int_status_r(unsigned int id)
63{
64 return 0x40 + id * REGISTER_STRIDE;
65}
66#define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(id) \
67 host1x_sync_syncpt_thresh_cpu0_int_status_r(id)
68static inline u32 host1x_sync_syncpt_thresh_int_disable_r(unsigned int id)
69{
70 return 0x60 + id * REGISTER_STRIDE;
71}
72#define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(id) \
73 host1x_sync_syncpt_thresh_int_disable_r(id)
74static inline u32 host1x_sync_syncpt_thresh_int_enable_cpu0_r(unsigned int id)
75{
76 return 0x68 + id * REGISTER_STRIDE;
77}
78#define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(id) \
79 host1x_sync_syncpt_thresh_int_enable_cpu0_r(id)
80static inline u32 host1x_sync_usec_clk_r(void)
81{
82 return 0x1a4;
83}
84#define HOST1X_SYNC_USEC_CLK \
85 host1x_sync_usec_clk_r()
86static inline u32 host1x_sync_ctxsw_timeout_cfg_r(void)
87{
88 return 0x1a8;
89}
90#define HOST1X_SYNC_CTXSW_TIMEOUT_CFG \
91 host1x_sync_ctxsw_timeout_cfg_r()
92static inline u32 host1x_sync_ip_busy_timeout_r(void)
93{
94 return 0x1bc;
95}
96#define HOST1X_SYNC_IP_BUSY_TIMEOUT \
97 host1x_sync_ip_busy_timeout_r()
98static inline u32 host1x_sync_syncpt_int_thresh_r(unsigned int id)
99{
100 return 0x500 + id * REGISTER_STRIDE;
101}
102#define HOST1X_SYNC_SYNCPT_INT_THRESH(id) \
103 host1x_sync_syncpt_int_thresh_r(id)
Terje Bergstrom75471682013-03-22 16:34:01 +0200104static inline u32 host1x_sync_syncpt_base_r(unsigned int id)
105{
106 return 0x600 + id * REGISTER_STRIDE;
107}
108#define HOST1X_SYNC_SYNCPT_BASE(id) \
109 host1x_sync_syncpt_base_r(id)
110static inline u32 host1x_sync_syncpt_cpu_incr_r(unsigned int id)
111{
112 return 0x700 + id * REGISTER_STRIDE;
113}
114#define HOST1X_SYNC_SYNCPT_CPU_INCR(id) \
115 host1x_sync_syncpt_cpu_incr_r(id)
116#endif /* __hw_host1x01_sync_h__ */