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Sinclair Yeh35c05122015-06-26 01:42:06 -07001/******************************************************************************
2 *
Sinclair Yeh54fbde82015-07-29 12:38:02 -07003 * COPYRIGHT © 2014-2015 VMware, Inc., Palo Alto, CA., USA
Sinclair Yeh35c05122015-06-26 01:42:06 -07004 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 ******************************************************************************/
27
28#include "vmwgfx_kms.h"
Sinclair Yeh8ce75f82015-07-08 21:20:39 -070029#include "device_include/svga3d_surfacedefs.h"
Sinclair Yeh35c05122015-06-26 01:42:06 -070030#include <drm/drm_plane_helper.h>
Sinclair Yehd7721ca2017-03-23 11:48:44 -070031#include <drm/drm_atomic.h>
32#include <drm/drm_atomic_helper.h>
33
Sinclair Yeh35c05122015-06-26 01:42:06 -070034
35#define vmw_crtc_to_stdu(x) \
36 container_of(x, struct vmw_screen_target_display_unit, base.crtc)
37#define vmw_encoder_to_stdu(x) \
38 container_of(x, struct vmw_screen_target_display_unit, base.encoder)
39#define vmw_connector_to_stdu(x) \
40 container_of(x, struct vmw_screen_target_display_unit, base.connector)
41
42
43
44enum stdu_content_type {
45 SAME_AS_DISPLAY = 0,
46 SEPARATE_SURFACE,
47 SEPARATE_DMA
48};
49
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -070050/**
51 * struct vmw_stdu_dirty - closure structure for the update functions
52 *
53 * @base: The base type we derive from. Used by vmw_kms_helper_dirty().
54 * @transfer: Transfer direction for DMA command.
55 * @left: Left side of bounding box.
56 * @right: Right side of bounding box.
57 * @top: Top side of bounding box.
58 * @bottom: Bottom side of bounding box.
59 * @buf: DMA buffer when DMA-ing between buffer and screen targets.
60 * @sid: Surface ID when copying between surface and screen targets.
61 */
62struct vmw_stdu_dirty {
63 struct vmw_kms_dirty base;
64 SVGA3dTransferType transfer;
65 s32 left, right, top, bottom;
66 u32 pitch;
67 union {
68 struct vmw_dma_buffer *buf;
69 u32 sid;
70 };
71};
72
73/*
74 * SVGA commands that are used by this code. Please see the device headers
75 * for explanation.
76 */
77struct vmw_stdu_update {
78 SVGA3dCmdHeader header;
79 SVGA3dCmdUpdateGBScreenTarget body;
80};
81
82struct vmw_stdu_dma {
83 SVGA3dCmdHeader header;
84 SVGA3dCmdSurfaceDMA body;
85};
86
87struct vmw_stdu_surface_copy {
88 SVGA3dCmdHeader header;
89 SVGA3dCmdSurfaceCopy body;
90};
Sinclair Yeh35c05122015-06-26 01:42:06 -070091
92
93/**
94 * struct vmw_screen_target_display_unit
95 *
96 * @base: VMW specific DU structure
97 * @display_srf: surface to be displayed. The dimension of this will always
98 * match the display mode. If the display mode matches
99 * content_vfbs dimensions, then this is a pointer into the
100 * corresponding field in content_vfbs. If not, then this
101 * is a separate buffer to which content_vfbs will blit to.
Sinclair Yeh35c05122015-06-26 01:42:06 -0700102 * @content_type: content_fb type
103 * @defined: true if the current display unit has been initialized
104 */
105struct vmw_screen_target_display_unit {
106 struct vmw_display_unit base;
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700107 const struct vmw_surface *display_srf;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700108 enum stdu_content_type content_fb_type;
Sinclair Yeh9aa8dca2017-03-23 14:40:04 -0700109 s32 display_width, display_height;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700110
111 bool defined;
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700112
113 /* For CPU Blit */
114 struct ttm_bo_kmap_obj host_map, guest_map;
115 unsigned int cpp;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700116};
117
118
119
120static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu);
121
122
123
124/******************************************************************************
Sinclair Yeh35c05122015-06-26 01:42:06 -0700125 * Screen Target Display Unit CRTC Functions
126 *****************************************************************************/
127
128
129/**
130 * vmw_stdu_crtc_destroy - cleans up the STDU
131 *
132 * @crtc: used to get a reference to the containing STDU
133 */
134static void vmw_stdu_crtc_destroy(struct drm_crtc *crtc)
135{
136 vmw_stdu_destroy(vmw_crtc_to_stdu(crtc));
137}
138
Sinclair Yeh35c05122015-06-26 01:42:06 -0700139/**
140 * vmw_stdu_define_st - Defines a Screen Target
141 *
142 * @dev_priv: VMW DRM device
143 * @stdu: display unit to create a Screen Target for
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100144 * @mode: The mode to set.
145 * @crtc_x: X coordinate of screen target relative to framebuffer origin.
146 * @crtc_y: Y coordinate of screen target relative to framebuffer origin.
Sinclair Yeh35c05122015-06-26 01:42:06 -0700147 *
148 * Creates a STDU that we can used later. This function is called whenever the
149 * framebuffer size changes.
150 *
151 * RETURNs:
152 * 0 on success, error code on failure
153 */
154static int vmw_stdu_define_st(struct vmw_private *dev_priv,
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100155 struct vmw_screen_target_display_unit *stdu,
156 struct drm_display_mode *mode,
157 int crtc_x, int crtc_y)
Sinclair Yeh35c05122015-06-26 01:42:06 -0700158{
159 struct {
160 SVGA3dCmdHeader header;
161 SVGA3dCmdDefineGBScreenTarget body;
162 } *cmd;
163
164 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
165
166 if (unlikely(cmd == NULL)) {
167 DRM_ERROR("Out of FIFO space defining Screen Target\n");
168 return -ENOMEM;
169 }
170
171 cmd->header.id = SVGA_3D_CMD_DEFINE_GB_SCREENTARGET;
172 cmd->header.size = sizeof(cmd->body);
173
174 cmd->body.stid = stdu->base.unit;
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100175 cmd->body.width = mode->hdisplay;
176 cmd->body.height = mode->vdisplay;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700177 cmd->body.flags = (0 == cmd->body.stid) ? SVGA_STFLAG_PRIMARY : 0;
178 cmd->body.dpi = 0;
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100179 if (stdu->base.is_implicit) {
180 cmd->body.xRoot = crtc_x;
181 cmd->body.yRoot = crtc_y;
182 } else {
Sinclair Yeh35c05122015-06-26 01:42:06 -0700183 cmd->body.xRoot = stdu->base.gui_x;
184 cmd->body.yRoot = stdu->base.gui_y;
185 }
Thomas Hellstrom6dd687b2016-02-12 09:57:15 +0100186 stdu->base.set_gui_x = cmd->body.xRoot;
187 stdu->base.set_gui_y = cmd->body.yRoot;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700188
189 vmw_fifo_commit(dev_priv, sizeof(*cmd));
190
191 stdu->defined = true;
Sinclair Yeh9aa8dca2017-03-23 14:40:04 -0700192 stdu->display_width = mode->hdisplay;
193 stdu->display_height = mode->vdisplay;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700194
195 return 0;
196}
197
198
199
200/**
201 * vmw_stdu_bind_st - Binds a surface to a Screen Target
202 *
203 * @dev_priv: VMW DRM device
204 * @stdu: display unit affected
205 * @res: Buffer to bind to the screen target. Set to NULL to blank screen.
206 *
207 * Binding a surface to a Screen Target the same as flipping
208 */
209static int vmw_stdu_bind_st(struct vmw_private *dev_priv,
210 struct vmw_screen_target_display_unit *stdu,
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700211 const struct vmw_resource *res)
Sinclair Yeh35c05122015-06-26 01:42:06 -0700212{
213 SVGA3dSurfaceImageId image;
214
215 struct {
216 SVGA3dCmdHeader header;
217 SVGA3dCmdBindGBScreenTarget body;
218 } *cmd;
219
220
221 if (!stdu->defined) {
222 DRM_ERROR("No screen target defined\n");
223 return -EINVAL;
224 }
225
226 /* Set up image using information in vfb */
227 memset(&image, 0, sizeof(image));
228 image.sid = res ? res->id : SVGA3D_INVALID_ID;
229
230 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
231
232 if (unlikely(cmd == NULL)) {
233 DRM_ERROR("Out of FIFO space binding a screen target\n");
234 return -ENOMEM;
235 }
236
237 cmd->header.id = SVGA_3D_CMD_BIND_GB_SCREENTARGET;
238 cmd->header.size = sizeof(cmd->body);
239
240 cmd->body.stid = stdu->base.unit;
241 cmd->body.image = image;
242
243 vmw_fifo_commit(dev_priv, sizeof(*cmd));
244
245 return 0;
246}
247
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700248/**
249 * vmw_stdu_populate_update - populate an UPDATE_GB_SCREENTARGET command with a
250 * bounding box.
251 *
252 * @cmd: Pointer to command stream.
253 * @unit: Screen target unit.
254 * @left: Left side of bounding box.
255 * @right: Right side of bounding box.
256 * @top: Top side of bounding box.
257 * @bottom: Bottom side of bounding box.
258 */
259static void vmw_stdu_populate_update(void *cmd, int unit,
260 s32 left, s32 right, s32 top, s32 bottom)
261{
262 struct vmw_stdu_update *update = cmd;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700263
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700264 update->header.id = SVGA_3D_CMD_UPDATE_GB_SCREENTARGET;
265 update->header.size = sizeof(update->body);
266
267 update->body.stid = unit;
268 update->body.rect.x = left;
269 update->body.rect.y = top;
270 update->body.rect.w = right - left;
271 update->body.rect.h = bottom - top;
272}
Sinclair Yeh35c05122015-06-26 01:42:06 -0700273
274/**
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700275 * vmw_stdu_update_st - Full update of a Screen Target
Sinclair Yeh35c05122015-06-26 01:42:06 -0700276 *
277 * @dev_priv: VMW DRM device
Sinclair Yeh35c05122015-06-26 01:42:06 -0700278 * @stdu: display unit affected
Sinclair Yeh35c05122015-06-26 01:42:06 -0700279 *
280 * This function needs to be called whenever the content of a screen
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700281 * target has changed completely. Typically as a result of a backing
282 * surface change.
Sinclair Yeh35c05122015-06-26 01:42:06 -0700283 *
284 * RETURNS:
285 * 0 on success, error code on failure
286 */
287static int vmw_stdu_update_st(struct vmw_private *dev_priv,
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700288 struct vmw_screen_target_display_unit *stdu)
Sinclair Yeh35c05122015-06-26 01:42:06 -0700289{
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700290 struct vmw_stdu_update *cmd;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700291
292 if (!stdu->defined) {
293 DRM_ERROR("No screen target defined");
294 return -EINVAL;
295 }
296
Sinclair Yeh35c05122015-06-26 01:42:06 -0700297 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
298
299 if (unlikely(cmd == NULL)) {
300 DRM_ERROR("Out of FIFO space updating a Screen Target\n");
301 return -ENOMEM;
302 }
303
Sinclair Yeh9aa8dca2017-03-23 14:40:04 -0700304 vmw_stdu_populate_update(cmd, stdu->base.unit,
305 0, stdu->display_width,
306 0, stdu->display_height);
Sinclair Yeh35c05122015-06-26 01:42:06 -0700307
308 vmw_fifo_commit(dev_priv, sizeof(*cmd));
309
310 return 0;
311}
312
313
314
315/**
316 * vmw_stdu_destroy_st - Destroy a Screen Target
317 *
318 * @dev_priv: VMW DRM device
319 * @stdu: display unit to destroy
320 */
321static int vmw_stdu_destroy_st(struct vmw_private *dev_priv,
322 struct vmw_screen_target_display_unit *stdu)
323{
324 int ret;
325
326 struct {
327 SVGA3dCmdHeader header;
328 SVGA3dCmdDestroyGBScreenTarget body;
329 } *cmd;
330
331
332 /* Nothing to do if not successfully defined */
333 if (unlikely(!stdu->defined))
334 return 0;
335
336 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
337
338 if (unlikely(cmd == NULL)) {
339 DRM_ERROR("Out of FIFO space, screen target not destroyed\n");
340 return -ENOMEM;
341 }
342
343 cmd->header.id = SVGA_3D_CMD_DESTROY_GB_SCREENTARGET;
344 cmd->header.size = sizeof(cmd->body);
345
346 cmd->body.stid = stdu->base.unit;
347
348 vmw_fifo_commit(dev_priv, sizeof(*cmd));
349
350 /* Force sync */
351 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
352 if (unlikely(ret != 0))
353 DRM_ERROR("Failed to sync with HW");
354
355 stdu->defined = false;
Sinclair Yeh9aa8dca2017-03-23 14:40:04 -0700356 stdu->display_width = 0;
357 stdu->display_height = 0;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700358
359 return ret;
360}
361
Sinclair Yeh06ec4192017-03-23 13:14:54 -0700362
363/**
364 * vmw_stdu_crtc_mode_set_nofb - Updates screen target size
365 *
366 * @crtc: CRTC associated with the screen target
367 *
368 * This function defines/destroys a screen target
369 *
370 */
371static void vmw_stdu_crtc_mode_set_nofb(struct drm_crtc *crtc)
372{
373 struct vmw_private *dev_priv;
374 struct vmw_screen_target_display_unit *stdu;
375 int ret;
376
377
378 stdu = vmw_crtc_to_stdu(crtc);
379 dev_priv = vmw_priv(crtc->dev);
380
381 if (stdu->defined) {
382 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
383 if (ret)
384 DRM_ERROR("Failed to blank CRTC\n");
385
386 (void) vmw_stdu_update_st(dev_priv, stdu);
387
388 ret = vmw_stdu_destroy_st(dev_priv, stdu);
389 if (ret)
390 DRM_ERROR("Failed to destroy Screen Target\n");
391
392 stdu->content_fb_type = SAME_AS_DISPLAY;
393 }
394
395 if (!crtc->state->enable)
396 return;
397
398 vmw_svga_enable(dev_priv);
399 ret = vmw_stdu_define_st(dev_priv, stdu, &crtc->mode, crtc->x, crtc->y);
400
401 if (ret)
402 DRM_ERROR("Failed to define Screen Target of size %dx%d\n",
403 crtc->x, crtc->y);
404}
405
406
407static void vmw_stdu_crtc_helper_prepare(struct drm_crtc *crtc)
408{
409}
410
411
412static void vmw_stdu_crtc_helper_commit(struct drm_crtc *crtc)
413{
414 struct vmw_private *dev_priv;
415 struct vmw_screen_target_display_unit *stdu;
416 struct vmw_framebuffer *vfb;
417 struct drm_framebuffer *fb;
418
419
420 stdu = vmw_crtc_to_stdu(crtc);
421 dev_priv = vmw_priv(crtc->dev);
422 fb = crtc->primary->fb;
423
424 vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
425
426 if (vfb)
427 vmw_kms_add_active(dev_priv, &stdu->base, vfb);
428 else
429 vmw_kms_del_active(dev_priv, &stdu->base);
430}
431
432static void vmw_stdu_crtc_helper_disable(struct drm_crtc *crtc)
433{
434 struct vmw_private *dev_priv;
435 struct vmw_screen_target_display_unit *stdu;
436 int ret;
437
438
439 if (!crtc) {
440 DRM_ERROR("CRTC is NULL\n");
441 return;
442 }
443
444 stdu = vmw_crtc_to_stdu(crtc);
445 dev_priv = vmw_priv(crtc->dev);
446
447 if (stdu->defined) {
448 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
449 if (ret)
450 DRM_ERROR("Failed to blank CRTC\n");
451
452 (void) vmw_stdu_update_st(dev_priv, stdu);
453
454 ret = vmw_stdu_destroy_st(dev_priv, stdu);
455 if (ret)
456 DRM_ERROR("Failed to destroy Screen Target\n");
457
458 stdu->content_fb_type = SAME_AS_DISPLAY;
459 }
460}
461
Sinclair Yeh35c05122015-06-26 01:42:06 -0700462/**
Sinclair Yeh35c05122015-06-26 01:42:06 -0700463 * vmw_stdu_crtc_page_flip - Binds a buffer to a screen target
464 *
465 * @crtc: CRTC to attach FB to
466 * @fb: FB to attach
467 * @event: Event to be posted. This event should've been alloced
468 * using k[mz]alloc, and should've been completely initialized.
469 * @page_flip_flags: Input flags.
470 *
471 * If the STDU uses the same display and content buffers, i.e. a true flip,
472 * this function will replace the existing display buffer with the new content
473 * buffer.
474 *
475 * If the STDU uses different display and content buffers, i.e. a blit, then
476 * only the content buffer will be updated.
477 *
478 * RETURNS:
479 * 0 on success, error code on failure
480 */
481static int vmw_stdu_crtc_page_flip(struct drm_crtc *crtc,
482 struct drm_framebuffer *new_fb,
483 struct drm_pending_vblank_event *event,
484 uint32_t flags)
485
486{
487 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700488 struct vmw_screen_target_display_unit *stdu = vmw_crtc_to_stdu(crtc);
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100489 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(new_fb);
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700490 struct drm_vmw_rect vclips;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700491 int ret;
492
Sinclair Yeh35c05122015-06-26 01:42:06 -0700493 dev_priv = vmw_priv(crtc->dev);
494 stdu = vmw_crtc_to_stdu(crtc);
Sinclair Yeh35c05122015-06-26 01:42:06 -0700495
Thomas Hellstrom4d492a02016-02-12 09:01:29 +0100496 if (!stdu->defined || !vmw_kms_crtc_flippable(dev_priv, crtc))
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100497 return -EINVAL;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700498
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700499 /*
500 * We're always async, but the helper doesn't know how to set async
501 * so lie to the helper. Also, the helper expects someone
502 * to pick the event up from the crtc state, and if nobody does,
503 * it will free it. Since we handle the event in this function,
504 * don't hand it to the helper.
505 */
506 flags &= ~DRM_MODE_PAGE_FLIP_ASYNC;
507 ret = drm_atomic_helper_page_flip(crtc, new_fb, NULL, flags);
508 if (ret) {
509 DRM_ERROR("Page flip error %d.\n", ret);
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100510 return ret;
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700511 }
Sinclair Yeh35c05122015-06-26 01:42:06 -0700512
Thomas Hellstrom4d492a02016-02-12 09:01:29 +0100513 if (stdu->base.is_implicit)
514 vmw_kms_update_implicit_fb(dev_priv, crtc);
515
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700516 /*
517 * Now that we've bound a new surface to the screen target,
518 * update the contents.
519 */
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100520 vclips.x = crtc->x;
521 vclips.y = crtc->y;
522 vclips.w = crtc->mode.hdisplay;
523 vclips.h = crtc->mode.vdisplay;
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700524
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100525 if (vfb->dmabuf)
526 ret = vmw_kms_stdu_dma(dev_priv, NULL, vfb, NULL, NULL, &vclips,
527 1, 1, true, false);
528 else
529 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, &vclips,
530 NULL, 0, 0, 1, 1, NULL);
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700531 if (ret) {
532 DRM_ERROR("Page flip update error %d.\n", ret);
Sinclair Yeh35c05122015-06-26 01:42:06 -0700533 return ret;
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700534 }
Sinclair Yeh35c05122015-06-26 01:42:06 -0700535
536 if (event) {
537 struct vmw_fence_obj *fence = NULL;
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700538 struct drm_file *file_priv = event->base.file_priv;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700539
540 vmw_execbuf_fence_commands(NULL, dev_priv, &fence, NULL);
541 if (!fence)
542 return -ENOMEM;
543
544 ret = vmw_event_fence_action_queue(file_priv, fence,
545 &event->base,
546 &event->event.tv_sec,
547 &event->event.tv_usec,
548 true);
549 vmw_fence_obj_unreference(&fence);
Thomas Hellstrom4e0858a2015-11-05 02:18:55 -0800550 } else {
Sinclair Yeh904bb5e2017-03-23 14:29:22 -0700551 (void) vmw_fifo_flush(dev_priv, false);
Sinclair Yeh35c05122015-06-26 01:42:06 -0700552 }
553
Thomas Hellstromb1097ae2016-02-12 08:54:07 +0100554 return 0;
Sinclair Yeh35c05122015-06-26 01:42:06 -0700555}
556
557
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700558/**
559 * vmw_stdu_dmabuf_clip - Callback to encode a suface DMA command cliprect
560 *
561 * @dirty: The closure structure.
562 *
563 * Encodes a surface DMA command cliprect and updates the bounding box
564 * for the DMA.
565 */
566static void vmw_stdu_dmabuf_clip(struct vmw_kms_dirty *dirty)
567{
568 struct vmw_stdu_dirty *ddirty =
569 container_of(dirty, struct vmw_stdu_dirty, base);
570 struct vmw_stdu_dma *cmd = dirty->cmd;
571 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
572
573 blit += dirty->num_hits;
574 blit->srcx = dirty->fb_x;
575 blit->srcy = dirty->fb_y;
576 blit->x = dirty->unit_x1;
577 blit->y = dirty->unit_y1;
578 blit->d = 1;
579 blit->w = dirty->unit_x2 - dirty->unit_x1;
580 blit->h = dirty->unit_y2 - dirty->unit_y1;
581 dirty->num_hits++;
582
583 if (ddirty->transfer != SVGA3D_WRITE_HOST_VRAM)
584 return;
585
586 /* Destination bounding box */
587 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
588 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
589 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
590 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
591}
592
593/**
594 * vmw_stdu_dmabuf_fifo_commit - Callback to fill in and submit a DMA command.
595 *
596 * @dirty: The closure structure.
597 *
598 * Fills in the missing fields in a DMA command, and optionally encodes
599 * a screen target update command, depending on transfer direction.
600 */
601static void vmw_stdu_dmabuf_fifo_commit(struct vmw_kms_dirty *dirty)
602{
603 struct vmw_stdu_dirty *ddirty =
604 container_of(dirty, struct vmw_stdu_dirty, base);
605 struct vmw_screen_target_display_unit *stdu =
606 container_of(dirty->unit, typeof(*stdu), base);
607 struct vmw_stdu_dma *cmd = dirty->cmd;
608 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
609 SVGA3dCmdSurfaceDMASuffix *suffix =
610 (SVGA3dCmdSurfaceDMASuffix *) &blit[dirty->num_hits];
611 size_t blit_size = sizeof(*blit) * dirty->num_hits + sizeof(*suffix);
612
613 if (!dirty->num_hits) {
614 vmw_fifo_commit(dirty->dev_priv, 0);
615 return;
616 }
617
618 cmd->header.id = SVGA_3D_CMD_SURFACE_DMA;
619 cmd->header.size = sizeof(cmd->body) + blit_size;
620 vmw_bo_get_guest_ptr(&ddirty->buf->base, &cmd->body.guest.ptr);
621 cmd->body.guest.pitch = ddirty->pitch;
622 cmd->body.host.sid = stdu->display_srf->res.id;
623 cmd->body.host.face = 0;
624 cmd->body.host.mipmap = 0;
625 cmd->body.transfer = ddirty->transfer;
626 suffix->suffixSize = sizeof(*suffix);
627 suffix->maximumOffset = ddirty->buf->base.num_pages * PAGE_SIZE;
628
629 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
630 blit_size += sizeof(struct vmw_stdu_update);
631
632 vmw_stdu_populate_update(&suffix[1], stdu->base.unit,
633 ddirty->left, ddirty->right,
634 ddirty->top, ddirty->bottom);
635 }
636
637 vmw_fifo_commit(dirty->dev_priv, sizeof(*cmd) + blit_size);
638
639 ddirty->left = ddirty->top = S32_MAX;
640 ddirty->right = ddirty->bottom = S32_MIN;
641}
642
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700643
644/**
645 * vmw_stdu_dmabuf_cpu_clip - Callback to encode a CPU blit
646 *
647 * @dirty: The closure structure.
648 *
649 * This function calculates the bounding box for all the incoming clips
650 */
651static void vmw_stdu_dmabuf_cpu_clip(struct vmw_kms_dirty *dirty)
652{
653 struct vmw_stdu_dirty *ddirty =
654 container_of(dirty, struct vmw_stdu_dirty, base);
655
656 dirty->num_hits = 1;
657
658 /* Calculate bounding box */
659 ddirty->left = min_t(s32, ddirty->left, dirty->unit_x1);
660 ddirty->top = min_t(s32, ddirty->top, dirty->unit_y1);
661 ddirty->right = max_t(s32, ddirty->right, dirty->unit_x2);
662 ddirty->bottom = max_t(s32, ddirty->bottom, dirty->unit_y2);
663}
664
665
666/**
667 * vmw_stdu_dmabuf_cpu_commit - Callback to do a CPU blit from DMAbuf
668 *
669 * @dirty: The closure structure.
670 *
671 * For the special case when we cannot create a proxy surface in a
672 * 2D VM, we have to do a CPU blit ourselves.
673 */
674static void vmw_stdu_dmabuf_cpu_commit(struct vmw_kms_dirty *dirty)
675{
676 struct vmw_stdu_dirty *ddirty =
677 container_of(dirty, struct vmw_stdu_dirty, base);
678 struct vmw_screen_target_display_unit *stdu =
679 container_of(dirty->unit, typeof(*stdu), base);
680 s32 width, height;
681 s32 src_pitch, dst_pitch;
682 u8 *src, *dst;
683 bool not_used;
684
685
686 if (!dirty->num_hits)
687 return;
688
689 width = ddirty->right - ddirty->left;
690 height = ddirty->bottom - ddirty->top;
691
692 if (width == 0 || height == 0)
693 return;
694
695
696 /* Assume we are blitting from Host (display_srf) to Guest (dmabuf) */
697 src_pitch = stdu->display_srf->base_size.width * stdu->cpp;
698 src = ttm_kmap_obj_virtual(&stdu->host_map, &not_used);
699 src += dirty->unit_y1 * src_pitch + dirty->unit_x1 * stdu->cpp;
700
701 dst_pitch = ddirty->pitch;
702 dst = ttm_kmap_obj_virtual(&stdu->guest_map, &not_used);
703 dst += dirty->fb_y * dst_pitch + dirty->fb_x * stdu->cpp;
704
705
706 /* Figure out the real direction */
707 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
708 u8 *tmp;
709 s32 tmp_pitch;
710
711 tmp = src;
712 tmp_pitch = src_pitch;
713
714 src = dst;
715 src_pitch = dst_pitch;
716
717 dst = tmp;
718 dst_pitch = tmp_pitch;
719 }
720
721 /* CPU Blit */
722 while (height-- > 0) {
723 memcpy(dst, src, width * stdu->cpp);
724 dst += dst_pitch;
725 src += src_pitch;
726 }
727
728 if (ddirty->transfer == SVGA3D_WRITE_HOST_VRAM) {
729 struct vmw_private *dev_priv;
730 struct vmw_stdu_update *cmd;
731 struct drm_clip_rect region;
732 int ret;
733
734 /* We are updating the actual surface, not a proxy */
735 region.x1 = ddirty->left;
736 region.x2 = ddirty->right;
737 region.y1 = ddirty->top;
738 region.y2 = ddirty->bottom;
739 ret = vmw_kms_update_proxy(
740 (struct vmw_resource *) &stdu->display_srf->res,
741 (const struct drm_clip_rect *) &region, 1, 1);
742 if (ret)
743 goto out_cleanup;
744
745
746 dev_priv = vmw_priv(stdu->base.crtc.dev);
747 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
748
749 if (!cmd) {
750 DRM_ERROR("Cannot reserve FIFO space to update STDU");
751 goto out_cleanup;
752 }
753
754 vmw_stdu_populate_update(cmd, stdu->base.unit,
755 ddirty->left, ddirty->right,
756 ddirty->top, ddirty->bottom);
757
758 vmw_fifo_commit(dev_priv, sizeof(*cmd));
759 }
760
761out_cleanup:
762 ddirty->left = ddirty->top = S32_MAX;
763 ddirty->right = ddirty->bottom = S32_MIN;
764}
765
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700766/**
767 * vmw_kms_stdu_dma - Perform a DMA transfer between a dma-buffer backed
768 * framebuffer and the screen target system.
769 *
770 * @dev_priv: Pointer to the device private structure.
771 * @file_priv: Pointer to a struct drm-file identifying the caller. May be
772 * set to NULL, but then @user_fence_rep must also be set to NULL.
773 * @vfb: Pointer to the dma-buffer backed framebuffer.
774 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
775 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
776 * be NULL.
777 * @num_clips: Number of clip rects in @clips or @vclips.
778 * @increment: Increment to use when looping over @clips or @vclips.
779 * @to_surface: Whether to DMA to the screen target system as opposed to
780 * from the screen target system.
781 * @interruptible: Whether to perform waits interruptible if possible.
782 *
783 * If DMA-ing till the screen target system, the function will also notify
784 * the screen target system that a bounding box of the cliprects has been
785 * updated.
786 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
787 * interrupted.
788 */
789int vmw_kms_stdu_dma(struct vmw_private *dev_priv,
790 struct drm_file *file_priv,
791 struct vmw_framebuffer *vfb,
792 struct drm_vmw_fence_rep __user *user_fence_rep,
793 struct drm_clip_rect *clips,
794 struct drm_vmw_rect *vclips,
795 uint32_t num_clips,
796 int increment,
797 bool to_surface,
798 bool interruptible)
799{
800 struct vmw_dma_buffer *buf =
801 container_of(vfb, struct vmw_framebuffer_dmabuf, base)->buffer;
802 struct vmw_stdu_dirty ddirty;
803 int ret;
804
805 ret = vmw_kms_helper_buffer_prepare(dev_priv, buf, interruptible,
806 false);
807 if (ret)
808 return ret;
809
810 ddirty.transfer = (to_surface) ? SVGA3D_WRITE_HOST_VRAM :
811 SVGA3D_READ_HOST_VRAM;
812 ddirty.left = ddirty.top = S32_MAX;
813 ddirty.right = ddirty.bottom = S32_MIN;
814 ddirty.pitch = vfb->base.pitches[0];
815 ddirty.buf = buf;
816 ddirty.base.fifo_commit = vmw_stdu_dmabuf_fifo_commit;
817 ddirty.base.clip = vmw_stdu_dmabuf_clip;
818 ddirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_dma) +
819 num_clips * sizeof(SVGA3dCopyBox) +
820 sizeof(SVGA3dCmdSurfaceDMASuffix);
821 if (to_surface)
822 ddirty.base.fifo_reserve_size += sizeof(struct vmw_stdu_update);
823
Sinclair Yeh810b3e162017-03-23 15:39:16 -0700824 /* 2D VMs cannot use SVGA_3D_CMD_SURFACE_DMA so do CPU blit instead */
825 if (!(dev_priv->capabilities & SVGA_CAP_3D)) {
826 ddirty.base.fifo_commit = vmw_stdu_dmabuf_cpu_commit;
827 ddirty.base.clip = vmw_stdu_dmabuf_cpu_clip;
828 ddirty.base.fifo_reserve_size = 0;
829 }
830
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -0700831 ret = vmw_kms_helper_dirty(dev_priv, vfb, clips, vclips,
832 0, 0, num_clips, increment, &ddirty.base);
833 vmw_kms_helper_buffer_finish(dev_priv, file_priv, buf, NULL,
834 user_fence_rep);
835
836 return ret;
837}
838
839/**
840 * vmw_stdu_surface_clip - Callback to encode a surface copy command cliprect
841 *
842 * @dirty: The closure structure.
843 *
844 * Encodes a surface copy command cliprect and updates the bounding box
845 * for the copy.
846 */
847static void vmw_kms_stdu_surface_clip(struct vmw_kms_dirty *dirty)
848{
849 struct vmw_stdu_dirty *sdirty =
850 container_of(dirty, struct vmw_stdu_dirty, base);
851 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
852 struct vmw_screen_target_display_unit *stdu =
853 container_of(dirty->unit, typeof(*stdu), base);
854
855 if (sdirty->sid != stdu->display_srf->res.id) {
856 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
857
858 blit += dirty->num_hits;
859 blit->srcx = dirty->fb_x;
860 blit->srcy = dirty->fb_y;
861 blit->x = dirty->unit_x1;
862 blit->y = dirty->unit_y1;
863 blit->d = 1;
864 blit->w = dirty->unit_x2 - dirty->unit_x1;
865 blit->h = dirty->unit_y2 - dirty->unit_y1;
866 }
867
868 dirty->num_hits++;
869
870 /* Destination bounding box */
871 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
872 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
873 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
874 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
875}
876
877/**
878 * vmw_stdu_surface_fifo_commit - Callback to fill in and submit a surface
879 * copy command.
880 *
881 * @dirty: The closure structure.
882 *
883 * Fills in the missing fields in a surface copy command, and encodes a screen
884 * target update command.
885 */
886static void vmw_kms_stdu_surface_fifo_commit(struct vmw_kms_dirty *dirty)
887{
888 struct vmw_stdu_dirty *sdirty =
889 container_of(dirty, struct vmw_stdu_dirty, base);
890 struct vmw_screen_target_display_unit *stdu =
891 container_of(dirty->unit, typeof(*stdu), base);
892 struct vmw_stdu_surface_copy *cmd = dirty->cmd;
893 struct vmw_stdu_update *update;
894 size_t blit_size = sizeof(SVGA3dCopyBox) * dirty->num_hits;
895 size_t commit_size;
896
897 if (!dirty->num_hits) {
898 vmw_fifo_commit(dirty->dev_priv, 0);
899 return;
900 }
901
902 if (sdirty->sid != stdu->display_srf->res.id) {
903 struct SVGA3dCopyBox *blit = (struct SVGA3dCopyBox *) &cmd[1];
904
905 cmd->header.id = SVGA_3D_CMD_SURFACE_COPY;
906 cmd->header.size = sizeof(cmd->body) + blit_size;
907 cmd->body.src.sid = sdirty->sid;
908 cmd->body.dest.sid = stdu->display_srf->res.id;
909 update = (struct vmw_stdu_update *) &blit[dirty->num_hits];
910 commit_size = sizeof(*cmd) + blit_size + sizeof(*update);
911 } else {
912 update = dirty->cmd;
913 commit_size = sizeof(*update);
914 }
915
916 vmw_stdu_populate_update(update, stdu->base.unit, sdirty->left,
917 sdirty->right, sdirty->top, sdirty->bottom);
918
919 vmw_fifo_commit(dirty->dev_priv, commit_size);
920
921 sdirty->left = sdirty->top = S32_MAX;
922 sdirty->right = sdirty->bottom = S32_MIN;
923}
924
925/**
926 * vmw_kms_stdu_surface_dirty - Dirty part of a surface backed framebuffer
927 *
928 * @dev_priv: Pointer to the device private structure.
929 * @framebuffer: Pointer to the surface-buffer backed framebuffer.
930 * @clips: Array of clip rects. Either @clips or @vclips must be NULL.
931 * @vclips: Alternate array of clip rects. Either @clips or @vclips must
932 * be NULL.
933 * @srf: Pointer to surface to blit from. If NULL, the surface attached
934 * to @framebuffer will be used.
935 * @dest_x: X coordinate offset to align @srf with framebuffer coordinates.
936 * @dest_y: Y coordinate offset to align @srf with framebuffer coordinates.
937 * @num_clips: Number of clip rects in @clips.
938 * @inc: Increment to use when looping over @clips.
939 * @out_fence: If non-NULL, will return a ref-counted pointer to a
940 * struct vmw_fence_obj. The returned fence pointer may be NULL in which
941 * case the device has already synchronized.
942 *
943 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
944 * interrupted.
945 */
946int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv,
947 struct vmw_framebuffer *framebuffer,
948 struct drm_clip_rect *clips,
949 struct drm_vmw_rect *vclips,
950 struct vmw_resource *srf,
951 s32 dest_x,
952 s32 dest_y,
953 unsigned num_clips, int inc,
954 struct vmw_fence_obj **out_fence)
955{
956 struct vmw_framebuffer_surface *vfbs =
957 container_of(framebuffer, typeof(*vfbs), base);
958 struct vmw_stdu_dirty sdirty;
959 int ret;
960
961 if (!srf)
962 srf = &vfbs->surface->res;
963
964 ret = vmw_kms_helper_resource_prepare(srf, true);
965 if (ret)
966 return ret;
967
968 if (vfbs->is_dmabuf_proxy) {
969 ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
970 if (ret)
971 goto out_finish;
972 }
973
974 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
975 sdirty.base.clip = vmw_kms_stdu_surface_clip;
976 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
977 sizeof(SVGA3dCopyBox) * num_clips +
978 sizeof(struct vmw_stdu_update);
979 sdirty.sid = srf->id;
980 sdirty.left = sdirty.top = S32_MAX;
981 sdirty.right = sdirty.bottom = S32_MIN;
982
983 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
984 dest_x, dest_y, num_clips, inc,
985 &sdirty.base);
986out_finish:
987 vmw_kms_helper_resource_finish(srf, out_fence);
988
989 return ret;
990}
991
Sinclair Yeh35c05122015-06-26 01:42:06 -0700992
993/*
994 * Screen Target CRTC dispatch table
995 */
Ville Syrjäläd7955fc2015-12-15 12:21:15 +0100996static const struct drm_crtc_funcs vmw_stdu_crtc_funcs = {
Sinclair Yeh35c05122015-06-26 01:42:06 -0700997 .gamma_set = vmw_du_crtc_gamma_set,
998 .destroy = vmw_stdu_crtc_destroy,
Sinclair Yeh9c2542a2017-03-23 11:33:39 -0700999 .reset = vmw_du_crtc_reset,
1000 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
1001 .atomic_destroy_state = vmw_du_crtc_destroy_state,
Sinclair Yeh904bb5e2017-03-23 14:29:22 -07001002 .set_config = vmw_kms_set_config,
Sinclair Yeh35c05122015-06-26 01:42:06 -07001003 .page_flip = vmw_stdu_crtc_page_flip,
1004};
1005
1006
1007
1008/******************************************************************************
1009 * Screen Target Display Unit Encoder Functions
1010 *****************************************************************************/
1011
1012/**
1013 * vmw_stdu_encoder_destroy - cleans up the STDU
1014 *
1015 * @encoder: used the get the containing STDU
1016 *
1017 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1018 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1019 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1020 * get called.
1021 */
1022static void vmw_stdu_encoder_destroy(struct drm_encoder *encoder)
1023{
1024 vmw_stdu_destroy(vmw_encoder_to_stdu(encoder));
1025}
1026
Ville Syrjäläd7955fc2015-12-15 12:21:15 +01001027static const struct drm_encoder_funcs vmw_stdu_encoder_funcs = {
Sinclair Yeh35c05122015-06-26 01:42:06 -07001028 .destroy = vmw_stdu_encoder_destroy,
1029};
1030
1031
1032
1033/******************************************************************************
1034 * Screen Target Display Unit Connector Functions
1035 *****************************************************************************/
1036
1037/**
1038 * vmw_stdu_connector_destroy - cleans up the STDU
1039 *
1040 * @connector: used to get the containing STDU
1041 *
1042 * vmwgfx cleans up crtc/encoder/connector all at the same time so technically
1043 * this can be a no-op. Nevertheless, it doesn't hurt of have this in case
1044 * the common KMS code changes and somehow vmw_stdu_crtc_destroy() doesn't
1045 * get called.
1046 */
1047static void vmw_stdu_connector_destroy(struct drm_connector *connector)
1048{
1049 vmw_stdu_destroy(vmw_connector_to_stdu(connector));
1050}
1051
1052
1053
Ville Syrjäläd7955fc2015-12-15 12:21:15 +01001054static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
Sinclair Yeh35c05122015-06-26 01:42:06 -07001055 .dpms = vmw_du_connector_dpms,
Sinclair Yeh35c05122015-06-26 01:42:06 -07001056 .detect = vmw_du_connector_detect,
1057 .fill_modes = vmw_du_connector_fill_modes,
1058 .set_property = vmw_du_connector_set_property,
1059 .destroy = vmw_stdu_connector_destroy,
Sinclair Yehd7721ca2017-03-23 11:48:44 -07001060 .reset = vmw_du_connector_reset,
1061 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
1062 .atomic_destroy_state = vmw_du_connector_destroy_state,
1063 .atomic_set_property = vmw_du_connector_atomic_set_property,
1064 .atomic_get_property = vmw_du_connector_atomic_get_property,
Sinclair Yeh35c05122015-06-26 01:42:06 -07001065};
1066
1067
Sinclair Yehd947d1b2017-03-23 14:23:20 -07001068static const struct
1069drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
1070 .best_encoder = drm_atomic_helper_best_encoder,
1071};
1072
1073
Sinclair Yeh35c05122015-06-26 01:42:06 -07001074
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001075/******************************************************************************
1076 * Screen Target Display Plane Functions
1077 *****************************************************************************/
1078
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001079
1080
1081/**
1082 * vmw_stdu_primary_plane_cleanup_fb - Unpins the display surface
1083 *
1084 * @plane: display plane
1085 * @old_state: Contains the FB to clean up
1086 *
1087 * Unpins the display surface
1088 *
1089 * Returns 0 on success
1090 */
1091static void
1092vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane,
1093 struct drm_plane_state *old_state)
1094{
1095 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
1096
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001097 if (vps->guest_map.virtual)
1098 ttm_bo_kunmap(&vps->guest_map);
1099
1100 if (vps->host_map.virtual)
1101 ttm_bo_kunmap(&vps->host_map);
1102
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001103 if (vps->surf)
1104 WARN_ON(!vps->pinned);
1105
1106 vmw_du_plane_cleanup_fb(plane, old_state);
1107
1108 vps->content_fb_type = SAME_AS_DISPLAY;
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001109 vps->cpp = 0;
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001110}
1111
1112
1113
1114/**
1115 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
1116 *
1117 * @plane: display plane
1118 * @new_state: info on the new plane state, including the FB
1119 *
1120 * This function allocates a new display surface if the content is
1121 * backed by a DMA. The display surface is pinned here, and it'll
1122 * be unpinned in .cleanup_fb()
1123 *
1124 * Returns 0 on success
1125 */
1126static int
1127vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane,
1128 struct drm_plane_state *new_state)
1129{
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001130 struct vmw_private *dev_priv = vmw_priv(plane->dev);
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001131 struct drm_framebuffer *new_fb = new_state->fb;
1132 struct vmw_framebuffer *vfb;
1133 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
1134 enum stdu_content_type new_content_type;
1135 struct vmw_framebuffer_surface *new_vfbs;
1136 struct drm_crtc *crtc = new_state->crtc;
1137 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
1138 int ret;
1139
1140 /* No FB to prepare */
1141 if (!new_fb) {
1142 if (vps->surf) {
1143 WARN_ON(vps->pinned != 0);
1144 vmw_surface_unreference(&vps->surf);
1145 }
1146
1147 return 0;
1148 }
1149
1150 vfb = vmw_framebuffer_to_vfb(new_fb);
1151 new_vfbs = (vfb->dmabuf) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
1152
1153 if (new_vfbs && new_vfbs->surface->base_size.width == hdisplay &&
1154 new_vfbs->surface->base_size.height == vdisplay)
1155 new_content_type = SAME_AS_DISPLAY;
1156 else if (vfb->dmabuf)
1157 new_content_type = SEPARATE_DMA;
1158 else
1159 new_content_type = SEPARATE_SURFACE;
1160
1161 if (new_content_type != SAME_AS_DISPLAY) {
1162 struct vmw_surface content_srf;
1163 struct drm_vmw_size display_base_size = {0};
1164
1165 display_base_size.width = hdisplay;
1166 display_base_size.height = vdisplay;
1167 display_base_size.depth = 1;
1168
1169 /*
1170 * If content buffer is a DMA buf, then we have to construct
1171 * surface info
1172 */
1173 if (new_content_type == SEPARATE_DMA) {
1174
1175 switch (new_fb->format->cpp[0]*8) {
1176 case 32:
1177 content_srf.format = SVGA3D_X8R8G8B8;
1178 break;
1179
1180 case 16:
1181 content_srf.format = SVGA3D_R5G6B5;
1182 break;
1183
1184 case 8:
1185 content_srf.format = SVGA3D_P8;
1186 break;
1187
1188 default:
1189 DRM_ERROR("Invalid format\n");
1190 return -EINVAL;
1191 }
1192
1193 content_srf.flags = 0;
1194 content_srf.mip_levels[0] = 1;
1195 content_srf.multisample_count = 0;
1196 } else {
1197 content_srf = *new_vfbs->surface;
1198 }
1199
1200 if (vps->surf) {
1201 struct drm_vmw_size cur_base_size = vps->surf->base_size;
1202
1203 if (cur_base_size.width != display_base_size.width ||
1204 cur_base_size.height != display_base_size.height ||
1205 vps->surf->format != content_srf.format) {
1206 WARN_ON(vps->pinned != 0);
1207 vmw_surface_unreference(&vps->surf);
1208 }
1209
1210 }
1211
1212 if (!vps->surf) {
1213 ret = vmw_surface_gb_priv_define
1214 (crtc->dev,
1215 /* Kernel visible only */
1216 0,
1217 content_srf.flags,
1218 content_srf.format,
1219 true, /* a scanout buffer */
1220 content_srf.mip_levels[0],
1221 content_srf.multisample_count,
1222 0,
1223 display_base_size,
1224 &vps->surf);
1225 if (ret != 0) {
1226 DRM_ERROR("Couldn't allocate STDU surface.\n");
1227 return ret;
1228 }
1229 }
1230 } else {
1231 /*
1232 * prepare_fb and clean_fb should only take care of pinning
1233 * and unpinning. References are tracked by state objects.
1234 * The only time we add a reference in prepare_fb is if the
1235 * state object doesn't have a reference to begin with
1236 */
1237 if (vps->surf) {
1238 WARN_ON(vps->pinned != 0);
1239 vmw_surface_unreference(&vps->surf);
1240 }
1241
1242 vps->surf = vmw_surface_reference(new_vfbs->surface);
1243 }
1244
1245 if (vps->surf) {
1246
1247 /* Pin new surface before flipping */
1248 ret = vmw_resource_pin(&vps->surf->res, false);
1249 if (ret)
1250 goto out_srf_unref;
1251
1252 vps->pinned++;
1253 }
1254
1255 vps->content_fb_type = new_content_type;
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001256
1257 /*
1258 * This should only happen if the DMA buf is too large to create a
1259 * proxy surface for.
1260 * If we are a 2D VM with a DMA buffer then we have to use CPU blit
1261 * so cache these mappings
1262 */
1263 if (vps->content_fb_type == SEPARATE_DMA &&
1264 !(dev_priv->capabilities & SVGA_CAP_3D)) {
1265
1266 struct vmw_framebuffer_dmabuf *new_vfbd;
1267
1268 new_vfbd = vmw_framebuffer_to_vfbd(new_fb);
1269
1270 ret = ttm_bo_reserve(&new_vfbd->buffer->base, false, false,
1271 NULL);
1272 if (ret)
1273 goto out_srf_unpin;
1274
1275 ret = ttm_bo_kmap(&new_vfbd->buffer->base, 0,
1276 new_vfbd->buffer->base.num_pages,
1277 &vps->guest_map);
1278
1279 ttm_bo_unreserve(&new_vfbd->buffer->base);
1280
1281 if (ret) {
1282 DRM_ERROR("Failed to map content buffer to CPU\n");
1283 goto out_srf_unpin;
1284 }
1285
1286 ret = ttm_bo_kmap(&vps->surf->res.backup->base, 0,
1287 vps->surf->res.backup->base.num_pages,
1288 &vps->host_map);
1289 if (ret) {
1290 DRM_ERROR("Failed to map display buffer to CPU\n");
1291 ttm_bo_kunmap(&vps->guest_map);
1292 goto out_srf_unpin;
1293 }
1294
1295 vps->cpp = new_fb->pitches[0] / new_fb->width;
1296 }
1297
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001298 return 0;
1299
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001300out_srf_unpin:
1301 vmw_resource_unpin(&vps->surf->res);
1302 vps->pinned--;
1303
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001304out_srf_unref:
1305 vmw_surface_unreference(&vps->surf);
1306 return ret;
1307}
1308
1309
1310
1311/**
1312 * vmw_stdu_primary_plane_atomic_update - formally switches STDU to new plane
1313 *
1314 * @plane: display plane
1315 * @old_state: Only used to get crtc info
1316 *
1317 * Formally update stdu->display_srf to the new plane, and bind the new
1318 * plane STDU. This function is called during the commit phase when
1319 * all the preparation have been done and all the configurations have
1320 * been checked.
1321 */
1322static void
1323vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane,
1324 struct drm_plane_state *old_state)
1325{
1326 struct vmw_private *dev_priv;
1327 struct vmw_screen_target_display_unit *stdu;
1328 struct vmw_plane_state *vps = vmw_plane_state_to_vps(plane->state);
1329 struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc;
1330 int ret;
1331
1332 stdu = vmw_crtc_to_stdu(crtc);
1333 dev_priv = vmw_priv(crtc->dev);
1334
1335 stdu->display_srf = vps->surf;
1336 stdu->content_fb_type = vps->content_fb_type;
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001337 stdu->cpp = vps->cpp;
1338 memcpy(&stdu->guest_map, &vps->guest_map, sizeof(vps->guest_map));
1339 memcpy(&stdu->host_map, &vps->host_map, sizeof(vps->host_map));
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001340
1341 if (!stdu->defined)
1342 return;
1343
1344 if (plane->state->fb)
1345 ret = vmw_stdu_bind_st(dev_priv, stdu, &stdu->display_srf->res);
1346 else
1347 ret = vmw_stdu_bind_st(dev_priv, stdu, NULL);
1348
1349 /*
1350 * We cannot really fail this function, so if we do, then output an
1351 * error and quit
1352 */
1353 if (ret)
1354 DRM_ERROR("Failed to bind surface to STDU.\n");
1355 else
1356 crtc->primary->fb = plane->state->fb;
1357}
1358
1359
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001360static const struct drm_plane_funcs vmw_stdu_plane_funcs = {
Sinclair Yeh904bb5e2017-03-23 14:29:22 -07001361 .update_plane = drm_atomic_helper_update_plane,
1362 .disable_plane = drm_atomic_helper_disable_plane,
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001363 .destroy = vmw_du_primary_plane_destroy,
Sinclair Yehcc5ec452017-03-23 11:36:05 -07001364 .reset = vmw_du_plane_reset,
1365 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1366 .atomic_destroy_state = vmw_du_plane_destroy_state,
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001367};
1368
1369static const struct drm_plane_funcs vmw_stdu_cursor_funcs = {
Sinclair Yeh904bb5e2017-03-23 14:29:22 -07001370 .update_plane = drm_atomic_helper_update_plane,
1371 .disable_plane = drm_atomic_helper_disable_plane,
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001372 .destroy = vmw_du_cursor_plane_destroy,
Sinclair Yehcc5ec452017-03-23 11:36:05 -07001373 .reset = vmw_du_plane_reset,
1374 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
1375 .atomic_destroy_state = vmw_du_plane_destroy_state,
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001376};
1377
1378
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001379/*
1380 * Atomic Helpers
1381 */
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001382static const struct
1383drm_plane_helper_funcs vmw_stdu_cursor_plane_helper_funcs = {
1384 .atomic_check = vmw_du_cursor_plane_atomic_check,
1385 .atomic_update = vmw_du_cursor_plane_atomic_update,
1386 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
1387 .cleanup_fb = vmw_du_plane_cleanup_fb,
1388};
1389
1390static const struct
1391drm_plane_helper_funcs vmw_stdu_primary_plane_helper_funcs = {
1392 .atomic_check = vmw_du_primary_plane_atomic_check,
1393 .atomic_update = vmw_stdu_primary_plane_atomic_update,
1394 .prepare_fb = vmw_stdu_primary_plane_prepare_fb,
1395 .cleanup_fb = vmw_stdu_primary_plane_cleanup_fb,
1396};
1397
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001398static const struct drm_crtc_helper_funcs vmw_stdu_crtc_helper_funcs = {
1399 .prepare = vmw_stdu_crtc_helper_prepare,
1400 .commit = vmw_stdu_crtc_helper_commit,
1401 .disable = vmw_stdu_crtc_helper_disable,
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001402 .mode_set_nofb = vmw_stdu_crtc_mode_set_nofb,
1403 .atomic_check = vmw_du_crtc_atomic_check,
1404 .atomic_begin = vmw_du_crtc_atomic_begin,
1405 .atomic_flush = vmw_du_crtc_atomic_flush,
1406};
1407
1408
Sinclair Yeh35c05122015-06-26 01:42:06 -07001409/**
1410 * vmw_stdu_init - Sets up a Screen Target Display Unit
1411 *
1412 * @dev_priv: VMW DRM device
1413 * @unit: unit number range from 0 to VMWGFX_NUM_DISPLAY_UNITS
1414 *
1415 * This function is called once per CRTC, and allocates one Screen Target
1416 * display unit to represent that CRTC. Since the SVGA device does not separate
1417 * out encoder and connector, they are represented as part of the STDU as well.
1418 */
1419static int vmw_stdu_init(struct vmw_private *dev_priv, unsigned unit)
1420{
1421 struct vmw_screen_target_display_unit *stdu;
1422 struct drm_device *dev = dev_priv->dev;
1423 struct drm_connector *connector;
1424 struct drm_encoder *encoder;
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001425 struct drm_plane *primary, *cursor;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001426 struct drm_crtc *crtc;
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001427 int ret;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001428
1429
1430 stdu = kzalloc(sizeof(*stdu), GFP_KERNEL);
1431 if (!stdu)
1432 return -ENOMEM;
1433
1434 stdu->base.unit = unit;
1435 crtc = &stdu->base.crtc;
1436 encoder = &stdu->base.encoder;
1437 connector = &stdu->base.connector;
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001438 primary = &stdu->base.primary;
1439 cursor = &stdu->base.cursor;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001440
1441 stdu->base.pref_active = (unit == 0);
1442 stdu->base.pref_width = dev_priv->initial_width;
1443 stdu->base.pref_height = dev_priv->initial_height;
Sinclair Yeh9c2542a2017-03-23 11:33:39 -07001444
1445 /*
1446 * Remove this after enabling atomic because property values can
1447 * only exist in a state object
1448 */
Thomas Hellstrom2e69b252016-02-12 09:59:50 +01001449 stdu->base.is_implicit = false;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001450
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001451 /* Initialize primary plane */
Sinclair Yehcc5ec452017-03-23 11:36:05 -07001452 vmw_du_plane_reset(primary);
1453
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001454 ret = drm_universal_plane_init(dev, primary,
1455 0, &vmw_stdu_plane_funcs,
1456 vmw_primary_plane_formats,
1457 ARRAY_SIZE(vmw_primary_plane_formats),
1458 DRM_PLANE_TYPE_PRIMARY, NULL);
1459 if (ret) {
1460 DRM_ERROR("Failed to initialize primary plane");
1461 goto err_free;
1462 }
1463
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001464 drm_plane_helper_add(primary, &vmw_stdu_primary_plane_helper_funcs);
1465
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001466 /* Initialize cursor plane */
Sinclair Yehcc5ec452017-03-23 11:36:05 -07001467 vmw_du_plane_reset(cursor);
1468
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001469 ret = drm_universal_plane_init(dev, cursor,
1470 0, &vmw_stdu_cursor_funcs,
1471 vmw_cursor_plane_formats,
1472 ARRAY_SIZE(vmw_cursor_plane_formats),
1473 DRM_PLANE_TYPE_CURSOR, NULL);
1474 if (ret) {
1475 DRM_ERROR("Failed to initialize cursor plane");
1476 drm_plane_cleanup(&stdu->base.primary);
1477 goto err_free;
1478 }
1479
Sinclair Yeh060e2ad2017-03-23 14:18:32 -07001480 drm_plane_helper_add(cursor, &vmw_stdu_cursor_plane_helper_funcs);
1481
Sinclair Yehd7721ca2017-03-23 11:48:44 -07001482 vmw_du_connector_reset(connector);
1483
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001484 ret = drm_connector_init(dev, connector, &vmw_stdu_connector_funcs,
1485 DRM_MODE_CONNECTOR_VIRTUAL);
1486 if (ret) {
1487 DRM_ERROR("Failed to initialize connector\n");
1488 goto err_free;
1489 }
Sinclair Yehd947d1b2017-03-23 14:23:20 -07001490
1491 drm_connector_helper_add(connector, &vmw_stdu_connector_helper_funcs);
Sinclair Yeh35c05122015-06-26 01:42:06 -07001492 connector->status = vmw_du_connector_detect(connector, false);
Sinclair Yehd7721ca2017-03-23 11:48:44 -07001493 vmw_connector_state_to_vcs(connector->state)->is_implicit = false;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001494
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001495 ret = drm_encoder_init(dev, encoder, &vmw_stdu_encoder_funcs,
1496 DRM_MODE_ENCODER_VIRTUAL, NULL);
1497 if (ret) {
1498 DRM_ERROR("Failed to initialize encoder\n");
1499 goto err_free_connector;
1500 }
1501
1502 (void) drm_mode_connector_attach_encoder(connector, encoder);
Sinclair Yeh35c05122015-06-26 01:42:06 -07001503 encoder->possible_crtcs = (1 << unit);
1504 encoder->possible_clones = 0;
1505
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001506 ret = drm_connector_register(connector);
1507 if (ret) {
1508 DRM_ERROR("Failed to register connector\n");
1509 goto err_free_encoder;
1510 }
Sinclair Yeh35c05122015-06-26 01:42:06 -07001511
Sinclair Yehd7721ca2017-03-23 11:48:44 -07001512 vmw_du_crtc_reset(crtc);
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001513 ret = drm_crtc_init_with_planes(dev, crtc, &stdu->base.primary,
1514 &stdu->base.cursor,
1515 &vmw_stdu_crtc_funcs, NULL);
1516 if (ret) {
1517 DRM_ERROR("Failed to initialize CRTC\n");
1518 goto err_free_unregister;
1519 }
Sinclair Yeh35c05122015-06-26 01:42:06 -07001520
Sinclair Yeh06ec4192017-03-23 13:14:54 -07001521 drm_crtc_helper_add(crtc, &vmw_stdu_crtc_helper_funcs);
1522
Sinclair Yeh35c05122015-06-26 01:42:06 -07001523 drm_mode_crtc_set_gamma_size(crtc, 256);
1524
1525 drm_object_attach_property(&connector->base,
Thomas Hellstrom578e6092016-02-12 09:45:42 +01001526 dev_priv->hotplug_mode_update_property, 1);
1527 drm_object_attach_property(&connector->base,
1528 dev->mode_config.suggested_x_property, 0);
1529 drm_object_attach_property(&connector->base,
1530 dev->mode_config.suggested_y_property, 0);
Thomas Hellstrom76404ac2016-02-12 09:55:45 +01001531 if (dev_priv->implicit_placement_property)
1532 drm_object_attach_property
1533 (&connector->base,
1534 dev_priv->implicit_placement_property,
1535 stdu->base.is_implicit);
Sinclair Yeh35c05122015-06-26 01:42:06 -07001536 return 0;
Sinclair Yeh36cc79b2017-03-23 11:28:11 -07001537
1538err_free_unregister:
1539 drm_connector_unregister(connector);
1540err_free_encoder:
1541 drm_encoder_cleanup(encoder);
1542err_free_connector:
1543 drm_connector_cleanup(connector);
1544err_free:
1545 kfree(stdu);
1546 return ret;
Sinclair Yeh35c05122015-06-26 01:42:06 -07001547}
1548
1549
1550
1551/**
1552 * vmw_stdu_destroy - Cleans up a vmw_screen_target_display_unit
1553 *
1554 * @stdu: Screen Target Display Unit to be destroyed
1555 *
1556 * Clean up after vmw_stdu_init
1557 */
1558static void vmw_stdu_destroy(struct vmw_screen_target_display_unit *stdu)
1559{
Sinclair Yeh35c05122015-06-26 01:42:06 -07001560 vmw_du_cleanup(&stdu->base);
1561 kfree(stdu);
1562}
1563
1564
1565
1566/******************************************************************************
1567 * Screen Target Display KMS Functions
1568 *
1569 * These functions are called by the common KMS code in vmwgfx_kms.c
1570 *****************************************************************************/
1571
1572/**
1573 * vmw_kms_stdu_init_display - Initializes a Screen Target based display
1574 *
1575 * @dev_priv: VMW DRM device
1576 *
1577 * This function initialize a Screen Target based display device. It checks
1578 * the capability bits to make sure the underlying hardware can support
1579 * screen targets, and then creates the maximum number of CRTCs, a.k.a Display
1580 * Units, as supported by the display hardware.
1581 *
1582 * RETURNS:
1583 * 0 on success, error code otherwise
1584 */
1585int vmw_kms_stdu_init_display(struct vmw_private *dev_priv)
1586{
1587 struct drm_device *dev = dev_priv->dev;
1588 int i, ret;
1589
1590
1591 /* Do nothing if Screen Target support is turned off */
1592 if (!VMWGFX_ENABLE_SCREEN_TARGET_OTABLE)
1593 return -ENOSYS;
1594
Sinclair Yehf89c6c32015-06-26 01:54:28 -07001595 if (!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS))
Sinclair Yeh35c05122015-06-26 01:42:06 -07001596 return -ENOSYS;
1597
1598 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
1599 if (unlikely(ret != 0))
1600 return ret;
1601
Thomas Hellstrom6bf6bf02015-06-26 02:22:40 -07001602 dev_priv->active_display_unit = vmw_du_screen_target;
1603
Sinclair Yeh810b3e162017-03-23 15:39:16 -07001604 if (!(dev_priv->capabilities & SVGA_CAP_3D)) {
1605 /*
1606 * Given various display aspect ratios, there's no way to
1607 * estimate these using prim_bb_mem. So just set these to
1608 * something arbitrarily large and we will reject any layout
1609 * that doesn't fit prim_bb_mem later
1610 */
1611 dev->mode_config.max_width = 16384;
1612 dev->mode_config.max_height = 16384;
1613 }
1614
Thomas Hellstrom76404ac2016-02-12 09:55:45 +01001615 vmw_kms_create_implicit_placement_property(dev_priv, false);
1616
Sinclair Yeh35c05122015-06-26 01:42:06 -07001617 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {
1618 ret = vmw_stdu_init(dev_priv, i);
1619
1620 if (unlikely(ret != 0)) {
1621 DRM_ERROR("Failed to initialize STDU %d", i);
1622 goto err_vblank_cleanup;
1623 }
1624 }
1625
Sinclair Yeh35c05122015-06-26 01:42:06 -07001626 DRM_INFO("Screen Target Display device initialized\n");
1627
1628 return 0;
1629
1630err_vblank_cleanup:
1631 drm_vblank_cleanup(dev);
1632 return ret;
1633}
1634
1635
1636
1637/**
1638 * vmw_kms_stdu_close_display - Cleans up after vmw_kms_stdu_init_display
1639 *
1640 * @dev_priv: VMW DRM device
1641 *
1642 * Frees up any resources allocated by vmw_kms_stdu_init_display
1643 *
1644 * RETURNS:
1645 * 0 on success
1646 */
1647int vmw_kms_stdu_close_display(struct vmw_private *dev_priv)
1648{
1649 struct drm_device *dev = dev_priv->dev;
1650
1651 drm_vblank_cleanup(dev);
1652
1653 return 0;
1654}