Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/video/omap2/dss/dss_features.c |
| 3 | * |
| 4 | * Copyright (C) 2010 Texas Instruments |
| 5 | * Author: Archit Taneja <archit@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License version 2 as published by |
| 9 | * the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/types.h> |
| 22 | #include <linux/err.h> |
| 23 | #include <linux/slab.h> |
| 24 | |
| 25 | #include <plat/display.h> |
| 26 | #include <plat/cpu.h> |
| 27 | |
| 28 | #include "dss_features.h" |
| 29 | |
| 30 | /* Defines a generic omap register field */ |
| 31 | struct dss_reg_field { |
| 32 | enum dss_feat_reg_field id; |
| 33 | u8 start, end; |
| 34 | }; |
| 35 | |
| 36 | struct omap_dss_features { |
| 37 | const struct dss_reg_field *reg_fields; |
| 38 | const int num_reg_fields; |
| 39 | |
| 40 | const u32 has_feature; |
| 41 | |
| 42 | const int num_mgrs; |
| 43 | const int num_ovls; |
Archit Taneja | 819d807 | 2011-03-01 11:54:00 +0530 | [diff] [blame^] | 44 | const unsigned long max_dss_fck; |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 45 | const enum omap_display_type *supported_displays; |
| 46 | const enum omap_color_mode *supported_color_modes; |
| 47 | }; |
| 48 | |
| 49 | /* This struct is assigned to one of the below during initialization */ |
| 50 | static struct omap_dss_features *omap_current_dss_features; |
| 51 | |
| 52 | static const struct dss_reg_field omap2_dss_reg_fields[] = { |
| 53 | { FEAT_REG_FIRHINC, 11, 0 }, |
| 54 | { FEAT_REG_FIRVINC, 27, 16 }, |
| 55 | { FEAT_REG_FIFOLOWTHRESHOLD, 8, 0 }, |
| 56 | { FEAT_REG_FIFOHIGHTHRESHOLD, 24, 16 }, |
| 57 | { FEAT_REG_FIFOSIZE, 8, 0 }, |
Archit Taneja | 87a7484 | 2011-03-02 11:19:50 +0530 | [diff] [blame] | 58 | { FEAT_REG_HORIZONTALACCU, 9, 0 }, |
| 59 | { FEAT_REG_VERTICALACCU, 25, 16 }, |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | static const struct dss_reg_field omap3_dss_reg_fields[] = { |
| 63 | { FEAT_REG_FIRHINC, 12, 0 }, |
| 64 | { FEAT_REG_FIRVINC, 28, 16 }, |
| 65 | { FEAT_REG_FIFOLOWTHRESHOLD, 11, 0 }, |
| 66 | { FEAT_REG_FIFOHIGHTHRESHOLD, 27, 16 }, |
| 67 | { FEAT_REG_FIFOSIZE, 10, 0 }, |
Archit Taneja | 87a7484 | 2011-03-02 11:19:50 +0530 | [diff] [blame] | 68 | { FEAT_REG_HORIZONTALACCU, 9, 0 }, |
| 69 | { FEAT_REG_VERTICALACCU, 25, 16 }, |
| 70 | }; |
| 71 | |
| 72 | static const struct dss_reg_field omap4_dss_reg_fields[] = { |
| 73 | { FEAT_REG_FIRHINC, 12, 0 }, |
| 74 | { FEAT_REG_FIRVINC, 28, 16 }, |
| 75 | { FEAT_REG_FIFOLOWTHRESHOLD, 15, 0 }, |
| 76 | { FEAT_REG_FIFOHIGHTHRESHOLD, 31, 16 }, |
| 77 | { FEAT_REG_FIFOSIZE, 15, 0 }, |
| 78 | { FEAT_REG_HORIZONTALACCU, 10, 0 }, |
| 79 | { FEAT_REG_VERTICALACCU, 26, 16 }, |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 80 | }; |
| 81 | |
| 82 | static const enum omap_display_type omap2_dss_supported_displays[] = { |
| 83 | /* OMAP_DSS_CHANNEL_LCD */ |
Tomi Valkeinen | f8df01f | 2011-02-24 14:21:25 +0200 | [diff] [blame] | 84 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI, |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 85 | |
| 86 | /* OMAP_DSS_CHANNEL_DIGIT */ |
| 87 | OMAP_DISPLAY_TYPE_VENC, |
| 88 | }; |
| 89 | |
Tomi Valkeinen | 4e777dd | 2011-02-24 14:20:31 +0200 | [diff] [blame] | 90 | static const enum omap_display_type omap3430_dss_supported_displays[] = { |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 91 | /* OMAP_DSS_CHANNEL_LCD */ |
| 92 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | |
| 93 | OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI, |
| 94 | |
| 95 | /* OMAP_DSS_CHANNEL_DIGIT */ |
| 96 | OMAP_DISPLAY_TYPE_VENC, |
| 97 | }; |
| 98 | |
Tomi Valkeinen | 4e777dd | 2011-02-24 14:20:31 +0200 | [diff] [blame] | 99 | static const enum omap_display_type omap3630_dss_supported_displays[] = { |
| 100 | /* OMAP_DSS_CHANNEL_LCD */ |
| 101 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | |
| 102 | OMAP_DISPLAY_TYPE_DSI, |
| 103 | |
| 104 | /* OMAP_DSS_CHANNEL_DIGIT */ |
| 105 | OMAP_DISPLAY_TYPE_VENC, |
| 106 | }; |
| 107 | |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 108 | static const enum omap_display_type omap4_dss_supported_displays[] = { |
| 109 | /* OMAP_DSS_CHANNEL_LCD */ |
| 110 | OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI, |
| 111 | |
| 112 | /* OMAP_DSS_CHANNEL_DIGIT */ |
| 113 | OMAP_DISPLAY_TYPE_VENC, |
| 114 | |
| 115 | /* OMAP_DSS_CHANNEL_LCD2 */ |
| 116 | OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI | |
| 117 | OMAP_DISPLAY_TYPE_DSI, |
| 118 | }; |
| 119 | |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 120 | static const enum omap_color_mode omap2_dss_supported_color_modes[] = { |
| 121 | /* OMAP_DSS_GFX */ |
| 122 | OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | |
| 123 | OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | |
| 124 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | |
| 125 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P, |
| 126 | |
| 127 | /* OMAP_DSS_VIDEO1 */ |
| 128 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | |
| 129 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | |
| 130 | OMAP_DSS_COLOR_UYVY, |
| 131 | |
| 132 | /* OMAP_DSS_VIDEO2 */ |
| 133 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | |
| 134 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | |
| 135 | OMAP_DSS_COLOR_UYVY, |
| 136 | }; |
| 137 | |
| 138 | static const enum omap_color_mode omap3_dss_supported_color_modes[] = { |
| 139 | /* OMAP_DSS_GFX */ |
| 140 | OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | |
| 141 | OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | |
| 142 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | |
| 143 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | |
| 144 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | |
| 145 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, |
| 146 | |
| 147 | /* OMAP_DSS_VIDEO1 */ |
| 148 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P | |
| 149 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | |
| 150 | OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY, |
| 151 | |
| 152 | /* OMAP_DSS_VIDEO2 */ |
| 153 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | |
| 154 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | |
| 155 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | |
| 156 | OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 | |
| 157 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, |
| 158 | }; |
| 159 | |
| 160 | /* OMAP2 DSS Features */ |
| 161 | static struct omap_dss_features omap2_dss_features = { |
| 162 | .reg_fields = omap2_dss_reg_fields, |
| 163 | .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields), |
| 164 | |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 165 | .has_feature = |
| 166 | FEAT_LCDENABLEPOL | FEAT_LCDENABLESIGNAL | |
Archit Taneja | 87a7484 | 2011-03-02 11:19:50 +0530 | [diff] [blame] | 167 | FEAT_PCKFREEENABLE | FEAT_FUNCGATED | |
| 168 | FEAT_ROWREPEATENABLE | FEAT_RESIZECONF, |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 169 | |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 170 | .num_mgrs = 2, |
| 171 | .num_ovls = 3, |
Archit Taneja | 819d807 | 2011-03-01 11:54:00 +0530 | [diff] [blame^] | 172 | .max_dss_fck = 173000000, |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 173 | .supported_displays = omap2_dss_supported_displays, |
| 174 | .supported_color_modes = omap2_dss_supported_color_modes, |
| 175 | }; |
| 176 | |
| 177 | /* OMAP3 DSS Features */ |
Samreen | 8fbde10 | 2010-11-04 12:28:41 +0100 | [diff] [blame] | 178 | static struct omap_dss_features omap3430_dss_features = { |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 179 | .reg_fields = omap3_dss_reg_fields, |
| 180 | .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields), |
| 181 | |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 182 | .has_feature = |
| 183 | FEAT_GLOBAL_ALPHA | FEAT_LCDENABLEPOL | |
| 184 | FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE | |
Archit Taneja | 87a7484 | 2011-03-02 11:19:50 +0530 | [diff] [blame] | 185 | FEAT_FUNCGATED | FEAT_ROWREPEATENABLE | |
| 186 | FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF, |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 187 | |
| 188 | .num_mgrs = 2, |
| 189 | .num_ovls = 3, |
Archit Taneja | 819d807 | 2011-03-01 11:54:00 +0530 | [diff] [blame^] | 190 | .max_dss_fck = 173000000, |
Tomi Valkeinen | 4e777dd | 2011-02-24 14:20:31 +0200 | [diff] [blame] | 191 | .supported_displays = omap3430_dss_supported_displays, |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 192 | .supported_color_modes = omap3_dss_supported_color_modes, |
| 193 | }; |
| 194 | |
Samreen | 8fbde10 | 2010-11-04 12:28:41 +0100 | [diff] [blame] | 195 | static struct omap_dss_features omap3630_dss_features = { |
| 196 | .reg_fields = omap3_dss_reg_fields, |
| 197 | .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields), |
| 198 | |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 199 | .has_feature = |
| 200 | FEAT_GLOBAL_ALPHA | FEAT_LCDENABLEPOL | |
| 201 | FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE | |
Archit Taneja | 87a7484 | 2011-03-02 11:19:50 +0530 | [diff] [blame] | 202 | FEAT_PRE_MULT_ALPHA | FEAT_FUNCGATED | |
| 203 | FEAT_ROWREPEATENABLE | FEAT_LINEBUFFERSPLIT | |
| 204 | FEAT_RESIZECONF, |
Samreen | 8fbde10 | 2010-11-04 12:28:41 +0100 | [diff] [blame] | 205 | |
| 206 | .num_mgrs = 2, |
| 207 | .num_ovls = 3, |
Archit Taneja | 819d807 | 2011-03-01 11:54:00 +0530 | [diff] [blame^] | 208 | .max_dss_fck = 173000000, |
Tomi Valkeinen | 4e777dd | 2011-02-24 14:20:31 +0200 | [diff] [blame] | 209 | .supported_displays = omap3630_dss_supported_displays, |
Samreen | 8fbde10 | 2010-11-04 12:28:41 +0100 | [diff] [blame] | 210 | .supported_color_modes = omap3_dss_supported_color_modes, |
| 211 | }; |
| 212 | |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 213 | /* OMAP4 DSS Features */ |
| 214 | static struct omap_dss_features omap4_dss_features = { |
Archit Taneja | 87a7484 | 2011-03-02 11:19:50 +0530 | [diff] [blame] | 215 | .reg_fields = omap4_dss_reg_fields, |
| 216 | .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields), |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 217 | |
| 218 | .has_feature = |
| 219 | FEAT_GLOBAL_ALPHA | FEAT_PRE_MULT_ALPHA | |
Archit Taneja | 87a7484 | 2011-03-02 11:19:50 +0530 | [diff] [blame] | 220 | FEAT_MGR_LCD2 | FEAT_GLOBAL_ALPHA_VID1, |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 221 | |
| 222 | .num_mgrs = 3, |
| 223 | .num_ovls = 3, |
Archit Taneja | 819d807 | 2011-03-01 11:54:00 +0530 | [diff] [blame^] | 224 | .max_dss_fck = 186000000, |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 225 | .supported_displays = omap4_dss_supported_displays, |
| 226 | .supported_color_modes = omap3_dss_supported_color_modes, |
| 227 | }; |
| 228 | |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 229 | /* Functions returning values related to a DSS feature */ |
| 230 | int dss_feat_get_num_mgrs(void) |
| 231 | { |
| 232 | return omap_current_dss_features->num_mgrs; |
| 233 | } |
| 234 | |
| 235 | int dss_feat_get_num_ovls(void) |
| 236 | { |
| 237 | return omap_current_dss_features->num_ovls; |
| 238 | } |
| 239 | |
Archit Taneja | 819d807 | 2011-03-01 11:54:00 +0530 | [diff] [blame^] | 240 | /* Max supported DSS FCK in Hz */ |
| 241 | unsigned long dss_feat_get_max_dss_fck(void) |
| 242 | { |
| 243 | return omap_current_dss_features->max_dss_fck; |
| 244 | } |
| 245 | |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 246 | enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel) |
| 247 | { |
| 248 | return omap_current_dss_features->supported_displays[channel]; |
| 249 | } |
| 250 | |
| 251 | enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane) |
| 252 | { |
| 253 | return omap_current_dss_features->supported_color_modes[plane]; |
| 254 | } |
| 255 | |
Archit Taneja | 8dad2ab | 2010-11-25 17:58:10 +0530 | [diff] [blame] | 256 | bool dss_feat_color_mode_supported(enum omap_plane plane, |
| 257 | enum omap_color_mode color_mode) |
| 258 | { |
| 259 | return omap_current_dss_features->supported_color_modes[plane] & |
| 260 | color_mode; |
| 261 | } |
| 262 | |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 263 | /* DSS has_feature check */ |
| 264 | bool dss_has_feature(enum dss_feat_id id) |
| 265 | { |
| 266 | return omap_current_dss_features->has_feature & id; |
| 267 | } |
| 268 | |
| 269 | void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end) |
| 270 | { |
| 271 | if (id >= omap_current_dss_features->num_reg_fields) |
| 272 | BUG(); |
| 273 | |
| 274 | *start = omap_current_dss_features->reg_fields[id].start; |
| 275 | *end = omap_current_dss_features->reg_fields[id].end; |
| 276 | } |
| 277 | |
| 278 | void dss_features_init(void) |
| 279 | { |
| 280 | if (cpu_is_omap24xx()) |
| 281 | omap_current_dss_features = &omap2_dss_features; |
Samreen | 8fbde10 | 2010-11-04 12:28:41 +0100 | [diff] [blame] | 282 | else if (cpu_is_omap3630()) |
| 283 | omap_current_dss_features = &omap3630_dss_features; |
| 284 | else if (cpu_is_omap34xx()) |
| 285 | omap_current_dss_features = &omap3430_dss_features; |
Archit Taneja | d50cd03 | 2010-12-02 11:27:08 +0000 | [diff] [blame] | 286 | else |
| 287 | omap_current_dss_features = &omap4_dss_features; |
Archit Taneja | e1ef4d2 | 2010-09-15 18:47:29 +0530 | [diff] [blame] | 288 | } |