blob: d7e3583e608ec7f1cf3df531f6415ded53a7988b [file] [log] [blame]
Philipp Zabelb8d181e2013-10-10 16:18:45 +02001/*
2 * i.MX IPUv3 DP Overlay Planes
3 *
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <drm/drmP.h>
Liu Ying5f2f9112016-07-08 17:40:59 +080017#include <drm/drm_atomic.h>
Liu Ying255c35f2016-07-08 17:40:56 +080018#include <drm/drm_atomic_helper.h>
Philipp Zabelb8d181e2013-10-10 16:18:45 +020019#include <drm/drm_fb_cma_helper.h>
20#include <drm/drm_gem_cma_helper.h>
Noralf Trønnesbd106352017-08-13 15:31:53 +020021#include <drm/drm_gem_framebuffer_helper.h>
Liu Ying33f14232016-07-08 17:40:55 +080022#include <drm/drm_plane_helper.h>
Philipp Zabelb8d181e2013-10-10 16:18:45 +020023
Philipp Zabel39b90042013-09-30 16:13:39 +020024#include "video/imx-ipu-v3.h"
Philipp Zabelb8d181e2013-10-10 16:18:45 +020025#include "ipuv3-plane.h"
26
Lucas Stach00514e82017-03-08 12:13:21 +010027struct ipu_plane_state {
28 struct drm_plane_state base;
29 bool use_pre;
30};
31
32static inline struct ipu_plane_state *
33to_ipu_plane_state(struct drm_plane_state *p)
34{
35 return container_of(p, struct ipu_plane_state, base);
36}
37
Philipp Zabel3df07392016-07-06 15:47:11 +020038static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
39{
40 return container_of(p, struct ipu_plane, base);
41}
Philipp Zabelb8d181e2013-10-10 16:18:45 +020042
43static const uint32_t ipu_plane_formats[] = {
Philipp Zabelc639a1c2014-12-12 13:40:38 +010044 DRM_FORMAT_ARGB1555,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020045 DRM_FORMAT_XRGB1555,
Philipp Zabelc639a1c2014-12-12 13:40:38 +010046 DRM_FORMAT_ABGR1555,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020047 DRM_FORMAT_XBGR1555,
Philipp Zabelc639a1c2014-12-12 13:40:38 +010048 DRM_FORMAT_RGBA5551,
49 DRM_FORMAT_BGRA5551,
Lucas Stachcb166a32015-08-04 17:22:06 +020050 DRM_FORMAT_ARGB4444,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020051 DRM_FORMAT_ARGB8888,
52 DRM_FORMAT_XRGB8888,
53 DRM_FORMAT_ABGR8888,
54 DRM_FORMAT_XBGR8888,
Philipp Zabel59d6b712015-04-16 15:56:40 +020055 DRM_FORMAT_RGBA8888,
56 DRM_FORMAT_RGBX8888,
57 DRM_FORMAT_BGRA8888,
Laurentiu Palcuf2ad99f2017-06-28 12:31:34 +030058 DRM_FORMAT_BGRX8888,
Philipp Zabel79321312016-02-12 14:35:55 +010059 DRM_FORMAT_UYVY,
60 DRM_FORMAT_VYUY,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020061 DRM_FORMAT_YUYV,
62 DRM_FORMAT_YVYU,
63 DRM_FORMAT_YUV420,
64 DRM_FORMAT_YVU420,
Philipp Zabeleae13c92016-10-18 12:31:40 +020065 DRM_FORMAT_YUV422,
66 DRM_FORMAT_YVU422,
67 DRM_FORMAT_YUV444,
68 DRM_FORMAT_YVU444,
69 DRM_FORMAT_NV12,
70 DRM_FORMAT_NV16,
Enrico Jorns33bee522015-11-24 16:29:22 +010071 DRM_FORMAT_RGB565,
Philipp Zabelf6b50ef2016-07-22 12:02:45 +020072 DRM_FORMAT_RGB565_A8,
73 DRM_FORMAT_BGR565_A8,
74 DRM_FORMAT_RGB888_A8,
75 DRM_FORMAT_BGR888_A8,
76 DRM_FORMAT_RGBX8888_A8,
77 DRM_FORMAT_BGRX8888_A8,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020078};
79
Lucas Stach37aca512017-11-10 17:10:01 +010080static const uint64_t ipu_format_modifiers[] = {
81 DRM_FORMAT_MOD_LINEAR,
82 DRM_FORMAT_MOD_INVALID
83};
84
85static const uint64_t pre_format_modifiers[] = {
86 DRM_FORMAT_MOD_LINEAR,
87 DRM_FORMAT_MOD_VIVANTE_TILED,
88 DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
89 DRM_FORMAT_MOD_INVALID
90};
91
Philipp Zabelb8d181e2013-10-10 16:18:45 +020092int ipu_plane_irq(struct ipu_plane *ipu_plane)
93{
94 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
95 IPU_IRQ_EOF);
96}
97
Liu Ying33f14232016-07-08 17:40:55 +080098static inline unsigned long
Philipp Zabel0bfd56f2016-07-22 12:01:11 +020099drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
Liu Ying33f14232016-07-08 17:40:55 +0800100{
101 struct drm_framebuffer *fb = state->fb;
102 struct drm_gem_cma_object *cma_obj;
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200103 int x = state->src.x1 >> 16;
104 int y = state->src.y1 >> 16;
Liu Ying33f14232016-07-08 17:40:55 +0800105
Philipp Zabel0bfd56f2016-07-22 12:01:11 +0200106 cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
Liu Ying33f14232016-07-08 17:40:55 +0800107 BUG_ON(!cma_obj);
108
Philipp Zabel0bfd56f2016-07-22 12:01:11 +0200109 return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
110 fb->format->cpp[plane] * x;
Liu Ying33f14232016-07-08 17:40:55 +0800111}
112
113static inline unsigned long
114drm_plane_state_to_ubo(struct drm_plane_state *state)
115{
116 struct drm_framebuffer *fb = state->fb;
117 struct drm_gem_cma_object *cma_obj;
Philipp Zabel0bfd56f2016-07-22 12:01:11 +0200118 unsigned long eba = drm_plane_state_to_eba(state, 0);
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200119 int x = state->src.x1 >> 16;
120 int y = state->src.y1 >> 16;
Liu Ying33f14232016-07-08 17:40:55 +0800121
122 cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
123 BUG_ON(!cma_obj);
124
Ville Syrjälä438b74a2016-12-14 23:32:55 +0200125 x /= drm_format_horz_chroma_subsampling(fb->format->format);
126 y /= drm_format_vert_chroma_subsampling(fb->format->format);
Philipp Zabelf2fa3532016-10-18 12:26:19 +0200127
128 return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
Ville Syrjälä353c8592016-12-14 23:30:57 +0200129 fb->format->cpp[1] * x - eba;
Liu Ying33f14232016-07-08 17:40:55 +0800130}
131
132static inline unsigned long
133drm_plane_state_to_vbo(struct drm_plane_state *state)
134{
135 struct drm_framebuffer *fb = state->fb;
136 struct drm_gem_cma_object *cma_obj;
Philipp Zabel0bfd56f2016-07-22 12:01:11 +0200137 unsigned long eba = drm_plane_state_to_eba(state, 0);
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200138 int x = state->src.x1 >> 16;
139 int y = state->src.y1 >> 16;
Liu Ying33f14232016-07-08 17:40:55 +0800140
141 cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
142 BUG_ON(!cma_obj);
143
Ville Syrjälä438b74a2016-12-14 23:32:55 +0200144 x /= drm_format_horz_chroma_subsampling(fb->format->format);
145 y /= drm_format_vert_chroma_subsampling(fb->format->format);
Philipp Zabelf2fa3532016-10-18 12:26:19 +0200146
147 return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
Ville Syrjälä353c8592016-12-14 23:30:57 +0200148 fb->format->cpp[2] * x - eba;
Liu Ying33f14232016-07-08 17:40:55 +0800149}
150
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200151void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
152{
153 if (!IS_ERR_OR_NULL(ipu_plane->dp))
154 ipu_dp_put(ipu_plane->dp);
155 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
156 ipu_dmfc_put(ipu_plane->dmfc);
157 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
158 ipu_idmac_put(ipu_plane->ipu_ch);
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200159 if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
160 ipu_idmac_put(ipu_plane->alpha_ch);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200161}
162
163int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
164{
165 int ret;
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200166 int alpha_ch;
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200167
168 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
169 if (IS_ERR(ipu_plane->ipu_ch)) {
170 ret = PTR_ERR(ipu_plane->ipu_ch);
171 DRM_ERROR("failed to get idmac channel: %d\n", ret);
172 return ret;
173 }
174
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200175 alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
176 if (alpha_ch >= 0) {
177 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
178 if (IS_ERR(ipu_plane->alpha_ch)) {
179 ret = PTR_ERR(ipu_plane->alpha_ch);
180 DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
181 alpha_ch, ret);
182 return ret;
183 }
184 }
185
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200186 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
187 if (IS_ERR(ipu_plane->dmfc)) {
188 ret = PTR_ERR(ipu_plane->dmfc);
189 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
190 goto err_out;
191 }
192
193 if (ipu_plane->dp_flow >= 0) {
194 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
195 if (IS_ERR(ipu_plane->dp)) {
196 ret = PTR_ERR(ipu_plane->dp);
197 DRM_ERROR("failed to get dp flow: %d\n", ret);
198 goto err_out;
199 }
200 }
201
202 return 0;
203err_out:
204 ipu_plane_put_resources(ipu_plane);
205
206 return ret;
207}
208
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200209static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
210{
211 switch (ipu_plane->base.state->fb->format->format) {
212 case DRM_FORMAT_RGB565_A8:
213 case DRM_FORMAT_BGR565_A8:
214 case DRM_FORMAT_RGB888_A8:
215 case DRM_FORMAT_BGR888_A8:
216 case DRM_FORMAT_RGBX8888_A8:
217 case DRM_FORMAT_BGRX8888_A8:
218 return true;
219 default:
220 return false;
221 }
222}
223
Liu Ying33f14232016-07-08 17:40:55 +0800224static void ipu_plane_enable(struct ipu_plane *ipu_plane)
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200225{
Philipp Zabel285bbb02014-04-14 23:53:20 +0200226 if (ipu_plane->dp)
227 ipu_dp_enable(ipu_plane->ipu);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200228 ipu_dmfc_enable_channel(ipu_plane->dmfc);
229 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200230 if (ipu_plane_separate_alpha(ipu_plane))
231 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200232 if (ipu_plane->dp)
233 ipu_dp_enable_channel(ipu_plane->dp);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200234}
235
Philipp Zabeleb8c8882017-02-24 18:31:05 +0100236void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200237{
Lucas Stachdf4b2232016-08-11 11:18:50 +0200238 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
239
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200240 ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
241
Philipp Zabeleb8c8882017-02-24 18:31:05 +0100242 if (ipu_plane->dp && disable_dp_channel)
243 ipu_dp_disable_channel(ipu_plane->dp, false);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200244 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200245 if (ipu_plane->alpha_ch)
246 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200247 ipu_dmfc_disable_channel(ipu_plane->dmfc);
Philipp Zabel285bbb02014-04-14 23:53:20 +0200248 if (ipu_plane->dp)
249 ipu_dp_disable(ipu_plane->ipu);
Lucas Stach00514e82017-03-08 12:13:21 +0100250 if (ipu_prg_present(ipu_plane->ipu))
251 ipu_prg_channel_disable(ipu_plane->ipu_ch);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200252}
253
Philipp Zabeleb8c8882017-02-24 18:31:05 +0100254void ipu_plane_disable_deferred(struct drm_plane *plane)
255{
256 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
257
258 if (ipu_plane->disabling) {
259 ipu_plane->disabling = false;
260 ipu_plane_disable(ipu_plane, false);
261 }
262}
263EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
264
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200265static void ipu_plane_destroy(struct drm_plane *plane)
266{
267 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
268
269 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
270
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200271 drm_plane_cleanup(plane);
272 kfree(ipu_plane);
273}
274
Lucas Stach00514e82017-03-08 12:13:21 +0100275void ipu_plane_state_reset(struct drm_plane *plane)
276{
277 struct ipu_plane_state *ipu_state;
278
279 if (plane->state) {
280 ipu_state = to_ipu_plane_state(plane->state);
281 __drm_atomic_helper_plane_destroy_state(plane->state);
282 kfree(ipu_state);
283 }
284
285 ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
286
287 if (ipu_state) {
288 ipu_state->base.plane = plane;
Robert Fossc2c446a2017-05-19 16:50:17 -0400289 ipu_state->base.rotation = DRM_MODE_ROTATE_0;
Lucas Stach00514e82017-03-08 12:13:21 +0100290 }
291
292 plane->state = &ipu_state->base;
293}
294
295struct drm_plane_state *ipu_plane_duplicate_state(struct drm_plane *plane)
296{
297 struct ipu_plane_state *state;
298
299 if (WARN_ON(!plane->state))
300 return NULL;
301
302 state = kmalloc(sizeof(*state), GFP_KERNEL);
303 if (state)
304 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
305
306 return &state->base;
307}
308
309void ipu_plane_destroy_state(struct drm_plane *plane,
310 struct drm_plane_state *state)
311{
312 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
313
314 __drm_atomic_helper_plane_destroy_state(state);
315 kfree(ipu_state);
316}
317
Lucas Stach37aca512017-11-10 17:10:01 +0100318static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
319 uint32_t format, uint64_t modifier)
320{
321 struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
322
323 /* linear is supported for all planes and formats */
324 if (modifier == DRM_FORMAT_MOD_LINEAR)
325 return true;
326
327 /* without a PRG there are no supported modifiers */
328 if (!ipu_prg_present(ipu))
329 return false;
330
331 return ipu_prg_format_supported(ipu, format, modifier);
332}
333
Liu Ying8b3ce872016-05-24 18:10:40 +0800334static const struct drm_plane_funcs ipu_plane_funcs = {
Liu Ying5f2f9112016-07-08 17:40:59 +0800335 .update_plane = drm_atomic_helper_update_plane,
336 .disable_plane = drm_atomic_helper_disable_plane,
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200337 .destroy = ipu_plane_destroy,
Lucas Stach00514e82017-03-08 12:13:21 +0100338 .reset = ipu_plane_state_reset,
339 .atomic_duplicate_state = ipu_plane_duplicate_state,
340 .atomic_destroy_state = ipu_plane_destroy_state,
Lucas Stach37aca512017-11-10 17:10:01 +0100341 .format_mod_supported = ipu_plane_format_mod_supported,
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200342};
343
Liu Ying33f14232016-07-08 17:40:55 +0800344static int ipu_plane_atomic_check(struct drm_plane *plane,
345 struct drm_plane_state *state)
346{
347 struct drm_plane_state *old_state = plane->state;
348 struct drm_crtc_state *crtc_state;
349 struct device *dev = plane->dev->dev;
350 struct drm_framebuffer *fb = state->fb;
351 struct drm_framebuffer *old_fb = old_state->fb;
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200352 unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200353 bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
Philipp Zabel5fb57ab2016-10-18 12:30:36 +0200354 int hsub, vsub;
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200355 int ret;
Liu Ying33f14232016-07-08 17:40:55 +0800356
357 /* Ok to disable */
358 if (!fb)
Liu Ying5f2f9112016-07-08 17:40:59 +0800359 return 0;
360
361 if (!state->crtc)
362 return -EINVAL;
363
364 crtc_state =
365 drm_atomic_get_existing_crtc_state(state->state, state->crtc);
366 if (WARN_ON(!crtc_state))
367 return -EINVAL;
Liu Ying33f14232016-07-08 17:40:55 +0800368
Ville Syrjälä81af63a2018-01-23 19:08:57 +0200369 ret = drm_atomic_helper_check_plane_state(state, crtc_state,
Ville Syrjäläa01cb8b2017-11-01 22:16:19 +0200370 DRM_PLANE_HELPER_NO_SCALING,
371 DRM_PLANE_HELPER_NO_SCALING,
372 can_position, true);
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200373 if (ret)
374 return ret;
375
Liu Ying33f14232016-07-08 17:40:55 +0800376 /* CRTC should be enabled */
Liu Ying5f2f9112016-07-08 17:40:59 +0800377 if (!crtc_state->enable)
Liu Ying33f14232016-07-08 17:40:55 +0800378 return -EINVAL;
379
Liu Ying33f14232016-07-08 17:40:55 +0800380 switch (plane->type) {
381 case DRM_PLANE_TYPE_PRIMARY:
Liu Ying33f14232016-07-08 17:40:55 +0800382 /* full plane minimum width is 13 pixels */
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200383 if (drm_rect_width(&state->dst) < 13)
Liu Ying33f14232016-07-08 17:40:55 +0800384 return -EINVAL;
385 break;
386 case DRM_PLANE_TYPE_OVERLAY:
Liu Ying33f14232016-07-08 17:40:55 +0800387 break;
388 default:
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200389 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
Liu Ying33f14232016-07-08 17:40:55 +0800390 return -EINVAL;
391 }
392
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200393 if (drm_rect_height(&state->dst) < 2)
Liu Ying33f14232016-07-08 17:40:55 +0800394 return -EINVAL;
395
396 /*
Liu Ying17809992016-08-26 15:30:44 +0800397 * We support resizing active plane or changing its format by
398 * forcing CRTC mode change in plane's ->atomic_check callback
399 * and disabling all affected active planes in CRTC's ->atomic_disable
400 * callback. The planes will be reenabled in plane's ->atomic_update
401 * callback.
Liu Ying33f14232016-07-08 17:40:55 +0800402 */
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200403 if (old_fb &&
404 (drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) ||
405 drm_rect_height(&state->dst) != drm_rect_height(&old_state->dst) ||
406 fb->format != old_fb->format))
Liu Ying17809992016-08-26 15:30:44 +0800407 crtc_state->mode_changed = true;
Liu Ying33f14232016-07-08 17:40:55 +0800408
Philipp Zabel0bfd56f2016-07-22 12:01:11 +0200409 eba = drm_plane_state_to_eba(state, 0);
Liu Ying33f14232016-07-08 17:40:55 +0800410
411 if (eba & 0x7)
412 return -EINVAL;
413
414 if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
415 return -EINVAL;
416
417 if (old_fb && fb->pitches[0] != old_fb->pitches[0])
Liu Ying17809992016-08-26 15:30:44 +0800418 crtc_state->mode_changed = true;
Liu Ying33f14232016-07-08 17:40:55 +0800419
Ville Syrjälä438b74a2016-12-14 23:32:55 +0200420 switch (fb->format->format) {
Liu Ying33f14232016-07-08 17:40:55 +0800421 case DRM_FORMAT_YUV420:
422 case DRM_FORMAT_YVU420:
Philipp Zabeleae13c92016-10-18 12:31:40 +0200423 case DRM_FORMAT_YUV422:
424 case DRM_FORMAT_YVU422:
425 case DRM_FORMAT_YUV444:
426 case DRM_FORMAT_YVU444:
Liu Ying33f14232016-07-08 17:40:55 +0800427 /*
428 * Multiplanar formats have to meet the following restrictions:
429 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
430 * - EBA, UBO and VBO are a multiple of 8
431 * - UBO and VBO are unsigned and not larger than 0xfffff8
432 * - Only EBA may be changed while scanout is active
433 * - The strides of U and V planes must be identical.
434 */
Liu Ying33f14232016-07-08 17:40:55 +0800435 vbo = drm_plane_state_to_vbo(state);
436
Philipp Zabeleae13c92016-10-18 12:31:40 +0200437 if (vbo & 0x7 || vbo > 0xfffff8)
Liu Ying33f14232016-07-08 17:40:55 +0800438 return -EINVAL;
439
Ville Syrjälädbd4d572016-11-18 21:53:10 +0200440 if (old_fb && (fb->format == old_fb->format)) {
Liu Ying33f14232016-07-08 17:40:55 +0800441 old_vbo = drm_plane_state_to_vbo(old_state);
Philipp Zabeleae13c92016-10-18 12:31:40 +0200442 if (vbo != old_vbo)
Philipp Zabel181c9bf2016-10-18 12:13:15 +0200443 crtc_state->mode_changed = true;
Liu Ying33f14232016-07-08 17:40:55 +0800444 }
445
446 if (fb->pitches[1] != fb->pitches[2])
447 return -EINVAL;
448
Philipp Zabeleae13c92016-10-18 12:31:40 +0200449 /* fall-through */
450 case DRM_FORMAT_NV12:
451 case DRM_FORMAT_NV16:
452 ubo = drm_plane_state_to_ubo(state);
453
454 if (ubo & 0x7 || ubo > 0xfffff8)
455 return -EINVAL;
456
Ville Syrjälädbd4d572016-11-18 21:53:10 +0200457 if (old_fb && (fb->format == old_fb->format)) {
Philipp Zabeleae13c92016-10-18 12:31:40 +0200458 old_ubo = drm_plane_state_to_ubo(old_state);
459 if (ubo != old_ubo)
460 crtc_state->mode_changed = true;
461 }
462
Liu Ying33f14232016-07-08 17:40:55 +0800463 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
464 return -EINVAL;
465
466 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
Liu Ying17809992016-08-26 15:30:44 +0800467 crtc_state->mode_changed = true;
Philipp Zabel5fb57ab2016-10-18 12:30:36 +0200468
469 /*
470 * The x/y offsets must be even in case of horizontal/vertical
471 * chroma subsampling.
472 */
Ville Syrjälä438b74a2016-12-14 23:32:55 +0200473 hsub = drm_format_horz_chroma_subsampling(fb->format->format);
474 vsub = drm_format_vert_chroma_subsampling(fb->format->format);
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200475 if (((state->src.x1 >> 16) & (hsub - 1)) ||
476 ((state->src.y1 >> 16) & (vsub - 1)))
Philipp Zabel5fb57ab2016-10-18 12:30:36 +0200477 return -EINVAL;
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200478 break;
479 case DRM_FORMAT_RGB565_A8:
480 case DRM_FORMAT_BGR565_A8:
481 case DRM_FORMAT_RGB888_A8:
482 case DRM_FORMAT_BGR888_A8:
483 case DRM_FORMAT_RGBX8888_A8:
484 case DRM_FORMAT_BGRX8888_A8:
485 alpha_eba = drm_plane_state_to_eba(state, 1);
486 if (alpha_eba & 0x7)
487 return -EINVAL;
488
489 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
490 return -EINVAL;
491
492 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
493 crtc_state->mode_changed = true;
494 break;
Liu Ying33f14232016-07-08 17:40:55 +0800495 }
496
497 return 0;
498}
499
500static void ipu_plane_atomic_disable(struct drm_plane *plane,
501 struct drm_plane_state *old_state)
502{
Philipp Zabeleb8c8882017-02-24 18:31:05 +0100503 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
504
505 if (ipu_plane->dp)
506 ipu_dp_disable_channel(ipu_plane->dp, true);
507 ipu_plane->disabling = true;
Liu Ying33f14232016-07-08 17:40:55 +0800508}
509
Lucas Stach00514e82017-03-08 12:13:21 +0100510static int ipu_chan_assign_axi_id(int ipu_chan)
511{
512 switch (ipu_chan) {
513 case IPUV3_CHANNEL_MEM_BG_SYNC:
514 return 1;
515 case IPUV3_CHANNEL_MEM_FG_SYNC:
516 return 2;
517 case IPUV3_CHANNEL_MEM_DC_SYNC:
518 return 3;
519 default:
520 return 0;
521 }
522}
523
Philipp Zabel790cb4c2017-05-19 16:05:51 +0200524static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
525 u8 *burstsize, u8 *num_bursts)
526{
527 const unsigned int width_bytes = width * cpp;
528 unsigned int npb, bursts;
529
530 /* Maximum number of pixels per burst without overshooting stride */
531 for (npb = 64 / cpp; npb > 0; --npb) {
532 if (round_up(width_bytes, npb * cpp) <= stride)
533 break;
534 }
535 *burstsize = npb;
536
537 /* Maximum number of consecutive bursts without overshooting stride */
538 for (bursts = 8; bursts > 1; bursts /= 2) {
539 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
540 break;
541 }
542 *num_bursts = bursts;
543}
544
Liu Ying33f14232016-07-08 17:40:55 +0800545static void ipu_plane_atomic_update(struct drm_plane *plane,
546 struct drm_plane_state *old_state)
547{
548 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
549 struct drm_plane_state *state = plane->state;
Lucas Stach00514e82017-03-08 12:13:21 +0100550 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200551 struct drm_crtc_state *crtc_state = state->crtc->state;
552 struct drm_framebuffer *fb = state->fb;
Philipp Zabel2e9a7122016-10-20 15:37:52 +0200553 struct drm_rect *dst = &state->dst;
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200554 unsigned long eba, ubo, vbo;
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200555 unsigned long alpha_eba = 0;
Liu Ying33f14232016-07-08 17:40:55 +0800556 enum ipu_color_space ics;
Lucas Stach00514e82017-03-08 12:13:21 +0100557 unsigned int axi_id = 0;
Philipp Zabel790cb4c2017-05-19 16:05:51 +0200558 const struct drm_format_info *info;
559 u8 burstsize, num_bursts;
560 u32 width, height;
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200561 int active;
Liu Ying33f14232016-07-08 17:40:55 +0800562
Philipp Zabel2e9a7122016-10-20 15:37:52 +0200563 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
564 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
565
Philipp Zabel0bfd56f2016-07-22 12:01:11 +0200566 eba = drm_plane_state_to_eba(state, 0);
Liu Ying5f4df0c2016-08-26 15:30:43 +0800567
Lucas Stach00514e82017-03-08 12:13:21 +0100568 /*
569 * Configure PRG channel and attached PRE, this changes the EBA to an
570 * internal SRAM location.
571 */
572 if (ipu_state->use_pre) {
573 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
574 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
575 drm_rect_width(&state->src) >> 16,
576 drm_rect_height(&state->src) >> 16,
Lucas Stacha2ceec52017-11-10 17:09:59 +0100577 fb->pitches[0], fb->format->format,
Lucas Stach9222f762017-11-10 17:10:00 +0100578 fb->modifier, &eba);
Lucas Stach00514e82017-03-08 12:13:21 +0100579 }
580
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200581 if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
Lucas Stach00514e82017-03-08 12:13:21 +0100582 /* nothing to do if PRE is used */
583 if (ipu_state->use_pre)
584 return;
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200585 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
586 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
587 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200588 if (ipu_plane_separate_alpha(ipu_plane)) {
589 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
590 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
591 alpha_eba);
592 ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
593 }
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200594 return;
Liu Ying33f14232016-07-08 17:40:55 +0800595 }
596
Philipp Zabel5be5dd32016-08-05 11:55:18 +0200597 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
Liu Ying33f14232016-07-08 17:40:55 +0800598 switch (ipu_plane->dp_flow) {
599 case IPU_DP_FLOW_SYNC_BG:
Philipp Zabel5be5dd32016-08-05 11:55:18 +0200600 ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
Liu Ying33f14232016-07-08 17:40:55 +0800601 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
602 break;
603 case IPU_DP_FLOW_SYNC_FG:
Liu Ying33f14232016-07-08 17:40:55 +0800604 ipu_dp_setup_channel(ipu_plane->dp, ics,
605 IPUV3_COLORSPACE_UNKNOWN);
Liu Ying33f14232016-07-08 17:40:55 +0800606 /* Enable local alpha on partial plane */
Philipp Zabel58dff392017-05-19 17:47:33 +0200607 switch (fb->format->format) {
Liu Ying33f14232016-07-08 17:40:55 +0800608 case DRM_FORMAT_ARGB1555:
609 case DRM_FORMAT_ABGR1555:
610 case DRM_FORMAT_RGBA5551:
611 case DRM_FORMAT_BGRA5551:
612 case DRM_FORMAT_ARGB4444:
613 case DRM_FORMAT_ARGB8888:
614 case DRM_FORMAT_ABGR8888:
615 case DRM_FORMAT_RGBA8888:
616 case DRM_FORMAT_BGRA8888:
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200617 case DRM_FORMAT_RGB565_A8:
618 case DRM_FORMAT_BGR565_A8:
619 case DRM_FORMAT_RGB888_A8:
620 case DRM_FORMAT_BGR888_A8:
621 case DRM_FORMAT_RGBX8888_A8:
622 case DRM_FORMAT_BGRX8888_A8:
Liu Ying33f14232016-07-08 17:40:55 +0800623 ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
624 break;
625 default:
Philipp Zabel86126742016-10-18 17:09:30 +0200626 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
Liu Ying33f14232016-07-08 17:40:55 +0800627 break;
628 }
629 }
630
Philipp Zabel2e9a7122016-10-20 15:37:52 +0200631 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
Liu Ying33f14232016-07-08 17:40:55 +0800632
Philipp Zabel790cb4c2017-05-19 16:05:51 +0200633 width = drm_rect_width(&state->src) >> 16;
634 height = drm_rect_height(&state->src) >> 16;
635 info = drm_format_info(fb->format->format);
636 ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
637 &burstsize, &num_bursts);
638
Liu Ying33f14232016-07-08 17:40:55 +0800639 ipu_cpmem_zero(ipu_plane->ipu_ch);
Philipp Zabel790cb4c2017-05-19 16:05:51 +0200640 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
Philipp Zabel58dff392017-05-19 17:47:33 +0200641 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
Philipp Zabel790cb4c2017-05-19 16:05:51 +0200642 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
Liu Ying33f14232016-07-08 17:40:55 +0800643 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
644 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
Philipp Zabel58dff392017-05-19 17:47:33 +0200645 ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
Lucas Stach00514e82017-03-08 12:13:21 +0100646 ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
Philipp Zabel790cb4c2017-05-19 16:05:51 +0200647
Ville Syrjälä438b74a2016-12-14 23:32:55 +0200648 switch (fb->format->format) {
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200649 case DRM_FORMAT_YUV420:
650 case DRM_FORMAT_YVU420:
Philipp Zabeleae13c92016-10-18 12:31:40 +0200651 case DRM_FORMAT_YUV422:
652 case DRM_FORMAT_YVU422:
653 case DRM_FORMAT_YUV444:
654 case DRM_FORMAT_YVU444:
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200655 ubo = drm_plane_state_to_ubo(state);
656 vbo = drm_plane_state_to_vbo(state);
Ville Syrjälä438b74a2016-12-14 23:32:55 +0200657 if (fb->format->format == DRM_FORMAT_YVU420 ||
658 fb->format->format == DRM_FORMAT_YVU422 ||
659 fb->format->format == DRM_FORMAT_YVU444)
Philipp Zabeleae13c92016-10-18 12:31:40 +0200660 swap(ubo, vbo);
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200661
Philipp Zabeleae13c92016-10-18 12:31:40 +0200662 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
663 fb->pitches[1], ubo, vbo);
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200664
665 dev_dbg(ipu_plane->base.dev->dev,
666 "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200667 state->src.x1 >> 16, state->src.y1 >> 16);
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200668 break;
Philipp Zabeleae13c92016-10-18 12:31:40 +0200669 case DRM_FORMAT_NV12:
670 case DRM_FORMAT_NV16:
671 ubo = drm_plane_state_to_ubo(state);
672
673 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
674 fb->pitches[1], ubo, ubo);
675
676 dev_dbg(ipu_plane->base.dev->dev,
677 "phy = %lu %lu, x = %d, y = %d", eba, ubo,
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200678 state->src.x1 >> 16, state->src.y1 >> 16);
Philipp Zabeleae13c92016-10-18 12:31:40 +0200679 break;
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200680 case DRM_FORMAT_RGB565_A8:
681 case DRM_FORMAT_BGR565_A8:
682 case DRM_FORMAT_RGB888_A8:
683 case DRM_FORMAT_BGR888_A8:
684 case DRM_FORMAT_RGBX8888_A8:
685 case DRM_FORMAT_BGRX8888_A8:
686 alpha_eba = drm_plane_state_to_eba(state, 1);
Philipp Zabel790cb4c2017-05-19 16:05:51 +0200687 num_bursts = 0;
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200688
689 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
690 eba, alpha_eba, state->src.x1 >> 16, state->src.y1 >> 16);
691
692 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
693
694 ipu_cpmem_zero(ipu_plane->alpha_ch);
695 ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
696 drm_rect_width(&state->src) >> 16,
697 drm_rect_height(&state->src) >> 16);
698 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
699 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
700 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
Philipp Zabel58dff392017-05-19 17:47:33 +0200701 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
Philipp Zabelf6b50ef2016-07-22 12:02:45 +0200702 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
703 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
704 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
705 break;
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200706 default:
707 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
Philipp Zabel03ee3da2016-10-19 10:50:26 +0200708 eba, state->src.x1 >> 16, state->src.y1 >> 16);
Philipp Zabel3fd8b292016-10-18 11:40:25 +0200709 break;
710 }
711 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
712 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
Philipp Zabel790cb4c2017-05-19 16:05:51 +0200713 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
Liu Ying33f14232016-07-08 17:40:55 +0800714 ipu_plane_enable(ipu_plane);
715}
716
717static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
Noralf Trønnesbd106352017-08-13 15:31:53 +0200718 .prepare_fb = drm_gem_fb_prepare_fb,
Liu Ying33f14232016-07-08 17:40:55 +0800719 .atomic_check = ipu_plane_atomic_check,
720 .atomic_disable = ipu_plane_atomic_disable,
721 .atomic_update = ipu_plane_atomic_update,
722};
723
Lucas Stach00514e82017-03-08 12:13:21 +0100724int ipu_planes_assign_pre(struct drm_device *dev,
725 struct drm_atomic_state *state)
726{
Lucas Stach9222f762017-11-10 17:10:00 +0100727 struct drm_crtc_state *old_crtc_state, *crtc_state;
Lucas Stach00514e82017-03-08 12:13:21 +0100728 struct drm_plane_state *plane_state;
Lucas Stach9222f762017-11-10 17:10:00 +0100729 struct ipu_plane_state *ipu_state;
730 struct ipu_plane *ipu_plane;
Lucas Stach00514e82017-03-08 12:13:21 +0100731 struct drm_plane *plane;
Lucas Stach9222f762017-11-10 17:10:00 +0100732 struct drm_crtc *crtc;
Lucas Stach00514e82017-03-08 12:13:21 +0100733 int available_pres = ipu_prg_max_active_channels();
Lucas Stach9222f762017-11-10 17:10:00 +0100734 int ret, i;
735
736 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
737 ret = drm_atomic_add_affected_planes(state, crtc);
738 if (ret)
739 return ret;
740 }
741
742 /*
743 * We are going over the planes in 2 passes: first we assign PREs to
744 * planes with a tiling modifier, which need the PREs to resolve into
745 * linear. Any failure to assign a PRE there is fatal. In the second
746 * pass we try to assign PREs to linear FBs, to improve memory access
747 * patterns for them. Failure at this point is non-fatal, as we can
748 * scan out linear FBs without a PRE.
749 */
750 for_each_new_plane_in_state(state, plane, plane_state, i) {
751 ipu_state = to_ipu_plane_state(plane_state);
752 ipu_plane = to_ipu_plane(plane);
753
754 if (!plane_state->fb) {
755 ipu_state->use_pre = false;
756 continue;
757 }
758
759 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
760 plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
761 continue;
762
763 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
764 return -EINVAL;
765
766 if (!ipu_prg_format_supported(ipu_plane->ipu,
767 plane_state->fb->format->format,
768 plane_state->fb->modifier))
769 return -EINVAL;
770
771 ipu_state->use_pre = true;
772 available_pres--;
773 }
Lucas Stach00514e82017-03-08 12:13:21 +0100774
Maarten Lankhorst30ea7522017-07-12 10:13:40 +0200775 for_each_new_plane_in_state(state, plane, plane_state, i) {
Lucas Stach9222f762017-11-10 17:10:00 +0100776 ipu_state = to_ipu_plane_state(plane_state);
777 ipu_plane = to_ipu_plane(plane);
778
779 if (!plane_state->fb) {
780 ipu_state->use_pre = false;
781 continue;
782 }
783
784 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
785 plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
786 continue;
787
788 /* make sure that modifier is initialized */
789 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
Lucas Stach00514e82017-03-08 12:13:21 +0100790
791 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
Lucas Stach00514e82017-03-08 12:13:21 +0100792 ipu_prg_format_supported(ipu_plane->ipu,
793 plane_state->fb->format->format,
794 plane_state->fb->modifier)) {
795 ipu_state->use_pre = true;
796 available_pres--;
797 } else {
798 ipu_state->use_pre = false;
799 }
800 }
801
802 return 0;
803}
804EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
805
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200806struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
807 int dma, int dp, unsigned int possible_crtcs,
Philipp Zabel43895592015-11-06 11:08:02 +0100808 enum drm_plane_type type)
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200809{
810 struct ipu_plane *ipu_plane;
Lucas Stach37aca512017-11-10 17:10:01 +0100811 const uint64_t *modifiers = ipu_format_modifiers;
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200812 int ret;
813
814 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
815 dma, dp, possible_crtcs);
816
817 ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
818 if (!ipu_plane) {
819 DRM_ERROR("failed to allocate plane\n");
820 return ERR_PTR(-ENOMEM);
821 }
822
823 ipu_plane->ipu = ipu;
824 ipu_plane->dma = dma;
825 ipu_plane->dp_flow = dp;
826
Lucas Stach37aca512017-11-10 17:10:01 +0100827 if (ipu_prg_present(ipu))
828 modifiers = pre_format_modifiers;
829
Philipp Zabel43895592015-11-06 11:08:02 +0100830 ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
831 &ipu_plane_funcs, ipu_plane_formats,
Ben Widawskye6fc3b62017-07-23 20:46:38 -0700832 ARRAY_SIZE(ipu_plane_formats),
Lucas Stach37aca512017-11-10 17:10:01 +0100833 modifiers, type, NULL);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200834 if (ret) {
835 DRM_ERROR("failed to initialize plane\n");
836 kfree(ipu_plane);
837 return ERR_PTR(ret);
838 }
839
Liu Ying33f14232016-07-08 17:40:55 +0800840 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
841
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200842 return ipu_plane;
843}