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Greg Rose3047f902010-01-09 02:23:31 +00001/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +00004 Copyright(c) 1999 - 2015 Intel Corporation.
Greg Rose3047f902010-01-09 02:23:31 +00005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +000016 this program; if not, see <http://www.gnu.org/licenses/>.
Greg Rose3047f902010-01-09 02:23:31 +000017
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
20
21 Contact Information:
22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25*******************************************************************************/
26
27#include "vf.h"
Stephen Hemmingerb5417bf2012-01-18 22:13:33 +000028#include "ixgbevf.h"
Greg Rose3047f902010-01-09 02:23:31 +000029
30/**
31 * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx
32 * @hw: pointer to hardware structure
33 *
34 * Starts the hardware by filling the bus info structure and media type, clears
35 * all on chip counters, initializes receive address registers, multicast
36 * table, VLAN filter table, calls routine to set up link and flow control
37 * settings, and leaves transmit and receive units disabled and uninitialized
38 **/
39static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)
40{
41 /* Clear adapter stopped flag */
42 hw->adapter_stopped = false;
43
44 return 0;
45}
46
47/**
48 * ixgbevf_init_hw_vf - virtual function hardware initialization
49 * @hw: pointer to hardware structure
50 *
51 * Initialize the hardware by resetting the hardware and then starting
52 * the hardware
53 **/
54static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)
55{
56 s32 status = hw->mac.ops.start_hw(hw);
57
58 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
59
60 return status;
61}
62
63/**
64 * ixgbevf_reset_hw_vf - Performs hardware reset
65 * @hw: pointer to hardware structure
66 *
Joe Perchesdbedd442015-03-06 20:49:12 -080067 * Resets the hardware by resetting the transmit and receive units, masks and
Greg Rose3047f902010-01-09 02:23:31 +000068 * clears all interrupts.
69 **/
70static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)
71{
72 struct ixgbe_mbx_info *mbx = &hw->mbx;
73 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
74 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
75 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
76 u8 *addr = (u8 *)(&msgbuf[1]);
77
78 /* Call adapter stop to disable tx/rx and clear interrupts */
79 hw->mac.ops.stop_adapter(hw);
80
Alexander Duyck31186782012-07-20 08:09:58 +000081 /* reset the api version */
82 hw->api_version = ixgbe_mbox_api_10;
83
Greg Rose3047f902010-01-09 02:23:31 +000084 IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
85 IXGBE_WRITE_FLUSH(hw);
86
87 /* we cannot reset while the RSTI / RSTD bits are asserted */
88 while (!mbx->ops.check_for_rst(hw) && timeout) {
89 timeout--;
90 udelay(5);
91 }
92
93 if (!timeout)
94 return IXGBE_ERR_RESET_FAILED;
95
96 /* mailbox timeout can now become active */
97 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
98
99 msgbuf[0] = IXGBE_VF_RESET;
100 mbx->ops.write_posted(hw, msgbuf, 1);
101
John Fastabend012dc192012-09-19 21:35:57 +0000102 mdelay(10);
Greg Rose3047f902010-01-09 02:23:31 +0000103
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000104 /* set our "perm_addr" based on info provided by PF
105 * also set up the mc_filter_type which is piggy backed
106 * on the mac address in word 3
107 */
Greg Rose3047f902010-01-09 02:23:31 +0000108 ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);
109 if (ret_val)
110 return ret_val;
111
Greg Rosee1941a72013-02-13 03:02:05 +0000112 /* New versions of the PF may NACK the reset return message
113 * to indicate that no MAC address has yet been assigned for
114 * the VF.
115 */
116 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
117 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
Greg Rose3047f902010-01-09 02:23:31 +0000118 return IXGBE_ERR_INVALID_MAC_ADDR;
119
Jeff Kirsher0d8bb412015-02-14 04:53:03 +0000120 ether_addr_copy(hw->mac.perm_addr, addr);
Greg Rose3047f902010-01-09 02:23:31 +0000121 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
122
123 return 0;
124}
125
126/**
127 * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units
128 * @hw: pointer to hardware structure
129 *
130 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
131 * disables transmit and receive units. The adapter_stopped flag is used by
132 * the shared code and drivers to determine if the adapter is in a stopped
133 * state and should not touch the hardware.
134 **/
135static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)
136{
137 u32 number_of_queues;
138 u32 reg_val;
139 u16 i;
140
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000141 /* Set the adapter_stopped flag so other driver functions stop touching
Greg Rose3047f902010-01-09 02:23:31 +0000142 * the hardware
143 */
144 hw->adapter_stopped = true;
145
146 /* Disable the receive unit by stopped each queue */
147 number_of_queues = hw->mac.max_rx_queues;
148 for (i = 0; i < number_of_queues; i++) {
149 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
150 if (reg_val & IXGBE_RXDCTL_ENABLE) {
151 reg_val &= ~IXGBE_RXDCTL_ENABLE;
152 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
153 }
154 }
155
156 IXGBE_WRITE_FLUSH(hw);
157
158 /* Clear interrupt mask to stop from interrupts being generated */
159 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
160
161 /* Clear any pending interrupts */
162 IXGBE_READ_REG(hw, IXGBE_VTEICR);
163
164 /* Disable the transmit unit. Each queue must be disabled. */
165 number_of_queues = hw->mac.max_tx_queues;
166 for (i = 0; i < number_of_queues; i++) {
167 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
168 if (reg_val & IXGBE_TXDCTL_ENABLE) {
169 reg_val &= ~IXGBE_TXDCTL_ENABLE;
170 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
171 }
172 }
173
174 return 0;
175}
176
177/**
178 * ixgbevf_mta_vector - Determines bit-vector in multicast table to set
179 * @hw: pointer to hardware structure
180 * @mc_addr: the multicast address
181 *
182 * Extracts the 12 bits, from a multicast address, to determine which
183 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000184 * incoming Rx multicast addresses, to determine the bit-vector to check in
Greg Rose3047f902010-01-09 02:23:31 +0000185 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
186 * by the MO field of the MCSTCTRL. The MO field is set during initialization
187 * to mc_filter_type.
188 **/
189static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
190{
191 u32 vector = 0;
192
193 switch (hw->mac.mc_filter_type) {
194 case 0: /* use bits [47:36] of the address */
195 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
196 break;
197 case 1: /* use bits [46:35] of the address */
198 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
199 break;
200 case 2: /* use bits [45:34] of the address */
201 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
202 break;
203 case 3: /* use bits [43:32] of the address */
204 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
205 break;
206 default: /* Invalid mc_filter_type */
207 break;
208 }
209
210 /* vector can only be 12-bits or boundary will be exceeded */
211 vector &= 0xFFF;
212 return vector;
213}
214
215/**
216 * ixgbevf_get_mac_addr_vf - Read device MAC address
217 * @hw: pointer to the HW structure
218 * @mac_addr: pointer to storage for retrieved MAC address
219 **/
220static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
221{
Jeff Kirsher0d8bb412015-02-14 04:53:03 +0000222 ether_addr_copy(mac_addr, hw->mac.perm_addr);
Greg Rose3047f902010-01-09 02:23:31 +0000223
224 return 0;
225}
226
Greg Rose46ec20f2011-05-13 01:33:42 +0000227static s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
228{
229 struct ixgbe_mbx_info *mbx = &hw->mbx;
230 u32 msgbuf[3];
231 u8 *msg_addr = (u8 *)(&msgbuf[1]);
232 s32 ret_val;
233
234 memset(msgbuf, 0, sizeof(msgbuf));
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000235 /* If index is one then this is the start of a new list and needs
Greg Rose46ec20f2011-05-13 01:33:42 +0000236 * indication to the PF so it can do it's own list management.
237 * If it is zero then that tells the PF to just clear all of
238 * this VF's macvlans and there is no new list.
239 */
240 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
241 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
242 if (addr)
Jeff Kirsher0d8bb412015-02-14 04:53:03 +0000243 ether_addr_copy(msg_addr, addr);
Greg Rose46ec20f2011-05-13 01:33:42 +0000244 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
245
246 if (!ret_val)
247 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
248
249 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
250
251 if (!ret_val)
252 if (msgbuf[0] ==
253 (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
254 ret_val = -ENOMEM;
255
256 return ret_val;
257}
258
Greg Rose3047f902010-01-09 02:23:31 +0000259/**
Vlad Zolotarov94cf66f2015-03-30 21:35:26 +0300260 * ixgbevf_get_reta_locked - get the RSS redirection table (RETA) contents.
261 * @adapter: pointer to the port handle
262 * @reta: buffer to fill with RETA contents.
263 * @num_rx_queues: Number of Rx queues configured for this port
264 *
265 * The "reta" buffer should be big enough to contain 32 registers.
266 *
267 * Returns: 0 on success.
268 * if API doesn't support this operation - (-EOPNOTSUPP).
269 */
270int ixgbevf_get_reta_locked(struct ixgbe_hw *hw, u32 *reta, int num_rx_queues)
271{
272 int err, i, j;
273 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
274 u32 *hw_reta = &msgbuf[1];
275 u32 mask = 0;
276
277 /* We have to use a mailbox for 82599 and x540 devices only.
278 * For these devices RETA has 128 entries.
279 * Also these VFs support up to 4 RSS queues. Therefore PF will compress
280 * 16 RETA entries in each DWORD giving 2 bits to each entry.
281 */
282 int dwords = IXGBEVF_82599_RETA_SIZE / 16;
283
284 /* We support the RSS querying for 82599 and x540 devices only.
285 * Thus return an error if API doesn't support RETA querying or querying
286 * is not supported for this device type.
287 */
288 if (hw->api_version != ixgbe_mbox_api_12 ||
289 hw->mac.type >= ixgbe_mac_X550_vf)
290 return -EOPNOTSUPP;
291
292 msgbuf[0] = IXGBE_VF_GET_RETA;
293
294 err = hw->mbx.ops.write_posted(hw, msgbuf, 1);
295
296 if (err)
297 return err;
298
299 err = hw->mbx.ops.read_posted(hw, msgbuf, dwords + 1);
300
301 if (err)
302 return err;
303
304 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
305
306 /* If the operation has been refused by a PF return -EPERM */
307 if (msgbuf[0] == (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_NACK))
308 return -EPERM;
309
310 /* If we didn't get an ACK there must have been
311 * some sort of mailbox error so we should treat it
312 * as such.
313 */
314 if (msgbuf[0] != (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_ACK))
315 return IXGBE_ERR_MBX;
316
317 /* ixgbevf doesn't support more than 2 queues at the moment */
318 if (num_rx_queues > 1)
319 mask = 0x1;
320
321 for (i = 0; i < dwords; i++)
322 for (j = 0; j < 16; j++)
323 reta[i * 16 + j] = (hw_reta[i] >> (2 * j)) & mask;
324
325 return 0;
326}
327
328/**
Vlad Zolotarovad1431e2015-03-30 21:35:28 +0300329 * ixgbevf_get_rss_key_locked - get the RSS Random Key
330 * @hw: pointer to the HW structure
331 * @rss_key: buffer to fill with RSS Hash Key contents.
332 *
333 * The "rss_key" buffer should be big enough to contain 10 registers.
334 *
335 * Returns: 0 on success.
336 * if API doesn't support this operation - (-EOPNOTSUPP).
337 */
338int ixgbevf_get_rss_key_locked(struct ixgbe_hw *hw, u8 *rss_key)
339{
340 int err;
341 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
342
343 /* We currently support the RSS Random Key retrieval for 82599 and x540
344 * devices only.
345 *
346 * Thus return an error if API doesn't support RSS Random Key retrieval
347 * or if the operation is not supported for this device type.
348 */
349 if (hw->api_version != ixgbe_mbox_api_12 ||
350 hw->mac.type >= ixgbe_mac_X550_vf)
351 return -EOPNOTSUPP;
352
353 msgbuf[0] = IXGBE_VF_GET_RSS_KEY;
354 err = hw->mbx.ops.write_posted(hw, msgbuf, 1);
355
356 if (err)
357 return err;
358
359 err = hw->mbx.ops.read_posted(hw, msgbuf, 11);
360
361 if (err)
362 return err;
363
364 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
365
366 /* If the operation has been refused by a PF return -EPERM */
367 if (msgbuf[0] == (IXGBE_VF_GET_RETA | IXGBE_VT_MSGTYPE_NACK))
368 return -EPERM;
369
370 /* If we didn't get an ACK there must have been
371 * some sort of mailbox error so we should treat it
372 * as such.
373 */
374 if (msgbuf[0] != (IXGBE_VF_GET_RSS_KEY | IXGBE_VT_MSGTYPE_ACK))
375 return IXGBE_ERR_MBX;
376
377 memcpy(rss_key, msgbuf + 1, IXGBEVF_RSS_HASH_KEY_SIZE);
378
379 return 0;
380}
381
382/**
Greg Rose3047f902010-01-09 02:23:31 +0000383 * ixgbevf_set_rar_vf - set device MAC address
384 * @hw: pointer to hardware structure
385 * @index: Receive address register to write
386 * @addr: Address to put into receive address register
387 * @vmdq: Unused in this implementation
388 **/
389static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
390 u32 vmdq)
391{
392 struct ixgbe_mbx_info *mbx = &hw->mbx;
393 u32 msgbuf[3];
394 u8 *msg_addr = (u8 *)(&msgbuf[1]);
395 s32 ret_val;
396
397 memset(msgbuf, 0, sizeof(msgbuf));
398 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
Jeff Kirsher0d8bb412015-02-14 04:53:03 +0000399 ether_addr_copy(msg_addr, addr);
Greg Rose3047f902010-01-09 02:23:31 +0000400 ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
401
402 if (!ret_val)
403 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
404
405 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
406
407 /* if nacked the address was rejected, use "perm_addr" */
408 if (!ret_val &&
409 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
410 ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);
411
412 return ret_val;
413}
414
Greg Rose3a2c4032012-02-01 01:28:15 +0000415static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000416 u32 *msg, u16 size)
Greg Rose3a2c4032012-02-01 01:28:15 +0000417{
418 struct ixgbe_mbx_info *mbx = &hw->mbx;
419 u32 retmsg[IXGBE_VFMAILBOX_SIZE];
420 s32 retval = mbx->ops.write_posted(hw, msg, size);
421
422 if (!retval)
423 mbx->ops.read_posted(hw, retmsg, size);
424}
425
Greg Rose3047f902010-01-09 02:23:31 +0000426/**
427 * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses
428 * @hw: pointer to the HW structure
Jiri Pirko5c58c472010-03-23 22:58:20 +0000429 * @netdev: pointer to net device structure
Greg Rose3047f902010-01-09 02:23:31 +0000430 *
431 * Updates the Multicast Table Array.
432 **/
Jiri Pirko5c58c472010-03-23 22:58:20 +0000433static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw,
434 struct net_device *netdev)
Greg Rose3047f902010-01-09 02:23:31 +0000435{
Jiri Pirko22bedad32010-04-01 21:22:57 +0000436 struct netdev_hw_addr *ha;
Greg Rose3047f902010-01-09 02:23:31 +0000437 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
438 u16 *vector_list = (u16 *)&msgbuf[1];
Greg Rose3047f902010-01-09 02:23:31 +0000439 u32 cnt, i;
Greg Rose3047f902010-01-09 02:23:31 +0000440
441 /* Each entry in the list uses 1 16 bit word. We have 30
442 * 16 bit words available in our HW msg buffer (minus 1 for the
443 * msg type). That's 30 hash values if we pack 'em right. If
444 * there are more than 30 MC addresses to add then punt the
445 * extras for now and then add code to handle more than 30 later.
446 * It would be unusual for a server to request that many multi-cast
447 * addresses except for in large enterprise network environments.
448 */
449
Jiri Pirko5c58c472010-03-23 22:58:20 +0000450 cnt = netdev_mc_count(netdev);
451 if (cnt > 30)
452 cnt = 30;
Greg Rose3047f902010-01-09 02:23:31 +0000453 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
454 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
455
Jiri Pirko5c58c472010-03-23 22:58:20 +0000456 i = 0;
Jiri Pirko22bedad32010-04-01 21:22:57 +0000457 netdev_for_each_mc_addr(ha, netdev) {
Jiri Pirko5c58c472010-03-23 22:58:20 +0000458 if (i == cnt)
459 break;
Ben Hutchings46acc462012-11-01 09:11:11 +0000460 if (is_link_local_ether_addr(ha->addr))
John Fastabendb3343a22012-09-18 00:01:12 +0000461 continue;
462
Jiri Pirko22bedad32010-04-01 21:22:57 +0000463 vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr);
Greg Rose3047f902010-01-09 02:23:31 +0000464 }
465
Greg Rose3a2c4032012-02-01 01:28:15 +0000466 ixgbevf_write_msg_read_ack(hw, msgbuf, IXGBE_VFMAILBOX_SIZE);
Greg Rose3047f902010-01-09 02:23:31 +0000467
468 return 0;
469}
470
471/**
Hiroshi Shimamoto8443c1a42015-08-28 06:59:03 +0000472 * ixgbevf_update_xcast_mode - Update Multicast mode
473 * @hw: pointer to the HW structure
474 * @netdev: pointer to net device structure
475 * @xcast_mode: new multicast mode
476 *
477 * Updates the Multicast Mode of VF.
478 **/
479static s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw,
480 struct net_device *netdev, int xcast_mode)
481{
482 struct ixgbe_mbx_info *mbx = &hw->mbx;
483 u32 msgbuf[2];
484 s32 err;
485
486 switch (hw->api_version) {
487 case ixgbe_mbox_api_12:
488 break;
489 default:
490 return -EOPNOTSUPP;
491 }
492
493 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
494 msgbuf[1] = xcast_mode;
495
496 err = mbx->ops.write_posted(hw, msgbuf, 2);
497 if (err)
498 return err;
499
500 err = mbx->ops.read_posted(hw, msgbuf, 2);
501 if (err)
502 return err;
503
504 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
505 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK))
506 return -EPERM;
507
508 return 0;
509}
510
511/**
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000512 * ixgbevf_set_vfta_vf - Set/Unset VLAN filter table address
Greg Rose3047f902010-01-09 02:23:31 +0000513 * @hw: pointer to the HW structure
514 * @vlan: 12 bit VLAN ID
515 * @vind: unused by VF drivers
516 * @vlan_on: if true then set bit, else clear bit
517 **/
518static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
519 bool vlan_on)
520{
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +0000521 struct ixgbe_mbx_info *mbx = &hw->mbx;
Greg Rose3047f902010-01-09 02:23:31 +0000522 u32 msgbuf[2];
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +0000523 s32 err;
Greg Rose3047f902010-01-09 02:23:31 +0000524
525 msgbuf[0] = IXGBE_VF_SET_VLAN;
526 msgbuf[1] = vlan;
527 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
528 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
529
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +0000530 err = mbx->ops.write_posted(hw, msgbuf, 2);
531 if (err)
532 goto mbx_err;
Greg Rose3a2c4032012-02-01 01:28:15 +0000533
Alexander Duyck2ddc7fe2012-08-21 00:15:13 +0000534 err = mbx->ops.read_posted(hw, msgbuf, 2);
535 if (err)
536 goto mbx_err;
537
538 /* remove extra bits from the message */
539 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
540 msgbuf[0] &= ~(0xFF << IXGBE_VT_MSGINFO_SHIFT);
541
542 if (msgbuf[0] != (IXGBE_VF_SET_VLAN | IXGBE_VT_MSGTYPE_ACK))
543 err = IXGBE_ERR_INVALID_ARGUMENT;
544
545mbx_err:
546 return err;
Greg Rose3047f902010-01-09 02:23:31 +0000547}
548
549/**
550 * ixgbevf_setup_mac_link_vf - Setup MAC link settings
551 * @hw: pointer to hardware structure
552 * @speed: Unused in this implementation
553 * @autoneg: Unused in this implementation
554 * @autoneg_wait_to_complete: Unused in this implementation
555 *
556 * Do nothing and return success. VF drivers are not allowed to change
557 * global settings. Maintained for driver compatibility.
558 **/
559static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,
560 ixgbe_link_speed speed, bool autoneg,
561 bool autoneg_wait_to_complete)
562{
563 return 0;
564}
565
566/**
567 * ixgbevf_check_mac_link_vf - Get link/speed status
568 * @hw: pointer to hardware structure
569 * @speed: pointer to link speed
570 * @link_up: true is link is up, false otherwise
571 * @autoneg_wait_to_complete: true when waiting for completion is needed
572 *
573 * Reads the links register to determine if link is up and the current speed
574 **/
575static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,
576 ixgbe_link_speed *speed,
577 bool *link_up,
578 bool autoneg_wait_to_complete)
579{
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000580 struct ixgbe_mbx_info *mbx = &hw->mbx;
581 struct ixgbe_mac_info *mac = &hw->mac;
582 s32 ret_val = 0;
Greg Rose3047f902010-01-09 02:23:31 +0000583 u32 links_reg;
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000584 u32 in_msg = 0;
Greg Rose3047f902010-01-09 02:23:31 +0000585
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000586 /* If we were hit with a reset drop the link */
587 if (!mbx->ops.check_for_rst(hw) || !mbx->timeout)
588 mac->get_link_status = true;
Greg Rose3047f902010-01-09 02:23:31 +0000589
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000590 if (!mac->get_link_status)
591 goto out;
592
593 /* if link status is down no point in checking to see if pf is up */
Greg Rose3047f902010-01-09 02:23:31 +0000594 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000595 if (!(links_reg & IXGBE_LINKS_UP))
596 goto out;
Greg Rose3047f902010-01-09 02:23:31 +0000597
Emil Tantilovb8a2ca12014-08-13 05:52:13 +0000598 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
599 * before the link status is correct
600 */
601 if (mac->type == ixgbe_mac_82599_vf) {
602 int i;
603
604 for (i = 0; i < 5; i++) {
605 udelay(100);
606 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
607
608 if (!(links_reg & IXGBE_LINKS_UP))
609 goto out;
610 }
611 }
612
Greg Rose31a1b372012-04-10 01:56:37 +0000613 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
614 case IXGBE_LINKS_SPEED_10G_82599:
Greg Rose3047f902010-01-09 02:23:31 +0000615 *speed = IXGBE_LINK_SPEED_10GB_FULL;
Greg Rose31a1b372012-04-10 01:56:37 +0000616 break;
617 case IXGBE_LINKS_SPEED_1G_82599:
Greg Rose3047f902010-01-09 02:23:31 +0000618 *speed = IXGBE_LINK_SPEED_1GB_FULL;
Greg Rose31a1b372012-04-10 01:56:37 +0000619 break;
620 case IXGBE_LINKS_SPEED_100_82599:
621 *speed = IXGBE_LINK_SPEED_100_FULL;
622 break;
623 }
Greg Rose3047f902010-01-09 02:23:31 +0000624
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000625 /* if the read failed it could just be a mailbox collision, best wait
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000626 * until we are called again and don't report an error
627 */
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000628 if (mbx->ops.read(hw, &in_msg, 1))
629 goto out;
630
631 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
632 /* msg is not CTS and is NACK we must have lost CTS status */
633 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
634 ret_val = -1;
635 goto out;
636 }
637
638 /* the pf is talking, if we timed out in the past we reinit */
639 if (!mbx->timeout) {
640 ret_val = -1;
641 goto out;
642 }
643
644 /* if we passed all the tests above then the link is up and we no
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000645 * longer need to check for link
646 */
Alexander Duyck4b2cd272012-08-02 01:16:59 +0000647 mac->get_link_status = false;
648
649out:
650 *link_up = !mac->get_link_status;
651 return ret_val;
Greg Rose3047f902010-01-09 02:23:31 +0000652}
653
Alexander Duyckdd1fe112012-07-20 08:09:48 +0000654/**
655 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
656 * @hw: pointer to the HW structure
657 * @max_size: value to assign to max frame size
658 **/
659void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
660{
661 u32 msgbuf[2];
662
663 msgbuf[0] = IXGBE_VF_SET_LPE;
664 msgbuf[1] = max_size;
665 ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
666}
667
Alexander Duyck31186782012-07-20 08:09:58 +0000668/**
669 * ixgbevf_negotiate_api_version - Negotiate supported API version
670 * @hw: pointer to the HW structure
671 * @api: integer containing requested API version
672 **/
673int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
674{
675 int err;
676 u32 msg[3];
677
678 /* Negotiate the mailbox API version */
679 msg[0] = IXGBE_VF_API_NEGOTIATE;
680 msg[1] = api;
681 msg[2] = 0;
682 err = hw->mbx.ops.write_posted(hw, msg, 3);
683
684 if (!err)
685 err = hw->mbx.ops.read_posted(hw, msg, 3);
686
687 if (!err) {
688 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
689
690 /* Store value and return 0 on success */
691 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
692 hw->api_version = api;
693 return 0;
694 }
695
696 err = IXGBE_ERR_INVALID_ARGUMENT;
697 }
698
699 return err;
700}
701
Alexander Duyck56e94092012-07-20 08:10:03 +0000702int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
703 unsigned int *default_tc)
704{
705 int err;
706 u32 msg[5];
707
708 /* do nothing if API doesn't support ixgbevf_get_queues */
709 switch (hw->api_version) {
710 case ixgbe_mbox_api_11:
Vlad Zolotarov94cf66f2015-03-30 21:35:26 +0300711 case ixgbe_mbox_api_12:
Alexander Duyck56e94092012-07-20 08:10:03 +0000712 break;
713 default:
714 return 0;
715 }
716
717 /* Fetch queue configuration from the PF */
718 msg[0] = IXGBE_VF_GET_QUEUE;
719 msg[1] = msg[2] = msg[3] = msg[4] = 0;
720 err = hw->mbx.ops.write_posted(hw, msg, 5);
721
722 if (!err)
723 err = hw->mbx.ops.read_posted(hw, msg, 5);
724
725 if (!err) {
726 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
727
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000728 /* if we we didn't get an ACK there must have been
Alexander Duyck56e94092012-07-20 08:10:03 +0000729 * some sort of mailbox error so we should treat it
730 * as such
731 */
732 if (msg[0] != (IXGBE_VF_GET_QUEUE | IXGBE_VT_MSGTYPE_ACK))
733 return IXGBE_ERR_MBX;
734
735 /* record and validate values from message */
736 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
737 if (hw->mac.max_tx_queues == 0 ||
738 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
739 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
740
741 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
742 if (hw->mac.max_rx_queues == 0 ||
743 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
744 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
745
746 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
747 /* in case of unknown state assume we cannot tag frames */
748 if (*num_tcs > hw->mac.max_rx_queues)
749 *num_tcs = 1;
750
751 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
752 /* default to queue 0 on out-of-bounds queue number */
753 if (*default_tc >= hw->mac.max_tx_queues)
754 *default_tc = 0;
755 }
756
757 return err;
758}
759
Stephen Hemminger3d8fe982012-01-18 22:13:34 +0000760static const struct ixgbe_mac_operations ixgbevf_mac_ops = {
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000761 .init_hw = ixgbevf_init_hw_vf,
762 .reset_hw = ixgbevf_reset_hw_vf,
763 .start_hw = ixgbevf_start_hw_vf,
764 .get_mac_addr = ixgbevf_get_mac_addr_vf,
765 .stop_adapter = ixgbevf_stop_hw_vf,
766 .setup_link = ixgbevf_setup_mac_link_vf,
767 .check_link = ixgbevf_check_mac_link_vf,
768 .set_rar = ixgbevf_set_rar_vf,
769 .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,
Hiroshi Shimamoto8443c1a42015-08-28 06:59:03 +0000770 .update_xcast_mode = ixgbevf_update_xcast_mode,
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000771 .set_uc_addr = ixgbevf_set_uc_addr_vf,
772 .set_vfta = ixgbevf_set_vfta_vf,
Greg Rose3047f902010-01-09 02:23:31 +0000773};
774
Stephen Hemminger3d8fe982012-01-18 22:13:34 +0000775const struct ixgbevf_info ixgbevf_82599_vf_info = {
Greg Rose3047f902010-01-09 02:23:31 +0000776 .mac = ixgbe_mac_82599_vf,
777 .mac_ops = &ixgbevf_mac_ops,
778};
779
Stephen Hemminger3d8fe982012-01-18 22:13:34 +0000780const struct ixgbevf_info ixgbevf_X540_vf_info = {
Greg Rose2316aa22010-12-02 07:12:26 +0000781 .mac = ixgbe_mac_X540_vf,
782 .mac_ops = &ixgbevf_mac_ops,
783};
Emil Tantilov47068b02014-11-22 07:59:56 +0000784
785const struct ixgbevf_info ixgbevf_X550_vf_info = {
786 .mac = ixgbe_mac_X550_vf,
787 .mac_ops = &ixgbevf_mac_ops,
788};
789
790const struct ixgbevf_info ixgbevf_X550EM_x_vf_info = {
791 .mac = ixgbe_mac_X550EM_x_vf,
792 .mac_ops = &ixgbevf_mac_ops,
793};