Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License |
| 6 | * as published by the Free Software Foundation, version 2. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, but |
| 9 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or |
| 11 | * NON INFRINGEMENT. See the GNU General Public License for |
| 12 | * more details. |
| 13 | */ |
| 14 | |
| 15 | #ifndef _ASM_TILE_PCI_H |
| 16 | #define _ASM_TILE_PCI_H |
| 17 | |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 18 | #include <linux/pci.h> |
Michael S. Tsirkin | 8455012 | 2011-11-29 20:42:56 +0200 | [diff] [blame^] | 19 | #include <asm-generic/pci_iomap.h> |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 20 | |
| 21 | /* |
| 22 | * Structure of a PCI controller (host bridge) |
| 23 | */ |
| 24 | struct pci_controller { |
| 25 | int index; /* PCI domain number */ |
| 26 | struct pci_bus *root_bus; |
| 27 | |
| 28 | int first_busno; |
| 29 | int last_busno; |
| 30 | |
| 31 | int hv_cfg_fd[2]; /* config{0,1} fds for this PCIe controller */ |
| 32 | int hv_mem_fd; /* fd to Hypervisor for MMIO operations */ |
| 33 | |
| 34 | struct pci_ops *ops; |
| 35 | |
| 36 | int irq_base; /* Base IRQ from the Hypervisor */ |
| 37 | int plx_gen1; /* flag for PLX Gen 1 configuration */ |
| 38 | |
| 39 | /* Address ranges that are routed to this controller/bridge. */ |
| 40 | struct resource mem_resources[3]; |
| 41 | }; |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 42 | |
| 43 | /* |
| 44 | * The hypervisor maps the entirety of CPA-space as bus addresses, so |
| 45 | * bus addresses are physical addresses. The networking and block |
| 46 | * device layers use this boolean for bounce buffer decisions. |
| 47 | */ |
| 48 | #define PCI_DMA_BUS_IS_PHYS 1 |
| 49 | |
Chris Metcalf | 398fa5a | 2011-05-02 15:09:42 -0400 | [diff] [blame] | 50 | int __devinit tile_pci_init(void); |
| 51 | int __devinit pcibios_init(void); |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 52 | |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 53 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) {} |
| 54 | |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 55 | void __devinit pcibios_fixup_bus(struct pci_bus *bus); |
| 56 | |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 57 | #define TILE_NUM_PCIE 2 |
| 58 | |
| 59 | #define pci_domain_nr(bus) (((struct pci_controller *)(bus)->sysdata)->index) |
| 60 | |
| 61 | /* |
| 62 | * This decides whether to display the domain number in /proc. |
| 63 | */ |
| 64 | static inline int pci_proc_domain(struct pci_bus *bus) |
| 65 | { |
| 66 | return 1; |
| 67 | } |
| 68 | |
| 69 | /* |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 70 | * pcibios_assign_all_busses() tells whether or not the bus numbers |
| 71 | * should be reassigned, in case the BIOS didn't do it correctly, or |
| 72 | * in case we don't have a BIOS and we want to let Linux do it. |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 73 | */ |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 74 | static inline int pcibios_assign_all_busses(void) |
| 75 | { |
| 76 | return 1; |
| 77 | } |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 78 | |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 79 | /* |
| 80 | * No special bus mastering setup handling. |
| 81 | */ |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 82 | static inline void pcibios_set_master(struct pci_dev *dev) |
| 83 | { |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 84 | } |
| 85 | |
| 86 | #define PCIBIOS_MIN_MEM 0 |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 87 | #define PCIBIOS_MIN_IO 0 |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 88 | |
| 89 | /* |
| 90 | * This flag tells if the platform is TILEmpower that needs |
| 91 | * special configuration for the PLX switch chip. |
| 92 | */ |
Chris Metcalf | f02cbbe | 2010-11-02 12:05:10 -0400 | [diff] [blame] | 93 | extern int tile_plx_gen1; |
| 94 | |
| 95 | /* Use any cpu for PCI. */ |
| 96 | #define cpumask_of_pcibus(bus) cpu_online_mask |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 97 | |
| 98 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ |
| 99 | #include <asm-generic/pci-dma-compat.h> |
| 100 | |
| 101 | /* generic pci stuff */ |
| 102 | #include <asm-generic/pci.h> |
| 103 | |
Chris Metcalf | 867e359 | 2010-05-28 23:09:12 -0400 | [diff] [blame] | 104 | #endif /* _ASM_TILE_PCI_H */ |