blob: 67ed9f7fe19792cdbd9abfb0860bc7d39148ee10 [file] [log] [blame]
Rob Clark16ea9752013-01-08 15:04:28 -06001/*
2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18/* LCDC DRM driver, based on da8xx-fb */
19
Jyri Sarha103cd8b2015-02-10 14:13:23 +020020#include <linux/component.h>
Dave Gerlach416a07f2014-07-29 06:27:58 +000021#include <linux/pinctrl/consumer.h>
22#include <linux/suspend.h>
Jyri Sarha103cd8b2015-02-10 14:13:23 +020023
Rob Clark16ea9752013-01-08 15:04:28 -060024#include "tilcdc_drv.h"
25#include "tilcdc_regs.h"
26#include "tilcdc_tfp410.h"
Rob Clark0d4bbaf2012-12-18 17:34:16 -060027#include "tilcdc_panel.h"
Jyri Sarha103cd8b2015-02-10 14:13:23 +020028#include "tilcdc_external.h"
Rob Clark16ea9752013-01-08 15:04:28 -060029
30#include "drm_fb_helper.h"
31
32static LIST_HEAD(module_list);
33
34void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
35 const struct tilcdc_module_ops *funcs)
36{
37 mod->name = name;
38 mod->funcs = funcs;
39 INIT_LIST_HEAD(&mod->list);
40 list_add(&mod->list, &module_list);
41}
42
43void tilcdc_module_cleanup(struct tilcdc_module *mod)
44{
45 list_del(&mod->list);
46}
47
48static struct of_device_id tilcdc_of_match[];
49
50static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
Ville Syrjälä1eb83452015-11-11 19:11:29 +020051 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
Rob Clark16ea9752013-01-08 15:04:28 -060052{
53 return drm_fb_cma_create(dev, file_priv, mode_cmd);
54}
55
56static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
57{
58 struct tilcdc_drm_private *priv = dev->dev_private;
Markus Elfringc08448172014-11-19 17:05:20 +010059 drm_fbdev_cma_hotplug_event(priv->fbdev);
Rob Clark16ea9752013-01-08 15:04:28 -060060}
61
62static const struct drm_mode_config_funcs mode_config_funcs = {
63 .fb_create = tilcdc_fb_create,
64 .output_poll_changed = tilcdc_fb_output_poll_changed,
65};
66
67static int modeset_init(struct drm_device *dev)
68{
69 struct tilcdc_drm_private *priv = dev->dev_private;
70 struct tilcdc_module *mod;
71
72 drm_mode_config_init(dev);
73
74 priv->crtc = tilcdc_crtc_create(dev);
75
76 list_for_each_entry(mod, &module_list, list) {
77 DBG("loading module: %s", mod->name);
78 mod->funcs->modeset_init(mod, dev);
79 }
80
Rob Clark16ea9752013-01-08 15:04:28 -060081 dev->mode_config.min_width = 0;
82 dev->mode_config.min_height = 0;
83 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
84 dev->mode_config.max_height = 2048;
85 dev->mode_config.funcs = &mode_config_funcs;
86
87 return 0;
88}
89
90#ifdef CONFIG_CPU_FREQ
91static int cpufreq_transition(struct notifier_block *nb,
92 unsigned long val, void *data)
93{
94 struct tilcdc_drm_private *priv = container_of(nb,
95 struct tilcdc_drm_private, freq_transition);
96 if (val == CPUFREQ_POSTCHANGE) {
97 if (priv->lcd_fck_rate != clk_get_rate(priv->clk)) {
98 priv->lcd_fck_rate = clk_get_rate(priv->clk);
99 tilcdc_crtc_update_clk(priv->crtc);
100 }
101 }
102
103 return 0;
104}
105#endif
106
107/*
108 * DRM operations:
109 */
110
111static int tilcdc_unload(struct drm_device *dev)
112{
113 struct tilcdc_drm_private *priv = dev->dev_private;
Rob Clark16ea9752013-01-08 15:04:28 -0600114
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200115 tilcdc_remove_external_encoders(dev);
116
Guido Martínez3a490122014-06-17 11:17:07 -0300117 drm_fbdev_cma_fini(priv->fbdev);
Rob Clark16ea9752013-01-08 15:04:28 -0600118 drm_kms_helper_poll_fini(dev);
119 drm_mode_config_cleanup(dev);
120 drm_vblank_cleanup(dev);
121
122 pm_runtime_get_sync(dev->dev);
123 drm_irq_uninstall(dev);
124 pm_runtime_put_sync(dev->dev);
125
126#ifdef CONFIG_CPU_FREQ
127 cpufreq_unregister_notifier(&priv->freq_transition,
128 CPUFREQ_TRANSITION_NOTIFIER);
129#endif
130
131 if (priv->clk)
132 clk_put(priv->clk);
133
134 if (priv->mmio)
135 iounmap(priv->mmio);
136
137 flush_workqueue(priv->wq);
138 destroy_workqueue(priv->wq);
139
140 dev->dev_private = NULL;
141
142 pm_runtime_disable(dev->dev);
143
Rob Clark16ea9752013-01-08 15:04:28 -0600144 kfree(priv);
145
146 return 0;
147}
148
149static int tilcdc_load(struct drm_device *dev, unsigned long flags)
150{
151 struct platform_device *pdev = dev->platformdev;
152 struct device_node *node = pdev->dev.of_node;
153 struct tilcdc_drm_private *priv;
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500154 struct tilcdc_module *mod;
Rob Clark16ea9752013-01-08 15:04:28 -0600155 struct resource *res;
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500156 u32 bpp = 0;
Rob Clark16ea9752013-01-08 15:04:28 -0600157 int ret;
158
159 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
160 if (!priv) {
161 dev_err(dev->dev, "failed to allocate private data\n");
162 return -ENOMEM;
163 }
164
165 dev->dev_private = priv;
166
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200167 priv->is_componentized =
168 tilcdc_get_external_components(dev->dev, NULL) > 0;
169
Rob Clark16ea9752013-01-08 15:04:28 -0600170 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300171 if (!priv->wq) {
172 ret = -ENOMEM;
173 goto fail_free_priv;
174 }
Rob Clark16ea9752013-01-08 15:04:28 -0600175
176 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
177 if (!res) {
178 dev_err(dev->dev, "failed to get memory resource\n");
179 ret = -EINVAL;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300180 goto fail_free_wq;
Rob Clark16ea9752013-01-08 15:04:28 -0600181 }
182
183 priv->mmio = ioremap_nocache(res->start, resource_size(res));
184 if (!priv->mmio) {
185 dev_err(dev->dev, "failed to ioremap\n");
186 ret = -ENOMEM;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300187 goto fail_free_wq;
Rob Clark16ea9752013-01-08 15:04:28 -0600188 }
189
190 priv->clk = clk_get(dev->dev, "fck");
191 if (IS_ERR(priv->clk)) {
192 dev_err(dev->dev, "failed to get functional clock\n");
193 ret = -ENODEV;
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300194 goto fail_iounmap;
Rob Clark16ea9752013-01-08 15:04:28 -0600195 }
196
Rob Clark16ea9752013-01-08 15:04:28 -0600197#ifdef CONFIG_CPU_FREQ
198 priv->lcd_fck_rate = clk_get_rate(priv->clk);
199 priv->freq_transition.notifier_call = cpufreq_transition;
200 ret = cpufreq_register_notifier(&priv->freq_transition,
201 CPUFREQ_TRANSITION_NOTIFIER);
202 if (ret) {
203 dev_err(dev->dev, "failed to register cpufreq notifier\n");
Darren Etheridge3d193062014-01-15 15:52:36 -0600204 goto fail_put_clk;
Rob Clark16ea9752013-01-08 15:04:28 -0600205 }
206#endif
207
208 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
Darren Etheridge4e564342013-06-21 13:52:23 -0500209 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
210
211 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
212
213 if (of_property_read_u32(node, "ti,max-width", &priv->max_width))
214 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
215
216 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
217
218 if (of_property_read_u32(node, "ti,max-pixelclock",
219 &priv->max_pixelclock))
220 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
221
222 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
Rob Clark16ea9752013-01-08 15:04:28 -0600223
224 pm_runtime_enable(dev->dev);
Tomi Valkeinene3487e02015-05-27 10:39:52 +0300225 pm_runtime_irq_safe(dev->dev);
Rob Clark16ea9752013-01-08 15:04:28 -0600226
227 /* Determine LCD IP Version */
228 pm_runtime_get_sync(dev->dev);
229 switch (tilcdc_read(dev, LCDC_PID_REG)) {
230 case 0x4c100102:
231 priv->rev = 1;
232 break;
233 case 0x4f200800:
234 case 0x4f201000:
235 priv->rev = 2;
236 break;
237 default:
238 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, "
239 "defaulting to LCD revision 1\n",
240 tilcdc_read(dev, LCDC_PID_REG));
241 priv->rev = 1;
242 break;
243 }
244
245 pm_runtime_put_sync(dev->dev);
246
247 ret = modeset_init(dev);
248 if (ret < 0) {
249 dev_err(dev->dev, "failed to initialize mode setting\n");
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300250 goto fail_cpufreq_unregister;
Rob Clark16ea9752013-01-08 15:04:28 -0600251 }
252
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200253 platform_set_drvdata(pdev, dev);
254
255 if (priv->is_componentized) {
256 ret = component_bind_all(dev->dev, dev);
257 if (ret < 0)
258 goto fail_mode_config_cleanup;
259
260 ret = tilcdc_add_external_encoders(dev, &bpp);
261 if (ret < 0)
262 goto fail_component_cleanup;
263 }
264
265 if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) {
266 dev_err(dev->dev, "no encoders/connectors found\n");
267 ret = -ENXIO;
268 goto fail_external_cleanup;
269 }
270
Rob Clark16ea9752013-01-08 15:04:28 -0600271 ret = drm_vblank_init(dev, 1);
272 if (ret < 0) {
273 dev_err(dev->dev, "failed to initialize vblank\n");
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200274 goto fail_external_cleanup;
Rob Clark16ea9752013-01-08 15:04:28 -0600275 }
276
277 pm_runtime_get_sync(dev->dev);
Daniel Vetterbb0f1b52013-11-03 21:09:27 +0100278 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
Rob Clark16ea9752013-01-08 15:04:28 -0600279 pm_runtime_put_sync(dev->dev);
280 if (ret < 0) {
281 dev_err(dev->dev, "failed to install IRQ handler\n");
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300282 goto fail_vblank_cleanup;
Rob Clark16ea9752013-01-08 15:04:28 -0600283 }
284
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500285 list_for_each_entry(mod, &module_list, list) {
286 DBG("%s: preferred_bpp: %d", mod->name, mod->preferred_bpp);
287 bpp = mod->preferred_bpp;
288 if (bpp > 0)
289 break;
290 }
291
Maxime Ripard4314e192016-01-14 16:24:56 +0100292 drm_helper_disable_unused_functions(dev);
Benoit Parrotdc28aa02013-06-18 17:18:31 -0500293 priv->fbdev = drm_fbdev_cma_init(dev, bpp,
Rob Clark16ea9752013-01-08 15:04:28 -0600294 dev->mode_config.num_crtc,
295 dev->mode_config.num_connector);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300296 if (IS_ERR(priv->fbdev)) {
297 ret = PTR_ERR(priv->fbdev);
298 goto fail_irq_uninstall;
299 }
Rob Clark16ea9752013-01-08 15:04:28 -0600300
301 drm_kms_helper_poll_init(dev);
302
303 return 0;
304
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300305fail_irq_uninstall:
306 pm_runtime_get_sync(dev->dev);
307 drm_irq_uninstall(dev);
308 pm_runtime_put_sync(dev->dev);
309
310fail_vblank_cleanup:
311 drm_vblank_cleanup(dev);
312
313fail_mode_config_cleanup:
314 drm_mode_config_cleanup(dev);
315
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200316fail_component_cleanup:
317 if (priv->is_componentized)
318 component_unbind_all(dev->dev, dev);
319
320fail_external_cleanup:
321 tilcdc_remove_external_encoders(dev);
322
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300323fail_cpufreq_unregister:
324 pm_runtime_disable(dev->dev);
325#ifdef CONFIG_CPU_FREQ
326 cpufreq_unregister_notifier(&priv->freq_transition,
327 CPUFREQ_TRANSITION_NOTIFIER);
Ezequiel Garciab478e336b2014-09-02 09:51:15 -0300328#endif
329
330fail_put_clk:
331 clk_put(priv->clk);
332
333fail_iounmap:
334 iounmap(priv->mmio);
335
336fail_free_wq:
337 flush_workqueue(priv->wq);
338 destroy_workqueue(priv->wq);
339
340fail_free_priv:
341 dev->dev_private = NULL;
342 kfree(priv);
Rob Clark16ea9752013-01-08 15:04:28 -0600343 return ret;
344}
345
Rob Clark16ea9752013-01-08 15:04:28 -0600346static void tilcdc_lastclose(struct drm_device *dev)
347{
348 struct tilcdc_drm_private *priv = dev->dev_private;
349 drm_fbdev_cma_restore_mode(priv->fbdev);
350}
351
Daniel Vettere9f0d762013-12-11 11:34:42 +0100352static irqreturn_t tilcdc_irq(int irq, void *arg)
Rob Clark16ea9752013-01-08 15:04:28 -0600353{
354 struct drm_device *dev = arg;
355 struct tilcdc_drm_private *priv = dev->dev_private;
356 return tilcdc_crtc_irq(priv->crtc);
357}
358
359static void tilcdc_irq_preinstall(struct drm_device *dev)
360{
361 tilcdc_clear_irqstatus(dev, 0xffffffff);
362}
363
364static int tilcdc_irq_postinstall(struct drm_device *dev)
365{
366 struct tilcdc_drm_private *priv = dev->dev_private;
367
368 /* enable FIFO underflow irq: */
Sachin Kamata50b24f2013-03-02 15:53:07 +0530369 if (priv->rev == 1)
Rob Clark16ea9752013-01-08 15:04:28 -0600370 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA);
Sachin Kamata50b24f2013-03-02 15:53:07 +0530371 else
Rob Clark16ea9752013-01-08 15:04:28 -0600372 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA);
Rob Clark16ea9752013-01-08 15:04:28 -0600373
374 return 0;
375}
376
377static void tilcdc_irq_uninstall(struct drm_device *dev)
378{
379 struct tilcdc_drm_private *priv = dev->dev_private;
380
381 /* disable irqs that we might have enabled: */
382 if (priv->rev == 1) {
383 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,
384 LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA);
385 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA);
386 } else {
387 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG,
388 LCDC_V2_UNDERFLOW_INT_ENA | LCDC_V2_PL_INT_ENA |
389 LCDC_V2_END_OF_FRAME0_INT_ENA | LCDC_V2_END_OF_FRAME1_INT_ENA |
390 LCDC_FRAME_DONE);
391 }
392
393}
394
395static void enable_vblank(struct drm_device *dev, bool enable)
396{
397 struct tilcdc_drm_private *priv = dev->dev_private;
398 u32 reg, mask;
399
400 if (priv->rev == 1) {
401 reg = LCDC_DMA_CTRL_REG;
402 mask = LCDC_V1_END_OF_FRAME_INT_ENA;
403 } else {
404 reg = LCDC_INT_ENABLE_SET_REG;
405 mask = LCDC_V2_END_OF_FRAME0_INT_ENA |
406 LCDC_V2_END_OF_FRAME1_INT_ENA | LCDC_FRAME_DONE;
407 }
408
409 if (enable)
410 tilcdc_set(dev, reg, mask);
411 else
412 tilcdc_clear(dev, reg, mask);
413}
414
Thierry Reding88e72712015-09-24 18:35:31 +0200415static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe)
Rob Clark16ea9752013-01-08 15:04:28 -0600416{
417 enable_vblank(dev, true);
418 return 0;
419}
420
Thierry Reding88e72712015-09-24 18:35:31 +0200421static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe)
Rob Clark16ea9752013-01-08 15:04:28 -0600422{
423 enable_vblank(dev, false);
424}
425
426#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_PM_SLEEP)
427static const struct {
428 const char *name;
429 uint8_t rev;
430 uint8_t save;
431 uint32_t reg;
Sachin Kamat32501452013-03-02 15:53:08 +0530432} registers[] = {
Rob Clark16ea9752013-01-08 15:04:28 -0600433#define REG(rev, save, reg) { #reg, rev, save, reg }
434 /* exists in revision 1: */
435 REG(1, false, LCDC_PID_REG),
436 REG(1, true, LCDC_CTRL_REG),
437 REG(1, false, LCDC_STAT_REG),
438 REG(1, true, LCDC_RASTER_CTRL_REG),
439 REG(1, true, LCDC_RASTER_TIMING_0_REG),
440 REG(1, true, LCDC_RASTER_TIMING_1_REG),
441 REG(1, true, LCDC_RASTER_TIMING_2_REG),
442 REG(1, true, LCDC_DMA_CTRL_REG),
443 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
444 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
445 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
446 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
447 /* new in revision 2: */
448 REG(2, false, LCDC_RAW_STAT_REG),
449 REG(2, false, LCDC_MASKED_STAT_REG),
450 REG(2, false, LCDC_INT_ENABLE_SET_REG),
451 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
452 REG(2, false, LCDC_END_OF_INT_IND_REG),
453 REG(2, true, LCDC_CLK_ENABLE_REG),
454 REG(2, true, LCDC_INT_ENABLE_SET_REG),
455#undef REG
456};
457#endif
458
459#ifdef CONFIG_DEBUG_FS
460static int tilcdc_regs_show(struct seq_file *m, void *arg)
461{
462 struct drm_info_node *node = (struct drm_info_node *) m->private;
463 struct drm_device *dev = node->minor->dev;
464 struct tilcdc_drm_private *priv = dev->dev_private;
465 unsigned i;
466
467 pm_runtime_get_sync(dev->dev);
468
469 seq_printf(m, "revision: %d\n", priv->rev);
470
471 for (i = 0; i < ARRAY_SIZE(registers); i++)
472 if (priv->rev >= registers[i].rev)
473 seq_printf(m, "%s:\t %08x\n", registers[i].name,
474 tilcdc_read(dev, registers[i].reg));
475
476 pm_runtime_put_sync(dev->dev);
477
478 return 0;
479}
480
481static int tilcdc_mm_show(struct seq_file *m, void *arg)
482{
483 struct drm_info_node *node = (struct drm_info_node *) m->private;
484 struct drm_device *dev = node->minor->dev;
Daniel Vetterb04a5902013-12-11 14:24:46 +0100485 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
Rob Clark16ea9752013-01-08 15:04:28 -0600486}
487
488static struct drm_info_list tilcdc_debugfs_list[] = {
489 { "regs", tilcdc_regs_show, 0 },
490 { "mm", tilcdc_mm_show, 0 },
491 { "fb", drm_fb_cma_debugfs_show, 0 },
492};
493
494static int tilcdc_debugfs_init(struct drm_minor *minor)
495{
496 struct drm_device *dev = minor->dev;
497 struct tilcdc_module *mod;
498 int ret;
499
500 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
501 ARRAY_SIZE(tilcdc_debugfs_list),
502 minor->debugfs_root, minor);
503
504 list_for_each_entry(mod, &module_list, list)
505 if (mod->funcs->debugfs_init)
506 mod->funcs->debugfs_init(mod, minor);
507
508 if (ret) {
509 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
510 return ret;
511 }
512
513 return ret;
514}
515
516static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
517{
518 struct tilcdc_module *mod;
519 drm_debugfs_remove_files(tilcdc_debugfs_list,
520 ARRAY_SIZE(tilcdc_debugfs_list), minor);
521
522 list_for_each_entry(mod, &module_list, list)
523 if (mod->funcs->debugfs_cleanup)
524 mod->funcs->debugfs_cleanup(mod, minor);
525}
526#endif
527
528static const struct file_operations fops = {
529 .owner = THIS_MODULE,
530 .open = drm_open,
531 .release = drm_release,
532 .unlocked_ioctl = drm_ioctl,
533#ifdef CONFIG_COMPAT
534 .compat_ioctl = drm_compat_ioctl,
535#endif
536 .poll = drm_poll,
537 .read = drm_read,
Rob Clark16ea9752013-01-08 15:04:28 -0600538 .llseek = no_llseek,
539 .mmap = drm_gem_cma_mmap,
540};
541
542static struct drm_driver tilcdc_driver = {
543 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
544 .load = tilcdc_load,
545 .unload = tilcdc_unload,
Rob Clark16ea9752013-01-08 15:04:28 -0600546 .lastclose = tilcdc_lastclose,
David Herrmann915b4d12014-08-29 12:12:43 +0200547 .set_busid = drm_platform_set_busid,
Rob Clark16ea9752013-01-08 15:04:28 -0600548 .irq_handler = tilcdc_irq,
549 .irq_preinstall = tilcdc_irq_preinstall,
550 .irq_postinstall = tilcdc_irq_postinstall,
551 .irq_uninstall = tilcdc_irq_uninstall,
Ville Syrjäläb44f8402015-09-30 16:46:48 +0300552 .get_vblank_counter = drm_vblank_no_hw_counter,
Rob Clark16ea9752013-01-08 15:04:28 -0600553 .enable_vblank = tilcdc_enable_vblank,
554 .disable_vblank = tilcdc_disable_vblank,
555 .gem_free_object = drm_gem_cma_free_object,
556 .gem_vm_ops = &drm_gem_cma_vm_ops,
557 .dumb_create = drm_gem_cma_dumb_create,
558 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200559 .dumb_destroy = drm_gem_dumb_destroy,
Rob Clark16ea9752013-01-08 15:04:28 -0600560#ifdef CONFIG_DEBUG_FS
561 .debugfs_init = tilcdc_debugfs_init,
562 .debugfs_cleanup = tilcdc_debugfs_cleanup,
563#endif
564 .fops = &fops,
565 .name = "tilcdc",
566 .desc = "TI LCD Controller DRM",
567 .date = "20121205",
568 .major = 1,
569 .minor = 0,
570};
571
572/*
573 * Power management:
574 */
575
576#ifdef CONFIG_PM_SLEEP
577static int tilcdc_pm_suspend(struct device *dev)
578{
579 struct drm_device *ddev = dev_get_drvdata(dev);
580 struct tilcdc_drm_private *priv = ddev->dev_private;
581 unsigned i, n = 0;
582
583 drm_kms_helper_poll_disable(ddev);
584
Darren Etheridge85fd27f2014-09-19 01:42:57 +0000585 /* Select sleep pin state */
586 pinctrl_pm_select_sleep_state(dev);
587
588 if (pm_runtime_suspended(dev)) {
589 priv->ctx_valid = false;
590 return 0;
591 }
592
Rob Clark16ea9752013-01-08 15:04:28 -0600593 /* Save register state: */
594 for (i = 0; i < ARRAY_SIZE(registers); i++)
595 if (registers[i].save && (priv->rev >= registers[i].rev))
596 priv->saved_register[n++] = tilcdc_read(ddev, registers[i].reg);
597
Darren Etheridge85fd27f2014-09-19 01:42:57 +0000598 priv->ctx_valid = true;
Dave Gerlach416a07f2014-07-29 06:27:58 +0000599
Rob Clark16ea9752013-01-08 15:04:28 -0600600 return 0;
601}
602
603static int tilcdc_pm_resume(struct device *dev)
604{
605 struct drm_device *ddev = dev_get_drvdata(dev);
606 struct tilcdc_drm_private *priv = ddev->dev_private;
607 unsigned i, n = 0;
608
Dave Gerlach416a07f2014-07-29 06:27:58 +0000609 /* Select default pin state */
610 pinctrl_pm_select_default_state(dev);
611
Darren Etheridge85fd27f2014-09-19 01:42:57 +0000612 if (priv->ctx_valid == true) {
613 /* Restore register state: */
614 for (i = 0; i < ARRAY_SIZE(registers); i++)
615 if (registers[i].save &&
616 (priv->rev >= registers[i].rev))
617 tilcdc_write(ddev, registers[i].reg,
618 priv->saved_register[n++]);
619 }
Rob Clark16ea9752013-01-08 15:04:28 -0600620
621 drm_kms_helper_poll_enable(ddev);
622
623 return 0;
624}
625#endif
626
627static const struct dev_pm_ops tilcdc_pm_ops = {
628 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
629};
630
631/*
632 * Platform driver:
633 */
634
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200635static int tilcdc_bind(struct device *dev)
636{
637 return drm_platform_init(&tilcdc_driver, to_platform_device(dev));
638}
639
640static void tilcdc_unbind(struct device *dev)
641{
642 drm_put_dev(dev_get_drvdata(dev));
643}
644
645static const struct component_master_ops tilcdc_comp_ops = {
646 .bind = tilcdc_bind,
647 .unbind = tilcdc_unbind,
648};
649
Rob Clark16ea9752013-01-08 15:04:28 -0600650static int tilcdc_pdev_probe(struct platform_device *pdev)
651{
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200652 struct component_match *match = NULL;
653 int ret;
654
Rob Clark16ea9752013-01-08 15:04:28 -0600655 /* bail out early if no DT data: */
656 if (!pdev->dev.of_node) {
657 dev_err(&pdev->dev, "device-tree data is missing\n");
658 return -ENXIO;
659 }
660
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200661 ret = tilcdc_get_external_components(&pdev->dev, &match);
662 if (ret < 0)
663 return ret;
664 else if (ret == 0)
665 return drm_platform_init(&tilcdc_driver, pdev);
666 else
667 return component_master_add_with_match(&pdev->dev,
668 &tilcdc_comp_ops,
669 match);
Rob Clark16ea9752013-01-08 15:04:28 -0600670}
671
672static int tilcdc_pdev_remove(struct platform_device *pdev)
673{
Jyri Sarha103cd8b2015-02-10 14:13:23 +0200674 struct drm_device *ddev = dev_get_drvdata(&pdev->dev);
675 struct tilcdc_drm_private *priv = ddev->dev_private;
676
677 /* Check if a subcomponent has already triggered the unloading. */
678 if (!priv)
679 return 0;
680
681 if (priv->is_componentized)
682 component_master_del(&pdev->dev, &tilcdc_comp_ops);
683 else
684 drm_put_dev(platform_get_drvdata(pdev));
Rob Clark16ea9752013-01-08 15:04:28 -0600685
686 return 0;
687}
688
689static struct of_device_id tilcdc_of_match[] = {
690 { .compatible = "ti,am33xx-tilcdc", },
691 { },
692};
693MODULE_DEVICE_TABLE(of, tilcdc_of_match);
694
695static struct platform_driver tilcdc_platform_driver = {
696 .probe = tilcdc_pdev_probe,
697 .remove = tilcdc_pdev_remove,
698 .driver = {
Rob Clark16ea9752013-01-08 15:04:28 -0600699 .name = "tilcdc",
700 .pm = &tilcdc_pm_ops,
701 .of_match_table = tilcdc_of_match,
702 },
703};
704
705static int __init tilcdc_drm_init(void)
706{
707 DBG("init");
708 tilcdc_tfp410_init();
Rob Clark0d4bbaf2012-12-18 17:34:16 -0600709 tilcdc_panel_init();
Rob Clark16ea9752013-01-08 15:04:28 -0600710 return platform_driver_register(&tilcdc_platform_driver);
711}
712
713static void __exit tilcdc_drm_fini(void)
714{
715 DBG("fini");
Rob Clark16ea9752013-01-08 15:04:28 -0600716 platform_driver_unregister(&tilcdc_platform_driver);
Guido Martínezeb565a22014-06-17 11:17:08 -0300717 tilcdc_panel_fini();
Guido Martínezeb565a22014-06-17 11:17:08 -0300718 tilcdc_tfp410_fini();
Rob Clark16ea9752013-01-08 15:04:28 -0600719}
720
Guido Martínez2023d842014-06-17 11:17:11 -0300721module_init(tilcdc_drm_init);
Rob Clark16ea9752013-01-08 15:04:28 -0600722module_exit(tilcdc_drm_fini);
723
724MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
725MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
726MODULE_LICENSE("GPL");