blob: 5ed94109d1d6fdb951f6d392378bc7beabd8ab53 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Ursula Braunf38ba1792017-01-09 16:55:19 +01002/*
3 * Shared Memory Communications over RDMA (SMC-R) and RoCE
4 *
5 * Work Requests exploiting Infiniband API
6 *
7 * Work requests (WR) of type ib_post_send or ib_post_recv respectively
8 * are submitted to either RC SQ or RC RQ respectively
9 * (reliably connected send/receive queue)
10 * and become work queue entries (WQEs).
11 * While an SQ WR/WQE is pending, we track it until transmission completion.
12 * Through a send or receive completion queue (CQ) respectively,
13 * we get completion queue entries (CQEs) [aka work completions (WCs)].
14 * Since the CQ callback is called from IRQ context, we split work by using
15 * bottom halves implemented by tasklets.
16 *
17 * SMC uses this to exchange LLC (link layer control)
18 * and CDC (connection data control) messages.
19 *
20 * Copyright IBM Corp. 2016
21 *
22 * Author(s): Steffen Maier <maier@linux.vnet.ibm.com>
23 */
24
25#include <linux/atomic.h>
26#include <linux/hashtable.h>
27#include <linux/wait.h>
28#include <rdma/ib_verbs.h>
29#include <asm/div64.h>
30
31#include "smc.h"
32#include "smc_wr.h"
33
34#define SMC_WR_MAX_POLL_CQE 10 /* max. # of compl. queue elements in 1 poll */
35
36#define SMC_WR_RX_HASH_BITS 4
37static DEFINE_HASHTABLE(smc_wr_rx_hash, SMC_WR_RX_HASH_BITS);
38static DEFINE_SPINLOCK(smc_wr_rx_hash_lock);
39
40struct smc_wr_tx_pend { /* control data for a pending send request */
41 u64 wr_id; /* work request id sent */
42 smc_wr_tx_handler handler;
43 enum ib_wc_status wc_status; /* CQE status */
44 struct smc_link *link;
45 u32 idx;
46 struct smc_wr_tx_pend_priv priv;
47};
48
49/******************************** send queue *********************************/
50
51/*------------------------------- completion --------------------------------*/
52
53static inline int smc_wr_tx_find_pending_index(struct smc_link *link, u64 wr_id)
54{
55 u32 i;
56
57 for (i = 0; i < link->wr_tx_cnt; i++) {
58 if (link->wr_tx_pends[i].wr_id == wr_id)
59 return i;
60 }
61 return link->wr_tx_cnt;
62}
63
64static inline void smc_wr_tx_process_cqe(struct ib_wc *wc)
65{
66 struct smc_wr_tx_pend pnd_snd;
67 struct smc_link *link;
68 u32 pnd_snd_idx;
69 int i;
70
71 link = wc->qp->qp_context;
Ursula Braun652a1e42017-07-28 13:56:17 +020072
73 if (wc->opcode == IB_WC_REG_MR) {
74 if (wc->status)
75 link->wr_reg_state = FAILED;
76 else
77 link->wr_reg_state = CONFIRMED;
78 wake_up(&link->wr_reg_wait);
79 return;
80 }
81
Ursula Braunf38ba1792017-01-09 16:55:19 +010082 pnd_snd_idx = smc_wr_tx_find_pending_index(link, wc->wr_id);
83 if (pnd_snd_idx == link->wr_tx_cnt)
84 return;
85 link->wr_tx_pends[pnd_snd_idx].wc_status = wc->status;
86 memcpy(&pnd_snd, &link->wr_tx_pends[pnd_snd_idx], sizeof(pnd_snd));
87 /* clear the full struct smc_wr_tx_pend including .priv */
88 memset(&link->wr_tx_pends[pnd_snd_idx], 0,
89 sizeof(link->wr_tx_pends[pnd_snd_idx]));
90 memset(&link->wr_tx_bufs[pnd_snd_idx], 0,
91 sizeof(link->wr_tx_bufs[pnd_snd_idx]));
92 if (!test_and_clear_bit(pnd_snd_idx, link->wr_tx_mask))
93 return;
94 if (wc->status) {
Ursula Braunb38d7322017-01-09 16:55:25 +010095 struct smc_link_group *lgr;
96
Ursula Braunf38ba1792017-01-09 16:55:19 +010097 for_each_set_bit(i, link->wr_tx_mask, link->wr_tx_cnt) {
98 /* clear full struct smc_wr_tx_pend including .priv */
99 memset(&link->wr_tx_pends[i], 0,
100 sizeof(link->wr_tx_pends[i]));
101 memset(&link->wr_tx_bufs[i], 0,
102 sizeof(link->wr_tx_bufs[i]));
103 clear_bit(i, link->wr_tx_mask);
104 }
Ursula Braunb38d7322017-01-09 16:55:25 +0100105 /* terminate connections of this link group abnormally */
106 lgr = container_of(link, struct smc_link_group,
107 lnk[SMC_SINGLE_LINK]);
108 smc_lgr_terminate(lgr);
Ursula Braunf38ba1792017-01-09 16:55:19 +0100109 }
110 if (pnd_snd.handler)
111 pnd_snd.handler(&pnd_snd.priv, link, wc->status);
112 wake_up(&link->wr_tx_wait);
113}
114
115static void smc_wr_tx_tasklet_fn(unsigned long data)
116{
117 struct smc_ib_device *dev = (struct smc_ib_device *)data;
118 struct ib_wc wc[SMC_WR_MAX_POLL_CQE];
119 int i = 0, rc;
120 int polled = 0;
121
122again:
123 polled++;
124 do {
Ursula Braun86e780d2018-01-24 10:28:15 +0100125 memset(&wc, 0, sizeof(wc));
Ursula Braunf38ba1792017-01-09 16:55:19 +0100126 rc = ib_poll_cq(dev->roce_cq_send, SMC_WR_MAX_POLL_CQE, wc);
127 if (polled == 1) {
128 ib_req_notify_cq(dev->roce_cq_send,
129 IB_CQ_NEXT_COMP |
130 IB_CQ_REPORT_MISSED_EVENTS);
131 }
132 if (!rc)
133 break;
134 for (i = 0; i < rc; i++)
135 smc_wr_tx_process_cqe(&wc[i]);
136 } while (rc > 0);
137 if (polled == 1)
138 goto again;
139}
140
141void smc_wr_tx_cq_handler(struct ib_cq *ib_cq, void *cq_context)
142{
143 struct smc_ib_device *dev = (struct smc_ib_device *)cq_context;
144
145 tasklet_schedule(&dev->send_tasklet);
146}
147
148/*---------------------------- request submission ---------------------------*/
149
150static inline int smc_wr_tx_get_free_slot_index(struct smc_link *link, u32 *idx)
151{
152 *idx = link->wr_tx_cnt;
153 for_each_clear_bit(*idx, link->wr_tx_mask, link->wr_tx_cnt) {
154 if (!test_and_set_bit(*idx, link->wr_tx_mask))
155 return 0;
156 }
157 *idx = link->wr_tx_cnt;
158 return -EBUSY;
159}
160
161/**
162 * smc_wr_tx_get_free_slot() - returns buffer for message assembly,
163 * and sets info for pending transmit tracking
164 * @link: Pointer to smc_link used to later send the message.
165 * @handler: Send completion handler function pointer.
166 * @wr_buf: Out value returns pointer to message buffer.
167 * @wr_pend_priv: Out value returns pointer serving as handler context.
168 *
169 * Return: 0 on success, or -errno on error.
170 */
171int smc_wr_tx_get_free_slot(struct smc_link *link,
172 smc_wr_tx_handler handler,
173 struct smc_wr_buf **wr_buf,
174 struct smc_wr_tx_pend_priv **wr_pend_priv)
175{
176 struct smc_wr_tx_pend *wr_pend;
177 struct ib_send_wr *wr_ib;
178 u64 wr_id;
179 u32 idx;
180 int rc;
181
182 *wr_buf = NULL;
183 *wr_pend_priv = NULL;
184 if (in_softirq()) {
185 rc = smc_wr_tx_get_free_slot_index(link, &idx);
186 if (rc)
187 return rc;
188 } else {
Ursula Braun86e780d2018-01-24 10:28:15 +0100189 rc = wait_event_timeout(
Ursula Braunf38ba1792017-01-09 16:55:19 +0100190 link->wr_tx_wait,
191 (smc_wr_tx_get_free_slot_index(link, &idx) != -EBUSY),
192 SMC_WR_TX_WAIT_FREE_SLOT_TIME);
193 if (!rc) {
Ursula Braunb38d7322017-01-09 16:55:25 +0100194 /* timeout - terminate connections */
195 struct smc_link_group *lgr;
196
197 lgr = container_of(link, struct smc_link_group,
198 lnk[SMC_SINGLE_LINK]);
199 smc_lgr_terminate(lgr);
Ursula Braunf38ba1792017-01-09 16:55:19 +0100200 return -EPIPE;
201 }
Ursula Braunf38ba1792017-01-09 16:55:19 +0100202 if (idx == link->wr_tx_cnt)
203 return -EPIPE;
204 }
205 wr_id = smc_wr_tx_get_next_wr_id(link);
206 wr_pend = &link->wr_tx_pends[idx];
207 wr_pend->wr_id = wr_id;
208 wr_pend->handler = handler;
209 wr_pend->link = link;
210 wr_pend->idx = idx;
211 wr_ib = &link->wr_tx_ibs[idx];
212 wr_ib->wr_id = wr_id;
213 *wr_buf = &link->wr_tx_bufs[idx];
214 *wr_pend_priv = &wr_pend->priv;
215 return 0;
216}
217
218int smc_wr_tx_put_slot(struct smc_link *link,
219 struct smc_wr_tx_pend_priv *wr_pend_priv)
220{
221 struct smc_wr_tx_pend *pend;
222
223 pend = container_of(wr_pend_priv, struct smc_wr_tx_pend, priv);
224 if (pend->idx < link->wr_tx_cnt) {
225 /* clear the full struct smc_wr_tx_pend including .priv */
226 memset(&link->wr_tx_pends[pend->idx], 0,
227 sizeof(link->wr_tx_pends[pend->idx]));
228 memset(&link->wr_tx_bufs[pend->idx], 0,
229 sizeof(link->wr_tx_bufs[pend->idx]));
230 test_and_clear_bit(pend->idx, link->wr_tx_mask);
231 return 1;
232 }
233
234 return 0;
235}
236
237/* Send prepared WR slot via ib_post_send.
238 * @priv: pointer to smc_wr_tx_pend_priv identifying prepared message buffer
239 */
240int smc_wr_tx_send(struct smc_link *link, struct smc_wr_tx_pend_priv *priv)
241{
242 struct ib_send_wr *failed_wr = NULL;
243 struct smc_wr_tx_pend *pend;
244 int rc;
245
246 ib_req_notify_cq(link->smcibdev->roce_cq_send,
Ursula Braun8301fa42017-09-21 09:16:30 +0200247 IB_CQ_NEXT_COMP | IB_CQ_REPORT_MISSED_EVENTS);
Ursula Braunf38ba1792017-01-09 16:55:19 +0100248 pend = container_of(priv, struct smc_wr_tx_pend, priv);
249 rc = ib_post_send(link->roce_qp, &link->wr_tx_ibs[pend->idx],
250 &failed_wr);
251 if (rc)
252 smc_wr_tx_put_slot(link, priv);
253 return rc;
254}
255
Ursula Braun652a1e42017-07-28 13:56:17 +0200256/* Register a memory region and wait for result. */
257int smc_wr_reg_send(struct smc_link *link, struct ib_mr *mr)
258{
259 struct ib_send_wr *failed_wr = NULL;
260 int rc;
261
262 ib_req_notify_cq(link->smcibdev->roce_cq_send,
263 IB_CQ_NEXT_COMP | IB_CQ_REPORT_MISSED_EVENTS);
264 link->wr_reg_state = POSTED;
265 link->wr_reg.wr.wr_id = (u64)(uintptr_t)mr;
266 link->wr_reg.mr = mr;
267 link->wr_reg.key = mr->rkey;
268 failed_wr = &link->wr_reg.wr;
269 rc = ib_post_send(link->roce_qp, &link->wr_reg.wr, &failed_wr);
270 WARN_ON(failed_wr != &link->wr_reg.wr);
271 if (rc)
272 return rc;
273
274 rc = wait_event_interruptible_timeout(link->wr_reg_wait,
275 (link->wr_reg_state != POSTED),
276 SMC_WR_REG_MR_WAIT_TIME);
277 if (!rc) {
278 /* timeout - terminate connections */
279 struct smc_link_group *lgr;
280
281 lgr = container_of(link, struct smc_link_group,
282 lnk[SMC_SINGLE_LINK]);
283 smc_lgr_terminate(lgr);
284 return -EPIPE;
285 }
286 if (rc == -ERESTARTSYS)
287 return -EINTR;
288 switch (link->wr_reg_state) {
289 case CONFIRMED:
290 rc = 0;
291 break;
292 case FAILED:
293 rc = -EIO;
294 break;
295 case POSTED:
296 rc = -EPIPE;
297 break;
298 }
299 return rc;
300}
301
Ursula Braun86e780d2018-01-24 10:28:15 +0100302void smc_wr_tx_dismiss_slots(struct smc_link *link, u8 wr_tx_hdr_type,
Ursula Braun5f083182017-01-09 16:55:22 +0100303 smc_wr_tx_filter filter,
304 smc_wr_tx_dismisser dismisser,
305 unsigned long data)
306{
307 struct smc_wr_tx_pend_priv *tx_pend;
Ursula Braun86e780d2018-01-24 10:28:15 +0100308 struct smc_wr_rx_hdr *wr_tx;
Ursula Braun5f083182017-01-09 16:55:22 +0100309 int i;
310
311 for_each_set_bit(i, link->wr_tx_mask, link->wr_tx_cnt) {
Ursula Braun86e780d2018-01-24 10:28:15 +0100312 wr_tx = (struct smc_wr_rx_hdr *)&link->wr_tx_bufs[i];
313 if (wr_tx->type != wr_tx_hdr_type)
Ursula Braun5f083182017-01-09 16:55:22 +0100314 continue;
315 tx_pend = &link->wr_tx_pends[i].priv;
316 if (filter(tx_pend, data))
317 dismisser(tx_pend);
318 }
319}
320
Ursula Braunf38ba1792017-01-09 16:55:19 +0100321/****************************** receive queue ********************************/
322
323int smc_wr_rx_register_handler(struct smc_wr_rx_handler *handler)
324{
325 struct smc_wr_rx_handler *h_iter;
326 int rc = 0;
327
328 spin_lock(&smc_wr_rx_hash_lock);
329 hash_for_each_possible(smc_wr_rx_hash, h_iter, list, handler->type) {
330 if (h_iter->type == handler->type) {
331 rc = -EEXIST;
332 goto out_unlock;
333 }
334 }
335 hash_add(smc_wr_rx_hash, &handler->list, handler->type);
336out_unlock:
337 spin_unlock(&smc_wr_rx_hash_lock);
338 return rc;
339}
340
341/* Demultiplex a received work request based on the message type to its handler.
342 * Relies on smc_wr_rx_hash having been completely filled before any IB WRs,
343 * and not being modified any more afterwards so we don't need to lock it.
344 */
345static inline void smc_wr_rx_demultiplex(struct ib_wc *wc)
346{
347 struct smc_link *link = (struct smc_link *)wc->qp->qp_context;
348 struct smc_wr_rx_handler *handler;
349 struct smc_wr_rx_hdr *wr_rx;
350 u64 temp_wr_id;
351 u32 index;
352
353 if (wc->byte_len < sizeof(*wr_rx))
354 return; /* short message */
355 temp_wr_id = wc->wr_id;
356 index = do_div(temp_wr_id, link->wr_rx_cnt);
357 wr_rx = (struct smc_wr_rx_hdr *)&link->wr_rx_bufs[index];
358 hash_for_each_possible(smc_wr_rx_hash, handler, list, wr_rx->type) {
359 if (handler->type == wr_rx->type)
360 handler->handler(wc, wr_rx);
361 }
362}
363
364static inline void smc_wr_rx_process_cqes(struct ib_wc wc[], int num)
365{
366 struct smc_link *link;
367 int i;
368
369 for (i = 0; i < num; i++) {
370 link = wc[i].qp->qp_context;
371 if (wc[i].status == IB_WC_SUCCESS) {
372 smc_wr_rx_demultiplex(&wc[i]);
373 smc_wr_rx_post(link); /* refill WR RX */
374 } else {
Ursula Braunb38d7322017-01-09 16:55:25 +0100375 struct smc_link_group *lgr;
376
Ursula Braunf38ba1792017-01-09 16:55:19 +0100377 /* handle status errors */
378 switch (wc[i].status) {
379 case IB_WC_RETRY_EXC_ERR:
380 case IB_WC_RNR_RETRY_EXC_ERR:
381 case IB_WC_WR_FLUSH_ERR:
Ursula Braunb38d7322017-01-09 16:55:25 +0100382 /* terminate connections of this link group
383 * abnormally
384 */
385 lgr = container_of(link, struct smc_link_group,
386 lnk[SMC_SINGLE_LINK]);
387 smc_lgr_terminate(lgr);
Ursula Braunf38ba1792017-01-09 16:55:19 +0100388 break;
389 default:
390 smc_wr_rx_post(link); /* refill WR RX */
391 break;
392 }
393 }
394 }
395}
396
397static void smc_wr_rx_tasklet_fn(unsigned long data)
398{
399 struct smc_ib_device *dev = (struct smc_ib_device *)data;
400 struct ib_wc wc[SMC_WR_MAX_POLL_CQE];
401 int polled = 0;
402 int rc;
403
404again:
405 polled++;
406 do {
407 memset(&wc, 0, sizeof(wc));
408 rc = ib_poll_cq(dev->roce_cq_recv, SMC_WR_MAX_POLL_CQE, wc);
409 if (polled == 1) {
410 ib_req_notify_cq(dev->roce_cq_recv,
411 IB_CQ_SOLICITED_MASK
412 | IB_CQ_REPORT_MISSED_EVENTS);
413 }
414 if (!rc)
415 break;
416 smc_wr_rx_process_cqes(&wc[0], rc);
417 } while (rc > 0);
418 if (polled == 1)
419 goto again;
420}
421
422void smc_wr_rx_cq_handler(struct ib_cq *ib_cq, void *cq_context)
423{
424 struct smc_ib_device *dev = (struct smc_ib_device *)cq_context;
425
426 tasklet_schedule(&dev->recv_tasklet);
427}
428
429int smc_wr_rx_post_init(struct smc_link *link)
430{
431 u32 i;
432 int rc = 0;
433
434 for (i = 0; i < link->wr_rx_cnt; i++)
435 rc = smc_wr_rx_post(link);
436 return rc;
437}
438
439/***************************** init, exit, misc ******************************/
440
441void smc_wr_remember_qp_attr(struct smc_link *lnk)
442{
443 struct ib_qp_attr *attr = &lnk->qp_attr;
444 struct ib_qp_init_attr init_attr;
445
446 memset(attr, 0, sizeof(*attr));
447 memset(&init_attr, 0, sizeof(init_attr));
448 ib_query_qp(lnk->roce_qp, attr,
449 IB_QP_STATE |
450 IB_QP_CUR_STATE |
451 IB_QP_PKEY_INDEX |
452 IB_QP_PORT |
453 IB_QP_QKEY |
454 IB_QP_AV |
455 IB_QP_PATH_MTU |
456 IB_QP_TIMEOUT |
457 IB_QP_RETRY_CNT |
458 IB_QP_RNR_RETRY |
459 IB_QP_RQ_PSN |
460 IB_QP_ALT_PATH |
461 IB_QP_MIN_RNR_TIMER |
462 IB_QP_SQ_PSN |
463 IB_QP_PATH_MIG_STATE |
464 IB_QP_CAP |
465 IB_QP_DEST_QPN,
466 &init_attr);
467
468 lnk->wr_tx_cnt = min_t(size_t, SMC_WR_BUF_CNT,
469 lnk->qp_attr.cap.max_send_wr);
470 lnk->wr_rx_cnt = min_t(size_t, SMC_WR_BUF_CNT * 3,
471 lnk->qp_attr.cap.max_recv_wr);
472}
473
474static void smc_wr_init_sge(struct smc_link *lnk)
475{
476 u32 i;
477
478 for (i = 0; i < lnk->wr_tx_cnt; i++) {
479 lnk->wr_tx_sges[i].addr =
480 lnk->wr_tx_dma_addr + i * SMC_WR_BUF_SIZE;
481 lnk->wr_tx_sges[i].length = SMC_WR_TX_SIZE;
Ursula Braunbd4ad572017-01-09 16:55:20 +0100482 lnk->wr_tx_sges[i].lkey = lnk->roce_pd->local_dma_lkey;
Ursula Braunf38ba1792017-01-09 16:55:19 +0100483 lnk->wr_tx_ibs[i].next = NULL;
484 lnk->wr_tx_ibs[i].sg_list = &lnk->wr_tx_sges[i];
485 lnk->wr_tx_ibs[i].num_sge = 1;
486 lnk->wr_tx_ibs[i].opcode = IB_WR_SEND;
487 lnk->wr_tx_ibs[i].send_flags =
Ursula Braun2c9c1682017-04-10 14:58:05 +0200488 IB_SEND_SIGNALED | IB_SEND_SOLICITED;
Ursula Braunf38ba1792017-01-09 16:55:19 +0100489 }
490 for (i = 0; i < lnk->wr_rx_cnt; i++) {
491 lnk->wr_rx_sges[i].addr =
492 lnk->wr_rx_dma_addr + i * SMC_WR_BUF_SIZE;
493 lnk->wr_rx_sges[i].length = SMC_WR_BUF_SIZE;
Ursula Braunbd4ad572017-01-09 16:55:20 +0100494 lnk->wr_rx_sges[i].lkey = lnk->roce_pd->local_dma_lkey;
Ursula Braunf38ba1792017-01-09 16:55:19 +0100495 lnk->wr_rx_ibs[i].next = NULL;
496 lnk->wr_rx_ibs[i].sg_list = &lnk->wr_rx_sges[i];
497 lnk->wr_rx_ibs[i].num_sge = 1;
498 }
Ursula Braun652a1e42017-07-28 13:56:17 +0200499 lnk->wr_reg.wr.next = NULL;
500 lnk->wr_reg.wr.num_sge = 0;
501 lnk->wr_reg.wr.send_flags = IB_SEND_SIGNALED;
502 lnk->wr_reg.wr.opcode = IB_WR_REG_MR;
503 lnk->wr_reg.access = IB_ACCESS_LOCAL_WRITE | IB_ACCESS_REMOTE_WRITE;
Ursula Braunf38ba1792017-01-09 16:55:19 +0100504}
505
506void smc_wr_free_link(struct smc_link *lnk)
507{
508 struct ib_device *ibdev;
509
510 memset(lnk->wr_tx_mask, 0,
511 BITS_TO_LONGS(SMC_WR_BUF_CNT) * sizeof(*lnk->wr_tx_mask));
512
513 if (!lnk->smcibdev)
514 return;
515 ibdev = lnk->smcibdev->ibdev;
516
517 if (lnk->wr_rx_dma_addr) {
518 ib_dma_unmap_single(ibdev, lnk->wr_rx_dma_addr,
519 SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
520 DMA_FROM_DEVICE);
521 lnk->wr_rx_dma_addr = 0;
522 }
523 if (lnk->wr_tx_dma_addr) {
524 ib_dma_unmap_single(ibdev, lnk->wr_tx_dma_addr,
525 SMC_WR_BUF_SIZE * lnk->wr_tx_cnt,
526 DMA_TO_DEVICE);
527 lnk->wr_tx_dma_addr = 0;
528 }
529}
530
531void smc_wr_free_link_mem(struct smc_link *lnk)
532{
533 kfree(lnk->wr_tx_pends);
534 lnk->wr_tx_pends = NULL;
535 kfree(lnk->wr_tx_mask);
536 lnk->wr_tx_mask = NULL;
537 kfree(lnk->wr_tx_sges);
538 lnk->wr_tx_sges = NULL;
539 kfree(lnk->wr_rx_sges);
540 lnk->wr_rx_sges = NULL;
541 kfree(lnk->wr_rx_ibs);
542 lnk->wr_rx_ibs = NULL;
543 kfree(lnk->wr_tx_ibs);
544 lnk->wr_tx_ibs = NULL;
545 kfree(lnk->wr_tx_bufs);
546 lnk->wr_tx_bufs = NULL;
547 kfree(lnk->wr_rx_bufs);
548 lnk->wr_rx_bufs = NULL;
549}
550
551int smc_wr_alloc_link_mem(struct smc_link *link)
552{
553 /* allocate link related memory */
554 link->wr_tx_bufs = kcalloc(SMC_WR_BUF_CNT, SMC_WR_BUF_SIZE, GFP_KERNEL);
555 if (!link->wr_tx_bufs)
556 goto no_mem;
557 link->wr_rx_bufs = kcalloc(SMC_WR_BUF_CNT * 3, SMC_WR_BUF_SIZE,
558 GFP_KERNEL);
559 if (!link->wr_rx_bufs)
560 goto no_mem_wr_tx_bufs;
561 link->wr_tx_ibs = kcalloc(SMC_WR_BUF_CNT, sizeof(link->wr_tx_ibs[0]),
562 GFP_KERNEL);
563 if (!link->wr_tx_ibs)
564 goto no_mem_wr_rx_bufs;
565 link->wr_rx_ibs = kcalloc(SMC_WR_BUF_CNT * 3,
566 sizeof(link->wr_rx_ibs[0]),
567 GFP_KERNEL);
568 if (!link->wr_rx_ibs)
569 goto no_mem_wr_tx_ibs;
570 link->wr_tx_sges = kcalloc(SMC_WR_BUF_CNT, sizeof(link->wr_tx_sges[0]),
571 GFP_KERNEL);
572 if (!link->wr_tx_sges)
573 goto no_mem_wr_rx_ibs;
574 link->wr_rx_sges = kcalloc(SMC_WR_BUF_CNT * 3,
575 sizeof(link->wr_rx_sges[0]),
576 GFP_KERNEL);
577 if (!link->wr_rx_sges)
578 goto no_mem_wr_tx_sges;
579 link->wr_tx_mask = kzalloc(
580 BITS_TO_LONGS(SMC_WR_BUF_CNT) * sizeof(*link->wr_tx_mask),
581 GFP_KERNEL);
582 if (!link->wr_tx_mask)
583 goto no_mem_wr_rx_sges;
584 link->wr_tx_pends = kcalloc(SMC_WR_BUF_CNT,
585 sizeof(link->wr_tx_pends[0]),
586 GFP_KERNEL);
587 if (!link->wr_tx_pends)
588 goto no_mem_wr_tx_mask;
589 return 0;
590
591no_mem_wr_tx_mask:
592 kfree(link->wr_tx_mask);
593no_mem_wr_rx_sges:
594 kfree(link->wr_rx_sges);
595no_mem_wr_tx_sges:
596 kfree(link->wr_tx_sges);
597no_mem_wr_rx_ibs:
598 kfree(link->wr_rx_ibs);
599no_mem_wr_tx_ibs:
600 kfree(link->wr_tx_ibs);
601no_mem_wr_rx_bufs:
602 kfree(link->wr_rx_bufs);
603no_mem_wr_tx_bufs:
604 kfree(link->wr_tx_bufs);
605no_mem:
606 return -ENOMEM;
607}
608
609void smc_wr_remove_dev(struct smc_ib_device *smcibdev)
610{
611 tasklet_kill(&smcibdev->recv_tasklet);
612 tasklet_kill(&smcibdev->send_tasklet);
613}
614
615void smc_wr_add_dev(struct smc_ib_device *smcibdev)
616{
617 tasklet_init(&smcibdev->recv_tasklet, smc_wr_rx_tasklet_fn,
618 (unsigned long)smcibdev);
619 tasklet_init(&smcibdev->send_tasklet, smc_wr_tx_tasklet_fn,
620 (unsigned long)smcibdev);
621}
622
623int smc_wr_create_link(struct smc_link *lnk)
624{
625 struct ib_device *ibdev = lnk->smcibdev->ibdev;
626 int rc = 0;
627
628 smc_wr_tx_set_wr_id(&lnk->wr_tx_id, 0);
629 lnk->wr_rx_id = 0;
630 lnk->wr_rx_dma_addr = ib_dma_map_single(
631 ibdev, lnk->wr_rx_bufs, SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
632 DMA_FROM_DEVICE);
633 if (ib_dma_mapping_error(ibdev, lnk->wr_rx_dma_addr)) {
634 lnk->wr_rx_dma_addr = 0;
635 rc = -EIO;
636 goto out;
637 }
638 lnk->wr_tx_dma_addr = ib_dma_map_single(
639 ibdev, lnk->wr_tx_bufs, SMC_WR_BUF_SIZE * lnk->wr_tx_cnt,
640 DMA_TO_DEVICE);
641 if (ib_dma_mapping_error(ibdev, lnk->wr_tx_dma_addr)) {
642 rc = -EIO;
643 goto dma_unmap;
644 }
645 smc_wr_init_sge(lnk);
646 memset(lnk->wr_tx_mask, 0,
647 BITS_TO_LONGS(SMC_WR_BUF_CNT) * sizeof(*lnk->wr_tx_mask));
Ursula Braun652a1e42017-07-28 13:56:17 +0200648 init_waitqueue_head(&lnk->wr_tx_wait);
649 init_waitqueue_head(&lnk->wr_reg_wait);
Ursula Braunf38ba1792017-01-09 16:55:19 +0100650 return rc;
651
652dma_unmap:
653 ib_dma_unmap_single(ibdev, lnk->wr_rx_dma_addr,
654 SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
655 DMA_FROM_DEVICE);
656 lnk->wr_rx_dma_addr = 0;
657out:
658 return rc;
659}