Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/phy/marvell.c |
| 3 | * |
| 4 | * Driver for Marvell PHYs |
| 5 | * |
| 6 | * Author: Andy Fleming |
| 7 | * |
| 8 | * Copyright (c) 2004 Freescale Semiconductor, Inc. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your |
| 13 | * option) any later version. |
| 14 | * |
| 15 | */ |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 16 | #include <linux/kernel.h> |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 17 | #include <linux/string.h> |
| 18 | #include <linux/errno.h> |
| 19 | #include <linux/unistd.h> |
| 20 | #include <linux/slab.h> |
| 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/netdevice.h> |
| 25 | #include <linux/etherdevice.h> |
| 26 | #include <linux/skbuff.h> |
| 27 | #include <linux/spinlock.h> |
| 28 | #include <linux/mm.h> |
| 29 | #include <linux/module.h> |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 30 | #include <linux/mii.h> |
| 31 | #include <linux/ethtool.h> |
| 32 | #include <linux/phy.h> |
| 33 | |
| 34 | #include <asm/io.h> |
| 35 | #include <asm/irq.h> |
| 36 | #include <asm/uaccess.h> |
| 37 | |
| 38 | #define MII_M1011_IEVENT 0x13 |
| 39 | #define MII_M1011_IEVENT_CLEAR 0x0000 |
| 40 | |
| 41 | #define MII_M1011_IMASK 0x12 |
| 42 | #define MII_M1011_IMASK_INIT 0x6400 |
| 43 | #define MII_M1011_IMASK_CLEAR 0x0000 |
| 44 | |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 45 | #define MII_M1011_PHY_SCR 0x10 |
| 46 | #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060 |
| 47 | |
| 48 | #define MII_M1145_PHY_EXT_CR 0x14 |
| 49 | #define MII_M1145_RGMII_RX_DELAY 0x0080 |
| 50 | #define MII_M1145_RGMII_TX_DELAY 0x0002 |
| 51 | |
| 52 | #define M1145_DEV_FLAGS_RESISTANCE 0x00000001 |
| 53 | |
| 54 | #define MII_M1111_PHY_LED_CONTROL 0x18 |
| 55 | #define MII_M1111_PHY_LED_DIRECT 0x4100 |
| 56 | #define MII_M1111_PHY_LED_COMBINE 0x411c |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 57 | #define MII_M1111_PHY_EXT_CR 0x14 |
| 58 | #define MII_M1111_RX_DELAY 0x80 |
| 59 | #define MII_M1111_TX_DELAY 0x2 |
| 60 | #define MII_M1111_PHY_EXT_SR 0x1b |
| 61 | #define MII_M1111_HWCFG_MODE_MASK 0xf |
| 62 | #define MII_M1111_HWCFG_MODE_RGMII 0xb |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 63 | |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 64 | MODULE_DESCRIPTION("Marvell PHY driver"); |
| 65 | MODULE_AUTHOR("Andy Fleming"); |
| 66 | MODULE_LICENSE("GPL"); |
| 67 | |
| 68 | static int marvell_ack_interrupt(struct phy_device *phydev) |
| 69 | { |
| 70 | int err; |
| 71 | |
| 72 | /* Clear the interrupts by reading the reg */ |
| 73 | err = phy_read(phydev, MII_M1011_IEVENT); |
| 74 | |
| 75 | if (err < 0) |
| 76 | return err; |
| 77 | |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | static int marvell_config_intr(struct phy_device *phydev) |
| 82 | { |
| 83 | int err; |
| 84 | |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 85 | if (phydev->interrupts == PHY_INTERRUPT_ENABLED) |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 86 | err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT); |
| 87 | else |
| 88 | err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR); |
| 89 | |
| 90 | return err; |
| 91 | } |
| 92 | |
| 93 | static int marvell_config_aneg(struct phy_device *phydev) |
| 94 | { |
| 95 | int err; |
| 96 | |
| 97 | /* The Marvell PHY has an errata which requires |
| 98 | * that certain registers get written in order |
| 99 | * to restart autonegotiation */ |
| 100 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); |
| 101 | |
| 102 | if (err < 0) |
| 103 | return err; |
| 104 | |
| 105 | err = phy_write(phydev, 0x1d, 0x1f); |
| 106 | if (err < 0) |
| 107 | return err; |
| 108 | |
| 109 | err = phy_write(phydev, 0x1e, 0x200c); |
| 110 | if (err < 0) |
| 111 | return err; |
| 112 | |
| 113 | err = phy_write(phydev, 0x1d, 0x5); |
| 114 | if (err < 0) |
| 115 | return err; |
| 116 | |
| 117 | err = phy_write(phydev, 0x1e, 0); |
| 118 | if (err < 0) |
| 119 | return err; |
| 120 | |
| 121 | err = phy_write(phydev, 0x1e, 0x100); |
| 122 | if (err < 0) |
| 123 | return err; |
| 124 | |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 125 | err = phy_write(phydev, MII_M1011_PHY_SCR, |
| 126 | MII_M1011_PHY_SCR_AUTO_CROSS); |
| 127 | if (err < 0) |
| 128 | return err; |
| 129 | |
| 130 | err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL, |
| 131 | MII_M1111_PHY_LED_DIRECT); |
| 132 | if (err < 0) |
| 133 | return err; |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 134 | |
| 135 | err = genphy_config_aneg(phydev); |
| 136 | |
| 137 | return err; |
| 138 | } |
| 139 | |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 140 | static int m88e1111_config_init(struct phy_device *phydev) |
| 141 | { |
| 142 | int err; |
| 143 | |
| 144 | if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) || |
| 145 | (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) { |
| 146 | int temp; |
| 147 | |
| 148 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { |
| 149 | temp = phy_read(phydev, MII_M1111_PHY_EXT_CR); |
| 150 | if (temp < 0) |
| 151 | return temp; |
| 152 | |
| 153 | temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY); |
| 154 | |
| 155 | err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp); |
| 156 | if (err < 0) |
| 157 | return err; |
| 158 | } |
| 159 | |
| 160 | temp = phy_read(phydev, MII_M1111_PHY_EXT_SR); |
| 161 | if (temp < 0) |
| 162 | return temp; |
| 163 | |
| 164 | temp &= ~(MII_M1111_HWCFG_MODE_MASK); |
| 165 | temp |= MII_M1111_HWCFG_MODE_RGMII; |
| 166 | |
| 167 | err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp); |
| 168 | if (err < 0) |
| 169 | return err; |
| 170 | } |
| 171 | |
| 172 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); |
| 173 | if (err < 0) |
| 174 | return err; |
| 175 | |
| 176 | return 0; |
| 177 | } |
| 178 | |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 179 | static int m88e1145_config_init(struct phy_device *phydev) |
| 180 | { |
| 181 | int err; |
| 182 | |
| 183 | /* Take care of errata E0 & E1 */ |
| 184 | err = phy_write(phydev, 0x1d, 0x001b); |
| 185 | if (err < 0) |
| 186 | return err; |
| 187 | |
| 188 | err = phy_write(phydev, 0x1e, 0x418f); |
| 189 | if (err < 0) |
| 190 | return err; |
| 191 | |
| 192 | err = phy_write(phydev, 0x1d, 0x0016); |
| 193 | if (err < 0) |
| 194 | return err; |
| 195 | |
| 196 | err = phy_write(phydev, 0x1e, 0xa2da); |
| 197 | if (err < 0) |
| 198 | return err; |
| 199 | |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 200 | if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) { |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 201 | int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR); |
| 202 | if (temp < 0) |
| 203 | return temp; |
| 204 | |
| 205 | temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY); |
| 206 | |
| 207 | err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp); |
| 208 | if (err < 0) |
| 209 | return err; |
| 210 | |
| 211 | if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) { |
| 212 | err = phy_write(phydev, 0x1d, 0x0012); |
| 213 | if (err < 0) |
| 214 | return err; |
| 215 | |
| 216 | temp = phy_read(phydev, 0x1e); |
| 217 | if (temp < 0) |
| 218 | return temp; |
| 219 | |
| 220 | temp &= 0xf03f; |
| 221 | temp |= 2 << 9; /* 36 ohm */ |
| 222 | temp |= 2 << 6; /* 39 ohm */ |
| 223 | |
| 224 | err = phy_write(phydev, 0x1e, temp); |
| 225 | if (err < 0) |
| 226 | return err; |
| 227 | |
| 228 | err = phy_write(phydev, 0x1d, 0x3); |
| 229 | if (err < 0) |
| 230 | return err; |
| 231 | |
| 232 | err = phy_write(phydev, 0x1e, 0x8000); |
| 233 | if (err < 0) |
| 234 | return err; |
| 235 | } |
| 236 | } |
| 237 | |
| 238 | return 0; |
| 239 | } |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 240 | |
| 241 | static struct phy_driver m88e1101_driver = { |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 242 | .phy_id = 0x01410c60, |
| 243 | .phy_id_mask = 0xfffffff0, |
| 244 | .name = "Marvell 88E1101", |
| 245 | .features = PHY_GBIT_FEATURES, |
| 246 | .flags = PHY_HAS_INTERRUPT, |
| 247 | .config_aneg = &marvell_config_aneg, |
| 248 | .read_status = &genphy_read_status, |
| 249 | .ack_interrupt = &marvell_ack_interrupt, |
| 250 | .config_intr = &marvell_config_intr, |
| 251 | .driver = {.owner = THIS_MODULE,}, |
| 252 | }; |
| 253 | |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 254 | static struct phy_driver m88e1111_driver = { |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 255 | .phy_id = 0x01410cc0, |
| 256 | .phy_id_mask = 0xfffffff0, |
| 257 | .name = "Marvell 88E1111", |
| 258 | .features = PHY_GBIT_FEATURES, |
| 259 | .flags = PHY_HAS_INTERRUPT, |
| 260 | .config_aneg = &marvell_config_aneg, |
| 261 | .read_status = &genphy_read_status, |
| 262 | .ack_interrupt = &marvell_ack_interrupt, |
| 263 | .config_intr = &marvell_config_intr, |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 264 | .config_init = &m88e1111_config_init, |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 265 | .driver = {.owner = THIS_MODULE,}, |
| 266 | }; |
| 267 | |
| 268 | static struct phy_driver m88e1145_driver = { |
| 269 | .phy_id = 0x01410cd0, |
| 270 | .phy_id_mask = 0xfffffff0, |
| 271 | .name = "Marvell 88E1145", |
| 272 | .features = PHY_GBIT_FEATURES, |
| 273 | .flags = PHY_HAS_INTERRUPT, |
| 274 | .config_init = &m88e1145_config_init, |
| 275 | .config_aneg = &marvell_config_aneg, |
| 276 | .read_status = &genphy_read_status, |
| 277 | .ack_interrupt = &marvell_ack_interrupt, |
| 278 | .config_intr = &marvell_config_intr, |
| 279 | .driver = {.owner = THIS_MODULE,}, |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 280 | }; |
| 281 | |
| 282 | static int __init marvell_init(void) |
| 283 | { |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 284 | int ret; |
| 285 | |
| 286 | ret = phy_driver_register(&m88e1101_driver); |
| 287 | if (ret) |
| 288 | return ret; |
| 289 | |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 290 | ret = phy_driver_register(&m88e1111_driver); |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 291 | if (ret) |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 292 | goto err1111; |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 293 | |
| 294 | ret = phy_driver_register(&m88e1145_driver); |
| 295 | if (ret) |
| 296 | goto err1145; |
| 297 | |
| 298 | return 0; |
| 299 | |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 300 | err1145: |
| 301 | phy_driver_unregister(&m88e1111_driver); |
| 302 | err1111: |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 303 | phy_driver_unregister(&m88e1101_driver); |
| 304 | return ret; |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | static void __exit marvell_exit(void) |
| 308 | { |
| 309 | phy_driver_unregister(&m88e1101_driver); |
Kim Phillips | 895ee68 | 2007-06-05 18:46:47 +0800 | [diff] [blame^] | 310 | phy_driver_unregister(&m88e1111_driver); |
Andy Fleming | 7688467 | 2007-02-09 18:13:58 -0600 | [diff] [blame] | 311 | phy_driver_unregister(&m88e1145_driver); |
Andy Fleming | 00db818 | 2005-07-30 19:31:23 -0400 | [diff] [blame] | 312 | } |
| 313 | |
| 314 | module_init(marvell_init); |
| 315 | module_exit(marvell_exit); |