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gerrit-public.fairphone.software / kernel / msm-5.4 / 8a3003dd93e2db2e7c8edc316e2978f750ca0dc2 / . / drivers / gpu / drm / i915 / i915_oa_hsw.c
blob: 8906380d9177f518f61f276825f844e1630bbb34 [file] [log] [blame]
Robert Bragg8a3003d2016-11-07 19:49:51 +0000[diff] [blame^]1/*
2 * Autogenerated file, DO NOT EDIT manually!
3 *
4 * Copyright (c) 2015 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 *
25 */
26
27#include "i915_drv.h"
28#include "i915_oa_hsw.h"
29
30enum metric_set_id {
31 METRIC_SET_ID_RENDER_BASIC = 1,
32};
33
34int i915_oa_n_builtin_metric_sets_hsw = 1;
35
36static const struct i915_oa_reg b_counter_config_render_basic[] = {
37 { _MMIO(0x2724), 0x00800000 },
38 { _MMIO(0x2720), 0x00000000 },
39 { _MMIO(0x2714), 0x00800000 },
40 { _MMIO(0x2710), 0x00000000 },
41};
42
43static const struct i915_oa_reg mux_config_render_basic[] = {
44 { _MMIO(0x253a4), 0x01600000 },
45 { _MMIO(0x25440), 0x00100000 },
46 { _MMIO(0x25128), 0x00000000 },
47 { _MMIO(0x2691c), 0x00000800 },
48 { _MMIO(0x26aa0), 0x01500000 },
49 { _MMIO(0x26b9c), 0x00006000 },
50 { _MMIO(0x2791c), 0x00000800 },
51 { _MMIO(0x27aa0), 0x01500000 },
52 { _MMIO(0x27b9c), 0x00006000 },
53 { _MMIO(0x2641c), 0x00000400 },
54 { _MMIO(0x25380), 0x00000010 },
55 { _MMIO(0x2538c), 0x00000000 },
56 { _MMIO(0x25384), 0x0800aaaa },
57 { _MMIO(0x25400), 0x00000004 },
58 { _MMIO(0x2540c), 0x06029000 },
59 { _MMIO(0x25410), 0x00000002 },
60 { _MMIO(0x25404), 0x5c30ffff },
61 { _MMIO(0x25100), 0x00000016 },
62 { _MMIO(0x25110), 0x00000400 },
63 { _MMIO(0x25104), 0x00000000 },
64 { _MMIO(0x26804), 0x00001211 },
65 { _MMIO(0x26884), 0x00000100 },
66 { _MMIO(0x26900), 0x00000002 },
67 { _MMIO(0x26908), 0x00700000 },
68 { _MMIO(0x26904), 0x00000000 },
69 { _MMIO(0x26984), 0x00001022 },
70 { _MMIO(0x26a04), 0x00000011 },
71 { _MMIO(0x26a80), 0x00000006 },
72 { _MMIO(0x26a88), 0x00000c02 },
73 { _MMIO(0x26a84), 0x00000000 },
74 { _MMIO(0x26b04), 0x00001000 },
75 { _MMIO(0x26b80), 0x00000002 },
76 { _MMIO(0x26b8c), 0x00000007 },
77 { _MMIO(0x26b84), 0x00000000 },
78 { _MMIO(0x27804), 0x00004844 },
79 { _MMIO(0x27884), 0x00000400 },
80 { _MMIO(0x27900), 0x00000002 },
81 { _MMIO(0x27908), 0x0e000000 },
82 { _MMIO(0x27904), 0x00000000 },
83 { _MMIO(0x27984), 0x00004088 },
84 { _MMIO(0x27a04), 0x00000044 },
85 { _MMIO(0x27a80), 0x00000006 },
86 { _MMIO(0x27a88), 0x00018040 },
87 { _MMIO(0x27a84), 0x00000000 },
88 { _MMIO(0x27b04), 0x00004000 },
89 { _MMIO(0x27b80), 0x00000002 },
90 { _MMIO(0x27b8c), 0x000000e0 },
91 { _MMIO(0x27b84), 0x00000000 },
92 { _MMIO(0x26104), 0x00002222 },
93 { _MMIO(0x26184), 0x0c006666 },
94 { _MMIO(0x26284), 0x04000000 },
95 { _MMIO(0x26304), 0x04000000 },
96 { _MMIO(0x26400), 0x00000002 },
97 { _MMIO(0x26410), 0x000000a0 },
98 { _MMIO(0x26404), 0x00000000 },
99 { _MMIO(0x25420), 0x04108020 },
100 { _MMIO(0x25424), 0x1284a420 },
101 { _MMIO(0x2541c), 0x00000000 },
102 { _MMIO(0x25428), 0x00042049 },
103};
104
105static const struct i915_oa_reg *
106get_render_basic_mux_config(struct drm_i915_private *dev_priv,
107 int *len)
108{
109 *len = ARRAY_SIZE(mux_config_render_basic);
110 return mux_config_render_basic;
111}
112
113int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv)
114{
115 dev_priv->perf.oa.mux_regs = NULL;
116 dev_priv->perf.oa.mux_regs_len = 0;
117 dev_priv->perf.oa.b_counter_regs = NULL;
118 dev_priv->perf.oa.b_counter_regs_len = 0;
119
120 switch (dev_priv->perf.oa.metrics_set) {
121 case METRIC_SET_ID_RENDER_BASIC:
122 dev_priv->perf.oa.mux_regs =
123 get_render_basic_mux_config(dev_priv,
124 &dev_priv->perf.oa.mux_regs_len);
125 if (!dev_priv->perf.oa.mux_regs) {
126 DRM_DEBUG_DRIVER("No suitable MUX config for \"RENDER_BASIC\" metric set");
127
128 /* EINVAL because *_register_sysfs already checked this
129 * and so it wouldn't have been advertised so userspace and
130 * so shouldn't have been requested
131 */
132 return -EINVAL;
133 }
134
135 dev_priv->perf.oa.b_counter_regs =
136 b_counter_config_render_basic;
137 dev_priv->perf.oa.b_counter_regs_len =
138 ARRAY_SIZE(b_counter_config_render_basic);
139
140 return 0;
141 default:
142 return -ENODEV;
143 }
144}