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Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001/*
2 * Copyright (C) 2015 Microchip Technology
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/version.h>
18#include <linux/module.h>
19#include <linux/netdevice.h>
20#include <linux/etherdevice.h>
21#include <linux/ethtool.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000022#include <linux/usb.h>
23#include <linux/crc32.h>
24#include <linux/signal.h>
25#include <linux/slab.h>
26#include <linux/if_vlan.h>
27#include <linux/uaccess.h>
28#include <linux/list.h>
29#include <linux/ip.h>
30#include <linux/ipv6.h>
31#include <linux/mdio.h>
Andrew Lunnc6e970a2017-03-28 23:45:06 +020032#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000033#include <net/ip6_checksum.h>
Woojung Huhcc89c322016-11-01 20:02:00 +000034#include <linux/interrupt.h>
35#include <linux/irqdomain.h>
36#include <linux/irq.h>
37#include <linux/irqchip/chained_irq.h>
Woojung.Huh@microchip.combdfba55e2015-09-16 23:41:07 +000038#include <linux/microchipphy.h>
Russell King8c56ea42017-02-07 15:02:57 -080039#include <linux/phy.h>
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000040#include "lan78xx.h"
41
42#define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>"
43#define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices"
44#define DRIVER_NAME "lan78xx"
Woojung Huh02dc1f32016-12-07 20:26:25 +000045#define DRIVER_VERSION "1.0.6"
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000046
47#define TX_TIMEOUT_JIFFIES (5 * HZ)
48#define THROTTLE_JIFFIES (HZ / 8)
49#define UNLINK_TIMEOUT_MS 3
50
51#define RX_MAX_QUEUE_MEMORY (60 * 1518)
52
53#define SS_USB_PKT_SIZE (1024)
54#define HS_USB_PKT_SIZE (512)
55#define FS_USB_PKT_SIZE (64)
56
57#define MAX_RX_FIFO_SIZE (12 * 1024)
58#define MAX_TX_FIFO_SIZE (12 * 1024)
59#define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE)
60#define DEFAULT_BULK_IN_DELAY (0x0800)
61#define MAX_SINGLE_PACKET_SIZE (9000)
62#define DEFAULT_TX_CSUM_ENABLE (true)
63#define DEFAULT_RX_CSUM_ENABLE (true)
64#define DEFAULT_TSO_CSUM_ENABLE (true)
65#define DEFAULT_VLAN_FILTER_ENABLE (true)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000066#define TX_OVERHEAD (8)
67#define RXW_PADDING 2
68
69#define LAN78XX_USB_VENDOR_ID (0x0424)
70#define LAN7800_USB_PRODUCT_ID (0x7800)
71#define LAN7850_USB_PRODUCT_ID (0x7850)
Woojung Huh02dc1f32016-12-07 20:26:25 +000072#define LAN7801_USB_PRODUCT_ID (0x7801)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +000073#define LAN78XX_EEPROM_MAGIC (0x78A5)
74#define LAN78XX_OTP_MAGIC (0x78F3)
75
76#define MII_READ 1
77#define MII_WRITE 0
78
79#define EEPROM_INDICATOR (0xA5)
80#define EEPROM_MAC_OFFSET (0x01)
81#define MAX_EEPROM_SIZE 512
82#define OTP_INDICATOR_1 (0xF3)
83#define OTP_INDICATOR_2 (0xF7)
84
85#define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \
86 WAKE_MCAST | WAKE_BCAST | \
87 WAKE_ARP | WAKE_MAGIC)
88
89/* USB related defines */
90#define BULK_IN_PIPE 1
91#define BULK_OUT_PIPE 2
92
93/* default autosuspend delay (mSec)*/
94#define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000)
95
Woojung Huh20ff5562016-03-16 22:10:40 +000096/* statistic update interval (mSec) */
97#define STAT_UPDATE_TIMER (1 * 1000)
98
Woojung Huhcc89c322016-11-01 20:02:00 +000099/* defines interrupts from interrupt EP */
100#define MAX_INT_EP (32)
101#define INT_EP_INTEP (31)
102#define INT_EP_OTP_WR_DONE (28)
103#define INT_EP_EEE_TX_LPI_START (26)
104#define INT_EP_EEE_TX_LPI_STOP (25)
105#define INT_EP_EEE_RX_LPI (24)
106#define INT_EP_MAC_RESET_TIMEOUT (23)
107#define INT_EP_RDFO (22)
108#define INT_EP_TXE (21)
109#define INT_EP_USB_STATUS (20)
110#define INT_EP_TX_DIS (19)
111#define INT_EP_RX_DIS (18)
112#define INT_EP_PHY (17)
113#define INT_EP_DP (16)
114#define INT_EP_MAC_ERR (15)
115#define INT_EP_TDFU (14)
116#define INT_EP_TDFO (13)
117#define INT_EP_UTX (12)
118#define INT_EP_GPIO_11 (11)
119#define INT_EP_GPIO_10 (10)
120#define INT_EP_GPIO_9 (9)
121#define INT_EP_GPIO_8 (8)
122#define INT_EP_GPIO_7 (7)
123#define INT_EP_GPIO_6 (6)
124#define INT_EP_GPIO_5 (5)
125#define INT_EP_GPIO_4 (4)
126#define INT_EP_GPIO_3 (3)
127#define INT_EP_GPIO_2 (2)
128#define INT_EP_GPIO_1 (1)
129#define INT_EP_GPIO_0 (0)
130
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000131static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = {
132 "RX FCS Errors",
133 "RX Alignment Errors",
134 "Rx Fragment Errors",
135 "RX Jabber Errors",
136 "RX Undersize Frame Errors",
137 "RX Oversize Frame Errors",
138 "RX Dropped Frames",
139 "RX Unicast Byte Count",
140 "RX Broadcast Byte Count",
141 "RX Multicast Byte Count",
142 "RX Unicast Frames",
143 "RX Broadcast Frames",
144 "RX Multicast Frames",
145 "RX Pause Frames",
146 "RX 64 Byte Frames",
147 "RX 65 - 127 Byte Frames",
148 "RX 128 - 255 Byte Frames",
149 "RX 256 - 511 Bytes Frames",
150 "RX 512 - 1023 Byte Frames",
151 "RX 1024 - 1518 Byte Frames",
152 "RX Greater 1518 Byte Frames",
153 "EEE RX LPI Transitions",
154 "EEE RX LPI Time",
155 "TX FCS Errors",
156 "TX Excess Deferral Errors",
157 "TX Carrier Errors",
158 "TX Bad Byte Count",
159 "TX Single Collisions",
160 "TX Multiple Collisions",
161 "TX Excessive Collision",
162 "TX Late Collisions",
163 "TX Unicast Byte Count",
164 "TX Broadcast Byte Count",
165 "TX Multicast Byte Count",
166 "TX Unicast Frames",
167 "TX Broadcast Frames",
168 "TX Multicast Frames",
169 "TX Pause Frames",
170 "TX 64 Byte Frames",
171 "TX 65 - 127 Byte Frames",
172 "TX 128 - 255 Byte Frames",
173 "TX 256 - 511 Bytes Frames",
174 "TX 512 - 1023 Byte Frames",
175 "TX 1024 - 1518 Byte Frames",
176 "TX Greater 1518 Byte Frames",
177 "EEE TX LPI Transitions",
178 "EEE TX LPI Time",
179};
180
181struct lan78xx_statstage {
182 u32 rx_fcs_errors;
183 u32 rx_alignment_errors;
184 u32 rx_fragment_errors;
185 u32 rx_jabber_errors;
186 u32 rx_undersize_frame_errors;
187 u32 rx_oversize_frame_errors;
188 u32 rx_dropped_frames;
189 u32 rx_unicast_byte_count;
190 u32 rx_broadcast_byte_count;
191 u32 rx_multicast_byte_count;
192 u32 rx_unicast_frames;
193 u32 rx_broadcast_frames;
194 u32 rx_multicast_frames;
195 u32 rx_pause_frames;
196 u32 rx_64_byte_frames;
197 u32 rx_65_127_byte_frames;
198 u32 rx_128_255_byte_frames;
199 u32 rx_256_511_bytes_frames;
200 u32 rx_512_1023_byte_frames;
201 u32 rx_1024_1518_byte_frames;
202 u32 rx_greater_1518_byte_frames;
203 u32 eee_rx_lpi_transitions;
204 u32 eee_rx_lpi_time;
205 u32 tx_fcs_errors;
206 u32 tx_excess_deferral_errors;
207 u32 tx_carrier_errors;
208 u32 tx_bad_byte_count;
209 u32 tx_single_collisions;
210 u32 tx_multiple_collisions;
211 u32 tx_excessive_collision;
212 u32 tx_late_collisions;
213 u32 tx_unicast_byte_count;
214 u32 tx_broadcast_byte_count;
215 u32 tx_multicast_byte_count;
216 u32 tx_unicast_frames;
217 u32 tx_broadcast_frames;
218 u32 tx_multicast_frames;
219 u32 tx_pause_frames;
220 u32 tx_64_byte_frames;
221 u32 tx_65_127_byte_frames;
222 u32 tx_128_255_byte_frames;
223 u32 tx_256_511_bytes_frames;
224 u32 tx_512_1023_byte_frames;
225 u32 tx_1024_1518_byte_frames;
226 u32 tx_greater_1518_byte_frames;
227 u32 eee_tx_lpi_transitions;
228 u32 eee_tx_lpi_time;
229};
230
Woojung Huh20ff5562016-03-16 22:10:40 +0000231struct lan78xx_statstage64 {
232 u64 rx_fcs_errors;
233 u64 rx_alignment_errors;
234 u64 rx_fragment_errors;
235 u64 rx_jabber_errors;
236 u64 rx_undersize_frame_errors;
237 u64 rx_oversize_frame_errors;
238 u64 rx_dropped_frames;
239 u64 rx_unicast_byte_count;
240 u64 rx_broadcast_byte_count;
241 u64 rx_multicast_byte_count;
242 u64 rx_unicast_frames;
243 u64 rx_broadcast_frames;
244 u64 rx_multicast_frames;
245 u64 rx_pause_frames;
246 u64 rx_64_byte_frames;
247 u64 rx_65_127_byte_frames;
248 u64 rx_128_255_byte_frames;
249 u64 rx_256_511_bytes_frames;
250 u64 rx_512_1023_byte_frames;
251 u64 rx_1024_1518_byte_frames;
252 u64 rx_greater_1518_byte_frames;
253 u64 eee_rx_lpi_transitions;
254 u64 eee_rx_lpi_time;
255 u64 tx_fcs_errors;
256 u64 tx_excess_deferral_errors;
257 u64 tx_carrier_errors;
258 u64 tx_bad_byte_count;
259 u64 tx_single_collisions;
260 u64 tx_multiple_collisions;
261 u64 tx_excessive_collision;
262 u64 tx_late_collisions;
263 u64 tx_unicast_byte_count;
264 u64 tx_broadcast_byte_count;
265 u64 tx_multicast_byte_count;
266 u64 tx_unicast_frames;
267 u64 tx_broadcast_frames;
268 u64 tx_multicast_frames;
269 u64 tx_pause_frames;
270 u64 tx_64_byte_frames;
271 u64 tx_65_127_byte_frames;
272 u64 tx_128_255_byte_frames;
273 u64 tx_256_511_bytes_frames;
274 u64 tx_512_1023_byte_frames;
275 u64 tx_1024_1518_byte_frames;
276 u64 tx_greater_1518_byte_frames;
277 u64 eee_tx_lpi_transitions;
278 u64 eee_tx_lpi_time;
279};
280
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000281struct lan78xx_net;
282
283struct lan78xx_priv {
284 struct lan78xx_net *dev;
285 u32 rfe_ctl;
286 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicat hash table */
287 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */
288 u32 vlan_table[DP_SEL_VHF_VLAN_LEN];
289 struct mutex dataport_mutex; /* for dataport access */
290 spinlock_t rfe_ctl_lock; /* for rfe register access */
291 struct work_struct set_multicast;
292 struct work_struct set_vlan;
293 u32 wol;
294};
295
296enum skb_state {
297 illegal = 0,
298 tx_start,
299 tx_done,
300 rx_start,
301 rx_done,
302 rx_cleanup,
303 unlink_start
304};
305
306struct skb_data { /* skb->cb is one of these */
307 struct urb *urb;
308 struct lan78xx_net *dev;
309 enum skb_state state;
310 size_t length;
Woojung Huh74d79a22016-04-25 22:22:32 +0000311 int num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000312};
313
314struct usb_context {
315 struct usb_ctrlrequest req;
316 struct lan78xx_net *dev;
317};
318
319#define EVENT_TX_HALT 0
320#define EVENT_RX_HALT 1
321#define EVENT_RX_MEMORY 2
322#define EVENT_STS_SPLIT 3
323#define EVENT_LINK_RESET 4
324#define EVENT_RX_PAUSED 5
325#define EVENT_DEV_WAKING 6
326#define EVENT_DEV_ASLEEP 7
327#define EVENT_DEV_OPEN 8
Woojung Huh20ff5562016-03-16 22:10:40 +0000328#define EVENT_STAT_UPDATE 9
329
330struct statstage {
331 struct mutex access_lock; /* for stats access */
332 struct lan78xx_statstage saved;
333 struct lan78xx_statstage rollover_count;
334 struct lan78xx_statstage rollover_max;
335 struct lan78xx_statstage64 curr_stat;
336};
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000337
Woojung Huhcc89c322016-11-01 20:02:00 +0000338struct irq_domain_data {
339 struct irq_domain *irqdomain;
340 unsigned int phyirq;
341 struct irq_chip *irqchip;
342 irq_flow_handler_t irq_handler;
343 u32 irqenable;
344 struct mutex irq_lock; /* for irq bus access */
345};
346
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000347struct lan78xx_net {
348 struct net_device *net;
349 struct usb_device *udev;
350 struct usb_interface *intf;
351 void *driver_priv;
352
353 int rx_qlen;
354 int tx_qlen;
355 struct sk_buff_head rxq;
356 struct sk_buff_head txq;
357 struct sk_buff_head done;
358 struct sk_buff_head rxq_pause;
359 struct sk_buff_head txq_pend;
360
361 struct tasklet_struct bh;
362 struct delayed_work wq;
363
364 struct usb_host_endpoint *ep_blkin;
365 struct usb_host_endpoint *ep_blkout;
366 struct usb_host_endpoint *ep_intr;
367
368 int msg_enable;
369
370 struct urb *urb_intr;
371 struct usb_anchor deferred;
372
373 struct mutex phy_mutex; /* for phy access */
374 unsigned pipe_in, pipe_out, pipe_intr;
375
376 u32 hard_mtu; /* count any extra framing */
377 size_t rx_urb_size; /* size for rx urbs */
378
379 unsigned long flags;
380
381 wait_queue_head_t *wait;
382 unsigned char suspend_count;
383
384 unsigned maxpacket;
385 struct timer_list delay;
Woojung Huh20ff5562016-03-16 22:10:40 +0000386 struct timer_list stat_monitor;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000387
388 unsigned long data[5];
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000389
390 int link_on;
391 u8 mdix_ctrl;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000392
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000393 u32 chipid;
394 u32 chiprev;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +0000395 struct mii_bus *mdiobus;
Woojung Huh02dc1f32016-12-07 20:26:25 +0000396 phy_interface_t interface;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +0000397
398 int fc_autoneg;
399 u8 fc_request_control;
Woojung Huh20ff5562016-03-16 22:10:40 +0000400
401 int delta;
402 struct statstage stats;
Woojung Huhcc89c322016-11-01 20:02:00 +0000403
404 struct irq_domain_data domain_data;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000405};
406
Woojung Huh02dc1f32016-12-07 20:26:25 +0000407/* define external phy id */
408#define PHY_LAN8835 (0x0007C130)
409#define PHY_KSZ9031RNX (0x00221620)
410
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000411/* use ethtool to change the level for any given device */
412static int msg_level = -1;
413module_param(msg_level, int, 0);
414MODULE_PARM_DESC(msg_level, "Override default message level");
415
416static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
417{
418 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
419 int ret;
420
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000421 if (!buf)
422 return -ENOMEM;
423
424 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
425 USB_VENDOR_REQUEST_READ_REGISTER,
426 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
427 0, index, buf, 4, USB_CTRL_GET_TIMEOUT);
428 if (likely(ret >= 0)) {
429 le32_to_cpus(buf);
430 *data = *buf;
431 } else {
432 netdev_warn(dev->net,
433 "Failed to read register index 0x%08x. ret = %d",
434 index, ret);
435 }
436
437 kfree(buf);
438
439 return ret;
440}
441
442static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data)
443{
444 u32 *buf = kmalloc(sizeof(u32), GFP_KERNEL);
445 int ret;
446
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000447 if (!buf)
448 return -ENOMEM;
449
450 *buf = data;
451 cpu_to_le32s(buf);
452
453 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
454 USB_VENDOR_REQUEST_WRITE_REGISTER,
455 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
456 0, index, buf, 4, USB_CTRL_SET_TIMEOUT);
457 if (unlikely(ret < 0)) {
458 netdev_warn(dev->net,
459 "Failed to write register index 0x%08x. ret = %d",
460 index, ret);
461 }
462
463 kfree(buf);
464
465 return ret;
466}
467
468static int lan78xx_read_stats(struct lan78xx_net *dev,
469 struct lan78xx_statstage *data)
470{
471 int ret = 0;
472 int i;
473 struct lan78xx_statstage *stats;
474 u32 *src;
475 u32 *dst;
476
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000477 stats = kmalloc(sizeof(*stats), GFP_KERNEL);
478 if (!stats)
479 return -ENOMEM;
480
481 ret = usb_control_msg(dev->udev,
482 usb_rcvctrlpipe(dev->udev, 0),
483 USB_VENDOR_REQUEST_GET_STATS,
484 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
485 0,
486 0,
487 (void *)stats,
488 sizeof(*stats),
489 USB_CTRL_SET_TIMEOUT);
490 if (likely(ret >= 0)) {
491 src = (u32 *)stats;
492 dst = (u32 *)data;
493 for (i = 0; i < sizeof(*stats)/sizeof(u32); i++) {
494 le32_to_cpus(&src[i]);
495 dst[i] = src[i];
496 }
497 } else {
498 netdev_warn(dev->net,
499 "Failed to read stat ret = 0x%x", ret);
500 }
501
502 kfree(stats);
503
504 return ret;
505}
506
Woojung Huh20ff5562016-03-16 22:10:40 +0000507#define check_counter_rollover(struct1, dev_stats, member) { \
508 if (struct1->member < dev_stats.saved.member) \
509 dev_stats.rollover_count.member++; \
510 }
511
512static void lan78xx_check_stat_rollover(struct lan78xx_net *dev,
513 struct lan78xx_statstage *stats)
514{
515 check_counter_rollover(stats, dev->stats, rx_fcs_errors);
516 check_counter_rollover(stats, dev->stats, rx_alignment_errors);
517 check_counter_rollover(stats, dev->stats, rx_fragment_errors);
518 check_counter_rollover(stats, dev->stats, rx_jabber_errors);
519 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors);
520 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors);
521 check_counter_rollover(stats, dev->stats, rx_dropped_frames);
522 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count);
523 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count);
524 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count);
525 check_counter_rollover(stats, dev->stats, rx_unicast_frames);
526 check_counter_rollover(stats, dev->stats, rx_broadcast_frames);
527 check_counter_rollover(stats, dev->stats, rx_multicast_frames);
528 check_counter_rollover(stats, dev->stats, rx_pause_frames);
529 check_counter_rollover(stats, dev->stats, rx_64_byte_frames);
530 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames);
531 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames);
532 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames);
533 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames);
534 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames);
535 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames);
536 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions);
537 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time);
538 check_counter_rollover(stats, dev->stats, tx_fcs_errors);
539 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors);
540 check_counter_rollover(stats, dev->stats, tx_carrier_errors);
541 check_counter_rollover(stats, dev->stats, tx_bad_byte_count);
542 check_counter_rollover(stats, dev->stats, tx_single_collisions);
543 check_counter_rollover(stats, dev->stats, tx_multiple_collisions);
544 check_counter_rollover(stats, dev->stats, tx_excessive_collision);
545 check_counter_rollover(stats, dev->stats, tx_late_collisions);
546 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count);
547 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count);
548 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count);
549 check_counter_rollover(stats, dev->stats, tx_unicast_frames);
550 check_counter_rollover(stats, dev->stats, tx_broadcast_frames);
551 check_counter_rollover(stats, dev->stats, tx_multicast_frames);
552 check_counter_rollover(stats, dev->stats, tx_pause_frames);
553 check_counter_rollover(stats, dev->stats, tx_64_byte_frames);
554 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames);
555 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames);
556 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames);
557 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames);
558 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames);
559 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames);
560 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions);
561 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time);
562
563 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage));
564}
565
566static void lan78xx_update_stats(struct lan78xx_net *dev)
567{
568 u32 *p, *count, *max;
569 u64 *data;
570 int i;
571 struct lan78xx_statstage lan78xx_stats;
572
573 if (usb_autopm_get_interface(dev->intf) < 0)
574 return;
575
576 p = (u32 *)&lan78xx_stats;
577 count = (u32 *)&dev->stats.rollover_count;
578 max = (u32 *)&dev->stats.rollover_max;
579 data = (u64 *)&dev->stats.curr_stat;
580
581 mutex_lock(&dev->stats.access_lock);
582
583 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0)
584 lan78xx_check_stat_rollover(dev, &lan78xx_stats);
585
586 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++)
587 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1));
588
589 mutex_unlock(&dev->stats.access_lock);
590
591 usb_autopm_put_interface(dev->intf);
592}
593
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000594/* Loop until the read is completed with timeout called with phy_mutex held */
595static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev)
596{
597 unsigned long start_time = jiffies;
598 u32 val;
599 int ret;
600
601 do {
602 ret = lan78xx_read_reg(dev, MII_ACC, &val);
603 if (unlikely(ret < 0))
604 return -EIO;
605
606 if (!(val & MII_ACC_MII_BUSY_))
607 return 0;
608 } while (!time_after(jiffies, start_time + HZ));
609
610 return -EIO;
611}
612
613static inline u32 mii_access(int id, int index, int read)
614{
615 u32 ret;
616
617 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_;
618 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_;
619 if (read)
620 ret |= MII_ACC_MII_READ_;
621 else
622 ret |= MII_ACC_MII_WRITE_;
623 ret |= MII_ACC_MII_BUSY_;
624
625 return ret;
626}
627
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000628static int lan78xx_wait_eeprom(struct lan78xx_net *dev)
629{
630 unsigned long start_time = jiffies;
631 u32 val;
632 int ret;
633
634 do {
635 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
636 if (unlikely(ret < 0))
637 return -EIO;
638
639 if (!(val & E2P_CMD_EPC_BUSY_) ||
640 (val & E2P_CMD_EPC_TIMEOUT_))
641 break;
642 usleep_range(40, 100);
643 } while (!time_after(jiffies, start_time + HZ));
644
645 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) {
646 netdev_warn(dev->net, "EEPROM read operation timeout");
647 return -EIO;
648 }
649
650 return 0;
651}
652
653static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev)
654{
655 unsigned long start_time = jiffies;
656 u32 val;
657 int ret;
658
659 do {
660 ret = lan78xx_read_reg(dev, E2P_CMD, &val);
661 if (unlikely(ret < 0))
662 return -EIO;
663
664 if (!(val & E2P_CMD_EPC_BUSY_))
665 return 0;
666
667 usleep_range(40, 100);
668 } while (!time_after(jiffies, start_time + HZ));
669
670 netdev_warn(dev->net, "EEPROM is busy");
671 return -EIO;
672}
673
674static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset,
675 u32 length, u8 *data)
676{
677 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000678 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000679 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000680 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000681
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000682 /* depends on chip, some EEPROM pins are muxed with LED function.
683 * disable & restore LED function to access EEPROM.
684 */
685 ret = lan78xx_read_reg(dev, HW_CFG, &val);
686 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000687 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000688 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
689 ret = lan78xx_write_reg(dev, HW_CFG, val);
690 }
691
692 retval = lan78xx_eeprom_confirm_not_busy(dev);
693 if (retval)
694 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000695
696 for (i = 0; i < length; i++) {
697 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_;
698 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
699 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000700 if (unlikely(ret < 0)) {
701 retval = -EIO;
702 goto exit;
703 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000704
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000705 retval = lan78xx_wait_eeprom(dev);
706 if (retval < 0)
707 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000708
709 ret = lan78xx_read_reg(dev, E2P_DATA, &val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000710 if (unlikely(ret < 0)) {
711 retval = -EIO;
712 goto exit;
713 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000714
715 data[i] = val & 0xFF;
716 offset++;
717 }
718
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000719 retval = 0;
720exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000721 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000722 ret = lan78xx_write_reg(dev, HW_CFG, saved);
723
724 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000725}
726
727static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset,
728 u32 length, u8 *data)
729{
730 u8 sig;
731 int ret;
732
733 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig);
734 if ((ret == 0) && (sig == EEPROM_INDICATOR))
735 ret = lan78xx_read_raw_eeprom(dev, offset, length, data);
736 else
737 ret = -EINVAL;
738
739 return ret;
740}
741
742static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset,
743 u32 length, u8 *data)
744{
745 u32 val;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000746 u32 saved;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000747 int i, ret;
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000748 int retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000749
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000750 /* depends on chip, some EEPROM pins are muxed with LED function.
751 * disable & restore LED function to access EEPROM.
752 */
753 ret = lan78xx_read_reg(dev, HW_CFG, &val);
754 saved = val;
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000755 if (dev->chipid == ID_REV_CHIP_ID_7800_) {
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000756 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_);
757 ret = lan78xx_write_reg(dev, HW_CFG, val);
758 }
759
760 retval = lan78xx_eeprom_confirm_not_busy(dev);
761 if (retval)
762 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000763
764 /* Issue write/erase enable command */
765 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_;
766 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000767 if (unlikely(ret < 0)) {
768 retval = -EIO;
769 goto exit;
770 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000771
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000772 retval = lan78xx_wait_eeprom(dev);
773 if (retval < 0)
774 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000775
776 for (i = 0; i < length; i++) {
777 /* Fill data register */
778 val = data[i];
779 ret = lan78xx_write_reg(dev, E2P_DATA, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000780 if (ret < 0) {
781 retval = -EIO;
782 goto exit;
783 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000784
785 /* Send "write" command */
786 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_;
787 val |= (offset & E2P_CMD_EPC_ADDR_MASK_);
788 ret = lan78xx_write_reg(dev, E2P_CMD, val);
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000789 if (ret < 0) {
790 retval = -EIO;
791 goto exit;
792 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000793
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000794 retval = lan78xx_wait_eeprom(dev);
795 if (retval < 0)
796 goto exit;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000797
798 offset++;
799 }
800
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000801 retval = 0;
802exit:
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +0000803 if (dev->chipid == ID_REV_CHIP_ID_7800_)
Woojung.Huh@microchip.coma0db7d12016-01-27 22:57:53 +0000804 ret = lan78xx_write_reg(dev, HW_CFG, saved);
805
806 return retval;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000807}
808
809static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset,
810 u32 length, u8 *data)
811{
812 int i;
813 int ret;
814 u32 buf;
815 unsigned long timeout;
816
817 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
818
819 if (buf & OTP_PWR_DN_PWRDN_N_) {
820 /* clear it and wait to be cleared */
821 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
822
823 timeout = jiffies + HZ;
824 do {
825 usleep_range(1, 10);
826 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
827 if (time_after(jiffies, timeout)) {
828 netdev_warn(dev->net,
829 "timeout on OTP_PWR_DN");
830 return -EIO;
831 }
832 } while (buf & OTP_PWR_DN_PWRDN_N_);
833 }
834
835 for (i = 0; i < length; i++) {
836 ret = lan78xx_write_reg(dev, OTP_ADDR1,
837 ((offset + i) >> 8) & OTP_ADDR1_15_11);
838 ret = lan78xx_write_reg(dev, OTP_ADDR2,
839 ((offset + i) & OTP_ADDR2_10_3));
840
841 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_);
842 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
843
844 timeout = jiffies + HZ;
845 do {
846 udelay(1);
847 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
848 if (time_after(jiffies, timeout)) {
849 netdev_warn(dev->net,
850 "timeout on OTP_STATUS");
851 return -EIO;
852 }
853 } while (buf & OTP_STATUS_BUSY_);
854
855 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf);
856
857 data[i] = (u8)(buf & 0xFF);
858 }
859
860 return 0;
861}
862
Woojung.Huh@microchip.com9fb60662016-01-05 17:29:59 +0000863static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset,
864 u32 length, u8 *data)
865{
866 int i;
867 int ret;
868 u32 buf;
869 unsigned long timeout;
870
871 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
872
873 if (buf & OTP_PWR_DN_PWRDN_N_) {
874 /* clear it and wait to be cleared */
875 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0);
876
877 timeout = jiffies + HZ;
878 do {
879 udelay(1);
880 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf);
881 if (time_after(jiffies, timeout)) {
882 netdev_warn(dev->net,
883 "timeout on OTP_PWR_DN completion");
884 return -EIO;
885 }
886 } while (buf & OTP_PWR_DN_PWRDN_N_);
887 }
888
889 /* set to BYTE program mode */
890 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_);
891
892 for (i = 0; i < length; i++) {
893 ret = lan78xx_write_reg(dev, OTP_ADDR1,
894 ((offset + i) >> 8) & OTP_ADDR1_15_11);
895 ret = lan78xx_write_reg(dev, OTP_ADDR2,
896 ((offset + i) & OTP_ADDR2_10_3));
897 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]);
898 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_);
899 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_);
900
901 timeout = jiffies + HZ;
902 do {
903 udelay(1);
904 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf);
905 if (time_after(jiffies, timeout)) {
906 netdev_warn(dev->net,
907 "Timeout on OTP_STATUS completion");
908 return -EIO;
909 }
910 } while (buf & OTP_STATUS_BUSY_);
911 }
912
913 return 0;
914}
915
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +0000916static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset,
917 u32 length, u8 *data)
918{
919 u8 sig;
920 int ret;
921
922 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig);
923
924 if (ret == 0) {
925 if (sig == OTP_INDICATOR_1)
926 offset = offset;
927 else if (sig == OTP_INDICATOR_2)
928 offset += 0x100;
929 else
930 ret = -EINVAL;
931 ret = lan78xx_read_raw_otp(dev, offset, length, data);
932 }
933
934 return ret;
935}
936
937static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev)
938{
939 int i, ret;
940
941 for (i = 0; i < 100; i++) {
942 u32 dp_sel;
943
944 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
945 if (unlikely(ret < 0))
946 return -EIO;
947
948 if (dp_sel & DP_SEL_DPRDY_)
949 return 0;
950
951 usleep_range(40, 100);
952 }
953
954 netdev_warn(dev->net, "lan78xx_dataport_wait_not_busy timed out");
955
956 return -EIO;
957}
958
959static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select,
960 u32 addr, u32 length, u32 *buf)
961{
962 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
963 u32 dp_sel;
964 int i, ret;
965
966 if (usb_autopm_get_interface(dev->intf) < 0)
967 return 0;
968
969 mutex_lock(&pdata->dataport_mutex);
970
971 ret = lan78xx_dataport_wait_not_busy(dev);
972 if (ret < 0)
973 goto done;
974
975 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel);
976
977 dp_sel &= ~DP_SEL_RSEL_MASK_;
978 dp_sel |= ram_select;
979 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel);
980
981 for (i = 0; i < length; i++) {
982 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i);
983
984 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]);
985
986 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_);
987
988 ret = lan78xx_dataport_wait_not_busy(dev);
989 if (ret < 0)
990 goto done;
991 }
992
993done:
994 mutex_unlock(&pdata->dataport_mutex);
995 usb_autopm_put_interface(dev->intf);
996
997 return ret;
998}
999
1000static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata,
1001 int index, u8 addr[ETH_ALEN])
1002{
1003 u32 temp;
1004
1005 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) {
1006 temp = addr[3];
1007 temp = addr[2] | (temp << 8);
1008 temp = addr[1] | (temp << 8);
1009 temp = addr[0] | (temp << 8);
1010 pdata->pfilter_table[index][1] = temp;
1011 temp = addr[5];
1012 temp = addr[4] | (temp << 8);
1013 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_;
1014 pdata->pfilter_table[index][0] = temp;
1015 }
1016}
1017
1018/* returns hash bit number for given MAC address */
1019static inline u32 lan78xx_hash(char addr[ETH_ALEN])
1020{
1021 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
1022}
1023
1024static void lan78xx_deferred_multicast_write(struct work_struct *param)
1025{
1026 struct lan78xx_priv *pdata =
1027 container_of(param, struct lan78xx_priv, set_multicast);
1028 struct lan78xx_net *dev = pdata->dev;
1029 int i;
1030 int ret;
1031
1032 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
1033 pdata->rfe_ctl);
1034
1035 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN,
1036 DP_SEL_VHF_HASH_LEN, pdata->mchash_table);
1037
1038 for (i = 1; i < NUM_OF_MAF; i++) {
1039 ret = lan78xx_write_reg(dev, MAF_HI(i), 0);
1040 ret = lan78xx_write_reg(dev, MAF_LO(i),
1041 pdata->pfilter_table[i][1]);
1042 ret = lan78xx_write_reg(dev, MAF_HI(i),
1043 pdata->pfilter_table[i][0]);
1044 }
1045
1046 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1047}
1048
1049static void lan78xx_set_multicast(struct net_device *netdev)
1050{
1051 struct lan78xx_net *dev = netdev_priv(netdev);
1052 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1053 unsigned long flags;
1054 int i;
1055
1056 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
1057
1058 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ |
1059 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1060
1061 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
1062 pdata->mchash_table[i] = 0;
1063 /* pfilter_table[0] has own HW address */
1064 for (i = 1; i < NUM_OF_MAF; i++) {
1065 pdata->pfilter_table[i][0] =
1066 pdata->pfilter_table[i][1] = 0;
1067 }
1068
1069 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_;
1070
1071 if (dev->net->flags & IFF_PROMISC) {
1072 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
1073 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_;
1074 } else {
1075 if (dev->net->flags & IFF_ALLMULTI) {
1076 netif_dbg(dev, drv, dev->net,
1077 "receive all multicast enabled");
1078 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_;
1079 }
1080 }
1081
1082 if (netdev_mc_count(dev->net)) {
1083 struct netdev_hw_addr *ha;
1084 int i;
1085
1086 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
1087
1088 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_;
1089
1090 i = 1;
1091 netdev_for_each_mc_addr(ha, netdev) {
1092 /* set first 32 into Perfect Filter */
1093 if (i < 33) {
1094 lan78xx_set_addr_filter(pdata, i, ha->addr);
1095 } else {
1096 u32 bitnum = lan78xx_hash(ha->addr);
1097
1098 pdata->mchash_table[bitnum / 32] |=
1099 (1 << (bitnum % 32));
1100 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_;
1101 }
1102 i++;
1103 }
1104 }
1105
1106 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
1107
1108 /* defer register writes to a sleepable context */
1109 schedule_work(&pdata->set_multicast);
1110}
1111
1112static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex,
1113 u16 lcladv, u16 rmtadv)
1114{
1115 u32 flow = 0, fct_flow = 0;
1116 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001117 u8 cap;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001118
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001119 if (dev->fc_autoneg)
1120 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
1121 else
1122 cap = dev->fc_request_control;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001123
1124 if (cap & FLOW_CTRL_TX)
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001125 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001126
1127 if (cap & FLOW_CTRL_RX)
1128 flow |= FLOW_CR_RX_FCEN_;
1129
1130 if (dev->udev->speed == USB_SPEED_SUPER)
1131 fct_flow = 0x817;
1132 else if (dev->udev->speed == USB_SPEED_HIGH)
1133 fct_flow = 0x211;
1134
1135 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
1136 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
1137 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
1138
1139 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow);
1140
1141 /* threshold value should be set before enabling flow */
1142 ret = lan78xx_write_reg(dev, FLOW, flow);
1143
1144 return 0;
1145}
1146
1147static int lan78xx_link_reset(struct lan78xx_net *dev)
1148{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001149 struct phy_device *phydev = dev->net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001150 struct ethtool_link_ksettings ecmd;
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001151 int ladv, radv, ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001152 u32 buf;
1153
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001154 /* clear LAN78xx interrupt status */
1155 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_);
1156 if (unlikely(ret < 0))
1157 return -EIO;
1158
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001159 phy_read_status(phydev);
1160
1161 if (!phydev->link && dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001162 dev->link_on = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001163
1164 /* reset MAC */
1165 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1166 if (unlikely(ret < 0))
1167 return -EIO;
1168 buf |= MAC_CR_RST_;
1169 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1170 if (unlikely(ret < 0))
1171 return -EIO;
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00001172
Woojung Huh20ff5562016-03-16 22:10:40 +00001173 del_timer(&dev->stat_monitor);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001174 } else if (phydev->link && !dev->link_on) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001175 dev->link_on = true;
1176
Philippe Reynes6e765102016-10-09 12:07:04 +02001177 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001178
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001179 if (dev->udev->speed == USB_SPEED_SUPER) {
Philippe Reynes6e765102016-10-09 12:07:04 +02001180 if (ecmd.base.speed == 1000) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001181 /* disable U2 */
1182 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1183 buf &= ~USB_CFG1_DEV_U2_INIT_EN_;
1184 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1185 /* enable U1 */
1186 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1187 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1188 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1189 } else {
1190 /* enable U1 & U2 */
1191 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
1192 buf |= USB_CFG1_DEV_U2_INIT_EN_;
1193 buf |= USB_CFG1_DEV_U1_INIT_EN_;
1194 ret = lan78xx_write_reg(dev, USB_CFG1, buf);
1195 }
1196 }
1197
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001198 ladv = phy_read(phydev, MII_ADVERTISE);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001199 if (ladv < 0)
1200 return ladv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001201
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001202 radv = phy_read(phydev, MII_LPA);
Geert Uytterhoeven99c79ec2015-09-04 12:47:28 +02001203 if (radv < 0)
1204 return radv;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001205
1206 netif_dbg(dev, link, dev->net,
1207 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x",
Philippe Reynes6e765102016-10-09 12:07:04 +02001208 ecmd.base.speed, ecmd.base.duplex, ladv, radv);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001209
Philippe Reynes6e765102016-10-09 12:07:04 +02001210 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv,
1211 radv);
Woojung Huh20ff5562016-03-16 22:10:40 +00001212
1213 if (!timer_pending(&dev->stat_monitor)) {
1214 dev->delta = 1;
1215 mod_timer(&dev->stat_monitor,
1216 jiffies + STAT_UPDATE_TIMER);
1217 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001218 }
1219
1220 return ret;
1221}
1222
1223/* some work can't be done in tasklets, so we use keventd
1224 *
1225 * NOTE: annoying asymmetry: if it's active, schedule_work() fails,
1226 * but tasklet_schedule() doesn't. hope the failure is rare.
1227 */
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08001228static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001229{
1230 set_bit(work, &dev->flags);
1231 if (!schedule_delayed_work(&dev->wq, 0))
1232 netdev_err(dev->net, "kevent %d may have been dropped\n", work);
1233}
1234
1235static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb)
1236{
1237 u32 intdata;
1238
1239 if (urb->actual_length != 4) {
1240 netdev_warn(dev->net,
1241 "unexpected urb length %d", urb->actual_length);
1242 return;
1243 }
1244
1245 memcpy(&intdata, urb->transfer_buffer, 4);
1246 le32_to_cpus(&intdata);
1247
1248 if (intdata & INT_ENP_PHY_INT) {
1249 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata);
Woojung Huhcc89c322016-11-01 20:02:00 +00001250 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
1251
1252 if (dev->domain_data.phyirq > 0)
1253 generic_handle_irq(dev->domain_data.phyirq);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001254 } else
1255 netdev_warn(dev->net,
1256 "unexpected interrupt: 0x%08x\n", intdata);
1257}
1258
1259static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev)
1260{
1261 return MAX_EEPROM_SIZE;
1262}
1263
1264static int lan78xx_ethtool_get_eeprom(struct net_device *netdev,
1265 struct ethtool_eeprom *ee, u8 *data)
1266{
1267 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301268 int ret;
1269
1270 ret = usb_autopm_get_interface(dev->intf);
1271 if (ret)
1272 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001273
1274 ee->magic = LAN78XX_EEPROM_MAGIC;
1275
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301276 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data);
1277
1278 usb_autopm_put_interface(dev->intf);
1279
1280 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001281}
1282
1283static int lan78xx_ethtool_set_eeprom(struct net_device *netdev,
1284 struct ethtool_eeprom *ee, u8 *data)
1285{
1286 struct lan78xx_net *dev = netdev_priv(netdev);
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301287 int ret;
1288
1289 ret = usb_autopm_get_interface(dev->intf);
1290 if (ret)
1291 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001292
1293 /* Allow entire eeprom update only */
1294 if ((ee->magic == LAN78XX_EEPROM_MAGIC) &&
1295 (ee->offset == 0) &&
1296 (ee->len == 512) &&
1297 (data[0] == EEPROM_INDICATOR))
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301298 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001299 else if ((ee->magic == LAN78XX_OTP_MAGIC) &&
1300 (ee->offset == 0) &&
1301 (ee->len == 512) &&
1302 (data[0] == OTP_INDICATOR_1))
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301303 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001304
Nisar Sayed8a7ffeb2017-09-21 02:36:36 +05301305 usb_autopm_put_interface(dev->intf);
1306
1307 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001308}
1309
1310static void lan78xx_get_strings(struct net_device *netdev, u32 stringset,
1311 u8 *data)
1312{
1313 if (stringset == ETH_SS_STATS)
1314 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings));
1315}
1316
1317static int lan78xx_get_sset_count(struct net_device *netdev, int sset)
1318{
1319 if (sset == ETH_SS_STATS)
1320 return ARRAY_SIZE(lan78xx_gstrings);
1321 else
1322 return -EOPNOTSUPP;
1323}
1324
1325static void lan78xx_get_stats(struct net_device *netdev,
1326 struct ethtool_stats *stats, u64 *data)
1327{
1328 struct lan78xx_net *dev = netdev_priv(netdev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001329
Woojung Huh20ff5562016-03-16 22:10:40 +00001330 lan78xx_update_stats(dev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001331
Woojung Huh20ff5562016-03-16 22:10:40 +00001332 mutex_lock(&dev->stats.access_lock);
1333 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat));
1334 mutex_unlock(&dev->stats.access_lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001335}
1336
1337static void lan78xx_get_wol(struct net_device *netdev,
1338 struct ethtool_wolinfo *wol)
1339{
1340 struct lan78xx_net *dev = netdev_priv(netdev);
1341 int ret;
1342 u32 buf;
1343 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1344
1345 if (usb_autopm_get_interface(dev->intf) < 0)
1346 return;
1347
1348 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
1349 if (unlikely(ret < 0)) {
1350 wol->supported = 0;
1351 wol->wolopts = 0;
1352 } else {
1353 if (buf & USB_CFG_RMT_WKP_) {
1354 wol->supported = WAKE_ALL;
1355 wol->wolopts = pdata->wol;
1356 } else {
1357 wol->supported = 0;
1358 wol->wolopts = 0;
1359 }
1360 }
1361
1362 usb_autopm_put_interface(dev->intf);
1363}
1364
1365static int lan78xx_set_wol(struct net_device *netdev,
1366 struct ethtool_wolinfo *wol)
1367{
1368 struct lan78xx_net *dev = netdev_priv(netdev);
1369 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
1370 int ret;
1371
1372 ret = usb_autopm_get_interface(dev->intf);
1373 if (ret < 0)
1374 return ret;
1375
1376 pdata->wol = 0;
1377 if (wol->wolopts & WAKE_UCAST)
1378 pdata->wol |= WAKE_UCAST;
1379 if (wol->wolopts & WAKE_MCAST)
1380 pdata->wol |= WAKE_MCAST;
1381 if (wol->wolopts & WAKE_BCAST)
1382 pdata->wol |= WAKE_BCAST;
1383 if (wol->wolopts & WAKE_MAGIC)
1384 pdata->wol |= WAKE_MAGIC;
1385 if (wol->wolopts & WAKE_PHY)
1386 pdata->wol |= WAKE_PHY;
1387 if (wol->wolopts & WAKE_ARP)
1388 pdata->wol |= WAKE_ARP;
1389
1390 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts);
1391
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001392 phy_ethtool_set_wol(netdev->phydev, wol);
1393
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001394 usb_autopm_put_interface(dev->intf);
1395
1396 return ret;
1397}
1398
1399static int lan78xx_get_eee(struct net_device *net, struct ethtool_eee *edata)
1400{
1401 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001402 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001403 int ret;
1404 u32 buf;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001405
1406 ret = usb_autopm_get_interface(dev->intf);
1407 if (ret < 0)
1408 return ret;
1409
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001410 ret = phy_ethtool_get_eee(phydev, edata);
1411 if (ret < 0)
1412 goto exit;
1413
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001414 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1415 if (buf & MAC_CR_EEE_EN_) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001416 edata->eee_enabled = true;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001417 edata->eee_active = !!(edata->advertised &
1418 edata->lp_advertised);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001419 edata->tx_lpi_enabled = true;
1420 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */
1421 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf);
1422 edata->tx_lpi_timer = buf;
1423 } else {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001424 edata->eee_enabled = false;
1425 edata->eee_active = false;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001426 edata->tx_lpi_enabled = false;
1427 edata->tx_lpi_timer = 0;
1428 }
1429
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001430 ret = 0;
1431exit:
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001432 usb_autopm_put_interface(dev->intf);
1433
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001434 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001435}
1436
1437static int lan78xx_set_eee(struct net_device *net, struct ethtool_eee *edata)
1438{
1439 struct lan78xx_net *dev = netdev_priv(net);
1440 int ret;
1441 u32 buf;
1442
1443 ret = usb_autopm_get_interface(dev->intf);
1444 if (ret < 0)
1445 return ret;
1446
1447 if (edata->eee_enabled) {
1448 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1449 buf |= MAC_CR_EEE_EN_;
1450 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1451
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001452 phy_ethtool_set_eee(net->phydev, edata);
1453
1454 buf = (u32)edata->tx_lpi_timer;
1455 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001456 } else {
1457 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
1458 buf &= ~MAC_CR_EEE_EN_;
1459 ret = lan78xx_write_reg(dev, MAC_CR, buf);
1460 }
1461
1462 usb_autopm_put_interface(dev->intf);
1463
1464 return 0;
1465}
1466
1467static u32 lan78xx_get_link(struct net_device *net)
1468{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001469 phy_read_status(net->phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001470
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001471 return net->phydev->link;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001472}
1473
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001474static void lan78xx_get_drvinfo(struct net_device *net,
1475 struct ethtool_drvinfo *info)
1476{
1477 struct lan78xx_net *dev = netdev_priv(net);
1478
1479 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
1480 strncpy(info->version, DRIVER_VERSION, sizeof(info->version));
1481 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info));
1482}
1483
1484static u32 lan78xx_get_msglevel(struct net_device *net)
1485{
1486 struct lan78xx_net *dev = netdev_priv(net);
1487
1488 return dev->msg_enable;
1489}
1490
1491static void lan78xx_set_msglevel(struct net_device *net, u32 level)
1492{
1493 struct lan78xx_net *dev = netdev_priv(net);
1494
1495 dev->msg_enable = level;
1496}
1497
Philippe Reynes6e765102016-10-09 12:07:04 +02001498static int lan78xx_get_link_ksettings(struct net_device *net,
1499 struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001500{
1501 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001502 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001503 int ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001504
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001505 ret = usb_autopm_get_interface(dev->intf);
1506 if (ret < 0)
1507 return ret;
1508
yuval.shaia@oracle.com55141742017-06-13 10:09:46 +03001509 phy_ethtool_ksettings_get(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001510
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001511 usb_autopm_put_interface(dev->intf);
1512
1513 return ret;
1514}
1515
Philippe Reynes6e765102016-10-09 12:07:04 +02001516static int lan78xx_set_link_ksettings(struct net_device *net,
1517 const struct ethtool_link_ksettings *cmd)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001518{
1519 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001520 struct phy_device *phydev = net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001521 int ret = 0;
1522 int temp;
1523
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001524 ret = usb_autopm_get_interface(dev->intf);
1525 if (ret < 0)
1526 return ret;
1527
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001528 /* change speed & duplex */
Philippe Reynes6e765102016-10-09 12:07:04 +02001529 ret = phy_ethtool_ksettings_set(phydev, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001530
Philippe Reynes6e765102016-10-09 12:07:04 +02001531 if (!cmd->base.autoneg) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001532 /* force link down */
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001533 temp = phy_read(phydev, MII_BMCR);
1534 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001535 mdelay(1);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001536 phy_write(phydev, MII_BMCR, temp);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001537 }
1538
1539 usb_autopm_put_interface(dev->intf);
1540
1541 return ret;
1542}
1543
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001544static void lan78xx_get_pause(struct net_device *net,
1545 struct ethtool_pauseparam *pause)
1546{
1547 struct lan78xx_net *dev = netdev_priv(net);
1548 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001549 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001550
Philippe Reynes6e765102016-10-09 12:07:04 +02001551 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001552
1553 pause->autoneg = dev->fc_autoneg;
1554
1555 if (dev->fc_request_control & FLOW_CTRL_TX)
1556 pause->tx_pause = 1;
1557
1558 if (dev->fc_request_control & FLOW_CTRL_RX)
1559 pause->rx_pause = 1;
1560}
1561
1562static int lan78xx_set_pause(struct net_device *net,
1563 struct ethtool_pauseparam *pause)
1564{
1565 struct lan78xx_net *dev = netdev_priv(net);
1566 struct phy_device *phydev = net->phydev;
Philippe Reynes6e765102016-10-09 12:07:04 +02001567 struct ethtool_link_ksettings ecmd;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001568 int ret;
1569
Philippe Reynes6e765102016-10-09 12:07:04 +02001570 phy_ethtool_ksettings_get(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001571
Philippe Reynes6e765102016-10-09 12:07:04 +02001572 if (pause->autoneg && !ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001573 ret = -EINVAL;
1574 goto exit;
1575 }
1576
1577 dev->fc_request_control = 0;
1578 if (pause->rx_pause)
1579 dev->fc_request_control |= FLOW_CTRL_RX;
1580
1581 if (pause->tx_pause)
1582 dev->fc_request_control |= FLOW_CTRL_TX;
1583
Philippe Reynes6e765102016-10-09 12:07:04 +02001584 if (ecmd.base.autoneg) {
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001585 u32 mii_adv;
Philippe Reynes6e765102016-10-09 12:07:04 +02001586 u32 advertising;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001587
Philippe Reynes6e765102016-10-09 12:07:04 +02001588 ethtool_convert_link_mode_to_legacy_u32(
1589 &advertising, ecmd.link_modes.advertising);
1590
1591 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001592 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
Philippe Reynes6e765102016-10-09 12:07:04 +02001593 advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
1594
1595 ethtool_convert_legacy_u32_to_link_mode(
1596 ecmd.link_modes.advertising, advertising);
1597
1598 phy_ethtool_ksettings_set(phydev, &ecmd);
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001599 }
1600
1601 dev->fc_autoneg = pause->autoneg;
1602
1603 ret = 0;
1604exit:
1605 return ret;
1606}
1607
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001608static const struct ethtool_ops lan78xx_ethtool_ops = {
1609 .get_link = lan78xx_get_link,
Florian Fainelli860ce4b2016-11-15 10:06:44 -08001610 .nway_reset = phy_ethtool_nway_reset,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001611 .get_drvinfo = lan78xx_get_drvinfo,
1612 .get_msglevel = lan78xx_get_msglevel,
1613 .set_msglevel = lan78xx_set_msglevel,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001614 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len,
1615 .get_eeprom = lan78xx_ethtool_get_eeprom,
1616 .set_eeprom = lan78xx_ethtool_set_eeprom,
1617 .get_ethtool_stats = lan78xx_get_stats,
1618 .get_sset_count = lan78xx_get_sset_count,
1619 .get_strings = lan78xx_get_strings,
1620 .get_wol = lan78xx_get_wol,
1621 .set_wol = lan78xx_set_wol,
1622 .get_eee = lan78xx_get_eee,
1623 .set_eee = lan78xx_set_eee,
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00001624 .get_pauseparam = lan78xx_get_pause,
1625 .set_pauseparam = lan78xx_set_pause,
Philippe Reynes6e765102016-10-09 12:07:04 +02001626 .get_link_ksettings = lan78xx_get_link_ksettings,
1627 .set_link_ksettings = lan78xx_set_link_ksettings,
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001628};
1629
1630static int lan78xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
1631{
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001632 if (!netif_running(netdev))
1633 return -EINVAL;
1634
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001635 return phy_mii_ioctl(netdev->phydev, rq, cmd);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001636}
1637
1638static void lan78xx_init_mac_address(struct lan78xx_net *dev)
1639{
1640 u32 addr_lo, addr_hi;
1641 int ret;
1642 u8 addr[6];
1643
1644 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo);
1645 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi);
1646
1647 addr[0] = addr_lo & 0xFF;
1648 addr[1] = (addr_lo >> 8) & 0xFF;
1649 addr[2] = (addr_lo >> 16) & 0xFF;
1650 addr[3] = (addr_lo >> 24) & 0xFF;
1651 addr[4] = addr_hi & 0xFF;
1652 addr[5] = (addr_hi >> 8) & 0xFF;
1653
1654 if (!is_valid_ether_addr(addr)) {
1655 /* reading mac address from EEPROM or OTP */
1656 if ((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
1657 addr) == 0) ||
1658 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
1659 addr) == 0)) {
1660 if (is_valid_ether_addr(addr)) {
1661 /* eeprom values are valid so use them */
1662 netif_dbg(dev, ifup, dev->net,
1663 "MAC address read from EEPROM");
1664 } else {
1665 /* generate random MAC */
1666 random_ether_addr(addr);
1667 netif_dbg(dev, ifup, dev->net,
1668 "MAC address set to random addr");
1669 }
1670
1671 addr_lo = addr[0] | (addr[1] << 8) |
1672 (addr[2] << 16) | (addr[3] << 24);
1673 addr_hi = addr[4] | (addr[5] << 8);
1674
1675 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
1676 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
1677 } else {
1678 /* generate random MAC */
1679 random_ether_addr(addr);
1680 netif_dbg(dev, ifup, dev->net,
1681 "MAC address set to random addr");
1682 }
1683 }
1684
1685 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo);
1686 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_);
1687
1688 ether_addr_copy(dev->net->dev_addr, addr);
1689}
1690
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001691/* MDIO read and write wrappers for phylib */
1692static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001693{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001694 struct lan78xx_net *dev = bus->priv;
1695 u32 val, addr;
1696 int ret;
1697
1698 ret = usb_autopm_get_interface(dev->intf);
1699 if (ret < 0)
1700 return ret;
1701
1702 mutex_lock(&dev->phy_mutex);
1703
1704 /* confirm MII not busy */
1705 ret = lan78xx_phy_wait_not_busy(dev);
1706 if (ret < 0)
1707 goto done;
1708
1709 /* set the address, index & direction (read from PHY) */
1710 addr = mii_access(phy_id, idx, MII_READ);
1711 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1712
1713 ret = lan78xx_phy_wait_not_busy(dev);
1714 if (ret < 0)
1715 goto done;
1716
1717 ret = lan78xx_read_reg(dev, MII_DATA, &val);
1718
1719 ret = (int)(val & 0xFFFF);
1720
1721done:
1722 mutex_unlock(&dev->phy_mutex);
1723 usb_autopm_put_interface(dev->intf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001724
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001725 return ret;
1726}
1727
1728static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx,
1729 u16 regval)
1730{
1731 struct lan78xx_net *dev = bus->priv;
1732 u32 val, addr;
1733 int ret;
1734
1735 ret = usb_autopm_get_interface(dev->intf);
1736 if (ret < 0)
1737 return ret;
1738
1739 mutex_lock(&dev->phy_mutex);
1740
1741 /* confirm MII not busy */
1742 ret = lan78xx_phy_wait_not_busy(dev);
1743 if (ret < 0)
1744 goto done;
1745
1746 val = (u32)regval;
1747 ret = lan78xx_write_reg(dev, MII_DATA, val);
1748
1749 /* set the address, index & direction (write to PHY) */
1750 addr = mii_access(phy_id, idx, MII_WRITE);
1751 ret = lan78xx_write_reg(dev, MII_ACC, addr);
1752
1753 ret = lan78xx_phy_wait_not_busy(dev);
1754 if (ret < 0)
1755 goto done;
1756
1757done:
1758 mutex_unlock(&dev->phy_mutex);
1759 usb_autopm_put_interface(dev->intf);
1760 return 0;
1761}
1762
1763static int lan78xx_mdio_init(struct lan78xx_net *dev)
1764{
1765 int ret;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001766
1767 dev->mdiobus = mdiobus_alloc();
1768 if (!dev->mdiobus) {
1769 netdev_err(dev->net, "can't allocate MDIO bus\n");
1770 return -ENOMEM;
1771 }
1772
1773 dev->mdiobus->priv = (void *)dev;
1774 dev->mdiobus->read = lan78xx_mdiobus_read;
1775 dev->mdiobus->write = lan78xx_mdiobus_write;
1776 dev->mdiobus->name = "lan78xx-mdiobus";
1777
1778 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
1779 dev->udev->bus->busnum, dev->udev->devnum);
1780
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00001781 switch (dev->chipid) {
1782 case ID_REV_CHIP_ID_7800_:
1783 case ID_REV_CHIP_ID_7850_:
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001784 /* set to internal PHY id */
1785 dev->mdiobus->phy_mask = ~(1 << 1);
1786 break;
Woojung Huh02dc1f32016-12-07 20:26:25 +00001787 case ID_REV_CHIP_ID_7801_:
1788 /* scan thru PHYAD[2..0] */
1789 dev->mdiobus->phy_mask = ~(0xFF);
1790 break;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001791 }
1792
1793 ret = mdiobus_register(dev->mdiobus);
1794 if (ret) {
1795 netdev_err(dev->net, "can't register MDIO bus\n");
Andrew Lunne7f4dc32016-01-06 20:11:15 +01001796 goto exit1;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001797 }
1798
1799 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id);
1800 return 0;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001801exit1:
1802 mdiobus_free(dev->mdiobus);
1803 return ret;
1804}
1805
1806static void lan78xx_remove_mdio(struct lan78xx_net *dev)
1807{
1808 mdiobus_unregister(dev->mdiobus);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00001809 mdiobus_free(dev->mdiobus);
1810}
1811
1812static void lan78xx_link_status_change(struct net_device *net)
1813{
Woojung Huh14437e32016-04-25 22:22:36 +00001814 struct phy_device *phydev = net->phydev;
1815 int ret, temp;
1816
1817 /* At forced 100 F/H mode, chip may fail to set mode correctly
1818 * when cable is switched between long(~50+m) and short one.
1819 * As workaround, set to 10 before setting to 100
1820 * at forced 100 F/H mode.
1821 */
1822 if (!phydev->autoneg && (phydev->speed == 100)) {
1823 /* disable phy interrupt */
1824 temp = phy_read(phydev, LAN88XX_INT_MASK);
1825 temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
1826 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1827
1828 temp = phy_read(phydev, MII_BMCR);
1829 temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
1830 phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
1831 temp |= BMCR_SPEED100;
1832 phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
1833
1834 /* clear pending interrupt generated while workaround */
1835 temp = phy_read(phydev, LAN88XX_INT_STS);
1836
1837 /* enable phy interrupt back */
1838 temp = phy_read(phydev, LAN88XX_INT_MASK);
1839 temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
1840 ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
1841 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00001842}
1843
Woojung Huhcc89c322016-11-01 20:02:00 +00001844static int irq_map(struct irq_domain *d, unsigned int irq,
1845 irq_hw_number_t hwirq)
1846{
1847 struct irq_domain_data *data = d->host_data;
1848
1849 irq_set_chip_data(irq, data);
1850 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler);
1851 irq_set_noprobe(irq);
1852
1853 return 0;
1854}
1855
1856static void irq_unmap(struct irq_domain *d, unsigned int irq)
1857{
1858 irq_set_chip_and_handler(irq, NULL, NULL);
1859 irq_set_chip_data(irq, NULL);
1860}
1861
1862static const struct irq_domain_ops chip_domain_ops = {
1863 .map = irq_map,
1864 .unmap = irq_unmap,
1865};
1866
1867static void lan78xx_irq_mask(struct irq_data *irqd)
1868{
1869 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1870
1871 data->irqenable &= ~BIT(irqd_to_hwirq(irqd));
1872}
1873
1874static void lan78xx_irq_unmask(struct irq_data *irqd)
1875{
1876 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1877
1878 data->irqenable |= BIT(irqd_to_hwirq(irqd));
1879}
1880
1881static void lan78xx_irq_bus_lock(struct irq_data *irqd)
1882{
1883 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1884
1885 mutex_lock(&data->irq_lock);
1886}
1887
1888static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd)
1889{
1890 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd);
1891 struct lan78xx_net *dev =
1892 container_of(data, struct lan78xx_net, domain_data);
1893 u32 buf;
1894 int ret;
1895
1896 /* call register access here because irq_bus_lock & irq_bus_sync_unlock
1897 * are only two callbacks executed in non-atomic contex.
1898 */
1899 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1900 if (buf != data->irqenable)
1901 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable);
1902
1903 mutex_unlock(&data->irq_lock);
1904}
1905
1906static struct irq_chip lan78xx_irqchip = {
1907 .name = "lan78xx-irqs",
1908 .irq_mask = lan78xx_irq_mask,
1909 .irq_unmask = lan78xx_irq_unmask,
1910 .irq_bus_lock = lan78xx_irq_bus_lock,
1911 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock,
1912};
1913
1914static int lan78xx_setup_irq_domain(struct lan78xx_net *dev)
1915{
1916 struct device_node *of_node;
1917 struct irq_domain *irqdomain;
1918 unsigned int irqmap = 0;
1919 u32 buf;
1920 int ret = 0;
1921
1922 of_node = dev->udev->dev.parent->of_node;
1923
1924 mutex_init(&dev->domain_data.irq_lock);
1925
1926 lan78xx_read_reg(dev, INT_EP_CTL, &buf);
1927 dev->domain_data.irqenable = buf;
1928
1929 dev->domain_data.irqchip = &lan78xx_irqchip;
1930 dev->domain_data.irq_handler = handle_simple_irq;
1931
1932 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0,
1933 &chip_domain_ops, &dev->domain_data);
1934 if (irqdomain) {
1935 /* create mapping for PHY interrupt */
1936 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY);
1937 if (!irqmap) {
1938 irq_domain_remove(irqdomain);
1939
1940 irqdomain = NULL;
1941 ret = -EINVAL;
1942 }
1943 } else {
1944 ret = -EINVAL;
1945 }
1946
1947 dev->domain_data.irqdomain = irqdomain;
1948 dev->domain_data.phyirq = irqmap;
1949
1950 return ret;
1951}
1952
1953static void lan78xx_remove_irq_domain(struct lan78xx_net *dev)
1954{
1955 if (dev->domain_data.phyirq > 0) {
1956 irq_dispose_mapping(dev->domain_data.phyirq);
1957
1958 if (dev->domain_data.irqdomain)
1959 irq_domain_remove(dev->domain_data.irqdomain);
1960 }
1961 dev->domain_data.phyirq = 0;
1962 dev->domain_data.irqdomain = NULL;
1963}
1964
Woojung Huh02dc1f32016-12-07 20:26:25 +00001965static int lan8835_fixup(struct phy_device *phydev)
1966{
1967 int buf;
1968 int ret;
1969 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1970
1971 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */
Russell King5f613672017-03-21 16:36:48 +00001972 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001973 buf &= ~0x1800;
1974 buf |= 0x0800;
Russell King5f613672017-03-21 16:36:48 +00001975 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001976
1977 /* RGMII MAC TXC Delay Enable */
1978 ret = lan78xx_write_reg(dev, MAC_RGMII_ID,
1979 MAC_RGMII_ID_TXC_DELAY_EN_);
1980
1981 /* RGMII TX DLL Tune Adjust */
1982 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00);
1983
1984 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID;
1985
1986 return 1;
1987}
1988
1989static int ksz9031rnx_fixup(struct phy_device *phydev)
1990{
1991 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev);
1992
1993 /* Micrel9301RNX PHY configuration */
1994 /* RGMII Control Signal Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001995 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001996 /* RGMII RX Data Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001997 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777);
Woojung Huh02dc1f32016-12-07 20:26:25 +00001998 /* RGMII RX Clock Pad Skew */
Russell King5f613672017-03-21 16:36:48 +00001999 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002000
2001 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID;
2002
2003 return 1;
2004}
2005
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002006static int lan78xx_phy_init(struct lan78xx_net *dev)
2007{
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002008 int ret;
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002009 u32 mii_adv;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002010 struct phy_device *phydev = dev->net->phydev;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002011
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002012 phydev = phy_find_first(dev->mdiobus);
2013 if (!phydev) {
2014 netdev_err(dev->net, "no PHY found\n");
2015 return -EIO;
2016 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002017
Woojung Huh02dc1f32016-12-07 20:26:25 +00002018 if ((dev->chipid == ID_REV_CHIP_ID_7800_) ||
2019 (dev->chipid == ID_REV_CHIP_ID_7850_)) {
2020 phydev->is_internal = true;
2021 dev->interface = PHY_INTERFACE_MODE_GMII;
2022
2023 } else if (dev->chipid == ID_REV_CHIP_ID_7801_) {
2024 if (!phydev->drv) {
2025 netdev_err(dev->net, "no PHY driver found\n");
2026 return -EIO;
2027 }
2028
2029 dev->interface = PHY_INTERFACE_MODE_RGMII;
2030
2031 /* external PHY fixup for KSZ9031RNX */
2032 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0,
2033 ksz9031rnx_fixup);
2034 if (ret < 0) {
2035 netdev_err(dev->net, "fail to register fixup\n");
2036 return ret;
2037 }
2038 /* external PHY fixup for LAN8835 */
2039 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0,
2040 lan8835_fixup);
2041 if (ret < 0) {
2042 netdev_err(dev->net, "fail to register fixup\n");
2043 return ret;
2044 }
2045 /* add more external PHY fixup here if needed */
2046
2047 phydev->is_internal = false;
2048 } else {
2049 netdev_err(dev->net, "unknown ID found\n");
2050 ret = -EIO;
2051 goto error;
2052 }
2053
Woojung Huhcc89c322016-11-01 20:02:00 +00002054 /* if phyirq is not set, use polling mode in phylib */
2055 if (dev->domain_data.phyirq > 0)
2056 phydev->irq = dev->domain_data.phyirq;
2057 else
2058 phydev->irq = 0;
2059 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq);
Woojung.Huh@microchip.come4953912016-01-27 22:57:52 +00002060
Woojung Huhf6e3ef32016-11-17 22:10:02 +00002061 /* set to AUTOMDIX */
2062 phydev->mdix = ETH_TP_MDI_AUTO;
2063
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002064 ret = phy_connect_direct(dev->net, phydev,
2065 lan78xx_link_status_change,
Woojung Huh02dc1f32016-12-07 20:26:25 +00002066 dev->interface);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002067 if (ret) {
2068 netdev_err(dev->net, "can't attach PHY to %s\n",
2069 dev->mdiobus->id);
2070 return -EIO;
2071 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002072
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002073 /* MAC doesn't support 1000T Half */
2074 phydev->supported &= ~SUPPORTED_1000baseT_Half;
Woojung.Huh@microchip.come270b2d2016-02-25 23:33:09 +00002075
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002076 /* support both flow controls */
2077 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
2078 phydev->advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
2079 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control);
2080 phydev->advertising |= mii_adv_to_ethtool_adv_t(mii_adv);
2081
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002082 genphy_config_aneg(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002083
Woojung.Huh@microchip.com349e0c52016-02-25 23:33:14 +00002084 dev->fc_autoneg = phydev->autoneg;
2085
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002086 phy_start(phydev);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002087
2088 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
2089
2090 return 0;
Woojung Huh02dc1f32016-12-07 20:26:25 +00002091
2092error:
2093 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
2094 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
2095
2096 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002097}
2098
2099static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size)
2100{
2101 int ret = 0;
2102 u32 buf;
2103 bool rxenabled;
2104
2105 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2106
2107 rxenabled = ((buf & MAC_RX_RXEN_) != 0);
2108
2109 if (rxenabled) {
2110 buf &= ~MAC_RX_RXEN_;
2111 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2112 }
2113
2114 /* add 4 to size for FCS */
2115 buf &= ~MAC_RX_MAX_SIZE_MASK_;
2116 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
2117
2118 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2119
2120 if (rxenabled) {
2121 buf |= MAC_RX_RXEN_;
2122 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2123 }
2124
2125 return 0;
2126}
2127
2128static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q)
2129{
2130 struct sk_buff *skb;
2131 unsigned long flags;
2132 int count = 0;
2133
2134 spin_lock_irqsave(&q->lock, flags);
2135 while (!skb_queue_empty(q)) {
2136 struct skb_data *entry;
2137 struct urb *urb;
2138 int ret;
2139
2140 skb_queue_walk(q, skb) {
2141 entry = (struct skb_data *)skb->cb;
2142 if (entry->state != unlink_start)
2143 goto found;
2144 }
2145 break;
2146found:
2147 entry->state = unlink_start;
2148 urb = entry->urb;
2149
2150 /* Get reference count of the URB to avoid it to be
2151 * freed during usb_unlink_urb, which may trigger
2152 * use-after-free problem inside usb_unlink_urb since
2153 * usb_unlink_urb is always racing with .complete
2154 * handler(include defer_bh).
2155 */
2156 usb_get_urb(urb);
2157 spin_unlock_irqrestore(&q->lock, flags);
2158 /* during some PM-driven resume scenarios,
2159 * these (async) unlinks complete immediately
2160 */
2161 ret = usb_unlink_urb(urb);
2162 if (ret != -EINPROGRESS && ret != 0)
2163 netdev_dbg(dev->net, "unlink urb err, %d\n", ret);
2164 else
2165 count++;
2166 usb_put_urb(urb);
2167 spin_lock_irqsave(&q->lock, flags);
2168 }
2169 spin_unlock_irqrestore(&q->lock, flags);
2170 return count;
2171}
2172
2173static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu)
2174{
2175 struct lan78xx_net *dev = netdev_priv(netdev);
2176 int ll_mtu = new_mtu + netdev->hard_header_len;
2177 int old_hard_mtu = dev->hard_mtu;
2178 int old_rx_urb_size = dev->rx_urb_size;
2179 int ret;
2180
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002181 /* no second zero-length packet read wanted after mtu-sized packets */
2182 if ((ll_mtu % dev->maxpacket) == 0)
2183 return -EDOM;
2184
2185 ret = lan78xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
2186
2187 netdev->mtu = new_mtu;
2188
2189 dev->hard_mtu = netdev->mtu + netdev->hard_header_len;
2190 if (dev->rx_urb_size == old_hard_mtu) {
2191 dev->rx_urb_size = dev->hard_mtu;
2192 if (dev->rx_urb_size > old_rx_urb_size) {
2193 if (netif_running(dev->net)) {
2194 unlink_urbs(dev, &dev->rxq);
2195 tasklet_schedule(&dev->bh);
2196 }
2197 }
2198 }
2199
2200 return 0;
2201}
2202
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002203static int lan78xx_set_mac_addr(struct net_device *netdev, void *p)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002204{
2205 struct lan78xx_net *dev = netdev_priv(netdev);
2206 struct sockaddr *addr = p;
2207 u32 addr_lo, addr_hi;
2208 int ret;
2209
2210 if (netif_running(netdev))
2211 return -EBUSY;
2212
2213 if (!is_valid_ether_addr(addr->sa_data))
2214 return -EADDRNOTAVAIL;
2215
2216 ether_addr_copy(netdev->dev_addr, addr->sa_data);
2217
2218 addr_lo = netdev->dev_addr[0] |
2219 netdev->dev_addr[1] << 8 |
2220 netdev->dev_addr[2] << 16 |
2221 netdev->dev_addr[3] << 24;
2222 addr_hi = netdev->dev_addr[4] |
2223 netdev->dev_addr[5] << 8;
2224
2225 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo);
2226 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi);
2227
2228 return 0;
2229}
2230
2231/* Enable or disable Rx checksum offload engine */
2232static int lan78xx_set_features(struct net_device *netdev,
2233 netdev_features_t features)
2234{
2235 struct lan78xx_net *dev = netdev_priv(netdev);
2236 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2237 unsigned long flags;
2238 int ret;
2239
2240 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
2241
2242 if (features & NETIF_F_RXCSUM) {
2243 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_;
2244 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_;
2245 } else {
2246 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_);
2247 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_);
2248 }
2249
2250 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2251 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_;
2252 else
2253 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_;
2254
2255 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
2256
2257 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2258
2259 return 0;
2260}
2261
2262static void lan78xx_deferred_vlan_write(struct work_struct *param)
2263{
2264 struct lan78xx_priv *pdata =
2265 container_of(param, struct lan78xx_priv, set_vlan);
2266 struct lan78xx_net *dev = pdata->dev;
2267
2268 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0,
2269 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table);
2270}
2271
2272static int lan78xx_vlan_rx_add_vid(struct net_device *netdev,
2273 __be16 proto, u16 vid)
2274{
2275 struct lan78xx_net *dev = netdev_priv(netdev);
2276 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2277 u16 vid_bit_index;
2278 u16 vid_dword_index;
2279
2280 vid_dword_index = (vid >> 5) & 0x7F;
2281 vid_bit_index = vid & 0x1F;
2282
2283 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index);
2284
2285 /* defer register writes to a sleepable context */
2286 schedule_work(&pdata->set_vlan);
2287
2288 return 0;
2289}
2290
2291static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev,
2292 __be16 proto, u16 vid)
2293{
2294 struct lan78xx_net *dev = netdev_priv(netdev);
2295 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2296 u16 vid_bit_index;
2297 u16 vid_dword_index;
2298
2299 vid_dword_index = (vid >> 5) & 0x7F;
2300 vid_bit_index = vid & 0x1F;
2301
2302 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index);
2303
2304 /* defer register writes to a sleepable context */
2305 schedule_work(&pdata->set_vlan);
2306
2307 return 0;
2308}
2309
2310static void lan78xx_init_ltm(struct lan78xx_net *dev)
2311{
2312 int ret;
2313 u32 buf;
2314 u32 regs[6] = { 0 };
2315
2316 ret = lan78xx_read_reg(dev, USB_CFG1, &buf);
2317 if (buf & USB_CFG1_LTM_ENABLE_) {
2318 u8 temp[2];
2319 /* Get values from EEPROM first */
2320 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) {
2321 if (temp[0] == 24) {
2322 ret = lan78xx_read_raw_eeprom(dev,
2323 temp[1] * 2,
2324 24,
2325 (u8 *)regs);
2326 if (ret < 0)
2327 return;
2328 }
2329 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) {
2330 if (temp[0] == 24) {
2331 ret = lan78xx_read_raw_otp(dev,
2332 temp[1] * 2,
2333 24,
2334 (u8 *)regs);
2335 if (ret < 0)
2336 return;
2337 }
2338 }
2339 }
2340
2341 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]);
2342 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]);
2343 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]);
2344 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]);
2345 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]);
2346 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]);
2347}
2348
2349static int lan78xx_reset(struct lan78xx_net *dev)
2350{
2351 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2352 u32 buf;
2353 int ret = 0;
2354 unsigned long timeout;
2355
2356 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2357 buf |= HW_CFG_LRST_;
2358 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2359
2360 timeout = jiffies + HZ;
2361 do {
2362 mdelay(1);
2363 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2364 if (time_after(jiffies, timeout)) {
2365 netdev_warn(dev->net,
2366 "timeout on completion of LiteReset");
2367 return -EIO;
2368 }
2369 } while (buf & HW_CFG_LRST_);
2370
2371 lan78xx_init_mac_address(dev);
2372
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002373 /* save DEVID for later usage */
2374 ret = lan78xx_read_reg(dev, ID_REV, &buf);
Woojung.Huh@microchip.com87177ba2016-02-25 23:33:07 +00002375 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16;
2376 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_;
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002377
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002378 /* Respond to the IN token with a NAK */
2379 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2380 buf |= USB_CFG_BIR_;
2381 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2382
2383 /* Init LTM */
2384 lan78xx_init_ltm(dev);
2385
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002386 if (dev->udev->speed == USB_SPEED_SUPER) {
2387 buf = DEFAULT_BURST_CAP_SIZE / SS_USB_PKT_SIZE;
2388 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2389 dev->rx_qlen = 4;
2390 dev->tx_qlen = 4;
2391 } else if (dev->udev->speed == USB_SPEED_HIGH) {
2392 buf = DEFAULT_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
2393 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2394 dev->rx_qlen = RX_MAX_QUEUE_MEMORY / dev->rx_urb_size;
2395 dev->tx_qlen = RX_MAX_QUEUE_MEMORY / dev->hard_mtu;
2396 } else {
2397 buf = DEFAULT_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
2398 dev->rx_urb_size = DEFAULT_BURST_CAP_SIZE;
2399 dev->rx_qlen = 4;
2400 }
2401
2402 ret = lan78xx_write_reg(dev, BURST_CAP, buf);
2403 ret = lan78xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
2404
2405 ret = lan78xx_read_reg(dev, HW_CFG, &buf);
2406 buf |= HW_CFG_MEF_;
2407 ret = lan78xx_write_reg(dev, HW_CFG, buf);
2408
2409 ret = lan78xx_read_reg(dev, USB_CFG0, &buf);
2410 buf |= USB_CFG_BCE_;
2411 ret = lan78xx_write_reg(dev, USB_CFG0, buf);
2412
2413 /* set FIFO sizes */
2414 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
2415 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf);
2416
2417 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
2418 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf);
2419
2420 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
2421 ret = lan78xx_write_reg(dev, FLOW, 0);
2422 ret = lan78xx_write_reg(dev, FCT_FLOW, 0);
2423
2424 /* Don't need rfe_ctl_lock during initialisation */
2425 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
2426 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_;
2427 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
2428
2429 /* Enable or disable checksum offload engines */
2430 lan78xx_set_features(dev->net, dev->net->features);
2431
2432 lan78xx_set_multicast(dev->net);
2433
2434 /* reset PHY */
2435 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2436 buf |= PMT_CTL_PHY_RST_;
2437 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
2438
2439 timeout = jiffies + HZ;
2440 do {
2441 mdelay(1);
2442 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
2443 if (time_after(jiffies, timeout)) {
2444 netdev_warn(dev->net, "timeout waiting for PHY Reset");
2445 return -EIO;
2446 }
Woojung.Huh@microchip.com6c595b02015-09-16 23:40:39 +00002447 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_));
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002448
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002449 ret = lan78xx_read_reg(dev, MAC_CR, &buf);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002450 /* LAN7801 only has RGMII mode */
2451 if (dev->chipid == ID_REV_CHIP_ID_7801_)
2452 buf &= ~MAC_CR_GMII_EN_;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002453 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002454 ret = lan78xx_write_reg(dev, MAC_CR, buf);
2455
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002456 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
2457 buf |= MAC_TX_TXEN_;
2458 ret = lan78xx_write_reg(dev, MAC_TX, buf);
2459
2460 ret = lan78xx_read_reg(dev, FCT_TX_CTL, &buf);
2461 buf |= FCT_TX_CTL_EN_;
2462 ret = lan78xx_write_reg(dev, FCT_TX_CTL, buf);
2463
2464 ret = lan78xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
2465
2466 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
2467 buf |= MAC_RX_RXEN_;
2468 ret = lan78xx_write_reg(dev, MAC_RX, buf);
2469
2470 ret = lan78xx_read_reg(dev, FCT_RX_CTL, &buf);
2471 buf |= FCT_RX_CTL_EN_;
2472 ret = lan78xx_write_reg(dev, FCT_RX_CTL, buf);
2473
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002474 return 0;
2475}
2476
Woojung Huh20ff5562016-03-16 22:10:40 +00002477static void lan78xx_init_stats(struct lan78xx_net *dev)
2478{
2479 u32 *p;
2480 int i;
2481
2482 /* initialize for stats update
2483 * some counters are 20bits and some are 32bits
2484 */
2485 p = (u32 *)&dev->stats.rollover_max;
2486 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++)
2487 p[i] = 0xFFFFF;
2488
2489 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF;
2490 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF;
2491 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF;
2492 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF;
2493 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF;
2494 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF;
2495 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF;
2496 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF;
2497 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF;
2498 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF;
2499
2500 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
2501}
2502
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002503static int lan78xx_open(struct net_device *net)
2504{
2505 struct lan78xx_net *dev = netdev_priv(net);
2506 int ret;
2507
2508 ret = usb_autopm_get_interface(dev->intf);
2509 if (ret < 0)
2510 goto out;
2511
2512 ret = lan78xx_reset(dev);
2513 if (ret < 0)
2514 goto done;
2515
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002516 ret = lan78xx_phy_init(dev);
2517 if (ret < 0)
2518 goto done;
2519
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002520 /* for Link Check */
2521 if (dev->urb_intr) {
2522 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL);
2523 if (ret < 0) {
2524 netif_err(dev, ifup, dev->net,
2525 "intr submit %d\n", ret);
2526 goto done;
2527 }
2528 }
2529
Woojung Huh20ff5562016-03-16 22:10:40 +00002530 lan78xx_init_stats(dev);
2531
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002532 set_bit(EVENT_DEV_OPEN, &dev->flags);
2533
2534 netif_start_queue(net);
2535
2536 dev->link_on = false;
2537
2538 lan78xx_defer_kevent(dev, EVENT_LINK_RESET);
2539done:
2540 usb_autopm_put_interface(dev->intf);
2541
2542out:
2543 return ret;
2544}
2545
2546static void lan78xx_terminate_urbs(struct lan78xx_net *dev)
2547{
2548 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup);
2549 DECLARE_WAITQUEUE(wait, current);
2550 int temp;
2551
2552 /* ensure there are no more active urbs */
2553 add_wait_queue(&unlink_wakeup, &wait);
2554 set_current_state(TASK_UNINTERRUPTIBLE);
2555 dev->wait = &unlink_wakeup;
2556 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq);
2557
2558 /* maybe wait for deletions to finish. */
2559 while (!skb_queue_empty(&dev->rxq) &&
2560 !skb_queue_empty(&dev->txq) &&
2561 !skb_queue_empty(&dev->done)) {
2562 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS));
2563 set_current_state(TASK_UNINTERRUPTIBLE);
2564 netif_dbg(dev, ifdown, dev->net,
2565 "waited for %d urb completions\n", temp);
2566 }
2567 set_current_state(TASK_RUNNING);
2568 dev->wait = NULL;
2569 remove_wait_queue(&unlink_wakeup, &wait);
2570}
2571
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002572static int lan78xx_stop(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002573{
2574 struct lan78xx_net *dev = netdev_priv(net);
2575
Woojung Huh20ff5562016-03-16 22:10:40 +00002576 if (timer_pending(&dev->stat_monitor))
2577 del_timer_sync(&dev->stat_monitor);
2578
Woojung Huh02dc1f32016-12-07 20:26:25 +00002579 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0);
2580 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0);
2581
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002582 phy_stop(net->phydev);
2583 phy_disconnect(net->phydev);
Woojung Huh02dc1f32016-12-07 20:26:25 +00002584
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002585 net->phydev = NULL;
2586
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002587 clear_bit(EVENT_DEV_OPEN, &dev->flags);
2588 netif_stop_queue(net);
2589
2590 netif_info(dev, ifdown, dev->net,
2591 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n",
2592 net->stats.rx_packets, net->stats.tx_packets,
2593 net->stats.rx_errors, net->stats.tx_errors);
2594
2595 lan78xx_terminate_urbs(dev);
2596
2597 usb_kill_urb(dev->urb_intr);
2598
2599 skb_queue_purge(&dev->rxq_pause);
2600
2601 /* deferred work (task, timer, softirq) must also stop.
2602 * can't flush_scheduled_work() until we drop rtnl (later),
2603 * else workers could deadlock; so make workers a NOP.
2604 */
2605 dev->flags = 0;
2606 cancel_delayed_work_sync(&dev->wq);
2607 tasklet_kill(&dev->bh);
2608
2609 usb_autopm_put_interface(dev->intf);
2610
2611 return 0;
2612}
2613
2614static int lan78xx_linearize(struct sk_buff *skb)
2615{
2616 return skb_linearize(skb);
2617}
2618
2619static struct sk_buff *lan78xx_tx_prep(struct lan78xx_net *dev,
2620 struct sk_buff *skb, gfp_t flags)
2621{
2622 u32 tx_cmd_a, tx_cmd_b;
2623
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002624 if (skb_cow_head(skb, TX_OVERHEAD)) {
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002625 dev_kfree_skb_any(skb);
Eric Dumazetd4ca7352017-04-19 09:59:24 -07002626 return NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002627 }
2628
2629 if (lan78xx_linearize(skb) < 0)
2630 return NULL;
2631
2632 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_;
2633
2634 if (skb->ip_summed == CHECKSUM_PARTIAL)
2635 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_;
2636
2637 tx_cmd_b = 0;
2638 if (skb_is_gso(skb)) {
2639 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_);
2640
2641 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_;
2642
2643 tx_cmd_a |= TX_CMD_A_LSO_;
2644 }
2645
2646 if (skb_vlan_tag_present(skb)) {
2647 tx_cmd_a |= TX_CMD_A_IVTG_;
2648 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_;
2649 }
2650
2651 skb_push(skb, 4);
2652 cpu_to_le32s(&tx_cmd_b);
2653 memcpy(skb->data, &tx_cmd_b, 4);
2654
2655 skb_push(skb, 4);
2656 cpu_to_le32s(&tx_cmd_a);
2657 memcpy(skb->data, &tx_cmd_a, 4);
2658
2659 return skb;
2660}
2661
2662static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb,
2663 struct sk_buff_head *list, enum skb_state state)
2664{
2665 unsigned long flags;
2666 enum skb_state old_state;
2667 struct skb_data *entry = (struct skb_data *)skb->cb;
2668
2669 spin_lock_irqsave(&list->lock, flags);
2670 old_state = entry->state;
2671 entry->state = state;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002672
2673 __skb_unlink(skb, list);
2674 spin_unlock(&list->lock);
2675 spin_lock(&dev->done.lock);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002676
2677 __skb_queue_tail(&dev->done, skb);
2678 if (skb_queue_len(&dev->done) == 1)
2679 tasklet_schedule(&dev->bh);
2680 spin_unlock_irqrestore(&dev->done.lock, flags);
2681
2682 return old_state;
2683}
2684
2685static void tx_complete(struct urb *urb)
2686{
2687 struct sk_buff *skb = (struct sk_buff *)urb->context;
2688 struct skb_data *entry = (struct skb_data *)skb->cb;
2689 struct lan78xx_net *dev = entry->dev;
2690
2691 if (urb->status == 0) {
Woojung Huh74d79a22016-04-25 22:22:32 +00002692 dev->net->stats.tx_packets += entry->num_of_packet;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002693 dev->net->stats.tx_bytes += entry->length;
2694 } else {
2695 dev->net->stats.tx_errors++;
2696
2697 switch (urb->status) {
2698 case -EPIPE:
2699 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
2700 break;
2701
2702 /* software-driven interface shutdown */
2703 case -ECONNRESET:
2704 case -ESHUTDOWN:
2705 break;
2706
2707 case -EPROTO:
2708 case -ETIME:
2709 case -EILSEQ:
2710 netif_stop_queue(dev->net);
2711 break;
2712 default:
2713 netif_dbg(dev, tx_err, dev->net,
2714 "tx err %d\n", entry->urb->status);
2715 break;
2716 }
2717 }
2718
2719 usb_autopm_put_interface_async(dev->intf);
2720
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002721 defer_bh(dev, skb, &dev->txq, tx_done);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002722}
2723
2724static void lan78xx_queue_skb(struct sk_buff_head *list,
2725 struct sk_buff *newsk, enum skb_state state)
2726{
2727 struct skb_data *entry = (struct skb_data *)newsk->cb;
2728
2729 __skb_queue_tail(list, newsk);
2730 entry->state = state;
2731}
2732
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002733static netdev_tx_t
2734lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002735{
2736 struct lan78xx_net *dev = netdev_priv(net);
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002737 struct sk_buff *skb2 = NULL;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002738
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002739 if (skb) {
Woojung.Huh@microchip.com81c38e82015-08-11 15:21:41 +00002740 skb_tx_timestamp(skb);
2741 skb2 = lan78xx_tx_prep(dev, skb, GFP_ATOMIC);
2742 }
2743
2744 if (skb2) {
2745 skb_queue_tail(&dev->txq_pend, skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002746
Woojung.Huh@microchip.com4b2a4a92016-01-27 22:57:54 +00002747 /* throttle TX patch at slower than SUPER SPEED USB */
2748 if ((dev->udev->speed < USB_SPEED_SUPER) &&
2749 (skb_queue_len(&dev->txq_pend) > 10))
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002750 netif_stop_queue(net);
2751 } else {
2752 netif_dbg(dev, tx_err, dev->net,
2753 "lan78xx_tx_prep return NULL\n");
2754 dev->net->stats.tx_errors++;
2755 dev->net->stats.tx_dropped++;
2756 }
2757
2758 tasklet_schedule(&dev->bh);
2759
2760 return NETDEV_TX_OK;
2761}
2762
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002763static int
2764lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002765{
2766 int tmp;
2767 struct usb_host_interface *alt = NULL;
2768 struct usb_host_endpoint *in = NULL, *out = NULL;
2769 struct usb_host_endpoint *status = NULL;
2770
2771 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2772 unsigned ep;
2773
2774 in = NULL;
2775 out = NULL;
2776 status = NULL;
2777 alt = intf->altsetting + tmp;
2778
2779 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2780 struct usb_host_endpoint *e;
2781 int intr = 0;
2782
2783 e = alt->endpoint + ep;
2784 switch (e->desc.bmAttributes) {
2785 case USB_ENDPOINT_XFER_INT:
2786 if (!usb_endpoint_dir_in(&e->desc))
2787 continue;
2788 intr = 1;
2789 /* FALLTHROUGH */
2790 case USB_ENDPOINT_XFER_BULK:
2791 break;
2792 default:
2793 continue;
2794 }
2795 if (usb_endpoint_dir_in(&e->desc)) {
2796 if (!intr && !in)
2797 in = e;
2798 else if (intr && !status)
2799 status = e;
2800 } else {
2801 if (!out)
2802 out = e;
2803 }
2804 }
2805 if (in && out)
2806 break;
2807 }
2808 if (!alt || !in || !out)
2809 return -EINVAL;
2810
2811 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2812 in->desc.bEndpointAddress &
2813 USB_ENDPOINT_NUMBER_MASK);
2814 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2815 out->desc.bEndpointAddress &
2816 USB_ENDPOINT_NUMBER_MASK);
2817 dev->ep_intr = status;
2818
2819 return 0;
2820}
2821
2822static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2823{
2824 struct lan78xx_priv *pdata = NULL;
2825 int ret;
2826 int i;
2827
2828 ret = lan78xx_get_endpoints(dev, intf);
2829
2830 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2831
2832 pdata = (struct lan78xx_priv *)(dev->data[0]);
2833 if (!pdata) {
2834 netdev_warn(dev->net, "Unable to allocate lan78xx_priv");
2835 return -ENOMEM;
2836 }
2837
2838 pdata->dev = dev;
2839
2840 spin_lock_init(&pdata->rfe_ctl_lock);
2841 mutex_init(&pdata->dataport_mutex);
2842
2843 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write);
2844
2845 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++)
2846 pdata->vlan_table[i] = 0;
2847
2848 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write);
2849
2850 dev->net->features = 0;
2851
2852 if (DEFAULT_TX_CSUM_ENABLE)
2853 dev->net->features |= NETIF_F_HW_CSUM;
2854
2855 if (DEFAULT_RX_CSUM_ENABLE)
2856 dev->net->features |= NETIF_F_RXCSUM;
2857
2858 if (DEFAULT_TSO_CSUM_ENABLE)
2859 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG;
2860
2861 dev->net->hw_features = dev->net->features;
2862
Woojung Huhcc89c322016-11-01 20:02:00 +00002863 ret = lan78xx_setup_irq_domain(dev);
2864 if (ret < 0) {
2865 netdev_warn(dev->net,
2866 "lan78xx_setup_irq_domain() failed : %d", ret);
2867 kfree(pdata);
2868 return ret;
2869 }
2870
Nisar Sayed0573f942017-08-01 10:24:33 +00002871 dev->net->hard_header_len += TX_OVERHEAD;
2872 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
2873
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002874 /* Init all registers */
2875 ret = lan78xx_reset(dev);
2876
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002877 ret = lan78xx_mdio_init(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002878
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002879 dev->net->flags |= IFF_MULTICAST;
2880
2881 pdata->wol = WAKE_MAGIC;
2882
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00002883 return ret;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002884}
2885
2886static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf)
2887{
2888 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
2889
Woojung Huhcc89c322016-11-01 20:02:00 +00002890 lan78xx_remove_irq_domain(dev);
2891
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00002892 lan78xx_remove_mdio(dev);
2893
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002894 if (pdata) {
2895 netif_dbg(dev, ifdown, dev->net, "free pdata");
2896 kfree(pdata);
2897 pdata = NULL;
2898 dev->data[0] = 0;
2899 }
2900}
2901
2902static void lan78xx_rx_csum_offload(struct lan78xx_net *dev,
2903 struct sk_buff *skb,
2904 u32 rx_cmd_a, u32 rx_cmd_b)
2905{
2906 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2907 unlikely(rx_cmd_a & RX_CMD_A_ICSM_)) {
2908 skb->ip_summed = CHECKSUM_NONE;
2909 } else {
2910 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_));
2911 skb->ip_summed = CHECKSUM_COMPLETE;
2912 }
2913}
2914
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08002915static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002916{
2917 int status;
2918
2919 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) {
2920 skb_queue_tail(&dev->rxq_pause, skb);
2921 return;
2922 }
2923
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002924 dev->net->stats.rx_packets++;
2925 dev->net->stats.rx_bytes += skb->len;
2926
Woojung Huh74d79a22016-04-25 22:22:32 +00002927 skb->protocol = eth_type_trans(skb, dev->net);
2928
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00002929 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
2930 skb->len + sizeof(struct ethhdr), skb->protocol);
2931 memset(skb->cb, 0, sizeof(struct skb_data));
2932
2933 if (skb_defer_rx_timestamp(skb))
2934 return;
2935
2936 status = netif_rx(skb);
2937 if (status != NET_RX_SUCCESS)
2938 netif_dbg(dev, rx_err, dev->net,
2939 "netif_rx status %d\n", status);
2940}
2941
2942static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb)
2943{
2944 if (skb->len < dev->net->hard_header_len)
2945 return 0;
2946
2947 while (skb->len > 0) {
2948 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2949 u16 rx_cmd_c;
2950 struct sk_buff *skb2;
2951 unsigned char *packet;
2952
2953 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
2954 le32_to_cpus(&rx_cmd_a);
2955 skb_pull(skb, sizeof(rx_cmd_a));
2956
2957 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
2958 le32_to_cpus(&rx_cmd_b);
2959 skb_pull(skb, sizeof(rx_cmd_b));
2960
2961 memcpy(&rx_cmd_c, skb->data, sizeof(rx_cmd_c));
2962 le16_to_cpus(&rx_cmd_c);
2963 skb_pull(skb, sizeof(rx_cmd_c));
2964
2965 packet = skb->data;
2966
2967 /* get the packet length */
2968 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_);
2969 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2970
2971 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) {
2972 netif_dbg(dev, rx_err, dev->net,
2973 "Error rx_cmd_a=0x%08x", rx_cmd_a);
2974 } else {
2975 /* last frame in this batch */
2976 if (skb->len == size) {
2977 lan78xx_rx_csum_offload(dev, skb,
2978 rx_cmd_a, rx_cmd_b);
2979
2980 skb_trim(skb, skb->len - 4); /* remove fcs */
2981 skb->truesize = size + sizeof(struct sk_buff);
2982
2983 return 1;
2984 }
2985
2986 skb2 = skb_clone(skb, GFP_ATOMIC);
2987 if (unlikely(!skb2)) {
2988 netdev_warn(dev->net, "Error allocating skb");
2989 return 0;
2990 }
2991
2992 skb2->len = size;
2993 skb2->data = packet;
2994 skb_set_tail_pointer(skb2, size);
2995
2996 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b);
2997
2998 skb_trim(skb2, skb2->len - 4); /* remove fcs */
2999 skb2->truesize = size + sizeof(struct sk_buff);
3000
3001 lan78xx_skb_return(dev, skb2);
3002 }
3003
3004 skb_pull(skb, size);
3005
3006 /* padding bytes before the next frame starts */
3007 if (skb->len)
3008 skb_pull(skb, align_count);
3009 }
3010
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003011 return 1;
3012}
3013
3014static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb)
3015{
3016 if (!lan78xx_rx(dev, skb)) {
3017 dev->net->stats.rx_errors++;
3018 goto done;
3019 }
3020
3021 if (skb->len) {
3022 lan78xx_skb_return(dev, skb);
3023 return;
3024 }
3025
3026 netif_dbg(dev, rx_err, dev->net, "drop\n");
3027 dev->net->stats.rx_errors++;
3028done:
3029 skb_queue_tail(&dev->done, skb);
3030}
3031
3032static void rx_complete(struct urb *urb);
3033
3034static int rx_submit(struct lan78xx_net *dev, struct urb *urb, gfp_t flags)
3035{
3036 struct sk_buff *skb;
3037 struct skb_data *entry;
3038 unsigned long lockflags;
3039 size_t size = dev->rx_urb_size;
3040 int ret = 0;
3041
3042 skb = netdev_alloc_skb_ip_align(dev->net, size);
3043 if (!skb) {
3044 usb_free_urb(urb);
3045 return -ENOMEM;
3046 }
3047
3048 entry = (struct skb_data *)skb->cb;
3049 entry->urb = urb;
3050 entry->dev = dev;
3051 entry->length = 0;
3052
3053 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in,
3054 skb->data, size, rx_complete, skb);
3055
3056 spin_lock_irqsave(&dev->rxq.lock, lockflags);
3057
3058 if (netif_device_present(dev->net) &&
3059 netif_running(dev->net) &&
3060 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3061 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3062 ret = usb_submit_urb(urb, GFP_ATOMIC);
3063 switch (ret) {
3064 case 0:
3065 lan78xx_queue_skb(&dev->rxq, skb, rx_start);
3066 break;
3067 case -EPIPE:
3068 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3069 break;
3070 case -ENODEV:
3071 netif_dbg(dev, ifdown, dev->net, "device gone\n");
3072 netif_device_detach(dev->net);
3073 break;
3074 case -EHOSTUNREACH:
3075 ret = -ENOLINK;
3076 break;
3077 default:
3078 netif_dbg(dev, rx_err, dev->net,
3079 "rx submit, %d\n", ret);
3080 tasklet_schedule(&dev->bh);
3081 }
3082 } else {
3083 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n");
3084 ret = -ENOLINK;
3085 }
3086 spin_unlock_irqrestore(&dev->rxq.lock, lockflags);
3087 if (ret) {
3088 dev_kfree_skb_any(skb);
3089 usb_free_urb(urb);
3090 }
3091 return ret;
3092}
3093
3094static void rx_complete(struct urb *urb)
3095{
3096 struct sk_buff *skb = (struct sk_buff *)urb->context;
3097 struct skb_data *entry = (struct skb_data *)skb->cb;
3098 struct lan78xx_net *dev = entry->dev;
3099 int urb_status = urb->status;
3100 enum skb_state state;
3101
3102 skb_put(skb, urb->actual_length);
3103 state = rx_done;
3104 entry->urb = NULL;
3105
3106 switch (urb_status) {
3107 case 0:
3108 if (skb->len < dev->net->hard_header_len) {
3109 state = rx_cleanup;
3110 dev->net->stats.rx_errors++;
3111 dev->net->stats.rx_length_errors++;
3112 netif_dbg(dev, rx_err, dev->net,
3113 "rx length %d\n", skb->len);
3114 }
3115 usb_mark_last_busy(dev->udev);
3116 break;
3117 case -EPIPE:
3118 dev->net->stats.rx_errors++;
3119 lan78xx_defer_kevent(dev, EVENT_RX_HALT);
3120 /* FALLTHROUGH */
3121 case -ECONNRESET: /* async unlink */
3122 case -ESHUTDOWN: /* hardware gone */
3123 netif_dbg(dev, ifdown, dev->net,
3124 "rx shutdown, code %d\n", urb_status);
3125 state = rx_cleanup;
3126 entry->urb = urb;
3127 urb = NULL;
3128 break;
3129 case -EPROTO:
3130 case -ETIME:
3131 case -EILSEQ:
3132 dev->net->stats.rx_errors++;
3133 state = rx_cleanup;
3134 entry->urb = urb;
3135 urb = NULL;
3136 break;
3137
3138 /* data overrun ... flush fifo? */
3139 case -EOVERFLOW:
3140 dev->net->stats.rx_over_errors++;
3141 /* FALLTHROUGH */
3142
3143 default:
3144 state = rx_cleanup;
3145 dev->net->stats.rx_errors++;
3146 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status);
3147 break;
3148 }
3149
3150 state = defer_bh(dev, skb, &dev->rxq, state);
3151
3152 if (urb) {
3153 if (netif_running(dev->net) &&
3154 !test_bit(EVENT_RX_HALT, &dev->flags) &&
3155 state != unlink_start) {
3156 rx_submit(dev, urb, GFP_ATOMIC);
3157 return;
3158 }
3159 usb_free_urb(urb);
3160 }
3161 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n");
3162}
3163
3164static void lan78xx_tx_bh(struct lan78xx_net *dev)
3165{
3166 int length;
3167 struct urb *urb = NULL;
3168 struct skb_data *entry;
3169 unsigned long flags;
3170 struct sk_buff_head *tqp = &dev->txq_pend;
3171 struct sk_buff *skb, *skb2;
3172 int ret;
3173 int count, pos;
3174 int skb_totallen, pkt_cnt;
3175
3176 skb_totallen = 0;
3177 pkt_cnt = 0;
Woojung Huh74d79a22016-04-25 22:22:32 +00003178 count = 0;
3179 length = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003180 for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
3181 if (skb_is_gso(skb)) {
3182 if (pkt_cnt) {
3183 /* handle previous packets first */
3184 break;
3185 }
Woojung Huh74d79a22016-04-25 22:22:32 +00003186 count = 1;
3187 length = skb->len - TX_OVERHEAD;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003188 skb2 = skb_dequeue(tqp);
3189 goto gso_skb;
3190 }
3191
3192 if ((skb_totallen + skb->len) > MAX_SINGLE_PACKET_SIZE)
3193 break;
3194 skb_totallen = skb->len + roundup(skb_totallen, sizeof(u32));
3195 pkt_cnt++;
3196 }
3197
3198 /* copy to a single skb */
3199 skb = alloc_skb(skb_totallen, GFP_ATOMIC);
3200 if (!skb)
3201 goto drop;
3202
3203 skb_put(skb, skb_totallen);
3204
3205 for (count = pos = 0; count < pkt_cnt; count++) {
3206 skb2 = skb_dequeue(tqp);
3207 if (skb2) {
Woojung Huh74d79a22016-04-25 22:22:32 +00003208 length += (skb2->len - TX_OVERHEAD);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003209 memcpy(skb->data + pos, skb2->data, skb2->len);
3210 pos += roundup(skb2->len, sizeof(u32));
3211 dev_kfree_skb(skb2);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003212 }
3213 }
3214
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003215gso_skb:
3216 urb = usb_alloc_urb(0, GFP_ATOMIC);
Wolfram Sangd7c4e842016-08-11 23:05:27 +02003217 if (!urb)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003218 goto drop;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003219
3220 entry = (struct skb_data *)skb->cb;
3221 entry->urb = urb;
3222 entry->dev = dev;
3223 entry->length = length;
Woojung Huh74d79a22016-04-25 22:22:32 +00003224 entry->num_of_packet = count;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003225
3226 spin_lock_irqsave(&dev->txq.lock, flags);
3227 ret = usb_autopm_get_interface_async(dev->intf);
3228 if (ret < 0) {
3229 spin_unlock_irqrestore(&dev->txq.lock, flags);
3230 goto drop;
3231 }
3232
3233 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_out,
3234 skb->data, skb->len, tx_complete, skb);
3235
3236 if (length % dev->maxpacket == 0) {
3237 /* send USB_ZERO_PACKET */
3238 urb->transfer_flags |= URB_ZERO_PACKET;
3239 }
3240
3241#ifdef CONFIG_PM
3242 /* if this triggers the device is still a sleep */
3243 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
3244 /* transmission will be done in resume */
3245 usb_anchor_urb(urb, &dev->deferred);
3246 /* no use to process more packets */
3247 netif_stop_queue(dev->net);
3248 usb_put_urb(urb);
3249 spin_unlock_irqrestore(&dev->txq.lock, flags);
3250 netdev_dbg(dev->net, "Delaying transmission for resumption\n");
3251 return;
3252 }
3253#endif
3254
3255 ret = usb_submit_urb(urb, GFP_ATOMIC);
3256 switch (ret) {
3257 case 0:
Florian Westphal860e9532016-05-03 16:33:13 +02003258 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003259 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3260 if (skb_queue_len(&dev->txq) >= dev->tx_qlen)
3261 netif_stop_queue(dev->net);
3262 break;
3263 case -EPIPE:
3264 netif_stop_queue(dev->net);
3265 lan78xx_defer_kevent(dev, EVENT_TX_HALT);
3266 usb_autopm_put_interface_async(dev->intf);
3267 break;
3268 default:
3269 usb_autopm_put_interface_async(dev->intf);
3270 netif_dbg(dev, tx_err, dev->net,
3271 "tx: submit urb err %d\n", ret);
3272 break;
3273 }
3274
3275 spin_unlock_irqrestore(&dev->txq.lock, flags);
3276
3277 if (ret) {
3278 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", ret);
3279drop:
3280 dev->net->stats.tx_dropped++;
3281 if (skb)
3282 dev_kfree_skb_any(skb);
3283 usb_free_urb(urb);
3284 } else
3285 netif_dbg(dev, tx_queued, dev->net,
3286 "> tx, len %d, type 0x%x\n", length, skb->protocol);
3287}
3288
3289static void lan78xx_rx_bh(struct lan78xx_net *dev)
3290{
3291 struct urb *urb;
3292 int i;
3293
3294 if (skb_queue_len(&dev->rxq) < dev->rx_qlen) {
3295 for (i = 0; i < 10; i++) {
3296 if (skb_queue_len(&dev->rxq) >= dev->rx_qlen)
3297 break;
3298 urb = usb_alloc_urb(0, GFP_ATOMIC);
3299 if (urb)
3300 if (rx_submit(dev, urb, GFP_ATOMIC) == -ENOLINK)
3301 return;
3302 }
3303
3304 if (skb_queue_len(&dev->rxq) < dev->rx_qlen)
3305 tasklet_schedule(&dev->bh);
3306 }
3307 if (skb_queue_len(&dev->txq) < dev->tx_qlen)
3308 netif_wake_queue(dev->net);
3309}
3310
3311static void lan78xx_bh(unsigned long param)
3312{
3313 struct lan78xx_net *dev = (struct lan78xx_net *)param;
3314 struct sk_buff *skb;
3315 struct skb_data *entry;
3316
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003317 while ((skb = skb_dequeue(&dev->done))) {
3318 entry = (struct skb_data *)(skb->cb);
3319 switch (entry->state) {
3320 case rx_done:
3321 entry->state = rx_cleanup;
3322 rx_process(dev, skb);
3323 continue;
3324 case tx_done:
3325 usb_free_urb(entry->urb);
3326 dev_kfree_skb(skb);
3327 continue;
3328 case rx_cleanup:
3329 usb_free_urb(entry->urb);
3330 dev_kfree_skb(skb);
3331 continue;
3332 default:
3333 netdev_dbg(dev->net, "skb state %d\n", entry->state);
3334 return;
3335 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003336 }
3337
3338 if (netif_device_present(dev->net) && netif_running(dev->net)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003339 /* reset update timer delta */
3340 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) {
3341 dev->delta = 1;
3342 mod_timer(&dev->stat_monitor,
3343 jiffies + STAT_UPDATE_TIMER);
3344 }
3345
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003346 if (!skb_queue_empty(&dev->txq_pend))
3347 lan78xx_tx_bh(dev);
3348
3349 if (!timer_pending(&dev->delay) &&
3350 !test_bit(EVENT_RX_HALT, &dev->flags))
3351 lan78xx_rx_bh(dev);
3352 }
3353}
3354
3355static void lan78xx_delayedwork(struct work_struct *work)
3356{
3357 int status;
3358 struct lan78xx_net *dev;
3359
3360 dev = container_of(work, struct lan78xx_net, wq.work);
3361
3362 if (test_bit(EVENT_TX_HALT, &dev->flags)) {
3363 unlink_urbs(dev, &dev->txq);
3364 status = usb_autopm_get_interface(dev->intf);
3365 if (status < 0)
3366 goto fail_pipe;
3367 status = usb_clear_halt(dev->udev, dev->pipe_out);
3368 usb_autopm_put_interface(dev->intf);
3369 if (status < 0 &&
3370 status != -EPIPE &&
3371 status != -ESHUTDOWN) {
3372 if (netif_msg_tx_err(dev))
3373fail_pipe:
3374 netdev_err(dev->net,
3375 "can't clear tx halt, status %d\n",
3376 status);
3377 } else {
3378 clear_bit(EVENT_TX_HALT, &dev->flags);
3379 if (status != -ESHUTDOWN)
3380 netif_wake_queue(dev->net);
3381 }
3382 }
3383 if (test_bit(EVENT_RX_HALT, &dev->flags)) {
3384 unlink_urbs(dev, &dev->rxq);
3385 status = usb_autopm_get_interface(dev->intf);
3386 if (status < 0)
3387 goto fail_halt;
3388 status = usb_clear_halt(dev->udev, dev->pipe_in);
3389 usb_autopm_put_interface(dev->intf);
3390 if (status < 0 &&
3391 status != -EPIPE &&
3392 status != -ESHUTDOWN) {
3393 if (netif_msg_rx_err(dev))
3394fail_halt:
3395 netdev_err(dev->net,
3396 "can't clear rx halt, status %d\n",
3397 status);
3398 } else {
3399 clear_bit(EVENT_RX_HALT, &dev->flags);
3400 tasklet_schedule(&dev->bh);
3401 }
3402 }
3403
3404 if (test_bit(EVENT_LINK_RESET, &dev->flags)) {
3405 int ret = 0;
3406
3407 clear_bit(EVENT_LINK_RESET, &dev->flags);
3408 status = usb_autopm_get_interface(dev->intf);
3409 if (status < 0)
3410 goto skip_reset;
3411 if (lan78xx_link_reset(dev) < 0) {
3412 usb_autopm_put_interface(dev->intf);
3413skip_reset:
3414 netdev_info(dev->net, "link reset failed (%d)\n",
3415 ret);
3416 } else {
3417 usb_autopm_put_interface(dev->intf);
3418 }
3419 }
Woojung Huh20ff5562016-03-16 22:10:40 +00003420
3421 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) {
3422 lan78xx_update_stats(dev);
3423
3424 clear_bit(EVENT_STAT_UPDATE, &dev->flags);
3425
3426 mod_timer(&dev->stat_monitor,
3427 jiffies + (STAT_UPDATE_TIMER * dev->delta));
3428
3429 dev->delta = min((dev->delta * 2), 50);
3430 }
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003431}
3432
3433static void intr_complete(struct urb *urb)
3434{
3435 struct lan78xx_net *dev = urb->context;
3436 int status = urb->status;
3437
3438 switch (status) {
3439 /* success */
3440 case 0:
3441 lan78xx_status(dev, urb);
3442 break;
3443
3444 /* software-driven interface shutdown */
3445 case -ENOENT: /* urb killed */
3446 case -ESHUTDOWN: /* hardware gone */
3447 netif_dbg(dev, ifdown, dev->net,
3448 "intr shutdown, code %d\n", status);
3449 return;
3450
3451 /* NOTE: not throttling like RX/TX, since this endpoint
3452 * already polls infrequently
3453 */
3454 default:
3455 netdev_dbg(dev->net, "intr status %d\n", status);
3456 break;
3457 }
3458
3459 if (!netif_running(dev->net))
3460 return;
3461
3462 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length);
3463 status = usb_submit_urb(urb, GFP_ATOMIC);
3464 if (status != 0)
3465 netif_err(dev, timer, dev->net,
3466 "intr resubmit --> %d\n", status);
3467}
3468
3469static void lan78xx_disconnect(struct usb_interface *intf)
3470{
3471 struct lan78xx_net *dev;
3472 struct usb_device *udev;
3473 struct net_device *net;
3474
3475 dev = usb_get_intfdata(intf);
3476 usb_set_intfdata(intf, NULL);
3477 if (!dev)
3478 return;
3479
3480 udev = interface_to_usbdev(intf);
3481
3482 net = dev->net;
3483 unregister_netdev(net);
3484
3485 cancel_delayed_work_sync(&dev->wq);
3486
3487 usb_scuttle_anchored_urbs(&dev->deferred);
3488
3489 lan78xx_unbind(dev, intf);
3490
3491 usb_kill_urb(dev->urb_intr);
3492 usb_free_urb(dev->urb_intr);
3493
3494 free_netdev(net);
3495 usb_put_dev(udev);
3496}
3497
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003498static void lan78xx_tx_timeout(struct net_device *net)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003499{
3500 struct lan78xx_net *dev = netdev_priv(net);
3501
3502 unlink_urbs(dev, &dev->txq);
3503 tasklet_schedule(&dev->bh);
3504}
3505
3506static const struct net_device_ops lan78xx_netdev_ops = {
3507 .ndo_open = lan78xx_open,
3508 .ndo_stop = lan78xx_stop,
3509 .ndo_start_xmit = lan78xx_start_xmit,
3510 .ndo_tx_timeout = lan78xx_tx_timeout,
3511 .ndo_change_mtu = lan78xx_change_mtu,
3512 .ndo_set_mac_address = lan78xx_set_mac_addr,
3513 .ndo_validate_addr = eth_validate_addr,
3514 .ndo_do_ioctl = lan78xx_ioctl,
3515 .ndo_set_rx_mode = lan78xx_set_multicast,
3516 .ndo_set_features = lan78xx_set_features,
3517 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid,
3518 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid,
3519};
3520
Woojung Huh20ff5562016-03-16 22:10:40 +00003521static void lan78xx_stat_monitor(unsigned long param)
3522{
3523 struct lan78xx_net *dev;
3524
3525 dev = (struct lan78xx_net *)param;
3526
3527 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE);
3528}
3529
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003530static int lan78xx_probe(struct usb_interface *intf,
3531 const struct usb_device_id *id)
3532{
3533 struct lan78xx_net *dev;
3534 struct net_device *netdev;
3535 struct usb_device *udev;
3536 int ret;
3537 unsigned maxp;
3538 unsigned period;
3539 u8 *buf = NULL;
3540
3541 udev = interface_to_usbdev(intf);
3542 udev = usb_get_dev(udev);
3543
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003544 netdev = alloc_etherdev(sizeof(struct lan78xx_net));
3545 if (!netdev) {
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003546 dev_err(&intf->dev, "Error: OOM\n");
3547 ret = -ENOMEM;
3548 goto out1;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003549 }
3550
3551 /* netdev_printk() needs this */
3552 SET_NETDEV_DEV(netdev, &intf->dev);
3553
3554 dev = netdev_priv(netdev);
3555 dev->udev = udev;
3556 dev->intf = intf;
3557 dev->net = netdev;
3558 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV
3559 | NETIF_MSG_PROBE | NETIF_MSG_LINK);
3560
3561 skb_queue_head_init(&dev->rxq);
3562 skb_queue_head_init(&dev->txq);
3563 skb_queue_head_init(&dev->done);
3564 skb_queue_head_init(&dev->rxq_pause);
3565 skb_queue_head_init(&dev->txq_pend);
3566 mutex_init(&dev->phy_mutex);
3567
3568 tasklet_init(&dev->bh, lan78xx_bh, (unsigned long)dev);
3569 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork);
3570 init_usb_anchor(&dev->deferred);
3571
3572 netdev->netdev_ops = &lan78xx_netdev_ops;
3573 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES;
3574 netdev->ethtool_ops = &lan78xx_ethtool_ops;
3575
Woojung Huh20ff5562016-03-16 22:10:40 +00003576 dev->stat_monitor.function = lan78xx_stat_monitor;
3577 dev->stat_monitor.data = (unsigned long)dev;
3578 dev->delta = 1;
3579 init_timer(&dev->stat_monitor);
3580
3581 mutex_init(&dev->stats.access_lock);
3582
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003583 ret = lan78xx_bind(dev, intf);
3584 if (ret < 0)
3585 goto out2;
3586 strcpy(netdev->name, "eth%d");
3587
3588 if (netdev->mtu > (dev->hard_mtu - netdev->hard_header_len))
3589 netdev->mtu = dev->hard_mtu - netdev->hard_header_len;
3590
Jarod Wilsonf77f0ae2016-10-20 13:55:17 -04003591 /* MTU range: 68 - 9000 */
3592 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3593
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003594 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;
3595 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3596 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3597
3598 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3599 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3600
3601 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3602 dev->ep_intr->desc.bEndpointAddress &
3603 USB_ENDPOINT_NUMBER_MASK);
3604 period = dev->ep_intr->desc.bInterval;
3605
3606 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3607 buf = kmalloc(maxp, GFP_KERNEL);
3608 if (buf) {
3609 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL);
3610 if (!dev->urb_intr) {
Pan Bian51920832016-12-03 19:24:48 +08003611 ret = -ENOMEM;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003612 kfree(buf);
3613 goto out3;
3614 } else {
3615 usb_fill_int_urb(dev->urb_intr, dev->udev,
3616 dev->pipe_intr, buf, maxp,
3617 intr_complete, dev, period);
3618 }
3619 }
3620
3621 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out, 1);
3622
3623 /* driver requires remote-wakeup capability during autosuspend. */
3624 intf->needs_remote_wakeup = 1;
3625
3626 ret = register_netdev(netdev);
3627 if (ret != 0) {
3628 netif_err(dev, probe, netdev, "couldn't register the device\n");
Nisar Sayedfb52c3b2017-08-01 10:24:17 +00003629 goto out3;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003630 }
3631
3632 usb_set_intfdata(intf, dev);
3633
3634 ret = device_set_wakeup_enable(&udev->dev, true);
3635
3636 /* Default delay of 2sec has more overhead than advantage.
3637 * Set to 10sec as default.
3638 */
3639 pm_runtime_set_autosuspend_delay(&udev->dev,
3640 DEFAULT_AUTOSUSPEND_DELAY);
3641
3642 return 0;
3643
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003644out3:
3645 lan78xx_unbind(dev, intf);
3646out2:
3647 free_netdev(netdev);
3648out1:
3649 usb_put_dev(udev);
3650
3651 return ret;
3652}
3653
3654static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len)
3655{
3656 const u16 crc16poly = 0x8005;
3657 int i;
3658 u16 bit, crc, msb;
3659 u8 data;
3660
3661 crc = 0xFFFF;
3662 for (i = 0; i < len; i++) {
3663 data = *buf++;
3664 for (bit = 0; bit < 8; bit++) {
3665 msb = crc >> 15;
3666 crc <<= 1;
3667
3668 if (msb ^ (u16)(data & 1)) {
3669 crc ^= crc16poly;
3670 crc |= (u16)0x0001U;
3671 }
3672 data >>= 1;
3673 }
3674 }
3675
3676 return crc;
3677}
3678
3679static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol)
3680{
3681 u32 buf;
3682 int ret;
3683 int mask_index;
3684 u16 crc;
3685 u32 temp_wucsr;
3686 u32 temp_pmt_ctl;
3687 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3688 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3689 const u8 arp_type[2] = { 0x08, 0x06 };
3690
3691 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3692 buf &= ~MAC_TX_TXEN_;
3693 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3694 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3695 buf &= ~MAC_RX_RXEN_;
3696 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3697
3698 ret = lan78xx_write_reg(dev, WUCSR, 0);
3699 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3700 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3701
3702 temp_wucsr = 0;
3703
3704 temp_pmt_ctl = 0;
3705 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl);
3706 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_;
3707 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_;
3708
3709 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++)
3710 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0);
3711
3712 mask_index = 0;
3713 if (wol & WAKE_PHY) {
3714 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_;
3715
3716 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3717 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3718 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3719 }
3720 if (wol & WAKE_MAGIC) {
3721 temp_wucsr |= WUCSR_MPEN_;
3722
3723 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3724 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3725 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_;
3726 }
3727 if (wol & WAKE_BCAST) {
3728 temp_wucsr |= WUCSR_BCST_EN_;
3729
3730 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3731 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3732 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3733 }
3734 if (wol & WAKE_MCAST) {
3735 temp_wucsr |= WUCSR_WAKE_EN_;
3736
3737 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */
3738 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3);
3739 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3740 WUF_CFGX_EN_ |
3741 WUF_CFGX_TYPE_MCAST_ |
3742 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3743 (crc & WUF_CFGX_CRC16_MASK_));
3744
3745 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7);
3746 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3747 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3748 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3749 mask_index++;
3750
3751 /* for IPv6 Multicast */
3752 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2);
3753 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3754 WUF_CFGX_EN_ |
3755 WUF_CFGX_TYPE_MCAST_ |
3756 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3757 (crc & WUF_CFGX_CRC16_MASK_));
3758
3759 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3);
3760 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3761 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3762 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3763 mask_index++;
3764
3765 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3766 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3767 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3768 }
3769 if (wol & WAKE_UCAST) {
3770 temp_wucsr |= WUCSR_PFDA_EN_;
3771
3772 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3773 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3774 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3775 }
3776 if (wol & WAKE_ARP) {
3777 temp_wucsr |= WUCSR_WAKE_EN_;
3778
3779 /* set WUF_CFG & WUF_MASK
3780 * for packettype (offset 12,13) = ARP (0x0806)
3781 */
3782 crc = lan78xx_wakeframe_crc16(arp_type, 2);
3783 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index),
3784 WUF_CFGX_EN_ |
3785 WUF_CFGX_TYPE_ALL_ |
3786 (0 << WUF_CFGX_OFFSET_SHIFT_) |
3787 (crc & WUF_CFGX_CRC16_MASK_));
3788
3789 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000);
3790 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0);
3791 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0);
3792 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0);
3793 mask_index++;
3794
3795 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3796 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3797 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3798 }
3799
3800 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr);
3801
3802 /* when multiple WOL bits are set */
3803 if (hweight_long((unsigned long)wol) > 1) {
3804 temp_pmt_ctl |= PMT_CTL_WOL_EN_;
3805 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_;
3806 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_;
3807 }
3808 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl);
3809
3810 /* clear WUPS */
3811 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3812 buf |= PMT_CTL_WUPS_MASK_;
3813 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3814
3815 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3816 buf |= MAC_RX_RXEN_;
3817 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3818
3819 return 0;
3820}
3821
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003822static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003823{
3824 struct lan78xx_net *dev = usb_get_intfdata(intf);
3825 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]);
3826 u32 buf;
3827 int ret;
3828 int event;
3829
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003830 event = message.event;
3831
3832 if (!dev->suspend_count++) {
3833 spin_lock_irq(&dev->txq.lock);
3834 /* don't autosuspend while transmitting */
3835 if ((skb_queue_len(&dev->txq) ||
3836 skb_queue_len(&dev->txq_pend)) &&
3837 PMSG_IS_AUTO(message)) {
3838 spin_unlock_irq(&dev->txq.lock);
3839 ret = -EBUSY;
3840 goto out;
3841 } else {
3842 set_bit(EVENT_DEV_ASLEEP, &dev->flags);
3843 spin_unlock_irq(&dev->txq.lock);
3844 }
3845
3846 /* stop TX & RX */
3847 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3848 buf &= ~MAC_TX_TXEN_;
3849 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3850 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3851 buf &= ~MAC_RX_RXEN_;
3852 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3853
3854 /* empty out the rx and queues */
3855 netif_device_detach(dev->net);
3856 lan78xx_terminate_urbs(dev);
3857 usb_kill_urb(dev->urb_intr);
3858
3859 /* reattach */
3860 netif_device_attach(dev->net);
3861 }
3862
3863 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) {
Woojung Huh20ff5562016-03-16 22:10:40 +00003864 del_timer(&dev->stat_monitor);
3865
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003866 if (PMSG_IS_AUTO(message)) {
3867 /* auto suspend (selective suspend) */
3868 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3869 buf &= ~MAC_TX_TXEN_;
3870 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3871 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3872 buf &= ~MAC_RX_RXEN_;
3873 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3874
3875 ret = lan78xx_write_reg(dev, WUCSR, 0);
3876 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3877 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3878
3879 /* set goodframe wakeup */
3880 ret = lan78xx_read_reg(dev, WUCSR, &buf);
3881
3882 buf |= WUCSR_RFE_WAKE_EN_;
3883 buf |= WUCSR_STORE_WAKE_;
3884
3885 ret = lan78xx_write_reg(dev, WUCSR, buf);
3886
3887 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3888
3889 buf &= ~PMT_CTL_RES_CLR_WKP_EN_;
3890 buf |= PMT_CTL_RES_CLR_WKP_STS_;
3891
3892 buf |= PMT_CTL_PHY_WAKE_EN_;
3893 buf |= PMT_CTL_WOL_EN_;
3894 buf &= ~PMT_CTL_SUS_MODE_MASK_;
3895 buf |= PMT_CTL_SUS_MODE_3_;
3896
3897 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3898
3899 ret = lan78xx_read_reg(dev, PMT_CTL, &buf);
3900
3901 buf |= PMT_CTL_WUPS_MASK_;
3902
3903 ret = lan78xx_write_reg(dev, PMT_CTL, buf);
3904
3905 ret = lan78xx_read_reg(dev, MAC_RX, &buf);
3906 buf |= MAC_RX_RXEN_;
3907 ret = lan78xx_write_reg(dev, MAC_RX, buf);
3908 } else {
3909 lan78xx_set_suspend(dev, pdata->wol);
3910 }
3911 }
3912
Woojung.Huh@microchip.com49d28b562015-09-25 21:13:48 +00003913 ret = 0;
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003914out:
3915 return ret;
3916}
3917
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003918static int lan78xx_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003919{
3920 struct lan78xx_net *dev = usb_get_intfdata(intf);
3921 struct sk_buff *skb;
3922 struct urb *res;
3923 int ret;
3924 u32 buf;
3925
Woojung Huh20ff5562016-03-16 22:10:40 +00003926 if (!timer_pending(&dev->stat_monitor)) {
3927 dev->delta = 1;
3928 mod_timer(&dev->stat_monitor,
3929 jiffies + STAT_UPDATE_TIMER);
3930 }
3931
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003932 if (!--dev->suspend_count) {
3933 /* resume interrupt URBs */
3934 if (dev->urb_intr && test_bit(EVENT_DEV_OPEN, &dev->flags))
3935 usb_submit_urb(dev->urb_intr, GFP_NOIO);
3936
3937 spin_lock_irq(&dev->txq.lock);
3938 while ((res = usb_get_from_anchor(&dev->deferred))) {
3939 skb = (struct sk_buff *)res->context;
3940 ret = usb_submit_urb(res, GFP_ATOMIC);
3941 if (ret < 0) {
3942 dev_kfree_skb_any(skb);
3943 usb_free_urb(res);
3944 usb_autopm_put_interface_async(dev->intf);
3945 } else {
Florian Westphal860e9532016-05-03 16:33:13 +02003946 netif_trans_update(dev->net);
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003947 lan78xx_queue_skb(&dev->txq, skb, tx_start);
3948 }
3949 }
3950
3951 clear_bit(EVENT_DEV_ASLEEP, &dev->flags);
3952 spin_unlock_irq(&dev->txq.lock);
3953
3954 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) {
3955 if (!(skb_queue_len(&dev->txq) >= dev->tx_qlen))
3956 netif_start_queue(dev->net);
3957 tasklet_schedule(&dev->bh);
3958 }
3959 }
3960
3961 ret = lan78xx_write_reg(dev, WUCSR2, 0);
3962 ret = lan78xx_write_reg(dev, WUCSR, 0);
3963 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL);
3964
3965 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ |
3966 WUCSR2_ARP_RCD_ |
3967 WUCSR2_IPV6_TCPSYN_RCD_ |
3968 WUCSR2_IPV4_TCPSYN_RCD_);
3969
3970 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ |
3971 WUCSR_EEE_RX_WAKE_ |
3972 WUCSR_PFDA_FR_ |
3973 WUCSR_RFE_WAKE_FR_ |
3974 WUCSR_WUFR_ |
3975 WUCSR_MPR_ |
3976 WUCSR_BCST_FR_);
3977
3978 ret = lan78xx_read_reg(dev, MAC_TX, &buf);
3979 buf |= MAC_TX_TXEN_;
3980 ret = lan78xx_write_reg(dev, MAC_TX, buf);
3981
3982 return 0;
3983}
3984
Baoyou Xiee0c79ff2016-09-06 16:19:02 +08003985static int lan78xx_reset_resume(struct usb_interface *intf)
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003986{
3987 struct lan78xx_net *dev = usb_get_intfdata(intf);
3988
3989 lan78xx_reset(dev);
Woojung.Huh@microchip.comce85e132015-09-16 23:40:54 +00003990
3991 lan78xx_phy_init(dev);
3992
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00003993 return lan78xx_resume(intf);
3994}
3995
3996static const struct usb_device_id products[] = {
3997 {
3998 /* LAN7800 USB Gigabit Ethernet Device */
3999 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID),
4000 },
4001 {
4002 /* LAN7850 USB Gigabit Ethernet Device */
4003 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID),
4004 },
Woojung Huh02dc1f32016-12-07 20:26:25 +00004005 {
4006 /* LAN7801 USB Gigabit Ethernet Device */
4007 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID),
4008 },
Woojung.Huh@microchip.com55d7de92015-07-30 19:45:21 +00004009 {},
4010};
4011MODULE_DEVICE_TABLE(usb, products);
4012
4013static struct usb_driver lan78xx_driver = {
4014 .name = DRIVER_NAME,
4015 .id_table = products,
4016 .probe = lan78xx_probe,
4017 .disconnect = lan78xx_disconnect,
4018 .suspend = lan78xx_suspend,
4019 .resume = lan78xx_resume,
4020 .reset_resume = lan78xx_reset_resume,
4021 .supports_autosuspend = 1,
4022 .disable_hub_initiated_lpm = 1,
4023};
4024
4025module_usb_driver(lan78xx_driver);
4026
4027MODULE_AUTHOR(DRIVER_AUTHOR);
4028MODULE_DESCRIPTION(DRIVER_DESC);
4029MODULE_LICENSE("GPL");