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Salil76ad4f02017-08-02 16:59:45 +01001/*
2 * Copyright (c) 2016~2017 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include <linux/dma-mapping.h>
11#include <linux/etherdevice.h>
12#include <linux/interrupt.h>
13#include <linux/if_vlan.h>
14#include <linux/ip.h>
15#include <linux/ipv6.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/skbuff.h>
19#include <linux/sctp.h>
20#include <linux/vermagic.h>
21#include <net/gre.h>
Yunsheng Lin30d240d2017-10-17 14:51:30 +080022#include <net/pkt_cls.h>
Salil76ad4f02017-08-02 16:59:45 +010023#include <net/vxlan.h>
24
25#include "hnae3.h"
26#include "hns3_enet.h"
27
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +080028static const char hns3_driver_name[] = "hns3";
Salil76ad4f02017-08-02 16:59:45 +010029const char hns3_driver_version[] = VERMAGIC_STRING;
30static const char hns3_driver_string[] =
31 "Hisilicon Ethernet Network Driver for Hip08 Family";
32static const char hns3_copyright[] = "Copyright (c) 2017 Huawei Corporation.";
33static struct hnae3_client client;
34
35/* hns3_pci_tbl - PCI Device ID Table
36 *
37 * Last entry must be all 0s
38 *
39 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
40 * Class, Class Mask, private data (not used) }
41 */
42static const struct pci_device_id hns3_pci_tbl[] = {
43 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},
44 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},
Yunsheng Line92a0842017-09-20 18:52:50 +080045 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080046 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080047 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080048 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080049 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080050 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080051 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080052 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Yunsheng Line92a0842017-09-20 18:52:50 +080053 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),
Yunsheng Lin2daf4a62017-09-20 18:52:51 +080054 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},
Salil Mehta424eb832017-12-14 18:03:06 +000055 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_VF), 0},
56 {PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF), 0},
Salil76ad4f02017-08-02 16:59:45 +010057 /* required last entry */
58 {0, }
59};
60MODULE_DEVICE_TABLE(pci, hns3_pci_tbl);
61
62static irqreturn_t hns3_irq_handle(int irq, void *dev)
63{
64 struct hns3_enet_tqp_vector *tqp_vector = dev;
65
66 napi_schedule(&tqp_vector->napi);
67
68 return IRQ_HANDLED;
69}
70
71static void hns3_nic_uninit_irq(struct hns3_nic_priv *priv)
72{
73 struct hns3_enet_tqp_vector *tqp_vectors;
74 unsigned int i;
75
76 for (i = 0; i < priv->vector_num; i++) {
77 tqp_vectors = &priv->tqp_vector[i];
78
79 if (tqp_vectors->irq_init_flag != HNS3_VECTOR_INITED)
80 continue;
81
82 /* release the irq resource */
83 free_irq(tqp_vectors->vector_irq, tqp_vectors);
84 tqp_vectors->irq_init_flag = HNS3_VECTOR_NOT_INITED;
85 }
86}
87
88static int hns3_nic_init_irq(struct hns3_nic_priv *priv)
89{
90 struct hns3_enet_tqp_vector *tqp_vectors;
91 int txrx_int_idx = 0;
92 int rx_int_idx = 0;
93 int tx_int_idx = 0;
94 unsigned int i;
95 int ret;
96
97 for (i = 0; i < priv->vector_num; i++) {
98 tqp_vectors = &priv->tqp_vector[i];
99
100 if (tqp_vectors->irq_init_flag == HNS3_VECTOR_INITED)
101 continue;
102
103 if (tqp_vectors->tx_group.ring && tqp_vectors->rx_group.ring) {
104 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
105 "%s-%s-%d", priv->netdev->name, "TxRx",
106 txrx_int_idx++);
107 txrx_int_idx++;
108 } else if (tqp_vectors->rx_group.ring) {
109 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
110 "%s-%s-%d", priv->netdev->name, "Rx",
111 rx_int_idx++);
112 } else if (tqp_vectors->tx_group.ring) {
113 snprintf(tqp_vectors->name, HNAE3_INT_NAME_LEN - 1,
114 "%s-%s-%d", priv->netdev->name, "Tx",
115 tx_int_idx++);
116 } else {
117 /* Skip this unused q_vector */
118 continue;
119 }
120
121 tqp_vectors->name[HNAE3_INT_NAME_LEN - 1] = '\0';
122
123 ret = request_irq(tqp_vectors->vector_irq, hns3_irq_handle, 0,
124 tqp_vectors->name,
125 tqp_vectors);
126 if (ret) {
127 netdev_err(priv->netdev, "request irq(%d) fail\n",
128 tqp_vectors->vector_irq);
129 return ret;
130 }
131
132 tqp_vectors->irq_init_flag = HNS3_VECTOR_INITED;
133 }
134
135 return 0;
136}
137
138static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector *tqp_vector,
139 u32 mask_en)
140{
141 writel(mask_en, tqp_vector->mask_addr);
142}
143
144static void hns3_vector_enable(struct hns3_enet_tqp_vector *tqp_vector)
145{
146 napi_enable(&tqp_vector->napi);
147
148 /* enable vector */
149 hns3_mask_vector_irq(tqp_vector, 1);
150}
151
152static void hns3_vector_disable(struct hns3_enet_tqp_vector *tqp_vector)
153{
154 /* disable vector */
155 hns3_mask_vector_irq(tqp_vector, 0);
156
157 disable_irq(tqp_vector->vector_irq);
158 napi_disable(&tqp_vector->napi);
159}
160
161static void hns3_set_vector_coalesc_gl(struct hns3_enet_tqp_vector *tqp_vector,
162 u32 gl_value)
163{
164 /* this defines the configuration for GL (Interrupt Gap Limiter)
165 * GL defines inter interrupt gap.
166 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
167 */
168 writel(gl_value, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
169 writel(gl_value, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
170 writel(gl_value, tqp_vector->mask_addr + HNS3_VECTOR_GL2_OFFSET);
171}
172
Fuyun Liang434776a2018-01-12 16:23:10 +0800173void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector *tqp_vector,
174 u32 rl_value)
Salil76ad4f02017-08-02 16:59:45 +0100175{
Fuyun Liang434776a2018-01-12 16:23:10 +0800176 u32 rl_reg = hns3_rl_usec_to_reg(rl_value);
177
Salil76ad4f02017-08-02 16:59:45 +0100178 /* this defines the configuration for RL (Interrupt Rate Limiter).
179 * Rl defines rate of interrupts i.e. number of interrupts-per-second
180 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
181 */
Fuyun Liang434776a2018-01-12 16:23:10 +0800182
183 if (rl_reg > 0 && !tqp_vector->tx_group.gl_adapt_enable &&
184 !tqp_vector->rx_group.gl_adapt_enable)
185 /* According to the hardware, the range of rl_reg is
186 * 0-59 and the unit is 4.
187 */
188 rl_reg |= HNS3_INT_RL_ENABLE_MASK;
189
190 writel(rl_reg, tqp_vector->mask_addr + HNS3_VECTOR_RL_OFFSET);
191}
192
193void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector *tqp_vector,
194 u32 gl_value)
195{
196 u32 rx_gl_reg = hns3_gl_usec_to_reg(gl_value);
197
198 writel(rx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL0_OFFSET);
199}
200
201void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector *tqp_vector,
202 u32 gl_value)
203{
204 u32 tx_gl_reg = hns3_gl_usec_to_reg(gl_value);
205
206 writel(tx_gl_reg, tqp_vector->mask_addr + HNS3_VECTOR_GL1_OFFSET);
Salil76ad4f02017-08-02 16:59:45 +0100207}
208
Fuyun Liang5fd47892018-01-12 16:23:11 +0800209static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
210 struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +0100211{
Fuyun Liang5fd47892018-01-12 16:23:11 +0800212 struct hnae3_handle *h = priv->ae_handle;
213
Salil76ad4f02017-08-02 16:59:45 +0100214 /* initialize the configuration for interrupt coalescing.
215 * 1. GL (Interrupt Gap Limiter)
216 * 2. RL (Interrupt Rate Limiter)
217 */
218
Fuyun Liang5fd47892018-01-12 16:23:11 +0800219 /* Default: enable interrupt coalescing self-adaptive and GL */
220 tqp_vector->tx_group.gl_adapt_enable = 1;
221 tqp_vector->rx_group.gl_adapt_enable = 1;
222
Salil76ad4f02017-08-02 16:59:45 +0100223 tqp_vector->tx_group.int_gl = HNS3_INT_GL_50K;
Fuyun Liang5fd47892018-01-12 16:23:11 +0800224 tqp_vector->rx_group.int_gl = HNS3_INT_GL_50K;
225
226 hns3_set_vector_coalesce_tx_gl(tqp_vector,
227 tqp_vector->tx_group.int_gl);
228 hns3_set_vector_coalesce_rx_gl(tqp_vector,
229 tqp_vector->rx_group.int_gl);
230
231 /* Default: disable RL */
232 h->kinfo.int_rl_setting = 0;
233 hns3_set_vector_coalesce_rl(tqp_vector, h->kinfo.int_rl_setting);
234
Salil76ad4f02017-08-02 16:59:45 +0100235 tqp_vector->rx_group.flow_level = HNS3_FLOW_LOW;
236 tqp_vector->tx_group.flow_level = HNS3_FLOW_LOW;
237}
238
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800239static int hns3_nic_set_real_num_queue(struct net_device *netdev)
240{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800241 struct hnae3_handle *h = hns3_get_handle(netdev);
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800242 struct hnae3_knic_private_info *kinfo = &h->kinfo;
243 unsigned int queue_size = kinfo->rss_size * kinfo->num_tc;
244 int ret;
245
246 ret = netif_set_real_num_tx_queues(netdev, queue_size);
247 if (ret) {
248 netdev_err(netdev,
249 "netif_set_real_num_tx_queues fail, ret=%d!\n",
250 ret);
251 return ret;
252 }
253
254 ret = netif_set_real_num_rx_queues(netdev, queue_size);
255 if (ret) {
256 netdev_err(netdev,
257 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret);
258 return ret;
259 }
260
261 return 0;
262}
263
Salil76ad4f02017-08-02 16:59:45 +0100264static int hns3_nic_net_up(struct net_device *netdev)
265{
266 struct hns3_nic_priv *priv = netdev_priv(netdev);
267 struct hnae3_handle *h = priv->ae_handle;
268 int i, j;
269 int ret;
270
271 /* get irq resource for all vectors */
272 ret = hns3_nic_init_irq(priv);
273 if (ret) {
274 netdev_err(netdev, "hns init irq failed! ret=%d\n", ret);
275 return ret;
276 }
277
278 /* enable the vectors */
279 for (i = 0; i < priv->vector_num; i++)
280 hns3_vector_enable(&priv->tqp_vector[i]);
281
282 /* start the ae_dev */
283 ret = h->ae_algo->ops->start ? h->ae_algo->ops->start(h) : 0;
284 if (ret)
285 goto out_start_err;
286
Jian Shenb875cc32018-01-05 18:18:11 +0800287 clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
288
Salil76ad4f02017-08-02 16:59:45 +0100289 return 0;
290
291out_start_err:
292 for (j = i - 1; j >= 0; j--)
293 hns3_vector_disable(&priv->tqp_vector[j]);
294
295 hns3_nic_uninit_irq(priv);
296
297 return ret;
298}
299
300static int hns3_nic_net_open(struct net_device *netdev)
301{
Lipengf8fa222c2017-11-02 20:45:20 +0800302 struct hns3_nic_priv *priv = netdev_priv(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100303 int ret;
304
305 netif_carrier_off(netdev);
306
Yunsheng Lin9df8f792017-09-27 09:45:32 +0800307 ret = hns3_nic_set_real_num_queue(netdev);
308 if (ret)
Salil76ad4f02017-08-02 16:59:45 +0100309 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100310
311 ret = hns3_nic_net_up(netdev);
312 if (ret) {
313 netdev_err(netdev,
314 "hns net up fail, ret=%d!\n", ret);
315 return ret;
316 }
317
Lipengf8fa222c2017-11-02 20:45:20 +0800318 priv->last_reset_time = jiffies;
Salil76ad4f02017-08-02 16:59:45 +0100319 return 0;
320}
321
322static void hns3_nic_net_down(struct net_device *netdev)
323{
324 struct hns3_nic_priv *priv = netdev_priv(netdev);
325 const struct hnae3_ae_ops *ops;
326 int i;
327
Jian Shenb875cc32018-01-05 18:18:11 +0800328 if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
329 return;
330
Salil76ad4f02017-08-02 16:59:45 +0100331 /* stop ae_dev */
332 ops = priv->ae_handle->ae_algo->ops;
333 if (ops->stop)
334 ops->stop(priv->ae_handle);
335
336 /* disable vectors */
337 for (i = 0; i < priv->vector_num; i++)
338 hns3_vector_disable(&priv->tqp_vector[i]);
339
340 /* free irq resources */
341 hns3_nic_uninit_irq(priv);
342}
343
344static int hns3_nic_net_stop(struct net_device *netdev)
345{
346 netif_tx_stop_all_queues(netdev);
347 netif_carrier_off(netdev);
348
349 hns3_nic_net_down(netdev);
350
351 return 0;
352}
353
Salil76ad4f02017-08-02 16:59:45 +0100354static int hns3_nic_uc_sync(struct net_device *netdev,
355 const unsigned char *addr)
356{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800357 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100358
359 if (h->ae_algo->ops->add_uc_addr)
360 return h->ae_algo->ops->add_uc_addr(h, addr);
361
362 return 0;
363}
364
365static int hns3_nic_uc_unsync(struct net_device *netdev,
366 const unsigned char *addr)
367{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800368 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100369
370 if (h->ae_algo->ops->rm_uc_addr)
371 return h->ae_algo->ops->rm_uc_addr(h, addr);
372
373 return 0;
374}
375
376static int hns3_nic_mc_sync(struct net_device *netdev,
377 const unsigned char *addr)
378{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800379 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100380
Dan Carpenter720a8472017-08-10 12:56:14 +0300381 if (h->ae_algo->ops->add_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100382 return h->ae_algo->ops->add_mc_addr(h, addr);
383
384 return 0;
385}
386
387static int hns3_nic_mc_unsync(struct net_device *netdev,
388 const unsigned char *addr)
389{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800390 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100391
Dan Carpenter720a8472017-08-10 12:56:14 +0300392 if (h->ae_algo->ops->rm_mc_addr)
Salil76ad4f02017-08-02 16:59:45 +0100393 return h->ae_algo->ops->rm_mc_addr(h, addr);
394
395 return 0;
396}
397
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +0800398static void hns3_nic_set_rx_mode(struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +0100399{
Yunsheng Lin9780cb92017-10-09 15:43:56 +0800400 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +0100401
402 if (h->ae_algo->ops->set_promisc_mode) {
403 if (netdev->flags & IFF_PROMISC)
404 h->ae_algo->ops->set_promisc_mode(h, 1);
405 else
406 h->ae_algo->ops->set_promisc_mode(h, 0);
407 }
408 if (__dev_uc_sync(netdev, hns3_nic_uc_sync, hns3_nic_uc_unsync))
409 netdev_err(netdev, "sync uc address fail\n");
410 if (netdev->flags & IFF_MULTICAST)
411 if (__dev_mc_sync(netdev, hns3_nic_mc_sync, hns3_nic_mc_unsync))
412 netdev_err(netdev, "sync mc address fail\n");
413}
414
415static int hns3_set_tso(struct sk_buff *skb, u32 *paylen,
416 u16 *mss, u32 *type_cs_vlan_tso)
417{
418 u32 l4_offset, hdr_len;
419 union l3_hdr_info l3;
420 union l4_hdr_info l4;
421 u32 l4_paylen;
422 int ret;
423
424 if (!skb_is_gso(skb))
425 return 0;
426
427 ret = skb_cow_head(skb, 0);
428 if (ret)
429 return ret;
430
431 l3.hdr = skb_network_header(skb);
432 l4.hdr = skb_transport_header(skb);
433
434 /* Software should clear the IPv4's checksum field when tso is
435 * needed.
436 */
437 if (l3.v4->version == 4)
438 l3.v4->check = 0;
439
440 /* tunnel packet.*/
441 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
442 SKB_GSO_GRE_CSUM |
443 SKB_GSO_UDP_TUNNEL |
444 SKB_GSO_UDP_TUNNEL_CSUM)) {
445 if ((!(skb_shinfo(skb)->gso_type &
446 SKB_GSO_PARTIAL)) &&
447 (skb_shinfo(skb)->gso_type &
448 SKB_GSO_UDP_TUNNEL_CSUM)) {
449 /* Software should clear the udp's checksum
450 * field when tso is needed.
451 */
452 l4.udp->check = 0;
453 }
454 /* reset l3&l4 pointers from outer to inner headers */
455 l3.hdr = skb_inner_network_header(skb);
456 l4.hdr = skb_inner_transport_header(skb);
457
458 /* Software should clear the IPv4's checksum field when
459 * tso is needed.
460 */
461 if (l3.v4->version == 4)
462 l3.v4->check = 0;
463 }
464
465 /* normal or tunnel packet*/
466 l4_offset = l4.hdr - skb->data;
467 hdr_len = (l4.tcp->doff * 4) + l4_offset;
468
469 /* remove payload length from inner pseudo checksum when tso*/
470 l4_paylen = skb->len - l4_offset;
471 csum_replace_by_diff(&l4.tcp->check,
472 (__force __wsum)htonl(l4_paylen));
473
474 /* find the txbd field values */
475 *paylen = skb->len - hdr_len;
476 hnae_set_bit(*type_cs_vlan_tso,
477 HNS3_TXD_TSO_B, 1);
478
479 /* get MSS for TSO */
480 *mss = skb_shinfo(skb)->gso_size;
481
482 return 0;
483}
484
Salil1898d4e2017-08-18 12:31:39 +0100485static int hns3_get_l4_protocol(struct sk_buff *skb, u8 *ol4_proto,
486 u8 *il4_proto)
Salil76ad4f02017-08-02 16:59:45 +0100487{
488 union {
489 struct iphdr *v4;
490 struct ipv6hdr *v6;
491 unsigned char *hdr;
492 } l3;
493 unsigned char *l4_hdr;
494 unsigned char *exthdr;
495 u8 l4_proto_tmp;
496 __be16 frag_off;
497
498 /* find outer header point */
499 l3.hdr = skb_network_header(skb);
500 l4_hdr = skb_inner_transport_header(skb);
501
502 if (skb->protocol == htons(ETH_P_IPV6)) {
503 exthdr = l3.hdr + sizeof(*l3.v6);
504 l4_proto_tmp = l3.v6->nexthdr;
505 if (l4_hdr != exthdr)
506 ipv6_skip_exthdr(skb, exthdr - skb->data,
507 &l4_proto_tmp, &frag_off);
508 } else if (skb->protocol == htons(ETH_P_IP)) {
509 l4_proto_tmp = l3.v4->protocol;
Salil1898d4e2017-08-18 12:31:39 +0100510 } else {
511 return -EINVAL;
Salil76ad4f02017-08-02 16:59:45 +0100512 }
513
514 *ol4_proto = l4_proto_tmp;
515
516 /* tunnel packet */
517 if (!skb->encapsulation) {
518 *il4_proto = 0;
Salil1898d4e2017-08-18 12:31:39 +0100519 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100520 }
521
522 /* find inner header point */
523 l3.hdr = skb_inner_network_header(skb);
524 l4_hdr = skb_inner_transport_header(skb);
525
526 if (l3.v6->version == 6) {
527 exthdr = l3.hdr + sizeof(*l3.v6);
528 l4_proto_tmp = l3.v6->nexthdr;
529 if (l4_hdr != exthdr)
530 ipv6_skip_exthdr(skb, exthdr - skb->data,
531 &l4_proto_tmp, &frag_off);
532 } else if (l3.v4->version == 4) {
533 l4_proto_tmp = l3.v4->protocol;
534 }
535
536 *il4_proto = l4_proto_tmp;
Salil1898d4e2017-08-18 12:31:39 +0100537
538 return 0;
Salil76ad4f02017-08-02 16:59:45 +0100539}
540
541static void hns3_set_l2l3l4_len(struct sk_buff *skb, u8 ol4_proto,
542 u8 il4_proto, u32 *type_cs_vlan_tso,
543 u32 *ol_type_vlan_len_msec)
544{
545 union {
546 struct iphdr *v4;
547 struct ipv6hdr *v6;
548 unsigned char *hdr;
549 } l3;
550 union {
551 struct tcphdr *tcp;
552 struct udphdr *udp;
553 struct gre_base_hdr *gre;
554 unsigned char *hdr;
555 } l4;
556 unsigned char *l2_hdr;
557 u8 l4_proto = ol4_proto;
558 u32 ol2_len;
559 u32 ol3_len;
560 u32 ol4_len;
561 u32 l2_len;
562 u32 l3_len;
563
564 l3.hdr = skb_network_header(skb);
565 l4.hdr = skb_transport_header(skb);
566
567 /* compute L2 header size for normal packet, defined in 2 Bytes */
568 l2_len = l3.hdr - skb->data;
569 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
570 HNS3_TXD_L2LEN_S, l2_len >> 1);
571
572 /* tunnel packet*/
573 if (skb->encapsulation) {
574 /* compute OL2 header size, defined in 2 Bytes */
575 ol2_len = l2_len;
576 hnae_set_field(*ol_type_vlan_len_msec,
577 HNS3_TXD_L2LEN_M,
578 HNS3_TXD_L2LEN_S, ol2_len >> 1);
579
580 /* compute OL3 header size, defined in 4 Bytes */
581 ol3_len = l4.hdr - l3.hdr;
582 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L3LEN_M,
583 HNS3_TXD_L3LEN_S, ol3_len >> 2);
584
585 /* MAC in UDP, MAC in GRE (0x6558)*/
586 if ((ol4_proto == IPPROTO_UDP) || (ol4_proto == IPPROTO_GRE)) {
587 /* switch MAC header ptr from outer to inner header.*/
588 l2_hdr = skb_inner_mac_header(skb);
589
590 /* compute OL4 header size, defined in 4 Bytes. */
591 ol4_len = l2_hdr - l4.hdr;
592 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_L4LEN_M,
593 HNS3_TXD_L4LEN_S, ol4_len >> 2);
594
595 /* switch IP header ptr from outer to inner header */
596 l3.hdr = skb_inner_network_header(skb);
597
598 /* compute inner l2 header size, defined in 2 Bytes. */
599 l2_len = l3.hdr - l2_hdr;
600 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L2LEN_M,
601 HNS3_TXD_L2LEN_S, l2_len >> 1);
602 } else {
603 /* skb packet types not supported by hardware,
604 * txbd len fild doesn't be filled.
605 */
606 return;
607 }
608
609 /* switch L4 header pointer from outer to inner */
610 l4.hdr = skb_inner_transport_header(skb);
611
612 l4_proto = il4_proto;
613 }
614
615 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
616 l3_len = l4.hdr - l3.hdr;
617 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3LEN_M,
618 HNS3_TXD_L3LEN_S, l3_len >> 2);
619
620 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
621 switch (l4_proto) {
622 case IPPROTO_TCP:
623 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
624 HNS3_TXD_L4LEN_S, l4.tcp->doff);
625 break;
626 case IPPROTO_SCTP:
627 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
628 HNS3_TXD_L4LEN_S, (sizeof(struct sctphdr) >> 2));
629 break;
630 case IPPROTO_UDP:
631 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L4LEN_M,
632 HNS3_TXD_L4LEN_S, (sizeof(struct udphdr) >> 2));
633 break;
634 default:
635 /* skb packet types not supported by hardware,
636 * txbd len fild doesn't be filled.
637 */
638 return;
639 }
640}
641
642static int hns3_set_l3l4_type_csum(struct sk_buff *skb, u8 ol4_proto,
643 u8 il4_proto, u32 *type_cs_vlan_tso,
644 u32 *ol_type_vlan_len_msec)
645{
646 union {
647 struct iphdr *v4;
648 struct ipv6hdr *v6;
649 unsigned char *hdr;
650 } l3;
651 u32 l4_proto = ol4_proto;
652
653 l3.hdr = skb_network_header(skb);
654
655 /* define OL3 type and tunnel type(OL4).*/
656 if (skb->encapsulation) {
657 /* define outer network header type.*/
658 if (skb->protocol == htons(ETH_P_IP)) {
659 if (skb_is_gso(skb))
660 hnae_set_field(*ol_type_vlan_len_msec,
661 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
662 HNS3_OL3T_IPV4_CSUM);
663 else
664 hnae_set_field(*ol_type_vlan_len_msec,
665 HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
666 HNS3_OL3T_IPV4_NO_CSUM);
667
668 } else if (skb->protocol == htons(ETH_P_IPV6)) {
669 hnae_set_field(*ol_type_vlan_len_msec, HNS3_TXD_OL3T_M,
670 HNS3_TXD_OL3T_S, HNS3_OL3T_IPV6);
671 }
672
673 /* define tunnel type(OL4).*/
674 switch (l4_proto) {
675 case IPPROTO_UDP:
676 hnae_set_field(*ol_type_vlan_len_msec,
677 HNS3_TXD_TUNTYPE_M,
678 HNS3_TXD_TUNTYPE_S,
679 HNS3_TUN_MAC_IN_UDP);
680 break;
681 case IPPROTO_GRE:
682 hnae_set_field(*ol_type_vlan_len_msec,
683 HNS3_TXD_TUNTYPE_M,
684 HNS3_TXD_TUNTYPE_S,
685 HNS3_TUN_NVGRE);
686 break;
687 default:
688 /* drop the skb tunnel packet if hardware don't support,
689 * because hardware can't calculate csum when TSO.
690 */
691 if (skb_is_gso(skb))
692 return -EDOM;
693
694 /* the stack computes the IP header already,
695 * driver calculate l4 checksum when not TSO.
696 */
697 skb_checksum_help(skb);
698 return 0;
699 }
700
701 l3.hdr = skb_inner_network_header(skb);
702 l4_proto = il4_proto;
703 }
704
705 if (l3.v4->version == 4) {
706 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
707 HNS3_TXD_L3T_S, HNS3_L3T_IPV4);
708
709 /* the stack computes the IP header already, the only time we
710 * need the hardware to recompute it is in the case of TSO.
711 */
712 if (skb_is_gso(skb))
713 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L3CS_B, 1);
714
715 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
716 } else if (l3.v6->version == 6) {
717 hnae_set_field(*type_cs_vlan_tso, HNS3_TXD_L3T_M,
718 HNS3_TXD_L3T_S, HNS3_L3T_IPV6);
719 hnae_set_bit(*type_cs_vlan_tso, HNS3_TXD_L4CS_B, 1);
720 }
721
722 switch (l4_proto) {
723 case IPPROTO_TCP:
724 hnae_set_field(*type_cs_vlan_tso,
725 HNS3_TXD_L4T_M,
726 HNS3_TXD_L4T_S,
727 HNS3_L4T_TCP);
728 break;
729 case IPPROTO_UDP:
730 hnae_set_field(*type_cs_vlan_tso,
731 HNS3_TXD_L4T_M,
732 HNS3_TXD_L4T_S,
733 HNS3_L4T_UDP);
734 break;
735 case IPPROTO_SCTP:
736 hnae_set_field(*type_cs_vlan_tso,
737 HNS3_TXD_L4T_M,
738 HNS3_TXD_L4T_S,
739 HNS3_L4T_SCTP);
740 break;
741 default:
742 /* drop the skb tunnel packet if hardware don't support,
743 * because hardware can't calculate csum when TSO.
744 */
745 if (skb_is_gso(skb))
746 return -EDOM;
747
748 /* the stack computes the IP header already,
749 * driver calculate l4 checksum when not TSO.
750 */
751 skb_checksum_help(skb);
752 return 0;
753 }
754
755 return 0;
756}
757
758static void hns3_set_txbd_baseinfo(u16 *bdtp_fe_sc_vld_ra_ri, int frag_end)
759{
760 /* Config bd buffer end */
761 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_BDTYPE_M,
762 HNS3_TXD_BDTYPE_M, 0);
763 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_FE_B, !!frag_end);
764 hnae_set_bit(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_VLD_B, 1);
Lipeng7036d262017-10-24 21:02:09 +0800765 hnae_set_field(*bdtp_fe_sc_vld_ra_ri, HNS3_TXD_SC_M, HNS3_TXD_SC_S, 0);
Salil76ad4f02017-08-02 16:59:45 +0100766}
767
Peng Li9699cff2017-12-22 12:21:48 +0800768static int hns3_fill_desc_vtags(struct sk_buff *skb,
769 struct hns3_enet_ring *tx_ring,
770 u32 *inner_vlan_flag,
771 u32 *out_vlan_flag,
772 u16 *inner_vtag,
773 u16 *out_vtag)
774{
775#define HNS3_TX_VLAN_PRIO_SHIFT 13
776
777 if (skb->protocol == htons(ETH_P_8021Q) &&
778 !(tx_ring->tqp->handle->kinfo.netdev->features &
779 NETIF_F_HW_VLAN_CTAG_TX)) {
780 /* When HW VLAN acceleration is turned off, and the stack
781 * sets the protocol to 802.1q, the driver just need to
782 * set the protocol to the encapsulated ethertype.
783 */
784 skb->protocol = vlan_get_protocol(skb);
785 return 0;
786 }
787
788 if (skb_vlan_tag_present(skb)) {
789 u16 vlan_tag;
790
791 vlan_tag = skb_vlan_tag_get(skb);
792 vlan_tag |= (skb->priority & 0x7) << HNS3_TX_VLAN_PRIO_SHIFT;
793
794 /* Based on hw strategy, use out_vtag in two layer tag case,
795 * and use inner_vtag in one tag case.
796 */
797 if (skb->protocol == htons(ETH_P_8021Q)) {
798 hnae_set_bit(*out_vlan_flag, HNS3_TXD_OVLAN_B, 1);
799 *out_vtag = vlan_tag;
800 } else {
801 hnae_set_bit(*inner_vlan_flag, HNS3_TXD_VLAN_B, 1);
802 *inner_vtag = vlan_tag;
803 }
804 } else if (skb->protocol == htons(ETH_P_8021Q)) {
805 struct vlan_ethhdr *vhdr;
806 int rc;
807
808 rc = skb_cow_head(skb, 0);
809 if (rc < 0)
810 return rc;
811 vhdr = (struct vlan_ethhdr *)skb->data;
812 vhdr->h_vlan_TCI |= cpu_to_be16((skb->priority & 0x7)
813 << HNS3_TX_VLAN_PRIO_SHIFT);
814 }
815
816 skb->protocol = vlan_get_protocol(skb);
817 return 0;
818}
819
Salil76ad4f02017-08-02 16:59:45 +0100820static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv,
821 int size, dma_addr_t dma, int frag_end,
822 enum hns_desc_type type)
823{
824 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
825 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
826 u32 ol_type_vlan_len_msec = 0;
827 u16 bdtp_fe_sc_vld_ra_ri = 0;
828 u32 type_cs_vlan_tso = 0;
829 struct sk_buff *skb;
Peng Li9699cff2017-12-22 12:21:48 +0800830 u16 inner_vtag = 0;
831 u16 out_vtag = 0;
Salil76ad4f02017-08-02 16:59:45 +0100832 u32 paylen = 0;
833 u16 mss = 0;
834 __be16 protocol;
835 u8 ol4_proto;
836 u8 il4_proto;
837 int ret;
838
839 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
840 desc_cb->priv = priv;
841 desc_cb->length = size;
842 desc_cb->dma = dma;
843 desc_cb->type = type;
844
845 /* now, fill the descriptor */
846 desc->addr = cpu_to_le64(dma);
847 desc->tx.send_size = cpu_to_le16((u16)size);
848 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri, frag_end);
849 desc->tx.bdtp_fe_sc_vld_ra_ri = cpu_to_le16(bdtp_fe_sc_vld_ra_ri);
850
851 if (type == DESC_TYPE_SKB) {
852 skb = (struct sk_buff *)priv;
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800853 paylen = skb->len;
Salil76ad4f02017-08-02 16:59:45 +0100854
Peng Li9699cff2017-12-22 12:21:48 +0800855 ret = hns3_fill_desc_vtags(skb, ring, &type_cs_vlan_tso,
856 &ol_type_vlan_len_msec,
857 &inner_vtag, &out_vtag);
858 if (unlikely(ret))
859 return ret;
860
Salil76ad4f02017-08-02 16:59:45 +0100861 if (skb->ip_summed == CHECKSUM_PARTIAL) {
862 skb_reset_mac_len(skb);
863 protocol = skb->protocol;
864
Salil1898d4e2017-08-18 12:31:39 +0100865 ret = hns3_get_l4_protocol(skb, &ol4_proto, &il4_proto);
866 if (ret)
867 return ret;
Salil76ad4f02017-08-02 16:59:45 +0100868 hns3_set_l2l3l4_len(skb, ol4_proto, il4_proto,
869 &type_cs_vlan_tso,
870 &ol_type_vlan_len_msec);
871 ret = hns3_set_l3l4_type_csum(skb, ol4_proto, il4_proto,
872 &type_cs_vlan_tso,
873 &ol_type_vlan_len_msec);
874 if (ret)
875 return ret;
876
877 ret = hns3_set_tso(skb, &paylen, &mss,
878 &type_cs_vlan_tso);
879 if (ret)
880 return ret;
881 }
882
883 /* Set txbd */
884 desc->tx.ol_type_vlan_len_msec =
885 cpu_to_le32(ol_type_vlan_len_msec);
886 desc->tx.type_cs_vlan_tso_len =
887 cpu_to_le32(type_cs_vlan_tso);
Yunsheng Lina90bb9a2017-10-09 15:44:00 +0800888 desc->tx.paylen = cpu_to_le32(paylen);
Salil76ad4f02017-08-02 16:59:45 +0100889 desc->tx.mss = cpu_to_le16(mss);
Peng Li9699cff2017-12-22 12:21:48 +0800890 desc->tx.vlan_tag = cpu_to_le16(inner_vtag);
891 desc->tx.outer_vlan_tag = cpu_to_le16(out_vtag);
Salil76ad4f02017-08-02 16:59:45 +0100892 }
893
894 /* move ring pointer to next.*/
895 ring_ptr_move_fw(ring, next_to_use);
896
897 return 0;
898}
899
900static int hns3_fill_desc_tso(struct hns3_enet_ring *ring, void *priv,
901 int size, dma_addr_t dma, int frag_end,
902 enum hns_desc_type type)
903{
904 unsigned int frag_buf_num;
905 unsigned int k;
906 int sizeoflast;
907 int ret;
908
909 frag_buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
910 sizeoflast = size % HNS3_MAX_BD_SIZE;
911 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
912
913 /* When the frag size is bigger than hardware, split this frag */
914 for (k = 0; k < frag_buf_num; k++) {
915 ret = hns3_fill_desc(ring, priv,
916 (k == frag_buf_num - 1) ?
917 sizeoflast : HNS3_MAX_BD_SIZE,
918 dma + HNS3_MAX_BD_SIZE * k,
919 frag_end && (k == frag_buf_num - 1) ? 1 : 0,
920 (type == DESC_TYPE_SKB && !k) ?
921 DESC_TYPE_SKB : DESC_TYPE_PAGE);
922 if (ret)
923 return ret;
924 }
925
926 return 0;
927}
928
929static int hns3_nic_maybe_stop_tso(struct sk_buff **out_skb, int *bnum,
930 struct hns3_enet_ring *ring)
931{
932 struct sk_buff *skb = *out_skb;
933 struct skb_frag_struct *frag;
934 int bdnum_for_frag;
935 int frag_num;
936 int buf_num;
937 int size;
938 int i;
939
940 size = skb_headlen(skb);
941 buf_num = (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
942
943 frag_num = skb_shinfo(skb)->nr_frags;
944 for (i = 0; i < frag_num; i++) {
945 frag = &skb_shinfo(skb)->frags[i];
946 size = skb_frag_size(frag);
947 bdnum_for_frag =
948 (size + HNS3_MAX_BD_SIZE - 1) / HNS3_MAX_BD_SIZE;
949 if (bdnum_for_frag > HNS3_MAX_BD_PER_FRAG)
950 return -ENOMEM;
951
952 buf_num += bdnum_for_frag;
953 }
954
955 if (buf_num > ring_space(ring))
956 return -EBUSY;
957
958 *bnum = buf_num;
959 return 0;
960}
961
962static int hns3_nic_maybe_stop_tx(struct sk_buff **out_skb, int *bnum,
963 struct hns3_enet_ring *ring)
964{
965 struct sk_buff *skb = *out_skb;
966 int buf_num;
967
968 /* No. of segments (plus a header) */
969 buf_num = skb_shinfo(skb)->nr_frags + 1;
970
971 if (buf_num > ring_space(ring))
972 return -EBUSY;
973
974 *bnum = buf_num;
975
976 return 0;
977}
978
979static void hns_nic_dma_unmap(struct hns3_enet_ring *ring, int next_to_use_orig)
980{
981 struct device *dev = ring_to_dev(ring);
982 unsigned int i;
983
984 for (i = 0; i < ring->desc_num; i++) {
985 /* check if this is where we started */
986 if (ring->next_to_use == next_to_use_orig)
987 break;
988
989 /* unmap the descriptor dma address */
990 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB)
991 dma_unmap_single(dev,
992 ring->desc_cb[ring->next_to_use].dma,
993 ring->desc_cb[ring->next_to_use].length,
994 DMA_TO_DEVICE);
995 else
996 dma_unmap_page(dev,
997 ring->desc_cb[ring->next_to_use].dma,
998 ring->desc_cb[ring->next_to_use].length,
999 DMA_TO_DEVICE);
1000
1001 /* rollback one */
1002 ring_ptr_move_bw(ring, next_to_use);
1003 }
1004}
1005
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08001006netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
Salil76ad4f02017-08-02 16:59:45 +01001007{
1008 struct hns3_nic_priv *priv = netdev_priv(netdev);
1009 struct hns3_nic_ring_data *ring_data =
1010 &tx_ring_data(priv, skb->queue_mapping);
1011 struct hns3_enet_ring *ring = ring_data->ring;
1012 struct device *dev = priv->dev;
1013 struct netdev_queue *dev_queue;
1014 struct skb_frag_struct *frag;
1015 int next_to_use_head;
1016 int next_to_use_frag;
1017 dma_addr_t dma;
1018 int buf_num;
1019 int seg_num;
1020 int size;
1021 int ret;
1022 int i;
1023
1024 /* Prefetch the data used later */
1025 prefetch(skb->data);
1026
1027 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
1028 case -EBUSY:
1029 u64_stats_update_begin(&ring->syncp);
1030 ring->stats.tx_busy++;
1031 u64_stats_update_end(&ring->syncp);
1032
1033 goto out_net_tx_busy;
1034 case -ENOMEM:
1035 u64_stats_update_begin(&ring->syncp);
1036 ring->stats.sw_err_cnt++;
1037 u64_stats_update_end(&ring->syncp);
1038 netdev_err(netdev, "no memory to xmit!\n");
1039
1040 goto out_err_tx_ok;
1041 default:
1042 break;
1043 }
1044
1045 /* No. of segments (plus a header) */
1046 seg_num = skb_shinfo(skb)->nr_frags + 1;
1047 /* Fill the first part */
1048 size = skb_headlen(skb);
1049
1050 next_to_use_head = ring->next_to_use;
1051
1052 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1053 if (dma_mapping_error(dev, dma)) {
1054 netdev_err(netdev, "TX head DMA map failed\n");
1055 ring->stats.sw_err_cnt++;
1056 goto out_err_tx_ok;
1057 }
1058
1059 ret = priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
1060 DESC_TYPE_SKB);
1061 if (ret)
1062 goto head_dma_map_err;
1063
1064 next_to_use_frag = ring->next_to_use;
1065 /* Fill the fragments */
1066 for (i = 1; i < seg_num; i++) {
1067 frag = &skb_shinfo(skb)->frags[i - 1];
1068 size = skb_frag_size(frag);
1069 dma = skb_frag_dma_map(dev, frag, 0, size, DMA_TO_DEVICE);
1070 if (dma_mapping_error(dev, dma)) {
1071 netdev_err(netdev, "TX frag(%d) DMA map failed\n", i);
1072 ring->stats.sw_err_cnt++;
1073 goto frag_dma_map_err;
1074 }
1075 ret = priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
1076 seg_num - 1 == i ? 1 : 0,
1077 DESC_TYPE_PAGE);
1078
1079 if (ret)
1080 goto frag_dma_map_err;
1081 }
1082
1083 /* Complete translate all packets */
1084 dev_queue = netdev_get_tx_queue(netdev, ring_data->queue_index);
1085 netdev_tx_sent_queue(dev_queue, skb->len);
1086
1087 wmb(); /* Commit all data before submit */
1088
1089 hnae_queue_xmit(ring->tqp, buf_num);
1090
1091 return NETDEV_TX_OK;
1092
1093frag_dma_map_err:
1094 hns_nic_dma_unmap(ring, next_to_use_frag);
1095
1096head_dma_map_err:
1097 hns_nic_dma_unmap(ring, next_to_use_head);
1098
1099out_err_tx_ok:
1100 dev_kfree_skb_any(skb);
1101 return NETDEV_TX_OK;
1102
1103out_net_tx_busy:
1104 netif_stop_subqueue(netdev, ring_data->queue_index);
1105 smp_mb(); /* Commit all data before submit */
1106
1107 return NETDEV_TX_BUSY;
1108}
1109
1110static int hns3_nic_net_set_mac_address(struct net_device *netdev, void *p)
1111{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001112 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001113 struct sockaddr *mac_addr = p;
1114 int ret;
1115
1116 if (!mac_addr || !is_valid_ether_addr((const u8 *)mac_addr->sa_data))
1117 return -EADDRNOTAVAIL;
1118
1119 ret = h->ae_algo->ops->set_mac_addr(h, mac_addr->sa_data);
1120 if (ret) {
1121 netdev_err(netdev, "set_mac_address fail, ret=%d!\n", ret);
1122 return ret;
1123 }
1124
1125 ether_addr_copy(netdev->dev_addr, mac_addr->sa_data);
1126
1127 return 0;
1128}
1129
1130static int hns3_nic_set_features(struct net_device *netdev,
1131 netdev_features_t features)
1132{
1133 struct hns3_nic_priv *priv = netdev_priv(netdev);
Peng Li052ece62017-12-22 12:21:47 +08001134 struct hnae3_handle *h = priv->ae_handle;
1135 netdev_features_t changed;
1136 int ret;
Salil76ad4f02017-08-02 16:59:45 +01001137
1138 if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1139 priv->ops.fill_desc = hns3_fill_desc_tso;
1140 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
1141 } else {
1142 priv->ops.fill_desc = hns3_fill_desc;
1143 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
1144 }
1145
Jian Shen391b5e92018-01-05 18:18:05 +08001146 if (features & NETIF_F_HW_VLAN_CTAG_FILTER)
1147 h->ae_algo->ops->enable_vlan_filter(h, true);
1148 else
1149 h->ae_algo->ops->enable_vlan_filter(h, false);
1150
Peng Li052ece62017-12-22 12:21:47 +08001151 changed = netdev->features ^ features;
1152 if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
1153 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1154 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, true);
1155 else
1156 ret = h->ae_algo->ops->enable_hw_strip_rxvtag(h, false);
1157
1158 if (ret)
1159 return ret;
1160 }
1161
Salil76ad4f02017-08-02 16:59:45 +01001162 netdev->features = features;
1163 return 0;
1164}
1165
Peng Li6c88d9d2018-01-09 14:50:59 +08001166static void hns3_nic_get_stats64(struct net_device *netdev,
1167 struct rtnl_link_stats64 *stats)
Salil76ad4f02017-08-02 16:59:45 +01001168{
1169 struct hns3_nic_priv *priv = netdev_priv(netdev);
1170 int queue_num = priv->ae_handle->kinfo.num_tqps;
Jian Shenc5f65482018-01-05 18:18:10 +08001171 struct hnae3_handle *handle = priv->ae_handle;
Salil76ad4f02017-08-02 16:59:45 +01001172 struct hns3_enet_ring *ring;
1173 unsigned int start;
1174 unsigned int idx;
1175 u64 tx_bytes = 0;
1176 u64 rx_bytes = 0;
1177 u64 tx_pkts = 0;
1178 u64 rx_pkts = 0;
Jian Shend2a5dca2018-01-05 18:18:12 +08001179 u64 tx_drop = 0;
1180 u64 rx_drop = 0;
Salil76ad4f02017-08-02 16:59:45 +01001181
Jian Shenb875cc32018-01-05 18:18:11 +08001182 if (test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
1183 return;
1184
Jian Shenc5f65482018-01-05 18:18:10 +08001185 handle->ae_algo->ops->update_stats(handle, &netdev->stats);
1186
Salil76ad4f02017-08-02 16:59:45 +01001187 for (idx = 0; idx < queue_num; idx++) {
1188 /* fetch the tx stats */
1189 ring = priv->ring_data[idx].ring;
1190 do {
Salild36d36c2017-08-18 12:31:37 +01001191 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001192 tx_bytes += ring->stats.tx_bytes;
1193 tx_pkts += ring->stats.tx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001194 tx_drop += ring->stats.tx_busy;
1195 tx_drop += ring->stats.sw_err_cnt;
Salil76ad4f02017-08-02 16:59:45 +01001196 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1197
1198 /* fetch the rx stats */
1199 ring = priv->ring_data[idx + queue_num].ring;
1200 do {
Salild36d36c2017-08-18 12:31:37 +01001201 start = u64_stats_fetch_begin_irq(&ring->syncp);
Salil76ad4f02017-08-02 16:59:45 +01001202 rx_bytes += ring->stats.rx_bytes;
1203 rx_pkts += ring->stats.rx_pkts;
Jian Shend2a5dca2018-01-05 18:18:12 +08001204 rx_drop += ring->stats.non_vld_descs;
1205 rx_drop += ring->stats.err_pkt_len;
1206 rx_drop += ring->stats.l2_err;
Salil76ad4f02017-08-02 16:59:45 +01001207 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
1208 }
1209
1210 stats->tx_bytes = tx_bytes;
1211 stats->tx_packets = tx_pkts;
1212 stats->rx_bytes = rx_bytes;
1213 stats->rx_packets = rx_pkts;
1214
1215 stats->rx_errors = netdev->stats.rx_errors;
1216 stats->multicast = netdev->stats.multicast;
1217 stats->rx_length_errors = netdev->stats.rx_length_errors;
1218 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
1219 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
1220
1221 stats->tx_errors = netdev->stats.tx_errors;
Jian Shend2a5dca2018-01-05 18:18:12 +08001222 stats->rx_dropped = rx_drop + netdev->stats.rx_dropped;
1223 stats->tx_dropped = tx_drop + netdev->stats.tx_dropped;
Salil76ad4f02017-08-02 16:59:45 +01001224 stats->collisions = netdev->stats.collisions;
1225 stats->rx_over_errors = netdev->stats.rx_over_errors;
1226 stats->rx_frame_errors = netdev->stats.rx_frame_errors;
1227 stats->rx_fifo_errors = netdev->stats.rx_fifo_errors;
1228 stats->tx_aborted_errors = netdev->stats.tx_aborted_errors;
1229 stats->tx_carrier_errors = netdev->stats.tx_carrier_errors;
1230 stats->tx_fifo_errors = netdev->stats.tx_fifo_errors;
1231 stats->tx_heartbeat_errors = netdev->stats.tx_heartbeat_errors;
1232 stats->tx_window_errors = netdev->stats.tx_window_errors;
1233 stats->rx_compressed = netdev->stats.rx_compressed;
1234 stats->tx_compressed = netdev->stats.tx_compressed;
1235}
1236
1237static void hns3_add_tunnel_port(struct net_device *netdev, u16 port,
1238 enum hns3_udp_tnl_type type)
1239{
1240 struct hns3_nic_priv *priv = netdev_priv(netdev);
1241 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1242 struct hnae3_handle *h = priv->ae_handle;
1243
1244 if (udp_tnl->used && udp_tnl->dst_port == port) {
1245 udp_tnl->used++;
1246 return;
1247 }
1248
1249 if (udp_tnl->used) {
1250 netdev_warn(netdev,
1251 "UDP tunnel [%d], port [%d] offload\n", type, port);
1252 return;
1253 }
1254
1255 udp_tnl->dst_port = port;
1256 udp_tnl->used = 1;
1257 /* TBD send command to hardware to add port */
1258 if (h->ae_algo->ops->add_tunnel_udp)
1259 h->ae_algo->ops->add_tunnel_udp(h, port);
1260}
1261
1262static void hns3_del_tunnel_port(struct net_device *netdev, u16 port,
1263 enum hns3_udp_tnl_type type)
1264{
1265 struct hns3_nic_priv *priv = netdev_priv(netdev);
1266 struct hns3_udp_tunnel *udp_tnl = &priv->udp_tnl[type];
1267 struct hnae3_handle *h = priv->ae_handle;
1268
1269 if (!udp_tnl->used || udp_tnl->dst_port != port) {
1270 netdev_warn(netdev,
1271 "Invalid UDP tunnel port %d\n", port);
1272 return;
1273 }
1274
1275 udp_tnl->used--;
1276 if (udp_tnl->used)
1277 return;
1278
1279 udp_tnl->dst_port = 0;
1280 /* TBD send command to hardware to del port */
1281 if (h->ae_algo->ops->del_tunnel_udp)
Dan Carpenter9537e7c2017-08-10 12:54:59 +03001282 h->ae_algo->ops->del_tunnel_udp(h, port);
Salil76ad4f02017-08-02 16:59:45 +01001283}
1284
1285/* hns3_nic_udp_tunnel_add - Get notifiacetion about UDP tunnel ports
1286 * @netdev: This physical ports's netdev
1287 * @ti: Tunnel information
1288 */
1289static void hns3_nic_udp_tunnel_add(struct net_device *netdev,
1290 struct udp_tunnel_info *ti)
1291{
1292 u16 port_n = ntohs(ti->port);
1293
1294 switch (ti->type) {
1295 case UDP_TUNNEL_TYPE_VXLAN:
1296 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1297 break;
1298 case UDP_TUNNEL_TYPE_GENEVE:
1299 hns3_add_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1300 break;
1301 default:
1302 netdev_err(netdev, "unsupported tunnel type %d\n", ti->type);
1303 break;
1304 }
1305}
1306
1307static void hns3_nic_udp_tunnel_del(struct net_device *netdev,
1308 struct udp_tunnel_info *ti)
1309{
1310 u16 port_n = ntohs(ti->port);
1311
1312 switch (ti->type) {
1313 case UDP_TUNNEL_TYPE_VXLAN:
1314 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_VXLAN);
1315 break;
1316 case UDP_TUNNEL_TYPE_GENEVE:
1317 hns3_del_tunnel_port(netdev, port_n, HNS3_UDP_TNL_GENEVE);
1318 break;
1319 default:
1320 break;
1321 }
1322}
1323
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001324static int hns3_setup_tc(struct net_device *netdev, void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001325{
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001326 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001327 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001328 struct hnae3_knic_private_info *kinfo = &h->kinfo;
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001329 u8 *prio_tc = mqprio_qopt->qopt.prio_tc_map;
1330 u8 tc = mqprio_qopt->qopt.num_tc;
1331 u16 mode = mqprio_qopt->mode;
1332 u8 hw = mqprio_qopt->qopt.hw;
1333 bool if_running;
Salil76ad4f02017-08-02 16:59:45 +01001334 unsigned int i;
1335 int ret;
1336
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001337 if (!((hw == TC_MQPRIO_HW_OFFLOAD_TCS &&
1338 mode == TC_MQPRIO_MODE_CHANNEL) || (!hw && tc == 0)))
1339 return -EOPNOTSUPP;
1340
Salil76ad4f02017-08-02 16:59:45 +01001341 if (tc > HNAE3_MAX_TC)
1342 return -EINVAL;
1343
Salil76ad4f02017-08-02 16:59:45 +01001344 if (!netdev)
1345 return -EINVAL;
1346
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001347 if_running = netif_running(netdev);
1348 if (if_running) {
1349 hns3_nic_net_stop(netdev);
1350 msleep(100);
Salil76ad4f02017-08-02 16:59:45 +01001351 }
1352
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001353 ret = (kinfo->dcb_ops && kinfo->dcb_ops->setup_tc) ?
1354 kinfo->dcb_ops->setup_tc(h, tc, prio_tc) : -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001355 if (ret)
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001356 goto out;
Salil76ad4f02017-08-02 16:59:45 +01001357
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001358 if (tc <= 1) {
1359 netdev_reset_tc(netdev);
1360 } else {
1361 ret = netdev_set_num_tc(netdev, tc);
1362 if (ret)
1363 goto out;
1364
1365 for (i = 0; i < HNAE3_MAX_TC; i++) {
1366 if (!kinfo->tc_info[i].enable)
1367 continue;
1368
Salil76ad4f02017-08-02 16:59:45 +01001369 netdev_set_tc_queue(netdev,
1370 kinfo->tc_info[i].tc,
1371 kinfo->tc_info[i].tqp_count,
1372 kinfo->tc_info[i].tqp_offset);
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001373 }
Salil76ad4f02017-08-02 16:59:45 +01001374 }
1375
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001376 ret = hns3_nic_set_real_num_queue(netdev);
1377
1378out:
1379 if (if_running)
1380 hns3_nic_net_open(netdev);
1381
1382 return ret;
Salil76ad4f02017-08-02 16:59:45 +01001383}
1384
Jiri Pirko2572ac52017-08-07 10:15:17 +02001385static int hns3_nic_setup_tc(struct net_device *dev, enum tc_setup_type type,
Jiri Pirkode4784c2017-08-07 10:15:32 +02001386 void *type_data)
Salil76ad4f02017-08-02 16:59:45 +01001387{
Nogah Frankel575ed7d2017-11-06 07:23:42 +01001388 if (type != TC_SETUP_QDISC_MQPRIO)
Jiri Pirko38cf0422017-08-07 10:15:31 +02001389 return -EOPNOTSUPP;
Salil76ad4f02017-08-02 16:59:45 +01001390
Yunsheng Lin30d240d2017-10-17 14:51:30 +08001391 return hns3_setup_tc(dev, type_data);
Salil76ad4f02017-08-02 16:59:45 +01001392}
1393
1394static int hns3_vlan_rx_add_vid(struct net_device *netdev,
1395 __be16 proto, u16 vid)
1396{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001397 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001398 int ret = -EIO;
1399
1400 if (h->ae_algo->ops->set_vlan_filter)
1401 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, false);
1402
1403 return ret;
1404}
1405
1406static int hns3_vlan_rx_kill_vid(struct net_device *netdev,
1407 __be16 proto, u16 vid)
1408{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001409 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001410 int ret = -EIO;
1411
1412 if (h->ae_algo->ops->set_vlan_filter)
1413 ret = h->ae_algo->ops->set_vlan_filter(h, proto, vid, true);
1414
1415 return ret;
1416}
1417
1418static int hns3_ndo_set_vf_vlan(struct net_device *netdev, int vf, u16 vlan,
1419 u8 qos, __be16 vlan_proto)
1420{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001421 struct hnae3_handle *h = hns3_get_handle(netdev);
Salil76ad4f02017-08-02 16:59:45 +01001422 int ret = -EIO;
1423
1424 if (h->ae_algo->ops->set_vf_vlan_filter)
1425 ret = h->ae_algo->ops->set_vf_vlan_filter(h, vf, vlan,
1426 qos, vlan_proto);
1427
1428 return ret;
1429}
1430
Salila8e8b7f2017-08-21 17:05:24 +01001431static int hns3_nic_change_mtu(struct net_device *netdev, int new_mtu)
1432{
Yunsheng Lin9780cb92017-10-09 15:43:56 +08001433 struct hnae3_handle *h = hns3_get_handle(netdev);
Salila8e8b7f2017-08-21 17:05:24 +01001434 bool if_running = netif_running(netdev);
1435 int ret;
1436
1437 if (!h->ae_algo->ops->set_mtu)
1438 return -EOPNOTSUPP;
1439
1440 /* if this was called with netdev up then bring netdevice down */
1441 if (if_running) {
1442 (void)hns3_nic_net_stop(netdev);
1443 msleep(100);
1444 }
1445
1446 ret = h->ae_algo->ops->set_mtu(h, new_mtu);
1447 if (ret) {
1448 netdev_err(netdev, "failed to change MTU in hardware %d\n",
1449 ret);
1450 return ret;
1451 }
1452
Fuyun Liang5bad95a2018-01-05 18:18:20 +08001453 netdev->mtu = new_mtu;
1454
Salila8e8b7f2017-08-21 17:05:24 +01001455 /* if the netdev was running earlier, bring it up again */
1456 if (if_running && hns3_nic_net_open(netdev))
1457 ret = -EINVAL;
1458
1459 return ret;
1460}
1461
Lipengf8fa222c2017-11-02 20:45:20 +08001462static bool hns3_get_tx_timeo_queue_info(struct net_device *ndev)
1463{
1464 struct hns3_nic_priv *priv = netdev_priv(ndev);
1465 struct hns3_enet_ring *tx_ring = NULL;
1466 int timeout_queue = 0;
1467 int hw_head, hw_tail;
1468 int i;
1469
1470 /* Find the stopped queue the same way the stack does */
1471 for (i = 0; i < ndev->real_num_tx_queues; i++) {
1472 struct netdev_queue *q;
1473 unsigned long trans_start;
1474
1475 q = netdev_get_tx_queue(ndev, i);
1476 trans_start = q->trans_start;
1477 if (netif_xmit_stopped(q) &&
1478 time_after(jiffies,
1479 (trans_start + ndev->watchdog_timeo))) {
1480 timeout_queue = i;
1481 break;
1482 }
1483 }
1484
1485 if (i == ndev->num_tx_queues) {
1486 netdev_info(ndev,
1487 "no netdev TX timeout queue found, timeout count: %llu\n",
1488 priv->tx_timeout_count);
1489 return false;
1490 }
1491
1492 tx_ring = priv->ring_data[timeout_queue].ring;
1493
1494 hw_head = readl_relaxed(tx_ring->tqp->io_base +
1495 HNS3_RING_TX_RING_HEAD_REG);
1496 hw_tail = readl_relaxed(tx_ring->tqp->io_base +
1497 HNS3_RING_TX_RING_TAIL_REG);
1498 netdev_info(ndev,
1499 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1500 priv->tx_timeout_count,
1501 timeout_queue,
1502 tx_ring->next_to_use,
1503 tx_ring->next_to_clean,
1504 hw_head,
1505 hw_tail,
1506 readl(tx_ring->tqp_vector->mask_addr));
1507
1508 return true;
1509}
1510
1511static void hns3_nic_net_timeout(struct net_device *ndev)
1512{
1513 struct hns3_nic_priv *priv = netdev_priv(ndev);
1514 unsigned long last_reset_time = priv->last_reset_time;
1515 struct hnae3_handle *h = priv->ae_handle;
1516
1517 if (!hns3_get_tx_timeo_queue_info(ndev))
1518 return;
1519
1520 priv->tx_timeout_count++;
1521
1522 /* This timeout is far away enough from last timeout,
1523 * if timeout again,set the reset type to PF reset
1524 */
1525 if (time_after(jiffies, (last_reset_time + 20 * HZ)))
1526 priv->reset_level = HNAE3_FUNC_RESET;
1527
1528 /* Don't do any new action before the next timeout */
1529 else if (time_before(jiffies, (last_reset_time + ndev->watchdog_timeo)))
1530 return;
1531
1532 priv->last_reset_time = jiffies;
1533
1534 if (h->ae_algo->ops->reset_event)
1535 h->ae_algo->ops->reset_event(h, priv->reset_level);
1536
1537 priv->reset_level++;
1538 if (priv->reset_level > HNAE3_GLOBAL_RESET)
1539 priv->reset_level = HNAE3_GLOBAL_RESET;
1540}
1541
Salil76ad4f02017-08-02 16:59:45 +01001542static const struct net_device_ops hns3_nic_netdev_ops = {
1543 .ndo_open = hns3_nic_net_open,
1544 .ndo_stop = hns3_nic_net_stop,
1545 .ndo_start_xmit = hns3_nic_net_xmit,
Lipengf8fa222c2017-11-02 20:45:20 +08001546 .ndo_tx_timeout = hns3_nic_net_timeout,
Salil76ad4f02017-08-02 16:59:45 +01001547 .ndo_set_mac_address = hns3_nic_net_set_mac_address,
Salila8e8b7f2017-08-21 17:05:24 +01001548 .ndo_change_mtu = hns3_nic_change_mtu,
Salil76ad4f02017-08-02 16:59:45 +01001549 .ndo_set_features = hns3_nic_set_features,
1550 .ndo_get_stats64 = hns3_nic_get_stats64,
1551 .ndo_setup_tc = hns3_nic_setup_tc,
1552 .ndo_set_rx_mode = hns3_nic_set_rx_mode,
1553 .ndo_udp_tunnel_add = hns3_nic_udp_tunnel_add,
1554 .ndo_udp_tunnel_del = hns3_nic_udp_tunnel_del,
1555 .ndo_vlan_rx_add_vid = hns3_vlan_rx_add_vid,
1556 .ndo_vlan_rx_kill_vid = hns3_vlan_rx_kill_vid,
1557 .ndo_set_vf_vlan = hns3_ndo_set_vf_vlan,
1558};
1559
1560/* hns3_probe - Device initialization routine
1561 * @pdev: PCI device information struct
1562 * @ent: entry in hns3_pci_tbl
1563 *
1564 * hns3_probe initializes a PF identified by a pci_dev structure.
1565 * The OS initialization, configuring of the PF private structure,
1566 * and a hardware reset occur.
1567 *
1568 * Returns 0 on success, negative on failure
1569 */
1570static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1571{
1572 struct hnae3_ae_dev *ae_dev;
1573 int ret;
1574
1575 ae_dev = devm_kzalloc(&pdev->dev, sizeof(*ae_dev),
1576 GFP_KERNEL);
1577 if (!ae_dev) {
1578 ret = -ENOMEM;
1579 return ret;
1580 }
1581
1582 ae_dev->pdev = pdev;
Yunsheng Line92a0842017-09-20 18:52:50 +08001583 ae_dev->flag = ent->driver_data;
Salil76ad4f02017-08-02 16:59:45 +01001584 ae_dev->dev_type = HNAE3_DEV_KNIC;
1585 pci_set_drvdata(pdev, ae_dev);
1586
1587 return hnae3_register_ae_dev(ae_dev);
1588}
1589
1590/* hns3_remove - Device removal routine
1591 * @pdev: PCI device information struct
1592 */
1593static void hns3_remove(struct pci_dev *pdev)
1594{
1595 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(pdev);
1596
1597 hnae3_unregister_ae_dev(ae_dev);
1598
1599 devm_kfree(&pdev->dev, ae_dev);
1600
1601 pci_set_drvdata(pdev, NULL);
1602}
1603
1604static struct pci_driver hns3_driver = {
1605 .name = hns3_driver_name,
1606 .id_table = hns3_pci_tbl,
1607 .probe = hns3_probe,
1608 .remove = hns3_remove,
1609};
1610
1611/* set default feature to hns3 */
1612static void hns3_set_default_feature(struct net_device *netdev)
1613{
Jian Shen391b5e92018-01-05 18:18:05 +08001614 struct hnae3_handle *h = hns3_get_handle(netdev);
1615
Salil76ad4f02017-08-02 16:59:45 +01001616 netdev->priv_flags |= IFF_UNICAST_FLT;
1617
1618 netdev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1619 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1620 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1621 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1622 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1623
1624 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
1625
1626 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
1627
1628 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1629 NETIF_F_HW_VLAN_CTAG_FILTER |
Peng Li052ece62017-12-22 12:21:47 +08001630 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
Salil76ad4f02017-08-02 16:59:45 +01001631 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1632 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1633 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1634 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1635
1636 netdev->vlan_features |=
1637 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
1638 NETIF_F_SG | NETIF_F_GSO | NETIF_F_GRO |
1639 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1640 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1641 NETIF_F_GSO_UDP_TUNNEL_CSUM;
1642
1643 netdev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
Jian Shen30ba2ab2018-01-05 18:18:06 +08001644 NETIF_F_HW_VLAN_CTAG_TX |
Salil76ad4f02017-08-02 16:59:45 +01001645 NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
1646 NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO_GRE |
1647 NETIF_F_GSO_GRE_CSUM | NETIF_F_GSO_UDP_TUNNEL |
1648 NETIF_F_GSO_UDP_TUNNEL_CSUM;
Jian Shen391b5e92018-01-05 18:18:05 +08001649
1650 if (!(h->flags & HNAE3_SUPPORT_VF))
Jian Shen30ba2ab2018-01-05 18:18:06 +08001651 netdev->hw_features |=
1652 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
Salil76ad4f02017-08-02 16:59:45 +01001653}
1654
1655static int hns3_alloc_buffer(struct hns3_enet_ring *ring,
1656 struct hns3_desc_cb *cb)
1657{
1658 unsigned int order = hnae_page_order(ring);
1659 struct page *p;
1660
1661 p = dev_alloc_pages(order);
1662 if (!p)
1663 return -ENOMEM;
1664
1665 cb->priv = p;
1666 cb->page_offset = 0;
1667 cb->reuse_flag = 0;
1668 cb->buf = page_address(p);
1669 cb->length = hnae_page_size(ring);
1670 cb->type = DESC_TYPE_PAGE;
1671
Salil76ad4f02017-08-02 16:59:45 +01001672 return 0;
1673}
1674
1675static void hns3_free_buffer(struct hns3_enet_ring *ring,
1676 struct hns3_desc_cb *cb)
1677{
1678 if (cb->type == DESC_TYPE_SKB)
1679 dev_kfree_skb_any((struct sk_buff *)cb->priv);
1680 else if (!HNAE3_IS_TX_RING(ring))
1681 put_page((struct page *)cb->priv);
1682 memset(cb, 0, sizeof(*cb));
1683}
1684
1685static int hns3_map_buffer(struct hns3_enet_ring *ring, struct hns3_desc_cb *cb)
1686{
1687 cb->dma = dma_map_page(ring_to_dev(ring), cb->priv, 0,
1688 cb->length, ring_to_dma_dir(ring));
1689
1690 if (dma_mapping_error(ring_to_dev(ring), cb->dma))
1691 return -EIO;
1692
1693 return 0;
1694}
1695
1696static void hns3_unmap_buffer(struct hns3_enet_ring *ring,
1697 struct hns3_desc_cb *cb)
1698{
1699 if (cb->type == DESC_TYPE_SKB)
1700 dma_unmap_single(ring_to_dev(ring), cb->dma, cb->length,
1701 ring_to_dma_dir(ring));
1702 else
1703 dma_unmap_page(ring_to_dev(ring), cb->dma, cb->length,
1704 ring_to_dma_dir(ring));
1705}
1706
1707static void hns3_buffer_detach(struct hns3_enet_ring *ring, int i)
1708{
1709 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
1710 ring->desc[i].addr = 0;
1711}
1712
1713static void hns3_free_buffer_detach(struct hns3_enet_ring *ring, int i)
1714{
1715 struct hns3_desc_cb *cb = &ring->desc_cb[i];
1716
1717 if (!ring->desc_cb[i].dma)
1718 return;
1719
1720 hns3_buffer_detach(ring, i);
1721 hns3_free_buffer(ring, cb);
1722}
1723
1724static void hns3_free_buffers(struct hns3_enet_ring *ring)
1725{
1726 int i;
1727
1728 for (i = 0; i < ring->desc_num; i++)
1729 hns3_free_buffer_detach(ring, i);
1730}
1731
1732/* free desc along with its attached buffer */
1733static void hns3_free_desc(struct hns3_enet_ring *ring)
1734{
1735 hns3_free_buffers(ring);
1736
1737 dma_unmap_single(ring_to_dev(ring), ring->desc_dma_addr,
1738 ring->desc_num * sizeof(ring->desc[0]),
1739 DMA_BIDIRECTIONAL);
1740 ring->desc_dma_addr = 0;
1741 kfree(ring->desc);
1742 ring->desc = NULL;
1743}
1744
1745static int hns3_alloc_desc(struct hns3_enet_ring *ring)
1746{
1747 int size = ring->desc_num * sizeof(ring->desc[0]);
1748
1749 ring->desc = kzalloc(size, GFP_KERNEL);
1750 if (!ring->desc)
1751 return -ENOMEM;
1752
1753 ring->desc_dma_addr = dma_map_single(ring_to_dev(ring), ring->desc,
1754 size, DMA_BIDIRECTIONAL);
1755 if (dma_mapping_error(ring_to_dev(ring), ring->desc_dma_addr)) {
1756 ring->desc_dma_addr = 0;
1757 kfree(ring->desc);
1758 ring->desc = NULL;
1759 return -ENOMEM;
1760 }
1761
1762 return 0;
1763}
1764
1765static int hns3_reserve_buffer_map(struct hns3_enet_ring *ring,
1766 struct hns3_desc_cb *cb)
1767{
1768 int ret;
1769
1770 ret = hns3_alloc_buffer(ring, cb);
1771 if (ret)
1772 goto out;
1773
1774 ret = hns3_map_buffer(ring, cb);
1775 if (ret)
1776 goto out_with_buf;
1777
1778 return 0;
1779
1780out_with_buf:
Lipeng564883b2017-10-23 19:51:02 +08001781 hns3_free_buffer(ring, cb);
Salil76ad4f02017-08-02 16:59:45 +01001782out:
1783 return ret;
1784}
1785
1786static int hns3_alloc_buffer_attach(struct hns3_enet_ring *ring, int i)
1787{
1788 int ret = hns3_reserve_buffer_map(ring, &ring->desc_cb[i]);
1789
1790 if (ret)
1791 return ret;
1792
1793 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1794
1795 return 0;
1796}
1797
1798/* Allocate memory for raw pkg, and map with dma */
1799static int hns3_alloc_ring_buffers(struct hns3_enet_ring *ring)
1800{
1801 int i, j, ret;
1802
1803 for (i = 0; i < ring->desc_num; i++) {
1804 ret = hns3_alloc_buffer_attach(ring, i);
1805 if (ret)
1806 goto out_buffer_fail;
1807 }
1808
1809 return 0;
1810
1811out_buffer_fail:
1812 for (j = i - 1; j >= 0; j--)
1813 hns3_free_buffer_detach(ring, j);
1814 return ret;
1815}
1816
1817/* detach a in-used buffer and replace with a reserved one */
1818static void hns3_replace_buffer(struct hns3_enet_ring *ring, int i,
1819 struct hns3_desc_cb *res_cb)
1820{
Lipengb9077422017-10-23 19:51:01 +08001821 hns3_unmap_buffer(ring, &ring->desc_cb[i]);
Salil76ad4f02017-08-02 16:59:45 +01001822 ring->desc_cb[i] = *res_cb;
1823 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma);
1824}
1825
1826static void hns3_reuse_buffer(struct hns3_enet_ring *ring, int i)
1827{
1828 ring->desc_cb[i].reuse_flag = 0;
1829 ring->desc[i].addr = cpu_to_le64(ring->desc_cb[i].dma
1830 + ring->desc_cb[i].page_offset);
1831}
1832
1833static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring *ring, int *bytes,
1834 int *pkts)
1835{
1836 struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_clean];
1837
1838 (*pkts) += (desc_cb->type == DESC_TYPE_SKB);
1839 (*bytes) += desc_cb->length;
1840 /* desc_cb will be cleaned, after hnae_free_buffer_detach*/
1841 hns3_free_buffer_detach(ring, ring->next_to_clean);
1842
1843 ring_ptr_move_fw(ring, next_to_clean);
1844}
1845
1846static int is_valid_clean_head(struct hns3_enet_ring *ring, int h)
1847{
1848 int u = ring->next_to_use;
1849 int c = ring->next_to_clean;
1850
1851 if (unlikely(h > ring->desc_num))
1852 return 0;
1853
1854 return u > c ? (h > c && h <= u) : (h > c || h <= u);
1855}
1856
Lipeng24e750c2017-10-23 19:51:07 +08001857bool hns3_clean_tx_ring(struct hns3_enet_ring *ring, int budget)
Salil76ad4f02017-08-02 16:59:45 +01001858{
1859 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
1860 struct netdev_queue *dev_queue;
1861 int bytes, pkts;
1862 int head;
1863
1864 head = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_HEAD_REG);
1865 rmb(); /* Make sure head is ready before touch any data */
1866
1867 if (is_ring_empty(ring) || head == ring->next_to_clean)
Lipeng24e750c2017-10-23 19:51:07 +08001868 return true; /* no data to poll */
Salil76ad4f02017-08-02 16:59:45 +01001869
1870 if (!is_valid_clean_head(ring, head)) {
1871 netdev_err(netdev, "wrong head (%d, %d-%d)\n", head,
1872 ring->next_to_use, ring->next_to_clean);
1873
1874 u64_stats_update_begin(&ring->syncp);
1875 ring->stats.io_err_cnt++;
1876 u64_stats_update_end(&ring->syncp);
Lipeng24e750c2017-10-23 19:51:07 +08001877 return true;
Salil76ad4f02017-08-02 16:59:45 +01001878 }
1879
1880 bytes = 0;
1881 pkts = 0;
1882 while (head != ring->next_to_clean && budget) {
1883 hns3_nic_reclaim_one_desc(ring, &bytes, &pkts);
1884 /* Issue prefetch for next Tx descriptor */
1885 prefetch(&ring->desc_cb[ring->next_to_clean]);
1886 budget--;
1887 }
1888
1889 ring->tqp_vector->tx_group.total_bytes += bytes;
1890 ring->tqp_vector->tx_group.total_packets += pkts;
1891
1892 u64_stats_update_begin(&ring->syncp);
1893 ring->stats.tx_bytes += bytes;
1894 ring->stats.tx_pkts += pkts;
1895 u64_stats_update_end(&ring->syncp);
1896
1897 dev_queue = netdev_get_tx_queue(netdev, ring->tqp->tqp_index);
1898 netdev_tx_completed_queue(dev_queue, pkts, bytes);
1899
1900 if (unlikely(pkts && netif_carrier_ok(netdev) &&
1901 (ring_space(ring) > HNS3_MAX_BD_PER_PKT))) {
1902 /* Make sure that anybody stopping the queue after this
1903 * sees the new next_to_clean.
1904 */
1905 smp_mb();
1906 if (netif_tx_queue_stopped(dev_queue)) {
1907 netif_tx_wake_queue(dev_queue);
1908 ring->stats.restart_queue++;
1909 }
1910 }
1911
1912 return !!budget;
1913}
1914
1915static int hns3_desc_unused(struct hns3_enet_ring *ring)
1916{
1917 int ntc = ring->next_to_clean;
1918 int ntu = ring->next_to_use;
1919
1920 return ((ntc >= ntu) ? 0 : ring->desc_num) + ntc - ntu;
1921}
1922
1923static void
1924hns3_nic_alloc_rx_buffers(struct hns3_enet_ring *ring, int cleand_count)
1925{
1926 struct hns3_desc_cb *desc_cb;
1927 struct hns3_desc_cb res_cbs;
1928 int i, ret;
1929
1930 for (i = 0; i < cleand_count; i++) {
1931 desc_cb = &ring->desc_cb[ring->next_to_use];
1932 if (desc_cb->reuse_flag) {
1933 u64_stats_update_begin(&ring->syncp);
1934 ring->stats.reuse_pg_cnt++;
1935 u64_stats_update_end(&ring->syncp);
1936
1937 hns3_reuse_buffer(ring, ring->next_to_use);
1938 } else {
1939 ret = hns3_reserve_buffer_map(ring, &res_cbs);
1940 if (ret) {
1941 u64_stats_update_begin(&ring->syncp);
1942 ring->stats.sw_err_cnt++;
1943 u64_stats_update_end(&ring->syncp);
1944
1945 netdev_err(ring->tqp->handle->kinfo.netdev,
1946 "hnae reserve buffer map failed.\n");
1947 break;
1948 }
1949 hns3_replace_buffer(ring, ring->next_to_use, &res_cbs);
1950 }
1951
1952 ring_ptr_move_fw(ring, next_to_use);
1953 }
1954
1955 wmb(); /* Make all data has been write before submit */
1956 writel_relaxed(i, ring->tqp->io_base + HNS3_RING_RX_RING_HEAD_REG);
1957}
1958
1959/* hns3_nic_get_headlen - determine size of header for LRO/GRO
1960 * @data: pointer to the start of the headers
1961 * @max: total length of section to find headers in
1962 *
1963 * This function is meant to determine the length of headers that will
1964 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1965 * motivation of doing this is to only perform one pull for IPv4 TCP
1966 * packets so that we can do basic things like calculating the gso_size
1967 * based on the average data per packet.
1968 */
1969static unsigned int hns3_nic_get_headlen(unsigned char *data, u32 flag,
1970 unsigned int max_size)
1971{
1972 unsigned char *network;
1973 u8 hlen;
1974
1975 /* This should never happen, but better safe than sorry */
1976 if (max_size < ETH_HLEN)
1977 return max_size;
1978
1979 /* Initialize network frame pointer */
1980 network = data;
1981
1982 /* Set first protocol and move network header forward */
1983 network += ETH_HLEN;
1984
1985 /* Handle any vlan tag if present */
1986 if (hnae_get_field(flag, HNS3_RXD_VLAN_M, HNS3_RXD_VLAN_S)
1987 == HNS3_RX_FLAG_VLAN_PRESENT) {
1988 if ((typeof(max_size))(network - data) > (max_size - VLAN_HLEN))
1989 return max_size;
1990
1991 network += VLAN_HLEN;
1992 }
1993
1994 /* Handle L3 protocols */
1995 if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
1996 == HNS3_RX_FLAG_L3ID_IPV4) {
1997 if ((typeof(max_size))(network - data) >
1998 (max_size - sizeof(struct iphdr)))
1999 return max_size;
2000
2001 /* Access ihl as a u8 to avoid unaligned access on ia64 */
2002 hlen = (network[0] & 0x0F) << 2;
2003
2004 /* Verify hlen meets minimum size requirements */
2005 if (hlen < sizeof(struct iphdr))
2006 return network - data;
2007
2008 /* Record next protocol if header is present */
2009 } else if (hnae_get_field(flag, HNS3_RXD_L3ID_M, HNS3_RXD_L3ID_S)
2010 == HNS3_RX_FLAG_L3ID_IPV6) {
2011 if ((typeof(max_size))(network - data) >
2012 (max_size - sizeof(struct ipv6hdr)))
2013 return max_size;
2014
2015 /* Record next protocol */
2016 hlen = sizeof(struct ipv6hdr);
2017 } else {
2018 return network - data;
2019 }
2020
2021 /* Relocate pointer to start of L4 header */
2022 network += hlen;
2023
2024 /* Finally sort out TCP/UDP */
2025 if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2026 == HNS3_RX_FLAG_L4ID_TCP) {
2027 if ((typeof(max_size))(network - data) >
2028 (max_size - sizeof(struct tcphdr)))
2029 return max_size;
2030
2031 /* Access doff as a u8 to avoid unaligned access on ia64 */
2032 hlen = (network[12] & 0xF0) >> 2;
2033
2034 /* Verify hlen meets minimum size requirements */
2035 if (hlen < sizeof(struct tcphdr))
2036 return network - data;
2037
2038 network += hlen;
2039 } else if (hnae_get_field(flag, HNS3_RXD_L4ID_M, HNS3_RXD_L4ID_S)
2040 == HNS3_RX_FLAG_L4ID_UDP) {
2041 if ((typeof(max_size))(network - data) >
2042 (max_size - sizeof(struct udphdr)))
2043 return max_size;
2044
2045 network += sizeof(struct udphdr);
2046 }
2047
2048 /* If everything has gone correctly network should be the
2049 * data section of the packet and will be the end of the header.
2050 * If not then it probably represents the end of the last recognized
2051 * header.
2052 */
2053 if ((typeof(max_size))(network - data) < max_size)
2054 return network - data;
2055 else
2056 return max_size;
2057}
2058
2059static void hns3_nic_reuse_page(struct sk_buff *skb, int i,
2060 struct hns3_enet_ring *ring, int pull_len,
2061 struct hns3_desc_cb *desc_cb)
2062{
2063 struct hns3_desc *desc;
2064 int truesize, size;
2065 int last_offset;
2066 bool twobufs;
2067
2068 twobufs = ((PAGE_SIZE < 8192) &&
2069 hnae_buf_size(ring) == HNS3_BUFFER_SIZE_2048);
2070
2071 desc = &ring->desc[ring->next_to_clean];
2072 size = le16_to_cpu(desc->rx.size);
2073
2074 if (twobufs) {
2075 truesize = hnae_buf_size(ring);
2076 } else {
2077 truesize = ALIGN(size, L1_CACHE_BYTES);
2078 last_offset = hnae_page_size(ring) - hnae_buf_size(ring);
2079 }
2080
2081 skb_add_rx_frag(skb, i, desc_cb->priv, desc_cb->page_offset + pull_len,
2082 size - pull_len, truesize - pull_len);
2083
2084 /* Avoid re-using remote pages,flag default unreuse */
2085 if (unlikely(page_to_nid(desc_cb->priv) != numa_node_id()))
2086 return;
2087
2088 if (twobufs) {
2089 /* If we are only owner of page we can reuse it */
2090 if (likely(page_count(desc_cb->priv) == 1)) {
2091 /* Flip page offset to other buffer */
2092 desc_cb->page_offset ^= truesize;
2093
2094 desc_cb->reuse_flag = 1;
2095 /* bump ref count on page before it is given*/
2096 get_page(desc_cb->priv);
2097 }
2098 return;
2099 }
2100
2101 /* Move offset up to the next cache line */
2102 desc_cb->page_offset += truesize;
2103
2104 if (desc_cb->page_offset <= last_offset) {
2105 desc_cb->reuse_flag = 1;
2106 /* Bump ref count on page before it is given*/
2107 get_page(desc_cb->priv);
2108 }
2109}
2110
2111static void hns3_rx_checksum(struct hns3_enet_ring *ring, struct sk_buff *skb,
2112 struct hns3_desc *desc)
2113{
2114 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2115 int l3_type, l4_type;
2116 u32 bd_base_info;
2117 int ol4_type;
2118 u32 l234info;
2119
2120 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2121 l234info = le32_to_cpu(desc->rx.l234_info);
2122
2123 skb->ip_summed = CHECKSUM_NONE;
2124
2125 skb_checksum_none_assert(skb);
2126
2127 if (!(netdev->features & NETIF_F_RXCSUM))
2128 return;
2129
2130 /* check if hardware has done checksum */
2131 if (!hnae_get_bit(bd_base_info, HNS3_RXD_L3L4P_B))
2132 return;
2133
2134 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L3E_B) ||
2135 hnae_get_bit(l234info, HNS3_RXD_L4E_B) ||
2136 hnae_get_bit(l234info, HNS3_RXD_OL3E_B) ||
2137 hnae_get_bit(l234info, HNS3_RXD_OL4E_B))) {
2138 netdev_err(netdev, "L3/L4 error pkt\n");
2139 u64_stats_update_begin(&ring->syncp);
2140 ring->stats.l3l4_csum_err++;
2141 u64_stats_update_end(&ring->syncp);
2142
2143 return;
2144 }
2145
2146 l3_type = hnae_get_field(l234info, HNS3_RXD_L3ID_M,
2147 HNS3_RXD_L3ID_S);
2148 l4_type = hnae_get_field(l234info, HNS3_RXD_L4ID_M,
2149 HNS3_RXD_L4ID_S);
2150
2151 ol4_type = hnae_get_field(l234info, HNS3_RXD_OL4ID_M, HNS3_RXD_OL4ID_S);
2152 switch (ol4_type) {
2153 case HNS3_OL4_TYPE_MAC_IN_UDP:
2154 case HNS3_OL4_TYPE_NVGRE:
2155 skb->csum_level = 1;
2156 case HNS3_OL4_TYPE_NO_TUN:
2157 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2158 if (l3_type == HNS3_L3_TYPE_IPV4 ||
2159 (l3_type == HNS3_L3_TYPE_IPV6 &&
2160 (l4_type == HNS3_L4_TYPE_UDP ||
2161 l4_type == HNS3_L4_TYPE_TCP ||
2162 l4_type == HNS3_L4_TYPE_SCTP)))
2163 skb->ip_summed = CHECKSUM_UNNECESSARY;
2164 break;
2165 }
2166}
2167
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002168static void hns3_rx_skb(struct hns3_enet_ring *ring, struct sk_buff *skb)
2169{
2170 napi_gro_receive(&ring->tqp_vector->napi, skb);
2171}
2172
Salil76ad4f02017-08-02 16:59:45 +01002173static int hns3_handle_rx_bd(struct hns3_enet_ring *ring,
2174 struct sk_buff **out_skb, int *out_bnum)
2175{
2176 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2177 struct hns3_desc_cb *desc_cb;
2178 struct hns3_desc *desc;
2179 struct sk_buff *skb;
2180 unsigned char *va;
2181 u32 bd_base_info;
2182 int pull_len;
2183 u32 l234info;
2184 int length;
2185 int bnum;
2186
2187 desc = &ring->desc[ring->next_to_clean];
2188 desc_cb = &ring->desc_cb[ring->next_to_clean];
2189
2190 prefetch(desc);
2191
2192 length = le16_to_cpu(desc->rx.pkt_len);
2193 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2194 l234info = le32_to_cpu(desc->rx.l234_info);
2195
2196 /* Check valid BD */
2197 if (!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))
2198 return -EFAULT;
2199
2200 va = (unsigned char *)desc_cb->buf + desc_cb->page_offset;
2201
2202 /* Prefetch first cache line of first page
2203 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2204 * line size is 64B so need to prefetch twice to make it 128B. But in
2205 * actual we can have greater size of caches with 128B Level 1 cache
2206 * lines. In such a case, single fetch would suffice to cache in the
2207 * relevant part of the header.
2208 */
2209 prefetch(va);
2210#if L1_CACHE_BYTES < 128
2211 prefetch(va + L1_CACHE_BYTES);
2212#endif
2213
2214 skb = *out_skb = napi_alloc_skb(&ring->tqp_vector->napi,
2215 HNS3_RX_HEAD_SIZE);
2216 if (unlikely(!skb)) {
2217 netdev_err(netdev, "alloc rx skb fail\n");
2218
2219 u64_stats_update_begin(&ring->syncp);
2220 ring->stats.sw_err_cnt++;
2221 u64_stats_update_end(&ring->syncp);
2222
2223 return -ENOMEM;
2224 }
2225
2226 prefetchw(skb->data);
2227
Peng Li9699cff2017-12-22 12:21:48 +08002228 /* Based on hw strategy, the tag offloaded will be stored at
2229 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2230 * in one layer tag case.
2231 */
2232 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
2233 u16 vlan_tag;
2234
2235 vlan_tag = le16_to_cpu(desc->rx.ot_vlan_tag);
2236 if (!(vlan_tag & VLAN_VID_MASK))
2237 vlan_tag = le16_to_cpu(desc->rx.vlan_tag);
2238 if (vlan_tag & VLAN_VID_MASK)
2239 __vlan_hwaccel_put_tag(skb,
2240 htons(ETH_P_8021Q),
2241 vlan_tag);
2242 }
2243
Salil76ad4f02017-08-02 16:59:45 +01002244 bnum = 1;
2245 if (length <= HNS3_RX_HEAD_SIZE) {
2246 memcpy(__skb_put(skb, length), va, ALIGN(length, sizeof(long)));
2247
2248 /* We can reuse buffer as-is, just make sure it is local */
2249 if (likely(page_to_nid(desc_cb->priv) == numa_node_id()))
2250 desc_cb->reuse_flag = 1;
2251 else /* This page cannot be reused so discard it */
2252 put_page(desc_cb->priv);
2253
2254 ring_ptr_move_fw(ring, next_to_clean);
2255 } else {
2256 u64_stats_update_begin(&ring->syncp);
2257 ring->stats.seg_pkt_cnt++;
2258 u64_stats_update_end(&ring->syncp);
2259
2260 pull_len = hns3_nic_get_headlen(va, l234info,
2261 HNS3_RX_HEAD_SIZE);
2262 memcpy(__skb_put(skb, pull_len), va,
2263 ALIGN(pull_len, sizeof(long)));
2264
2265 hns3_nic_reuse_page(skb, 0, ring, pull_len, desc_cb);
2266 ring_ptr_move_fw(ring, next_to_clean);
2267
2268 while (!hnae_get_bit(bd_base_info, HNS3_RXD_FE_B)) {
2269 desc = &ring->desc[ring->next_to_clean];
2270 desc_cb = &ring->desc_cb[ring->next_to_clean];
2271 bd_base_info = le32_to_cpu(desc->rx.bd_base_info);
2272 hns3_nic_reuse_page(skb, bnum, ring, 0, desc_cb);
2273 ring_ptr_move_fw(ring, next_to_clean);
2274 bnum++;
2275 }
2276 }
2277
2278 *out_bnum = bnum;
2279
2280 if (unlikely(!hnae_get_bit(bd_base_info, HNS3_RXD_VLD_B))) {
2281 netdev_err(netdev, "no valid bd,%016llx,%016llx\n",
2282 ((u64 *)desc)[0], ((u64 *)desc)[1]);
2283 u64_stats_update_begin(&ring->syncp);
2284 ring->stats.non_vld_descs++;
2285 u64_stats_update_end(&ring->syncp);
2286
2287 dev_kfree_skb_any(skb);
2288 return -EINVAL;
2289 }
2290
2291 if (unlikely((!desc->rx.pkt_len) ||
2292 hnae_get_bit(l234info, HNS3_RXD_TRUNCAT_B))) {
2293 netdev_err(netdev, "truncated pkt\n");
2294 u64_stats_update_begin(&ring->syncp);
2295 ring->stats.err_pkt_len++;
2296 u64_stats_update_end(&ring->syncp);
2297
2298 dev_kfree_skb_any(skb);
2299 return -EFAULT;
2300 }
2301
2302 if (unlikely(hnae_get_bit(l234info, HNS3_RXD_L2E_B))) {
2303 netdev_err(netdev, "L2 error pkt\n");
2304 u64_stats_update_begin(&ring->syncp);
2305 ring->stats.l2_err++;
2306 u64_stats_update_end(&ring->syncp);
2307
2308 dev_kfree_skb_any(skb);
2309 return -EFAULT;
2310 }
2311
2312 u64_stats_update_begin(&ring->syncp);
2313 ring->stats.rx_pkts++;
2314 ring->stats.rx_bytes += skb->len;
2315 u64_stats_update_end(&ring->syncp);
2316
2317 ring->tqp_vector->rx_group.total_bytes += skb->len;
2318
2319 hns3_rx_checksum(ring, skb, desc);
2320 return 0;
2321}
2322
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002323int hns3_clean_rx_ring(
2324 struct hns3_enet_ring *ring, int budget,
2325 void (*rx_fn)(struct hns3_enet_ring *, struct sk_buff *))
Salil76ad4f02017-08-02 16:59:45 +01002326{
2327#define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2328 struct net_device *netdev = ring->tqp->handle->kinfo.netdev;
2329 int recv_pkts, recv_bds, clean_count, err;
2330 int unused_count = hns3_desc_unused(ring);
2331 struct sk_buff *skb = NULL;
2332 int num, bnum = 0;
2333
2334 num = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_FBDNUM_REG);
2335 rmb(); /* Make sure num taken effect before the other data is touched */
2336
2337 recv_pkts = 0, recv_bds = 0, clean_count = 0;
2338 num -= unused_count;
2339
2340 while (recv_pkts < budget && recv_bds < num) {
2341 /* Reuse or realloc buffers */
2342 if (clean_count + unused_count >= RCB_NOF_ALLOC_RX_BUFF_ONCE) {
2343 hns3_nic_alloc_rx_buffers(ring,
2344 clean_count + unused_count);
2345 clean_count = 0;
2346 unused_count = hns3_desc_unused(ring);
2347 }
2348
2349 /* Poll one pkt */
2350 err = hns3_handle_rx_bd(ring, &skb, &bnum);
2351 if (unlikely(!skb)) /* This fault cannot be repaired */
2352 goto out;
2353
2354 recv_bds += bnum;
2355 clean_count += bnum;
2356 if (unlikely(err)) { /* Do jump the err */
2357 recv_pkts++;
2358 continue;
2359 }
2360
2361 /* Do update ip stack process */
2362 skb->protocol = eth_type_trans(skb, netdev);
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002363 rx_fn(ring, skb);
Salil76ad4f02017-08-02 16:59:45 +01002364
2365 recv_pkts++;
2366 }
2367
2368out:
2369 /* Make all data has been write before submit */
2370 if (clean_count + unused_count > 0)
2371 hns3_nic_alloc_rx_buffers(ring,
2372 clean_count + unused_count);
2373
2374 return recv_pkts;
2375}
2376
2377static bool hns3_get_new_int_gl(struct hns3_enet_ring_group *ring_group)
2378{
2379#define HNS3_RX_ULTRA_PACKET_RATE 40000
2380 enum hns3_flow_level_range new_flow_level;
2381 struct hns3_enet_tqp_vector *tqp_vector;
2382 int packets_per_secs;
2383 int bytes_per_usecs;
2384 u16 new_int_gl;
2385 int usecs;
2386
2387 if (!ring_group->int_gl)
2388 return false;
2389
2390 if (ring_group->total_packets == 0) {
2391 ring_group->int_gl = HNS3_INT_GL_50K;
2392 ring_group->flow_level = HNS3_FLOW_LOW;
2393 return true;
2394 }
2395
2396 /* Simple throttlerate management
2397 * 0-10MB/s lower (50000 ints/s)
2398 * 10-20MB/s middle (20000 ints/s)
2399 * 20-1249MB/s high (18000 ints/s)
2400 * > 40000pps ultra (8000 ints/s)
2401 */
2402 new_flow_level = ring_group->flow_level;
2403 new_int_gl = ring_group->int_gl;
2404 tqp_vector = ring_group->ring->tqp_vector;
2405 usecs = (ring_group->int_gl << 1);
2406 bytes_per_usecs = ring_group->total_bytes / usecs;
2407 /* 1000000 microseconds */
2408 packets_per_secs = ring_group->total_packets * 1000000 / usecs;
2409
2410 switch (new_flow_level) {
2411 case HNS3_FLOW_LOW:
2412 if (bytes_per_usecs > 10)
2413 new_flow_level = HNS3_FLOW_MID;
2414 break;
2415 case HNS3_FLOW_MID:
2416 if (bytes_per_usecs > 20)
2417 new_flow_level = HNS3_FLOW_HIGH;
2418 else if (bytes_per_usecs <= 10)
2419 new_flow_level = HNS3_FLOW_LOW;
2420 break;
2421 case HNS3_FLOW_HIGH:
2422 case HNS3_FLOW_ULTRA:
2423 default:
2424 if (bytes_per_usecs <= 20)
2425 new_flow_level = HNS3_FLOW_MID;
2426 break;
2427 }
2428
2429 if ((packets_per_secs > HNS3_RX_ULTRA_PACKET_RATE) &&
2430 (&tqp_vector->rx_group == ring_group))
2431 new_flow_level = HNS3_FLOW_ULTRA;
2432
2433 switch (new_flow_level) {
2434 case HNS3_FLOW_LOW:
2435 new_int_gl = HNS3_INT_GL_50K;
2436 break;
2437 case HNS3_FLOW_MID:
2438 new_int_gl = HNS3_INT_GL_20K;
2439 break;
2440 case HNS3_FLOW_HIGH:
2441 new_int_gl = HNS3_INT_GL_18K;
2442 break;
2443 case HNS3_FLOW_ULTRA:
2444 new_int_gl = HNS3_INT_GL_8K;
2445 break;
2446 default:
2447 break;
2448 }
2449
2450 ring_group->total_bytes = 0;
2451 ring_group->total_packets = 0;
2452 ring_group->flow_level = new_flow_level;
2453 if (new_int_gl != ring_group->int_gl) {
2454 ring_group->int_gl = new_int_gl;
2455 return true;
2456 }
2457 return false;
2458}
2459
2460static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
2461{
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002462 struct hns3_enet_ring_group *rx_group = &tqp_vector->rx_group;
2463 struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
2464 bool rx_update, tx_update;
Salil76ad4f02017-08-02 16:59:45 +01002465
Fuyun Liang8b1ff1e2018-01-12 16:23:12 +08002466 if (rx_group->gl_adapt_enable) {
2467 rx_update = hns3_get_new_int_gl(rx_group);
2468 if (rx_update)
2469 hns3_set_vector_coalesce_rx_gl(tqp_vector,
2470 rx_group->int_gl);
2471 }
2472
2473 if (tx_group->gl_adapt_enable) {
2474 tx_update = hns3_get_new_int_gl(&tqp_vector->tx_group);
2475 if (tx_update)
2476 hns3_set_vector_coalesce_tx_gl(tqp_vector,
2477 tx_group->int_gl);
Salil76ad4f02017-08-02 16:59:45 +01002478 }
2479}
2480
2481static int hns3_nic_common_poll(struct napi_struct *napi, int budget)
2482{
2483 struct hns3_enet_ring *ring;
2484 int rx_pkt_total = 0;
2485
2486 struct hns3_enet_tqp_vector *tqp_vector =
2487 container_of(napi, struct hns3_enet_tqp_vector, napi);
2488 bool clean_complete = true;
2489 int rx_budget;
2490
2491 /* Since the actual Tx work is minimal, we can give the Tx a larger
2492 * budget and be more aggressive about cleaning up the Tx descriptors.
2493 */
2494 hns3_for_each_ring(ring, tqp_vector->tx_group) {
2495 if (!hns3_clean_tx_ring(ring, budget))
2496 clean_complete = false;
2497 }
2498
2499 /* make sure rx ring budget not smaller than 1 */
2500 rx_budget = max(budget / tqp_vector->num_tqps, 1);
2501
2502 hns3_for_each_ring(ring, tqp_vector->rx_group) {
Yunsheng Lind43e5ac2017-10-20 10:19:21 +08002503 int rx_cleaned = hns3_clean_rx_ring(ring, rx_budget,
2504 hns3_rx_skb);
Salil76ad4f02017-08-02 16:59:45 +01002505
2506 if (rx_cleaned >= rx_budget)
2507 clean_complete = false;
2508
2509 rx_pkt_total += rx_cleaned;
2510 }
2511
2512 tqp_vector->rx_group.total_packets += rx_pkt_total;
2513
2514 if (!clean_complete)
2515 return budget;
2516
2517 napi_complete(napi);
2518 hns3_update_new_int_gl(tqp_vector);
2519 hns3_mask_vector_irq(tqp_vector, 1);
2520
2521 return rx_pkt_total;
2522}
2523
2524static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2525 struct hnae3_ring_chain_node *head)
2526{
2527 struct pci_dev *pdev = tqp_vector->handle->pdev;
2528 struct hnae3_ring_chain_node *cur_chain = head;
2529 struct hnae3_ring_chain_node *chain;
2530 struct hns3_enet_ring *tx_ring;
2531 struct hns3_enet_ring *rx_ring;
2532
2533 tx_ring = tqp_vector->tx_group.ring;
2534 if (tx_ring) {
2535 cur_chain->tqp_index = tx_ring->tqp->tqp_index;
2536 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2537 HNAE3_RING_TYPE_TX);
2538
2539 cur_chain->next = NULL;
2540
2541 while (tx_ring->next) {
2542 tx_ring = tx_ring->next;
2543
2544 chain = devm_kzalloc(&pdev->dev, sizeof(*chain),
2545 GFP_KERNEL);
2546 if (!chain)
2547 return -ENOMEM;
2548
2549 cur_chain->next = chain;
2550 chain->tqp_index = tx_ring->tqp->tqp_index;
2551 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2552 HNAE3_RING_TYPE_TX);
2553
2554 cur_chain = chain;
2555 }
2556 }
2557
2558 rx_ring = tqp_vector->rx_group.ring;
2559 if (!tx_ring && rx_ring) {
2560 cur_chain->next = NULL;
2561 cur_chain->tqp_index = rx_ring->tqp->tqp_index;
2562 hnae_set_bit(cur_chain->flag, HNAE3_RING_TYPE_B,
2563 HNAE3_RING_TYPE_RX);
2564
2565 rx_ring = rx_ring->next;
2566 }
2567
2568 while (rx_ring) {
2569 chain = devm_kzalloc(&pdev->dev, sizeof(*chain), GFP_KERNEL);
2570 if (!chain)
2571 return -ENOMEM;
2572
2573 cur_chain->next = chain;
2574 chain->tqp_index = rx_ring->tqp->tqp_index;
2575 hnae_set_bit(chain->flag, HNAE3_RING_TYPE_B,
2576 HNAE3_RING_TYPE_RX);
2577 cur_chain = chain;
2578
2579 rx_ring = rx_ring->next;
2580 }
2581
2582 return 0;
2583}
2584
2585static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector *tqp_vector,
2586 struct hnae3_ring_chain_node *head)
2587{
2588 struct pci_dev *pdev = tqp_vector->handle->pdev;
2589 struct hnae3_ring_chain_node *chain_tmp, *chain;
2590
2591 chain = head->next;
2592
2593 while (chain) {
2594 chain_tmp = chain->next;
2595 devm_kfree(&pdev->dev, chain);
2596 chain = chain_tmp;
2597 }
2598}
2599
2600static void hns3_add_ring_to_group(struct hns3_enet_ring_group *group,
2601 struct hns3_enet_ring *ring)
2602{
2603 ring->next = group->ring;
2604 group->ring = ring;
2605
2606 group->count++;
2607}
2608
2609static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
2610{
2611 struct hnae3_ring_chain_node vector_ring_chain;
2612 struct hnae3_handle *h = priv->ae_handle;
2613 struct hns3_enet_tqp_vector *tqp_vector;
2614 struct hnae3_vector_info *vector;
2615 struct pci_dev *pdev = h->pdev;
2616 u16 tqp_num = h->kinfo.num_tqps;
2617 u16 vector_num;
2618 int ret = 0;
2619 u16 i;
2620
2621 /* RSS size, cpu online and vector_num should be the same */
2622 /* Should consider 2p/4p later */
2623 vector_num = min_t(u16, num_online_cpus(), tqp_num);
2624 vector = devm_kcalloc(&pdev->dev, vector_num, sizeof(*vector),
2625 GFP_KERNEL);
2626 if (!vector)
2627 return -ENOMEM;
2628
2629 vector_num = h->ae_algo->ops->get_vector(h, vector_num, vector);
2630
2631 priv->vector_num = vector_num;
2632 priv->tqp_vector = (struct hns3_enet_tqp_vector *)
2633 devm_kcalloc(&pdev->dev, vector_num, sizeof(*priv->tqp_vector),
2634 GFP_KERNEL);
2635 if (!priv->tqp_vector)
2636 return -ENOMEM;
2637
2638 for (i = 0; i < tqp_num; i++) {
2639 u16 vector_i = i % vector_num;
2640
2641 tqp_vector = &priv->tqp_vector[vector_i];
2642
2643 hns3_add_ring_to_group(&tqp_vector->tx_group,
2644 priv->ring_data[i].ring);
2645
2646 hns3_add_ring_to_group(&tqp_vector->rx_group,
2647 priv->ring_data[i + tqp_num].ring);
2648
2649 tqp_vector->idx = vector_i;
2650 tqp_vector->mask_addr = vector[vector_i].io_addr;
2651 tqp_vector->vector_irq = vector[vector_i].vector;
2652 tqp_vector->num_tqps++;
2653
2654 priv->ring_data[i].ring->tqp_vector = tqp_vector;
2655 priv->ring_data[i + tqp_num].ring->tqp_vector = tqp_vector;
2656 }
2657
2658 for (i = 0; i < vector_num; i++) {
2659 tqp_vector = &priv->tqp_vector[i];
2660
2661 tqp_vector->rx_group.total_bytes = 0;
2662 tqp_vector->rx_group.total_packets = 0;
2663 tqp_vector->tx_group.total_bytes = 0;
2664 tqp_vector->tx_group.total_packets = 0;
Fuyun Liang5fd47892018-01-12 16:23:11 +08002665 hns3_vector_gl_rl_init(tqp_vector, priv);
Salil76ad4f02017-08-02 16:59:45 +01002666 tqp_vector->handle = h;
2667
2668 ret = hns3_get_vector_ring_chain(tqp_vector,
2669 &vector_ring_chain);
2670 if (ret)
2671 goto out;
2672
2673 ret = h->ae_algo->ops->map_ring_to_vector(h,
2674 tqp_vector->vector_irq, &vector_ring_chain);
2675 if (ret)
2676 goto out;
2677
2678 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2679
2680 netif_napi_add(priv->netdev, &tqp_vector->napi,
2681 hns3_nic_common_poll, NAPI_POLL_WEIGHT);
2682 }
2683
2684out:
2685 devm_kfree(&pdev->dev, vector);
2686 return ret;
2687}
2688
2689static int hns3_nic_uninit_vector_data(struct hns3_nic_priv *priv)
2690{
2691 struct hnae3_ring_chain_node vector_ring_chain;
2692 struct hnae3_handle *h = priv->ae_handle;
2693 struct hns3_enet_tqp_vector *tqp_vector;
2694 struct pci_dev *pdev = h->pdev;
2695 int i, ret;
2696
2697 for (i = 0; i < priv->vector_num; i++) {
2698 tqp_vector = &priv->tqp_vector[i];
2699
2700 ret = hns3_get_vector_ring_chain(tqp_vector,
2701 &vector_ring_chain);
2702 if (ret)
2703 return ret;
2704
2705 ret = h->ae_algo->ops->unmap_ring_from_vector(h,
2706 tqp_vector->vector_irq, &vector_ring_chain);
2707 if (ret)
2708 return ret;
2709
2710 hns3_free_vector_ring_chain(tqp_vector, &vector_ring_chain);
2711
2712 if (priv->tqp_vector[i].irq_init_flag == HNS3_VECTOR_INITED) {
2713 (void)irq_set_affinity_hint(
2714 priv->tqp_vector[i].vector_irq,
2715 NULL);
qumingguangae064e62017-11-02 20:45:22 +08002716 free_irq(priv->tqp_vector[i].vector_irq,
2717 &priv->tqp_vector[i]);
Salil76ad4f02017-08-02 16:59:45 +01002718 }
2719
2720 priv->ring_data[i].ring->irq_init_flag = HNS3_VECTOR_NOT_INITED;
2721
2722 netif_napi_del(&priv->tqp_vector[i].napi);
2723 }
2724
2725 devm_kfree(&pdev->dev, priv->tqp_vector);
2726
2727 return 0;
2728}
2729
2730static int hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,
2731 int ring_type)
2732{
2733 struct hns3_nic_ring_data *ring_data = priv->ring_data;
2734 int queue_num = priv->ae_handle->kinfo.num_tqps;
2735 struct pci_dev *pdev = priv->ae_handle->pdev;
2736 struct hns3_enet_ring *ring;
2737
2738 ring = devm_kzalloc(&pdev->dev, sizeof(*ring), GFP_KERNEL);
2739 if (!ring)
2740 return -ENOMEM;
2741
2742 if (ring_type == HNAE3_RING_TYPE_TX) {
2743 ring_data[q->tqp_index].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002744 ring_data[q->tqp_index].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002745 ring->io_base = (u8 __iomem *)q->io_base + HNS3_TX_REG_OFFSET;
2746 } else {
2747 ring_data[q->tqp_index + queue_num].ring = ring;
Lipeng66b44732017-10-23 19:51:05 +08002748 ring_data[q->tqp_index + queue_num].queue_index = q->tqp_index;
Salil76ad4f02017-08-02 16:59:45 +01002749 ring->io_base = q->io_base;
2750 }
2751
2752 hnae_set_bit(ring->flag, HNAE3_RING_TYPE_B, ring_type);
2753
Salil76ad4f02017-08-02 16:59:45 +01002754 ring->tqp = q;
2755 ring->desc = NULL;
2756 ring->desc_cb = NULL;
2757 ring->dev = priv->dev;
2758 ring->desc_dma_addr = 0;
2759 ring->buf_size = q->buf_size;
2760 ring->desc_num = q->desc_num;
2761 ring->next_to_use = 0;
2762 ring->next_to_clean = 0;
2763
2764 return 0;
2765}
2766
2767static int hns3_queue_to_ring(struct hnae3_queue *tqp,
2768 struct hns3_nic_priv *priv)
2769{
2770 int ret;
2771
2772 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_TX);
2773 if (ret)
2774 return ret;
2775
2776 ret = hns3_ring_get_cfg(tqp, priv, HNAE3_RING_TYPE_RX);
2777 if (ret)
2778 return ret;
2779
2780 return 0;
2781}
2782
2783static int hns3_get_ring_config(struct hns3_nic_priv *priv)
2784{
2785 struct hnae3_handle *h = priv->ae_handle;
2786 struct pci_dev *pdev = h->pdev;
2787 int i, ret;
2788
2789 priv->ring_data = devm_kzalloc(&pdev->dev, h->kinfo.num_tqps *
2790 sizeof(*priv->ring_data) * 2,
2791 GFP_KERNEL);
2792 if (!priv->ring_data)
2793 return -ENOMEM;
2794
2795 for (i = 0; i < h->kinfo.num_tqps; i++) {
2796 ret = hns3_queue_to_ring(h->kinfo.tqp[i], priv);
2797 if (ret)
2798 goto err;
2799 }
2800
2801 return 0;
2802err:
2803 devm_kfree(&pdev->dev, priv->ring_data);
2804 return ret;
2805}
2806
Peng Li09f2af62017-12-22 12:21:41 +08002807static void hns3_put_ring_config(struct hns3_nic_priv *priv)
2808{
2809 struct hnae3_handle *h = priv->ae_handle;
2810 int i;
2811
2812 for (i = 0; i < h->kinfo.num_tqps; i++) {
2813 devm_kfree(priv->dev, priv->ring_data[i].ring);
2814 devm_kfree(priv->dev,
2815 priv->ring_data[i + h->kinfo.num_tqps].ring);
2816 }
2817 devm_kfree(priv->dev, priv->ring_data);
2818}
2819
Salil76ad4f02017-08-02 16:59:45 +01002820static int hns3_alloc_ring_memory(struct hns3_enet_ring *ring)
2821{
2822 int ret;
2823
2824 if (ring->desc_num <= 0 || ring->buf_size <= 0)
2825 return -EINVAL;
2826
2827 ring->desc_cb = kcalloc(ring->desc_num, sizeof(ring->desc_cb[0]),
2828 GFP_KERNEL);
2829 if (!ring->desc_cb) {
2830 ret = -ENOMEM;
2831 goto out;
2832 }
2833
2834 ret = hns3_alloc_desc(ring);
2835 if (ret)
2836 goto out_with_desc_cb;
2837
2838 if (!HNAE3_IS_TX_RING(ring)) {
2839 ret = hns3_alloc_ring_buffers(ring);
2840 if (ret)
2841 goto out_with_desc;
2842 }
2843
2844 return 0;
2845
2846out_with_desc:
2847 hns3_free_desc(ring);
2848out_with_desc_cb:
2849 kfree(ring->desc_cb);
2850 ring->desc_cb = NULL;
2851out:
2852 return ret;
2853}
2854
2855static void hns3_fini_ring(struct hns3_enet_ring *ring)
2856{
2857 hns3_free_desc(ring);
2858 kfree(ring->desc_cb);
2859 ring->desc_cb = NULL;
2860 ring->next_to_clean = 0;
2861 ring->next_to_use = 0;
2862}
2863
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08002864static int hns3_buf_size2type(u32 buf_size)
Salil76ad4f02017-08-02 16:59:45 +01002865{
2866 int bd_size_type;
2867
2868 switch (buf_size) {
2869 case 512:
2870 bd_size_type = HNS3_BD_SIZE_512_TYPE;
2871 break;
2872 case 1024:
2873 bd_size_type = HNS3_BD_SIZE_1024_TYPE;
2874 break;
2875 case 2048:
2876 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2877 break;
2878 case 4096:
2879 bd_size_type = HNS3_BD_SIZE_4096_TYPE;
2880 break;
2881 default:
2882 bd_size_type = HNS3_BD_SIZE_2048_TYPE;
2883 }
2884
2885 return bd_size_type;
2886}
2887
2888static void hns3_init_ring_hw(struct hns3_enet_ring *ring)
2889{
2890 dma_addr_t dma = ring->desc_dma_addr;
2891 struct hnae3_queue *q = ring->tqp;
2892
2893 if (!HNAE3_IS_TX_RING(ring)) {
2894 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_L_REG,
2895 (u32)dma);
2896 hns3_write_dev(q, HNS3_RING_RX_RING_BASEADDR_H_REG,
2897 (u32)((dma >> 31) >> 1));
2898
2899 hns3_write_dev(q, HNS3_RING_RX_RING_BD_LEN_REG,
2900 hns3_buf_size2type(ring->buf_size));
2901 hns3_write_dev(q, HNS3_RING_RX_RING_BD_NUM_REG,
2902 ring->desc_num / 8 - 1);
2903
2904 } else {
2905 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_L_REG,
2906 (u32)dma);
2907 hns3_write_dev(q, HNS3_RING_TX_RING_BASEADDR_H_REG,
2908 (u32)((dma >> 31) >> 1));
2909
2910 hns3_write_dev(q, HNS3_RING_TX_RING_BD_LEN_REG,
2911 hns3_buf_size2type(ring->buf_size));
2912 hns3_write_dev(q, HNS3_RING_TX_RING_BD_NUM_REG,
2913 ring->desc_num / 8 - 1);
2914 }
2915}
2916
Lipeng5668abd2017-10-10 16:42:04 +08002917int hns3_init_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01002918{
2919 struct hnae3_handle *h = priv->ae_handle;
2920 int ring_num = h->kinfo.num_tqps * 2;
2921 int i, j;
2922 int ret;
2923
2924 for (i = 0; i < ring_num; i++) {
2925 ret = hns3_alloc_ring_memory(priv->ring_data[i].ring);
2926 if (ret) {
2927 dev_err(priv->dev,
2928 "Alloc ring memory fail! ret=%d\n", ret);
2929 goto out_when_alloc_ring_memory;
2930 }
2931
2932 hns3_init_ring_hw(priv->ring_data[i].ring);
2933
2934 u64_stats_init(&priv->ring_data[i].ring->syncp);
2935 }
2936
2937 return 0;
2938
2939out_when_alloc_ring_memory:
2940 for (j = i - 1; j >= 0; j--)
Lipengee83f772017-10-10 16:42:03 +08002941 hns3_fini_ring(priv->ring_data[j].ring);
Salil76ad4f02017-08-02 16:59:45 +01002942
2943 return -ENOMEM;
2944}
2945
Lipeng5668abd2017-10-10 16:42:04 +08002946int hns3_uninit_all_ring(struct hns3_nic_priv *priv)
Salil76ad4f02017-08-02 16:59:45 +01002947{
2948 struct hnae3_handle *h = priv->ae_handle;
2949 int i;
2950
2951 for (i = 0; i < h->kinfo.num_tqps; i++) {
2952 if (h->ae_algo->ops->reset_queue)
2953 h->ae_algo->ops->reset_queue(h, i);
2954
2955 hns3_fini_ring(priv->ring_data[i].ring);
Peng Li99fdf6b2017-12-22 12:21:43 +08002956 devm_kfree(priv->dev, priv->ring_data[i].ring);
Salil76ad4f02017-08-02 16:59:45 +01002957 hns3_fini_ring(priv->ring_data[i + h->kinfo.num_tqps].ring);
Peng Li99fdf6b2017-12-22 12:21:43 +08002958 devm_kfree(priv->dev,
2959 priv->ring_data[i + h->kinfo.num_tqps].ring);
Salil76ad4f02017-08-02 16:59:45 +01002960 }
Peng Li99fdf6b2017-12-22 12:21:43 +08002961 devm_kfree(priv->dev, priv->ring_data);
Salil76ad4f02017-08-02 16:59:45 +01002962
2963 return 0;
2964}
2965
2966/* Set mac addr if it is configured. or leave it to the AE driver */
2967static void hns3_init_mac_addr(struct net_device *netdev)
2968{
2969 struct hns3_nic_priv *priv = netdev_priv(netdev);
2970 struct hnae3_handle *h = priv->ae_handle;
2971 u8 mac_addr_temp[ETH_ALEN];
2972
2973 if (h->ae_algo->ops->get_mac_addr) {
2974 h->ae_algo->ops->get_mac_addr(h, mac_addr_temp);
2975 ether_addr_copy(netdev->dev_addr, mac_addr_temp);
2976 }
2977
2978 /* Check if the MAC address is valid, if not get a random one */
2979 if (!is_valid_ether_addr(netdev->dev_addr)) {
2980 eth_hw_addr_random(netdev);
2981 dev_warn(priv->dev, "using random MAC address %pM\n",
2982 netdev->dev_addr);
Salil76ad4f02017-08-02 16:59:45 +01002983 }
Lipeng139e8792017-09-19 17:17:13 +01002984
2985 if (h->ae_algo->ops->set_mac_addr)
2986 h->ae_algo->ops->set_mac_addr(h, netdev->dev_addr);
2987
Salil76ad4f02017-08-02 16:59:45 +01002988}
2989
2990static void hns3_nic_set_priv_ops(struct net_device *netdev)
2991{
2992 struct hns3_nic_priv *priv = netdev_priv(netdev);
2993
2994 if ((netdev->features & NETIF_F_TSO) ||
2995 (netdev->features & NETIF_F_TSO6)) {
2996 priv->ops.fill_desc = hns3_fill_desc_tso;
2997 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tso;
2998 } else {
2999 priv->ops.fill_desc = hns3_fill_desc;
3000 priv->ops.maybe_stop_tx = hns3_nic_maybe_stop_tx;
3001 }
3002}
3003
3004static int hns3_client_init(struct hnae3_handle *handle)
3005{
3006 struct pci_dev *pdev = handle->pdev;
3007 struct hns3_nic_priv *priv;
3008 struct net_device *netdev;
3009 int ret;
3010
3011 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv),
3012 handle->kinfo.num_tqps);
3013 if (!netdev)
3014 return -ENOMEM;
3015
3016 priv = netdev_priv(netdev);
3017 priv->dev = &pdev->dev;
3018 priv->netdev = netdev;
3019 priv->ae_handle = handle;
Lipengf8fa222c2017-11-02 20:45:20 +08003020 priv->last_reset_time = jiffies;
3021 priv->reset_level = HNAE3_FUNC_RESET;
3022 priv->tx_timeout_count = 0;
Salil76ad4f02017-08-02 16:59:45 +01003023
3024 handle->kinfo.netdev = netdev;
3025 handle->priv = (void *)priv;
3026
3027 hns3_init_mac_addr(netdev);
3028
3029 hns3_set_default_feature(netdev);
3030
3031 netdev->watchdog_timeo = HNS3_TX_TIMEOUT;
3032 netdev->priv_flags |= IFF_UNICAST_FLT;
3033 netdev->netdev_ops = &hns3_nic_netdev_ops;
3034 SET_NETDEV_DEV(netdev, &pdev->dev);
3035 hns3_ethtool_set_ops(netdev);
3036 hns3_nic_set_priv_ops(netdev);
3037
3038 /* Carrier off reporting is important to ethtool even BEFORE open */
3039 netif_carrier_off(netdev);
3040
3041 ret = hns3_get_ring_config(priv);
3042 if (ret) {
3043 ret = -ENOMEM;
3044 goto out_get_ring_cfg;
3045 }
3046
3047 ret = hns3_nic_init_vector_data(priv);
3048 if (ret) {
3049 ret = -ENOMEM;
3050 goto out_init_vector_data;
3051 }
3052
3053 ret = hns3_init_all_ring(priv);
3054 if (ret) {
3055 ret = -ENOMEM;
3056 goto out_init_ring_data;
3057 }
3058
3059 ret = register_netdev(netdev);
3060 if (ret) {
3061 dev_err(priv->dev, "probe register netdev fail!\n");
3062 goto out_reg_netdev_fail;
3063 }
3064
Yunsheng Lin986743d2017-09-27 09:45:30 +08003065 hns3_dcbnl_setup(handle);
3066
Salila8e8b7f2017-08-21 17:05:24 +01003067 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */
3068 netdev->max_mtu = HNS3_MAX_MTU - (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
3069
Salil76ad4f02017-08-02 16:59:45 +01003070 return ret;
3071
3072out_reg_netdev_fail:
3073out_init_ring_data:
3074 (void)hns3_nic_uninit_vector_data(priv);
3075 priv->ring_data = NULL;
3076out_init_vector_data:
3077out_get_ring_cfg:
3078 priv->ae_handle = NULL;
3079 free_netdev(netdev);
3080 return ret;
3081}
3082
3083static void hns3_client_uninit(struct hnae3_handle *handle, bool reset)
3084{
3085 struct net_device *netdev = handle->kinfo.netdev;
3086 struct hns3_nic_priv *priv = netdev_priv(netdev);
3087 int ret;
3088
3089 if (netdev->reg_state != NETREG_UNINITIALIZED)
3090 unregister_netdev(netdev);
3091
3092 ret = hns3_nic_uninit_vector_data(priv);
3093 if (ret)
3094 netdev_err(netdev, "uninit vector error\n");
3095
3096 ret = hns3_uninit_all_ring(priv);
3097 if (ret)
3098 netdev_err(netdev, "uninit ring error\n");
3099
3100 priv->ring_data = NULL;
3101
3102 free_netdev(netdev);
3103}
3104
3105static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup)
3106{
3107 struct net_device *netdev = handle->kinfo.netdev;
3108
3109 if (!netdev)
3110 return;
3111
3112 if (linkup) {
3113 netif_carrier_on(netdev);
3114 netif_tx_wake_all_queues(netdev);
3115 netdev_info(netdev, "link up\n");
3116 } else {
3117 netif_carrier_off(netdev);
3118 netif_tx_stop_all_queues(netdev);
3119 netdev_info(netdev, "link down\n");
3120 }
3121}
3122
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003123static int hns3_client_setup_tc(struct hnae3_handle *handle, u8 tc)
3124{
3125 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3126 struct net_device *ndev = kinfo->netdev;
Colin Ian King075cfdd2017-09-29 20:51:23 +01003127 bool if_running;
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003128 int ret;
3129 u8 i;
3130
3131 if (tc > HNAE3_MAX_TC)
3132 return -EINVAL;
3133
3134 if (!ndev)
3135 return -ENODEV;
3136
Colin Ian King075cfdd2017-09-29 20:51:23 +01003137 if_running = netif_running(ndev);
3138
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003139 ret = netdev_set_num_tc(ndev, tc);
3140 if (ret)
3141 return ret;
3142
3143 if (if_running) {
3144 (void)hns3_nic_net_stop(ndev);
3145 msleep(100);
3146 }
3147
3148 ret = (kinfo->dcb_ops && kinfo->dcb_ops->map_update) ?
3149 kinfo->dcb_ops->map_update(handle) : -EOPNOTSUPP;
3150 if (ret)
3151 goto err_out;
3152
3153 if (tc <= 1) {
3154 netdev_reset_tc(ndev);
3155 goto out;
3156 }
3157
3158 for (i = 0; i < HNAE3_MAX_TC; i++) {
3159 struct hnae3_tc_info *tc_info = &kinfo->tc_info[i];
3160
3161 if (tc_info->enable)
3162 netdev_set_tc_queue(ndev,
3163 tc_info->tc,
3164 tc_info->tqp_count,
3165 tc_info->tqp_offset);
3166 }
3167
3168 for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {
3169 netdev_set_prio_tc_map(ndev, i,
3170 kinfo->prio_tc[i]);
3171 }
3172
3173out:
3174 ret = hns3_nic_set_real_num_queue(ndev);
3175
3176err_out:
3177 if (if_running)
3178 (void)hns3_nic_net_open(ndev);
3179
3180 return ret;
3181}
3182
Lipengbb6b94a2017-11-02 20:45:21 +08003183static void hns3_recover_hw_addr(struct net_device *ndev)
3184{
3185 struct netdev_hw_addr_list *list;
3186 struct netdev_hw_addr *ha, *tmp;
3187
3188 /* go through and sync uc_addr entries to the device */
3189 list = &ndev->uc;
3190 list_for_each_entry_safe(ha, tmp, &list->list, list)
3191 hns3_nic_uc_sync(ndev, ha->addr);
3192
3193 /* go through and sync mc_addr entries to the device */
3194 list = &ndev->mc;
3195 list_for_each_entry_safe(ha, tmp, &list->list, list)
3196 hns3_nic_mc_sync(ndev, ha->addr);
3197}
3198
3199static void hns3_drop_skb_data(struct hns3_enet_ring *ring, struct sk_buff *skb)
3200{
3201 dev_kfree_skb_any(skb);
3202}
3203
3204static void hns3_clear_all_ring(struct hnae3_handle *h)
3205{
3206 struct net_device *ndev = h->kinfo.netdev;
3207 struct hns3_nic_priv *priv = netdev_priv(ndev);
3208 u32 i;
3209
3210 for (i = 0; i < h->kinfo.num_tqps; i++) {
3211 struct netdev_queue *dev_queue;
3212 struct hns3_enet_ring *ring;
3213
3214 ring = priv->ring_data[i].ring;
3215 hns3_clean_tx_ring(ring, ring->desc_num);
3216 dev_queue = netdev_get_tx_queue(ndev,
3217 priv->ring_data[i].queue_index);
3218 netdev_tx_reset_queue(dev_queue);
3219
3220 ring = priv->ring_data[i + h->kinfo.num_tqps].ring;
3221 hns3_clean_rx_ring(ring, ring->desc_num, hns3_drop_skb_data);
3222 }
3223}
3224
3225static int hns3_reset_notify_down_enet(struct hnae3_handle *handle)
3226{
3227 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3228 struct net_device *ndev = kinfo->netdev;
3229
3230 if (!netif_running(ndev))
3231 return -EIO;
3232
3233 return hns3_nic_net_stop(ndev);
3234}
3235
3236static int hns3_reset_notify_up_enet(struct hnae3_handle *handle)
3237{
3238 struct hnae3_knic_private_info *kinfo = &handle->kinfo;
3239 struct hns3_nic_priv *priv = netdev_priv(kinfo->netdev);
3240 int ret = 0;
3241
3242 if (netif_running(kinfo->netdev)) {
3243 ret = hns3_nic_net_up(kinfo->netdev);
3244 if (ret) {
3245 netdev_err(kinfo->netdev,
3246 "hns net up fail, ret=%d!\n", ret);
3247 return ret;
3248 }
3249
3250 priv->last_reset_time = jiffies;
3251 }
3252
3253 return ret;
3254}
3255
3256static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
3257{
3258 struct net_device *netdev = handle->kinfo.netdev;
3259 struct hns3_nic_priv *priv = netdev_priv(netdev);
3260 int ret;
3261
3262 priv->reset_level = 1;
3263 hns3_init_mac_addr(netdev);
3264 hns3_nic_set_rx_mode(netdev);
3265 hns3_recover_hw_addr(netdev);
3266
3267 /* Carrier off reporting is important to ethtool even BEFORE open */
3268 netif_carrier_off(netdev);
3269
3270 ret = hns3_get_ring_config(priv);
3271 if (ret)
3272 return ret;
3273
3274 ret = hns3_nic_init_vector_data(priv);
3275 if (ret)
3276 return ret;
3277
3278 ret = hns3_init_all_ring(priv);
3279 if (ret) {
3280 hns3_nic_uninit_vector_data(priv);
3281 priv->ring_data = NULL;
3282 }
3283
3284 return ret;
3285}
3286
3287static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle)
3288{
3289 struct net_device *netdev = handle->kinfo.netdev;
3290 struct hns3_nic_priv *priv = netdev_priv(netdev);
3291 int ret;
3292
3293 hns3_clear_all_ring(handle);
3294
3295 ret = hns3_nic_uninit_vector_data(priv);
3296 if (ret) {
3297 netdev_err(netdev, "uninit vector error\n");
3298 return ret;
3299 }
3300
3301 ret = hns3_uninit_all_ring(priv);
3302 if (ret)
3303 netdev_err(netdev, "uninit ring error\n");
3304
3305 priv->ring_data = NULL;
3306
3307 return ret;
3308}
3309
3310static int hns3_reset_notify(struct hnae3_handle *handle,
3311 enum hnae3_reset_notify_type type)
3312{
3313 int ret = 0;
3314
3315 switch (type) {
3316 case HNAE3_UP_CLIENT:
3317 ret = hns3_reset_notify_up_enet(handle);
3318 break;
3319 case HNAE3_DOWN_CLIENT:
3320 ret = hns3_reset_notify_down_enet(handle);
3321 break;
3322 case HNAE3_INIT_CLIENT:
3323 ret = hns3_reset_notify_init_enet(handle);
3324 break;
3325 case HNAE3_UNINIT_CLIENT:
3326 ret = hns3_reset_notify_uninit_enet(handle);
3327 break;
3328 default:
3329 break;
3330 }
3331
3332 return ret;
3333}
3334
Peng Li09f2af62017-12-22 12:21:41 +08003335static u16 hns3_get_max_available_channels(struct net_device *netdev)
3336{
3337 struct hnae3_handle *h = hns3_get_handle(netdev);
3338 u16 free_tqps, max_rss_size, max_tqps;
3339
3340 h->ae_algo->ops->get_tqps_and_rss_info(h, &free_tqps, &max_rss_size);
3341 max_tqps = h->kinfo.num_tc * max_rss_size;
3342
3343 return min_t(u16, max_tqps, (free_tqps + h->kinfo.num_tqps));
3344}
3345
3346static int hns3_modify_tqp_num(struct net_device *netdev, u16 new_tqp_num)
3347{
3348 struct hns3_nic_priv *priv = netdev_priv(netdev);
3349 struct hnae3_handle *h = hns3_get_handle(netdev);
3350 int ret;
3351
3352 ret = h->ae_algo->ops->set_channels(h, new_tqp_num);
3353 if (ret)
3354 return ret;
3355
3356 ret = hns3_get_ring_config(priv);
3357 if (ret)
3358 return ret;
3359
3360 ret = hns3_nic_init_vector_data(priv);
3361 if (ret)
3362 goto err_uninit_vector;
3363
3364 ret = hns3_init_all_ring(priv);
3365 if (ret)
3366 goto err_put_ring;
3367
3368 return 0;
3369
3370err_put_ring:
3371 hns3_put_ring_config(priv);
3372err_uninit_vector:
3373 hns3_nic_uninit_vector_data(priv);
3374 return ret;
3375}
3376
3377static int hns3_adjust_tqps_num(u8 num_tc, u32 new_tqp_num)
3378{
3379 return (new_tqp_num / num_tc) * num_tc;
3380}
3381
3382int hns3_set_channels(struct net_device *netdev,
3383 struct ethtool_channels *ch)
3384{
3385 struct hns3_nic_priv *priv = netdev_priv(netdev);
3386 struct hnae3_handle *h = hns3_get_handle(netdev);
3387 struct hnae3_knic_private_info *kinfo = &h->kinfo;
3388 bool if_running = netif_running(netdev);
3389 u32 new_tqp_num = ch->combined_count;
3390 u16 org_tqp_num;
3391 int ret;
3392
3393 if (ch->rx_count || ch->tx_count)
3394 return -EINVAL;
3395
3396 if (new_tqp_num > hns3_get_max_available_channels(netdev) ||
3397 new_tqp_num < kinfo->num_tc) {
3398 dev_err(&netdev->dev,
3399 "Change tqps fail, the tqp range is from %d to %d",
3400 kinfo->num_tc,
3401 hns3_get_max_available_channels(netdev));
3402 return -EINVAL;
3403 }
3404
3405 new_tqp_num = hns3_adjust_tqps_num(kinfo->num_tc, new_tqp_num);
3406 if (kinfo->num_tqps == new_tqp_num)
3407 return 0;
3408
3409 if (if_running)
3410 dev_close(netdev);
3411
3412 hns3_clear_all_ring(h);
3413
3414 ret = hns3_nic_uninit_vector_data(priv);
3415 if (ret) {
3416 dev_err(&netdev->dev,
3417 "Unbind vector with tqp fail, nothing is changed");
3418 goto open_netdev;
3419 }
3420
3421 hns3_uninit_all_ring(priv);
3422
3423 org_tqp_num = h->kinfo.num_tqps;
3424 ret = hns3_modify_tqp_num(netdev, new_tqp_num);
3425 if (ret) {
3426 ret = hns3_modify_tqp_num(netdev, org_tqp_num);
3427 if (ret) {
3428 /* If revert to old tqp failed, fatal error occurred */
3429 dev_err(&netdev->dev,
3430 "Revert to old tqp num fail, ret=%d", ret);
3431 return ret;
3432 }
3433 dev_info(&netdev->dev,
3434 "Change tqp num fail, Revert to old tqp num");
3435 }
3436
3437open_netdev:
3438 if (if_running)
3439 dev_open(netdev);
3440
3441 return ret;
3442}
3443
Yunsheng Lin1db9b1b2017-10-09 15:44:01 +08003444static const struct hnae3_client_ops client_ops = {
Salil76ad4f02017-08-02 16:59:45 +01003445 .init_instance = hns3_client_init,
3446 .uninit_instance = hns3_client_uninit,
3447 .link_status_change = hns3_link_status_change,
Yunsheng Lin9df8f792017-09-27 09:45:32 +08003448 .setup_tc = hns3_client_setup_tc,
Lipengbb6b94a2017-11-02 20:45:21 +08003449 .reset_notify = hns3_reset_notify,
Salil76ad4f02017-08-02 16:59:45 +01003450};
3451
3452/* hns3_init_module - Driver registration routine
3453 * hns3_init_module is the first routine called when the driver is
3454 * loaded. All it does is register with the PCI subsystem.
3455 */
3456static int __init hns3_init_module(void)
3457{
3458 int ret;
3459
3460 pr_info("%s: %s - version\n", hns3_driver_name, hns3_driver_string);
3461 pr_info("%s: %s\n", hns3_driver_name, hns3_copyright);
3462
3463 client.type = HNAE3_CLIENT_KNIC;
3464 snprintf(client.name, HNAE3_CLIENT_NAME_LENGTH - 1, "%s",
3465 hns3_driver_name);
3466
3467 client.ops = &client_ops;
3468
3469 ret = hnae3_register_client(&client);
3470 if (ret)
3471 return ret;
3472
3473 ret = pci_register_driver(&hns3_driver);
3474 if (ret)
3475 hnae3_unregister_client(&client);
3476
3477 return ret;
3478}
3479module_init(hns3_init_module);
3480
3481/* hns3_exit_module - Driver exit cleanup routine
3482 * hns3_exit_module is called just before the driver is removed
3483 * from memory.
3484 */
3485static void __exit hns3_exit_module(void)
3486{
3487 pci_unregister_driver(&hns3_driver);
3488 hnae3_unregister_client(&client);
3489}
3490module_exit(hns3_exit_module);
3491
3492MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
3493MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3494MODULE_LICENSE("GPL");
3495MODULE_ALIAS("pci:hns-nic");