blob: 2f2150f9639fa054716e4df9e2f21df40440c048 [file] [log] [blame]
Ezequiel Garciafa0d6542013-04-02 01:37:41 +00001/*
Miquel Raynala9d58a12017-12-22 17:14:10 +01002 * Marvell EBU Armada SoCs thermal sensor driver
Ezequiel Garciafa0d6542013-04-02 01:37:41 +00003 *
4 * Copyright (C) 2013 Marvell
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16#include <linux/device.h>
17#include <linux/err.h>
18#include <linux/io.h>
19#include <linux/kernel.h>
20#include <linux/of.h>
21#include <linux/module.h>
22#include <linux/delay.h>
23#include <linux/platform_device.h>
24#include <linux/of_device.h>
25#include <linux/thermal.h>
Miquel Raynal64163682017-12-22 17:14:12 +010026#include <linux/iopoll.h>
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000027
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000028/* Thermal Manager Control and Status Register */
29#define PMU_TDC0_SW_RST_MASK (0x1 << 1)
30#define PMU_TM_DISABLE_OFFS 0
31#define PMU_TM_DISABLE_MASK (0x1 << PMU_TM_DISABLE_OFFS)
32#define PMU_TDC0_REF_CAL_CNT_OFFS 11
33#define PMU_TDC0_REF_CAL_CNT_MASK (0x1ff << PMU_TDC0_REF_CAL_CNT_OFFS)
34#define PMU_TDC0_OTF_CAL_MASK (0x1 << 30)
35#define PMU_TDC0_START_CAL_MASK (0x1 << 25)
36
Ezequiel Garciae2d5f052014-05-06 13:59:50 -030037#define A375_UNIT_CONTROL_SHIFT 27
38#define A375_UNIT_CONTROL_MASK 0x7
39#define A375_READOUT_INVERT BIT(15)
40#define A375_HW_RESETn BIT(8)
41
Miquel Raynal2f28e4c2017-12-22 17:14:06 +010042/* Legacy bindings */
43#define LEGACY_CONTROL_MEM_LEN 0x4
44
45/* Current bindings with the 2 control registers under the same memory area */
46#define LEGACY_CONTROL1_OFFSET 0x0
47#define CONTROL0_OFFSET 0x0
48#define CONTROL1_OFFSET 0x4
49
Miquel Raynal8c0b8882017-12-22 17:14:11 +010050/* Errata fields */
51#define CONTROL0_TSEN_TC_TRIM_MASK 0x7
52#define CONTROL0_TSEN_TC_TRIM_VAL 0x3
53
Baruch Siach2ff12792017-12-22 17:14:08 +010054#define CONTROL0_TSEN_START BIT(0)
55#define CONTROL0_TSEN_RESET BIT(1)
56#define CONTROL0_TSEN_ENABLE BIT(2)
57
Baruch Siachccf8f522017-12-22 17:14:09 +010058#define CONTROL1_EXT_TSEN_SW_RESET BIT(7)
59#define CONTROL1_EXT_TSEN_HW_RESETn BIT(8)
60
Miquel Raynal64163682017-12-22 17:14:12 +010061#define STATUS_POLL_PERIOD_US 1000
62#define STATUS_POLL_TIMEOUT_US 100000
63
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -030064struct armada_thermal_data;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000065
66/* Marvell EBU Thermal Sensor Dev Structure */
67struct armada_thermal_priv {
Miquel Raynal8371b8a2017-12-22 17:14:07 +010068 void __iomem *status;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +010069 void __iomem *control0;
70 void __iomem *control1;
Miquel Raynal8d987612018-07-16 16:41:44 +020071 char zone_name[THERMAL_NAME_LENGTH];
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -030072 struct armada_thermal_data *data;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000073};
74
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -030075struct armada_thermal_data {
Miquel Raynal8b4c2712018-07-16 16:41:47 +020076 /* Initialize the thermal IC */
77 void (*init)(struct platform_device *pdev,
78 struct armada_thermal_priv *priv);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000079
80 /* Test for a valid sensor value (optional) */
81 bool (*is_valid)(struct armada_thermal_priv *);
Ezequiel Garcia9484bc62014-05-06 13:59:46 -030082
Baruch Siach0cf3a1a2017-09-14 18:06:57 +030083 /* Formula coeficients: temp = (b - m * reg) / div */
Baruch Siach2ff12792017-12-22 17:14:08 +010084 s64 coef_b;
85 s64 coef_m;
86 u32 coef_div;
Ezequiel Garciafd2c94d2014-05-06 13:59:49 -030087 bool inverted;
Baruch Siach2ff12792017-12-22 17:14:08 +010088 bool signed_sample;
Ezequiel Garcia1fcacca2014-05-06 13:59:47 -030089
90 /* Register shift and mask to access the sensor temperature */
91 unsigned int temp_shift;
92 unsigned int temp_mask;
Miquel Raynal27d92f22017-12-22 17:14:05 +010093 u32 is_valid_bit;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +010094 bool needs_control0;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000095};
96
Miquel Raynal8b4c2712018-07-16 16:41:47 +020097static void armadaxp_init(struct platform_device *pdev,
98 struct armada_thermal_priv *priv)
Ezequiel Garciafa0d6542013-04-02 01:37:41 +000099{
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100100 u32 reg;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000101
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100102 reg = readl_relaxed(priv->control1);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000103 reg |= PMU_TDC0_OTF_CAL_MASK;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000104
105 /* Reference calibration value */
106 reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
107 reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000108
109 /* Reset the sensor */
Miquel Raynal931d3c52018-07-16 16:41:45 +0200110 reg |= PMU_TDC0_SW_RST_MASK;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000111
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100112 writel(reg, priv->control1);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000113
114 /* Enable the sensor */
Miquel Raynal8371b8a2017-12-22 17:14:07 +0100115 reg = readl_relaxed(priv->status);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000116 reg &= ~PMU_TM_DISABLE_MASK;
Miquel Raynal8371b8a2017-12-22 17:14:07 +0100117 writel(reg, priv->status);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000118}
119
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200120static void armada370_init(struct platform_device *pdev,
121 struct armada_thermal_priv *priv)
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000122{
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100123 u32 reg;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000124
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100125 reg = readl_relaxed(priv->control1);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000126 reg |= PMU_TDC0_OTF_CAL_MASK;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000127
128 /* Reference calibration value */
129 reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
130 reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000131
132 reg &= ~PMU_TDC0_START_CAL_MASK;
Miquel Raynal931d3c52018-07-16 16:41:45 +0200133
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100134 writel(reg, priv->control1);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000135
Baruch Siach7f3be012017-12-22 17:14:04 +0100136 msleep(10);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000137}
138
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200139static void armada375_init(struct platform_device *pdev,
140 struct armada_thermal_priv *priv)
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300141{
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100142 u32 reg;
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300143
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100144 reg = readl(priv->control1);
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300145 reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
146 reg &= ~A375_READOUT_INVERT;
147 reg &= ~A375_HW_RESETn;
148
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100149 writel(reg, priv->control1);
Baruch Siach7f3be012017-12-22 17:14:04 +0100150 msleep(20);
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300151
152 reg |= A375_HW_RESETn;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100153 writel(reg, priv->control1);
Baruch Siach7f3be012017-12-22 17:14:04 +0100154 msleep(50);
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300155}
156
Miquel Raynal64163682017-12-22 17:14:12 +0100157static void armada_wait_sensor_validity(struct armada_thermal_priv *priv)
158{
159 u32 reg;
160
161 readl_relaxed_poll_timeout(priv->status, reg,
162 reg & priv->data->is_valid_bit,
163 STATUS_POLL_PERIOD_US,
164 STATUS_POLL_TIMEOUT_US);
165}
166
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200167static void armada380_init(struct platform_device *pdev,
168 struct armada_thermal_priv *priv)
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300169{
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100170 u32 reg = readl_relaxed(priv->control1);
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300171
Baruch Siachccf8f522017-12-22 17:14:09 +0100172 /* Disable the HW/SW reset */
173 reg |= CONTROL1_EXT_TSEN_HW_RESETn;
174 reg &= ~CONTROL1_EXT_TSEN_SW_RESET;
175 writel(reg, priv->control1);
Miquel Raynal8c0b8882017-12-22 17:14:11 +0100176
177 /* Set Tsen Tc Trim to correct default value (errata #132698) */
178 if (priv->control0) {
179 reg = readl_relaxed(priv->control0);
180 reg &= ~CONTROL0_TSEN_TC_TRIM_MASK;
181 reg |= CONTROL0_TSEN_TC_TRIM_VAL;
182 writel(reg, priv->control0);
Miquel Raynal8c0b8882017-12-22 17:14:11 +0100183 }
Miquel Raynal64163682017-12-22 17:14:12 +0100184
185 /* Wait the sensors to be valid or the core will warn the user */
186 armada_wait_sensor_validity(priv);
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300187}
188
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200189static void armada_ap806_init(struct platform_device *pdev,
190 struct armada_thermal_priv *priv)
Baruch Siach2ff12792017-12-22 17:14:08 +0100191{
192 u32 reg;
193
194 reg = readl_relaxed(priv->control0);
195 reg &= ~CONTROL0_TSEN_RESET;
196 reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE;
197 writel(reg, priv->control0);
Miquel Raynal64163682017-12-22 17:14:12 +0100198
199 /* Wait the sensors to be valid or the core will warn the user */
200 armada_wait_sensor_validity(priv);
Baruch Siach2ff12792017-12-22 17:14:08 +0100201}
202
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000203static bool armada_is_valid(struct armada_thermal_priv *priv)
204{
Miquel Raynal8371b8a2017-12-22 17:14:07 +0100205 u32 reg = readl_relaxed(priv->status);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000206
Miquel Raynal27d92f22017-12-22 17:14:05 +0100207 return reg & priv->data->is_valid_bit;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000208}
209
210static int armada_get_temp(struct thermal_zone_device *thermal,
Baruch Siach2ff12792017-12-22 17:14:08 +0100211 int *temp)
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000212{
213 struct armada_thermal_priv *priv = thermal->devdata;
Baruch Siach2ff12792017-12-22 17:14:08 +0100214 u32 reg, div;
215 s64 sample, b, m;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000216
217 /* Valid check */
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300218 if (priv->data->is_valid && !priv->data->is_valid(priv)) {
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000219 dev_err(&thermal->device,
220 "Temperature sensor reading not valid\n");
221 return -EIO;
222 }
223
Miquel Raynal8371b8a2017-12-22 17:14:07 +0100224 reg = readl_relaxed(priv->status);
Ezequiel Garcia1fcacca2014-05-06 13:59:47 -0300225 reg = (reg >> priv->data->temp_shift) & priv->data->temp_mask;
Baruch Siach2ff12792017-12-22 17:14:08 +0100226 if (priv->data->signed_sample)
227 /* The most significant bit is the sign bit */
228 sample = sign_extend32(reg, fls(priv->data->temp_mask) - 1);
229 else
230 sample = reg;
Ezequiel Garcia9484bc62014-05-06 13:59:46 -0300231
232 /* Get formula coeficients */
233 b = priv->data->coef_b;
234 m = priv->data->coef_m;
235 div = priv->data->coef_div;
236
Ezequiel Garciafd2c94d2014-05-06 13:59:49 -0300237 if (priv->data->inverted)
Baruch Siach2ff12792017-12-22 17:14:08 +0100238 *temp = div_s64((m * sample) - b, div);
Ezequiel Garciafd2c94d2014-05-06 13:59:49 -0300239 else
Baruch Siach2ff12792017-12-22 17:14:08 +0100240 *temp = div_s64(b - (m * sample), div);
241
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000242 return 0;
243}
244
245static struct thermal_zone_device_ops ops = {
246 .get_temp = armada_get_temp,
247};
248
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300249static const struct armada_thermal_data armadaxp_data = {
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200250 .init = armadaxp_init,
Ezequiel Garcia1fcacca2014-05-06 13:59:47 -0300251 .temp_shift = 10,
252 .temp_mask = 0x1ff,
Baruch Siach2ff12792017-12-22 17:14:08 +0100253 .coef_b = 3153000000ULL,
254 .coef_m = 10000000ULL,
Ezequiel Garcia9484bc62014-05-06 13:59:46 -0300255 .coef_div = 13825,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000256};
257
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300258static const struct armada_thermal_data armada370_data = {
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000259 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200260 .init = armada370_init,
Miquel Raynal27d92f22017-12-22 17:14:05 +0100261 .is_valid_bit = BIT(9),
Ezequiel Garcia1fcacca2014-05-06 13:59:47 -0300262 .temp_shift = 10,
263 .temp_mask = 0x1ff,
Baruch Siach2ff12792017-12-22 17:14:08 +0100264 .coef_b = 3153000000ULL,
265 .coef_m = 10000000ULL,
Ezequiel Garcia9484bc62014-05-06 13:59:46 -0300266 .coef_div = 13825,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000267};
268
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300269static const struct armada_thermal_data armada375_data = {
270 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200271 .init = armada375_init,
Miquel Raynal27d92f22017-12-22 17:14:05 +0100272 .is_valid_bit = BIT(10),
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300273 .temp_shift = 0,
274 .temp_mask = 0x1ff,
Baruch Siach2ff12792017-12-22 17:14:08 +0100275 .coef_b = 3171900000ULL,
276 .coef_m = 10000000ULL,
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300277 .coef_div = 13616,
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100278 .needs_control0 = true,
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300279};
280
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300281static const struct armada_thermal_data armada380_data = {
282 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200283 .init = armada380_init,
Miquel Raynal27d92f22017-12-22 17:14:05 +0100284 .is_valid_bit = BIT(10),
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300285 .temp_shift = 0,
286 .temp_mask = 0x3ff,
Baruch Siach2ff12792017-12-22 17:14:08 +0100287 .coef_b = 1172499100ULL,
288 .coef_m = 2000096ULL,
Nadav Haklaib56100d2015-08-06 18:03:49 +0200289 .coef_div = 4201,
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300290 .inverted = true,
291};
292
Baruch Siach2ff12792017-12-22 17:14:08 +0100293static const struct armada_thermal_data armada_ap806_data = {
294 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200295 .init = armada_ap806_init,
Baruch Siach2ff12792017-12-22 17:14:08 +0100296 .is_valid_bit = BIT(16),
297 .temp_shift = 0,
298 .temp_mask = 0x3ff,
299 .coef_b = -150000LL,
300 .coef_m = 423ULL,
301 .coef_div = 1,
302 .inverted = true,
303 .signed_sample = true,
304 .needs_control0 = true,
305};
306
Baruch Siachccf8f522017-12-22 17:14:09 +0100307static const struct armada_thermal_data armada_cp110_data = {
308 .is_valid = armada_is_valid,
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200309 .init = armada380_init,
Baruch Siachccf8f522017-12-22 17:14:09 +0100310 .is_valid_bit = BIT(10),
311 .temp_shift = 0,
312 .temp_mask = 0x3ff,
313 .coef_b = 1172499100ULL,
314 .coef_m = 2000096ULL,
315 .coef_div = 4201,
316 .inverted = true,
317 .needs_control0 = true,
318};
319
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000320static const struct of_device_id armada_thermal_id_table[] = {
321 {
322 .compatible = "marvell,armadaxp-thermal",
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300323 .data = &armadaxp_data,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000324 },
325 {
326 .compatible = "marvell,armada370-thermal",
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300327 .data = &armada370_data,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000328 },
329 {
Ezequiel Garciae2d5f052014-05-06 13:59:50 -0300330 .compatible = "marvell,armada375-thermal",
331 .data = &armada375_data,
332 },
333 {
Ezequiel Garciae6e0a682014-05-06 13:59:51 -0300334 .compatible = "marvell,armada380-thermal",
335 .data = &armada380_data,
336 },
337 {
Baruch Siach2ff12792017-12-22 17:14:08 +0100338 .compatible = "marvell,armada-ap806-thermal",
339 .data = &armada_ap806_data,
340 },
341 {
Baruch Siachccf8f522017-12-22 17:14:09 +0100342 .compatible = "marvell,armada-cp110-thermal",
343 .data = &armada_cp110_data,
344 },
345 {
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000346 /* sentinel */
347 },
348};
349MODULE_DEVICE_TABLE(of, armada_thermal_id_table);
350
Miquel Raynal8d987612018-07-16 16:41:44 +0200351static void armada_set_sane_name(struct platform_device *pdev,
352 struct armada_thermal_priv *priv)
353{
354 const char *name = dev_name(&pdev->dev);
355 char *insane_char;
356
357 if (strlen(name) > THERMAL_NAME_LENGTH) {
358 /*
359 * When inside a system controller, the device name has the
360 * form: f06f8000.system-controller:ap-thermal so stripping
361 * after the ':' should give us a shorter but meaningful name.
362 */
363 name = strrchr(name, ':');
364 if (!name)
365 name = "armada_thermal";
366 else
367 name++;
368 }
369
370 /* Save the name locally */
371 strncpy(priv->zone_name, name, THERMAL_NAME_LENGTH - 1);
372 priv->zone_name[THERMAL_NAME_LENGTH - 1] = '\0';
373
374 /* Then check there are no '-' or hwmon core will complain */
375 do {
376 insane_char = strpbrk(priv->zone_name, "-");
377 if (insane_char)
378 *insane_char = '_';
379 } while (insane_char);
380}
381
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000382static int armada_thermal_probe(struct platform_device *pdev)
383{
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100384 void __iomem *control = NULL;
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000385 struct thermal_zone_device *thermal;
386 const struct of_device_id *match;
387 struct armada_thermal_priv *priv;
388 struct resource *res;
389
390 match = of_match_device(armada_thermal_id_table, &pdev->dev);
391 if (!match)
392 return -ENODEV;
393
394 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
395 if (!priv)
396 return -ENOMEM;
397
398 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Miquel Raynal8371b8a2017-12-22 17:14:07 +0100399 priv->status = devm_ioremap_resource(&pdev->dev, res);
400 if (IS_ERR(priv->status))
401 return PTR_ERR(priv->status);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000402
403 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100404 control = devm_ioremap_resource(&pdev->dev, res);
405 if (IS_ERR(control))
406 return PTR_ERR(control);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000407
Ezequiel Garcia66fdb7b2014-05-06 13:59:45 -0300408 priv->data = (struct armada_thermal_data *)match->data;
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100409
Miquel Raynal8d987612018-07-16 16:41:44 +0200410 /* Ensure device name is correct for the thermal core */
411 armada_set_sane_name(pdev, priv);
412
Miquel Raynal2f28e4c2017-12-22 17:14:06 +0100413 /*
414 * Legacy DT bindings only described "control1" register (also referred
415 * as "control MSB" on old documentation). New bindings cover
416 * "control0/control LSB" and "control1/control MSB" registers within
417 * the same resource, which is then of size 8 instead of 4.
418 */
419 if (resource_size(res) == LEGACY_CONTROL_MEM_LEN) {
420 /* ->control0 unavailable in this configuration */
421 if (priv->data->needs_control0) {
422 dev_err(&pdev->dev, "No access to control0 register\n");
423 return -EINVAL;
424 }
425
426 priv->control1 = control + LEGACY_CONTROL1_OFFSET;
427 } else {
428 priv->control0 = control + CONTROL0_OFFSET;
429 priv->control1 = control + CONTROL1_OFFSET;
430 }
431
Miquel Raynal8b4c2712018-07-16 16:41:47 +0200432 priv->data->init(pdev, priv);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000433
Miquel Raynal8d987612018-07-16 16:41:44 +0200434 thermal = thermal_zone_device_register(priv->zone_name, 0, 0, priv,
Miquel Raynalf80ee032017-12-22 17:14:13 +0100435 &ops, NULL, 0, 0);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000436 if (IS_ERR(thermal)) {
437 dev_err(&pdev->dev,
438 "Failed to register thermal zone device\n");
439 return PTR_ERR(thermal);
440 }
441
442 platform_set_drvdata(pdev, thermal);
443
444 return 0;
445}
446
447static int armada_thermal_exit(struct platform_device *pdev)
448{
449 struct thermal_zone_device *armada_thermal =
450 platform_get_drvdata(pdev);
451
452 thermal_zone_device_unregister(armada_thermal);
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000453
454 return 0;
455}
456
457static struct platform_driver armada_thermal_driver = {
458 .probe = armada_thermal_probe,
459 .remove = armada_thermal_exit,
460 .driver = {
461 .name = "armada_thermal",
Sachin Kamat1d089e02013-05-16 10:28:08 +0000462 .of_match_table = armada_thermal_id_table,
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000463 },
464};
465
466module_platform_driver(armada_thermal_driver);
467
468MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>");
Miquel Raynala9d58a12017-12-22 17:14:10 +0100469MODULE_DESCRIPTION("Marvell EBU Armada SoCs thermal driver");
Ezequiel Garciafa0d6542013-04-02 01:37:41 +0000470MODULE_LICENSE("GPL v2");