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gerrit-public.fairphone.software / kernel / msm-5.4 / 8e5b26b55a8b6aee2c789b1d20ec715f9e4bea5c / . / arch / powerpc / kvm / e500_emulate.c
blob: 7644f7a9bac3a3207c9dde0118ad5b715540cfa1 [file] [log] [blame]
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]1/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: Yu Liu, <yu.liu@freescale.com>
5 *
6 * Description:
7 * This file is derived from arch/powerpc/kvm/44x_emulate.c,
8 * by Hollis Blanchard <hollisb@us.ibm.com>.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
13 */
14
15#include <asm/kvm_ppc.h>
16#include <asm/disassemble.h>
17#include <asm/kvm_e500.h>
18
19#include "booke.h"
20#include "e500_tlb.h"
21
22#define XOP_TLBIVAX 786
23#define XOP_TLBSX 914
24#define XOP_TLBRE 946
25#define XOP_TLBWE 978
26
27int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
28 unsigned int inst, int *advance)
29{
30 int emulated = EMULATE_DONE;
31 int ra;
32 int rb;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]33
34 switch (get_op(inst)) {
35 case 31:
36 switch (get_xop(inst)) {
37
38 case XOP_TLBRE:
39 emulated = kvmppc_e500_emul_tlbre(vcpu);
40 break;
41
42 case XOP_TLBWE:
43 emulated = kvmppc_e500_emul_tlbwe(vcpu);
44 break;
45
46 case XOP_TLBSX:
47 rb = get_rb(inst);
48 emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
49 break;
50
51 case XOP_TLBIVAX:
52 ra = get_ra(inst);
53 rb = get_rb(inst);
54 emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
55 break;
56
57 default:
58 emulated = EMULATE_FAIL;
59 }
60
61 break;
62
63 default:
64 emulated = EMULATE_FAIL;
65 }
66
67 if (emulated == EMULATE_FAIL)
68 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
69
70 return emulated;
71}
72
73int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
74{
75 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
76 int emulated = EMULATE_DONE;
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]77 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]78
79 switch (sprn) {
80 case SPRN_PID:
81 vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]82 vcpu->arch.pid = spr_val;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]83 break;
84 case SPRN_PID1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]85 vcpu_e500->pid[1] = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]86 case SPRN_PID2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]87 vcpu_e500->pid[2] = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]88 case SPRN_MAS0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]89 vcpu_e500->mas0 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]90 case SPRN_MAS1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]91 vcpu_e500->mas1 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]92 case SPRN_MAS2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]93 vcpu_e500->mas2 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]94 case SPRN_MAS3:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]95 vcpu_e500->mas3 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]96 case SPRN_MAS4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]97 vcpu_e500->mas4 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]98 case SPRN_MAS6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]99 vcpu_e500->mas6 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]100 case SPRN_MAS7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]101 vcpu_e500->mas7 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]102 case SPRN_L1CSR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]103 vcpu_e500->l1csr1 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]104 case SPRN_HID0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]105 vcpu_e500->hid0 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]106 case SPRN_HID1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]107 vcpu_e500->hid1 = spr_val; break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]108
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]109 case SPRN_MMUCSR0:
110 emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]111 spr_val);
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]112 break;
113
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]114 /* extra exceptions */
115 case SPRN_IVOR32:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]116 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]117 break;
118 case SPRN_IVOR33:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]119 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]120 break;
121 case SPRN_IVOR34:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]122 vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]123 break;
124 case SPRN_IVOR35:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]125 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val;
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]126 break;
127
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]128 default:
129 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
130 }
131
132 return emulated;
133}
134
135int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
136{
137 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
138 int emulated = EMULATE_DONE;
139
140 switch (sprn) {
141 case SPRN_PID:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]142 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[0]); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]143 case SPRN_PID1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]144 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[1]); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]145 case SPRN_PID2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]146 kvmppc_set_gpr(vcpu, rt, vcpu_e500->pid[2]); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]147 case SPRN_MAS0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]148 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas0); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]149 case SPRN_MAS1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]150 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas1); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]151 case SPRN_MAS2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]152 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas2); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]153 case SPRN_MAS3:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]154 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas3); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]155 case SPRN_MAS4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]156 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas4); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]157 case SPRN_MAS6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]158 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas6); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]159 case SPRN_MAS7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]160 kvmppc_set_gpr(vcpu, rt, vcpu_e500->mas7); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]161
162 case SPRN_TLB0CFG:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]163 {
164 ulong tmp = SPRN_TLB0CFG;
165
166 tmp &= ~0xfffUL;
167 tmp |= vcpu_e500->guest_tlb_size[0];
168 kvmppc_set_gpr(vcpu, rt, tmp);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]169 break;
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]170 }
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]171
172 case SPRN_TLB1CFG:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]173 {
174 ulong tmp = SPRN_TLB1CFG;
175
176 tmp &= ~0xfffUL;
177 tmp |= vcpu_e500->guest_tlb_size[1];
178 kvmppc_set_gpr(vcpu, rt, tmp);
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]179 break;
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]180 }
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]181
182 case SPRN_L1CSR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]183 kvmppc_set_gpr(vcpu, rt, vcpu_e500->l1csr1); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]184 case SPRN_HID0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]185 kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]186 case SPRN_HID1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]187 kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]188
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]189 case SPRN_MMUCSR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]190 kvmppc_set_gpr(vcpu, rt, 0); break;
Liu Yub0a18352009-02-17 16:52:08 +0800[diff] [blame]191
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]192 case SPRN_MMUCFG:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]193 kvmppc_set_gpr(vcpu, rt, mfspr(SPRN_MMUCFG)); break;
Liu Yu06579dd2009-06-05 14:54:31 +0800[diff] [blame]194
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]195 /* extra exceptions */
196 case SPRN_IVOR32:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]197 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]);
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]198 break;
199 case SPRN_IVOR33:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]200 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]);
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]201 break;
202 case SPRN_IVOR34:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]203 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]);
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]204 break;
205 case SPRN_IVOR35:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame^]206 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]);
Hollis Blanchardbb3a8a12009-01-03 16:23:13 -0600[diff] [blame]207 break;
Hollis Blanchardbc8080c2009-01-03 16:23:10 -0600[diff] [blame]208 default:
209 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
210 }
211
212 return emulated;
213}
214