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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Terje Bergstrom4231c6b2013-03-22 16:34:05 +020010#ifndef HOST1X_DRM_H
11#define HOST1X_DRM_H 1
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000012
Thierry Redinge1e90642013-09-24 13:59:01 +020013#include <uapi/drm/tegra_drm.h>
14#include <linux/host1x.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include <drm/drmP.h>
17#include <drm/drm_crtc_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_fb_helper.h>
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000020#include <drm/drm_fixed.h>
21
Thierry Redingc134f012014-06-03 14:48:12 +020022#include "gem.h"
23
Stephen Warrenca480802013-11-06 16:20:54 -070024struct reset_control;
25
Arto Merilainende2ba662013-03-22 16:34:08 +020026struct tegra_fb {
27 struct drm_framebuffer base;
28 struct tegra_bo **planes;
29 unsigned int num_planes;
30};
31
Thierry Reding60c2f702013-10-31 13:28:50 +010032#ifdef CONFIG_DRM_TEGRA_FBDEV
Arto Merilainende2ba662013-03-22 16:34:08 +020033struct tegra_fbdev {
34 struct drm_fb_helper base;
35 struct tegra_fb *fb;
36};
Thierry Reding60c2f702013-10-31 13:28:50 +010037#endif
Arto Merilainende2ba662013-03-22 16:34:08 +020038
Thierry Reding386a2a72013-09-24 13:22:17 +020039struct tegra_drm {
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000040 struct drm_device *drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000041
Thierry Redingdf06b752014-06-26 21:41:53 +020042 struct iommu_domain *domain;
43 struct drm_mm mm;
44
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000045 struct mutex clients_lock;
46 struct list_head clients;
47
Thierry Reding60c2f702013-10-31 13:28:50 +010048#ifdef CONFIG_DRM_TEGRA_FBDEV
Arto Merilainende2ba662013-03-22 16:34:08 +020049 struct tegra_fbdev *fbdev;
Thierry Reding60c2f702013-10-31 13:28:50 +010050#endif
Thierry Redingd1f3e1e2014-07-11 08:29:14 +020051
52 unsigned int pitch_align;
Thierry Reding1503ca42014-11-24 17:41:23 +010053
54 struct {
55 struct drm_atomic_state *state;
56 struct work_struct work;
57 struct mutex lock;
58 } commit;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000059};
60
Thierry Reding53fa7f72013-09-24 15:35:40 +020061struct tegra_drm_client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000062
Thierry Redingc88c3632013-09-26 16:08:22 +020063struct tegra_drm_context {
Thierry Reding53fa7f72013-09-24 15:35:40 +020064 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +020065 struct host1x_channel *channel;
66 struct list_head list;
67};
68
Thierry Reding53fa7f72013-09-24 15:35:40 +020069struct tegra_drm_client_ops {
70 int (*open_channel)(struct tegra_drm_client *client,
Thierry Redingc88c3632013-09-26 16:08:22 +020071 struct tegra_drm_context *context);
72 void (*close_channel)(struct tegra_drm_context *context);
Thierry Redingc40f0f12013-10-10 11:00:33 +020073 int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
Thierry Redingc88c3632013-09-26 16:08:22 +020074 int (*submit)(struct tegra_drm_context *context,
Terje Bergstromd43f81c2013-03-22 16:34:09 +020075 struct drm_tegra_submit *args, struct drm_device *drm,
76 struct drm_file *file);
77};
78
Thierry Redingc40f0f12013-10-10 11:00:33 +020079int tegra_drm_submit(struct tegra_drm_context *context,
80 struct drm_tegra_submit *args, struct drm_device *drm,
81 struct drm_file *file);
82
Thierry Reding53fa7f72013-09-24 15:35:40 +020083struct tegra_drm_client {
84 struct host1x_client base;
Thierry Reding776dc382013-10-14 14:43:22 +020085 struct list_head list;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000086
Thierry Reding53fa7f72013-09-24 15:35:40 +020087 const struct tegra_drm_client_ops *ops;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000088};
89
Thierry Reding53fa7f72013-09-24 15:35:40 +020090static inline struct tegra_drm_client *
Thierry Reding776dc382013-10-14 14:43:22 +020091host1x_to_drm_client(struct host1x_client *client)
Thierry Reding53fa7f72013-09-24 15:35:40 +020092{
93 return container_of(client, struct tegra_drm_client, base);
94}
95
Thierry Reding688c59a2014-04-16 09:54:21 +020096int tegra_drm_register_client(struct tegra_drm *tegra,
97 struct tegra_drm_client *client);
98int tegra_drm_unregister_client(struct tegra_drm *tegra,
99 struct tegra_drm_client *client);
Thierry Reding776dc382013-10-14 14:43:22 +0200100
Thierry Reding688c59a2014-04-16 09:54:21 +0200101int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
102int tegra_drm_exit(struct tegra_drm *tegra);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000103
Thierry Reding8620fc62013-12-12 11:03:59 +0100104struct tegra_dc_soc_info;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000105struct tegra_output;
106
107struct tegra_dc {
Thierry Reding776dc382013-10-14 14:43:22 +0200108 struct host1x_client client;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000109 struct device *dev;
Thierry Redingd18d3032013-09-26 16:09:19 +0200110 spinlock_t lock;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000111
112 struct drm_crtc base;
Thierry Reding9c012702014-07-07 15:32:53 +0200113 int powergate;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000114 int pipe;
115
116 struct clk *clk;
Stephen Warrenca480802013-11-06 16:20:54 -0700117 struct reset_control *rst;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000118 void __iomem *regs;
119 int irq;
120
121 struct tegra_output *rgb;
122
123 struct list_head list;
124
125 struct drm_info_list *debugfs_files;
126 struct drm_minor *minor;
127 struct dentry *debugfs;
Thierry Reding3c03c462012-11-28 12:00:18 +0100128
129 /* page-flip handling */
130 struct drm_pending_vblank_event *event;
Thierry Reding8620fc62013-12-12 11:03:59 +0100131
132 const struct tegra_dc_soc_info *soc;
Thierry Redingdf06b752014-06-26 21:41:53 +0200133
134 struct iommu_domain *domain;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000135};
136
Thierry Reding53fa7f72013-09-24 15:35:40 +0200137static inline struct tegra_dc *
Thierry Reding776dc382013-10-14 14:43:22 +0200138host1x_client_to_dc(struct host1x_client *client)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000139{
140 return container_of(client, struct tegra_dc, client);
141}
142
143static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
144{
Thierry Reding37826512013-11-08 12:30:37 +0100145 return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000146}
147
Thierry Reding03a60562014-10-21 13:48:48 +0200148static inline void tegra_dc_writel(struct tegra_dc *dc, u32 value,
149 unsigned long offset)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000150{
Thierry Reding03a60562014-10-21 13:48:48 +0200151 writel(value, dc->regs + (offset << 2));
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000152}
153
Thierry Reding03a60562014-10-21 13:48:48 +0200154static inline u32 tegra_dc_readl(struct tegra_dc *dc, unsigned long offset)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000155{
Thierry Reding03a60562014-10-21 13:48:48 +0200156 return readl(dc->regs + (offset << 2));
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000157}
158
Thierry Redingf34bc782012-11-04 21:47:13 +0100159struct tegra_dc_window {
160 struct {
161 unsigned int x;
162 unsigned int y;
163 unsigned int w;
164 unsigned int h;
165 } src;
166 struct {
167 unsigned int x;
168 unsigned int y;
169 unsigned int w;
170 unsigned int h;
171 } dst;
172 unsigned int bits_per_pixel;
173 unsigned int format;
Thierry Redingf9253902014-01-29 20:31:17 +0100174 unsigned int swap;
Thierry Redingf34bc782012-11-04 21:47:13 +0100175 unsigned int stride[2];
176 unsigned long base[3];
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200177 bool bottom_up;
Thierry Redingc134f012014-06-03 14:48:12 +0200178
179 struct tegra_bo_tiling tiling;
Thierry Redingf34bc782012-11-04 21:47:13 +0100180};
181
182/* from dc.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200183void tegra_dc_enable_vblank(struct tegra_dc *dc);
184void tegra_dc_disable_vblank(struct tegra_dc *dc);
185void tegra_dc_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file);
Thierry Reding62b9e062014-11-21 17:33:33 +0100186void tegra_dc_commit(struct tegra_dc *dc);
Thierry Redingc5a107d2014-12-02 15:15:06 +0100187int tegra_dc_setup_clock(struct tegra_dc *dc, struct clk *parent,
188 unsigned long pclk, unsigned int div);
Thierry Redingca915b12014-12-08 16:14:45 +0100189int tegra_dc_state_setup_clock(struct tegra_dc *dc,
190 struct drm_crtc_state *crtc_state,
191 struct clk *clk, unsigned long pclk,
192 unsigned int div);
Thierry Redingf34bc782012-11-04 21:47:13 +0100193
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000194struct tegra_output {
195 struct device_node *of_node;
196 struct device *dev;
197
Thierry Reding9be7d862013-08-30 15:22:36 +0200198 struct drm_panel *panel;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000199 struct i2c_adapter *ddc;
200 const struct edid *edid;
201 unsigned int hpd_irq;
202 int hpd_gpio;
203
204 struct drm_encoder encoder;
205 struct drm_connector connector;
206};
207
208static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
209{
210 return container_of(e, struct tegra_output, encoder);
211}
212
213static inline struct tegra_output *connector_to_output(struct drm_connector *c)
214{
215 return container_of(c, struct tegra_output, connector);
216}
217
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000218/* from rgb.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200219int tegra_dc_rgb_probe(struct tegra_dc *dc);
220int tegra_dc_rgb_remove(struct tegra_dc *dc);
221int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
222int tegra_dc_rgb_exit(struct tegra_dc *dc);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000223
224/* from output.c */
Thierry Reding688c59a2014-04-16 09:54:21 +0200225int tegra_output_probe(struct tegra_output *output);
Thierry Reding328ec692014-12-19 15:55:08 +0100226void tegra_output_remove(struct tegra_output *output);
Thierry Reding688c59a2014-04-16 09:54:21 +0200227int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
Thierry Reding328ec692014-12-19 15:55:08 +0100228void tegra_output_exit(struct tegra_output *output);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000229
Thierry Reding132085d2014-11-28 15:38:40 +0100230int tegra_output_connector_get_modes(struct drm_connector *connector);
231struct drm_encoder *
232tegra_output_connector_best_encoder(struct drm_connector *connector);
233enum drm_connector_status
234tegra_output_connector_detect(struct drm_connector *connector, bool force);
235void tegra_output_connector_destroy(struct drm_connector *connector);
236
237void tegra_output_encoder_destroy(struct drm_encoder *encoder);
238
Thierry Reding6b6b6042013-11-15 16:06:05 +0100239/* from dpaux.c */
Thierry Reding6b6b6042013-11-15 16:06:05 +0100240struct tegra_dpaux;
241struct drm_dp_link;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100242
243struct tegra_dpaux *tegra_dpaux_find_by_of_node(struct device_node *np);
244enum drm_connector_status tegra_dpaux_detect(struct tegra_dpaux *dpaux);
245int tegra_dpaux_attach(struct tegra_dpaux *dpaux, struct tegra_output *output);
246int tegra_dpaux_detach(struct tegra_dpaux *dpaux);
247int tegra_dpaux_enable(struct tegra_dpaux *dpaux);
248int tegra_dpaux_disable(struct tegra_dpaux *dpaux);
249int tegra_dpaux_prepare(struct tegra_dpaux *dpaux, u8 encoding);
250int tegra_dpaux_train(struct tegra_dpaux *dpaux, struct drm_dp_link *link,
251 u8 pattern);
252
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000253/* from fb.c */
Arto Merilainende2ba662013-03-22 16:34:08 +0200254struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
255 unsigned int index);
Thierry Redingdb7fbdf2013-10-07 09:47:58 +0200256bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
Thierry Redingc134f012014-06-03 14:48:12 +0200257int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer,
258 struct tegra_bo_tiling *tiling);
Thierry Redingf9914212014-11-26 13:03:57 +0100259struct drm_framebuffer *tegra_fb_create(struct drm_device *drm,
260 struct drm_file *file,
261 struct drm_mode_fb_cmd2 *cmd);
Thierry Redinge2215322014-06-27 17:19:25 +0200262int tegra_drm_fb_prepare(struct drm_device *drm);
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100263void tegra_drm_fb_free(struct drm_device *drm);
Thierry Reding688c59a2014-04-16 09:54:21 +0200264int tegra_drm_fb_init(struct drm_device *drm);
265void tegra_drm_fb_exit(struct drm_device *drm);
Thierry Reding60c2f702013-10-31 13:28:50 +0100266#ifdef CONFIG_DRM_TEGRA_FBDEV
Thierry Reding688c59a2014-04-16 09:54:21 +0200267void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
Thierry Redingf9914212014-11-26 13:03:57 +0100268void tegra_fb_output_poll_changed(struct drm_device *drm);
Thierry Reding60c2f702013-10-31 13:28:50 +0100269#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000270
Thierry Reding776dc382013-10-14 14:43:22 +0200271extern struct platform_driver tegra_dc_driver;
Thierry Redingdec72732013-09-03 08:45:46 +0200272extern struct platform_driver tegra_dsi_driver;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100273extern struct platform_driver tegra_sor_driver;
Thierry Reding776dc382013-10-14 14:43:22 +0200274extern struct platform_driver tegra_hdmi_driver;
Thierry Reding6b6b6042013-11-15 16:06:05 +0100275extern struct platform_driver tegra_dpaux_driver;
Thierry Reding776dc382013-10-14 14:43:22 +0200276extern struct platform_driver tegra_gr2d_driver;
Thierry Reding5f60ed02013-02-28 08:08:01 +0100277extern struct platform_driver tegra_gr3d_driver;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000278
Terje Bergstrom4231c6b2013-03-22 16:34:05 +0200279#endif /* HOST1X_DRM_H */