| Mauro Carvalho Chehab | c6d289d | 2017-05-17 08:03:50 -0300 | [diff] [blame] | 1 | ================================================= |
| 2 | Msc Keyboard Scan Expansion/GPIO Expansion device |
| 3 | ================================================= |
| 4 | |
| Sourav Poddar | 8284328 | 2012-10-01 16:31:22 +0530 | [diff] [blame] | 5 | What is smsc-ece1099? |
| 6 | ---------------------- |
| 7 | |
| 8 | The ECE1099 is a 40-Pin 3.3V Keyboard Scan Expansion |
| 9 | or GPIO Expansion device. The device supports a keyboard |
| 10 | scan matrix of 23x8. The device is connected to a Master |
| 11 | via the SMSC BC-Link interface or via the SMBus. |
| 12 | Keypad scan Input(KSI) and Keypad Scan Output(KSO) signals |
| 13 | are multiplexed with GPIOs. |
| 14 | |
| 15 | Interrupt generation |
| 16 | -------------------- |
| 17 | |
| 18 | Interrupts can be generated by an edge detection on a GPIO |
| 19 | pin or an edge detection on one of the bus interface pins. |
| 20 | Interrupts can also be detected on the keyboard scan interface. |
| 21 | The bus interrupt pin (BC_INT# or SMBUS_INT#) is asserted if |
| 22 | any bit in one of the Interrupt Status registers is 1 and |
| 23 | the corresponding Interrupt Mask bit is also 1. |
| 24 | |
| 25 | In order for software to determine which device is the source |
| 26 | of an interrupt, it should first read the Group Interrupt Status Register |
| 27 | to determine which Status register group is a source for the interrupt. |
| 28 | Software should read both the Status register and the associated Mask register, |
| 29 | then AND the two values together. Bits that are 1 in the result of the AND |
| 30 | are active interrupts. Software clears an interrupt by writing a 1 to the |
| 31 | corresponding bit in the Status register. |
| 32 | |
| 33 | Communication Protocol |
| 34 | ---------------------- |
| 35 | |
| 36 | - SMbus slave Interface |
| 37 | The host processor communicates with the ECE1099 device |
| 38 | through a series of read/write registers via the SMBus |
| 39 | interface. SMBus is a serial communication protocol between |
| 40 | a computer host and its peripheral devices. The SMBus data |
| 41 | rate is 10KHz minimum to 400 KHz maximum |
| 42 | |
| 43 | - Slave Bus Interface |
| 44 | The ECE1099 device SMBus implementation is a subset of the |
| 45 | SMBus interface to the host. The device is a slave-only SMBus device. |
| 46 | The implementation in the device is a subset of SMBus since it |
| 47 | only supports four protocols. |
| 48 | |
| 49 | The Write Byte, Read Byte, Send Byte, and Receive Byte protocols are the |
| 50 | only valid SMBus protocols for the device. |
| 51 | |
| 52 | - BC-LinkTM Interface |
| 53 | The BC-Link is a proprietary bus that allows communication |
| 54 | between a Master device and a Companion device. The Master |
| 55 | device uses this serial bus to read and write registers |
| 56 | located on the Companion device. The bus comprises three signals, |
| 57 | BC_CLK, BC_DAT and BC_INT#. The Master device always provides the |
| 58 | clock, BC_CLK, and the Companion device is the source for an |
| 59 | independent asynchronous interrupt signal, BC_INT#. The ECE1099 |
| 60 | supports BC-Link speeds up to 24MHz. |