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Flora Cuic632d792016-08-02 11:32:41 +08001/*
2 * Copyright 2016 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __AMDGPU_TTM_H__
25#define __AMDGPU_TTM_H__
26
Tom St Denisa40cfa02017-09-18 07:14:56 -040027#include "amdgpu.h"
Lucas Stach1b1f42d2017-12-06 17:49:39 +010028#include <drm/gpu_scheduler.h>
Flora Cuic632d792016-08-02 11:32:41 +080029
Christian König283cde62016-09-12 13:34:37 +020030#define AMDGPU_PL_GDS (TTM_PL_PRIV + 0)
31#define AMDGPU_PL_GWS (TTM_PL_PRIV + 1)
32#define AMDGPU_PL_OA (TTM_PL_PRIV + 2)
Flora Cuic632d792016-08-02 11:32:41 +080033
Christian König283cde62016-09-12 13:34:37 +020034#define AMDGPU_PL_FLAG_GDS (TTM_PL_FLAG_PRIV << 0)
35#define AMDGPU_PL_FLAG_GWS (TTM_PL_FLAG_PRIV << 1)
36#define AMDGPU_PL_FLAG_OA (TTM_PL_FLAG_PRIV << 2)
Flora Cuic632d792016-08-02 11:32:41 +080037
Christian Königcc251882017-06-28 12:18:54 +020038#define AMDGPU_GTT_MAX_TRANSFER_SIZE 512
39#define AMDGPU_GTT_NUM_TRANSFER_WINDOWS 2
40
Flora Cuic632d792016-08-02 11:32:41 +080041struct amdgpu_mman {
42 struct ttm_bo_global_ref bo_global_ref;
43 struct drm_global_reference mem_global_ref;
44 struct ttm_bo_device bdev;
45 bool mem_global_referenced;
46 bool initialized;
Amber Linf8f4b9a2018-02-27 10:01:59 -050047 void __iomem *aper_base_kaddr;
Flora Cuic632d792016-08-02 11:32:41 +080048
49#if defined(CONFIG_DEBUG_FS)
Tom St Denisa40cfa02017-09-18 07:14:56 -040050 struct dentry *debugfs_entries[8];
Flora Cuic632d792016-08-02 11:32:41 +080051#endif
52
53 /* buffer handling */
54 const struct amdgpu_buffer_funcs *buffer_funcs;
55 struct amdgpu_ring *buffer_funcs_ring;
Christian König81988f92018-03-01 11:09:15 +010056 bool buffer_funcs_enabled;
Christian Königabca90f2017-06-30 11:05:54 +020057
58 struct mutex gtt_window_lock;
Flora Cuic632d792016-08-02 11:32:41 +080059 /* Scheduler entity for buffer moves */
Lucas Stach1b1f42d2017-12-06 17:49:39 +010060 struct drm_sched_entity entity;
Flora Cuic632d792016-08-02 11:32:41 +080061};
62
Harish Kasiviswanathan1eca5a52017-10-03 15:41:56 -040063struct amdgpu_copy_mem {
64 struct ttm_buffer_object *bo;
65 struct ttm_mem_reg *mem;
66 unsigned long offset;
67};
68
Christian Königbb990bb2016-09-09 16:32:33 +020069extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func;
Christian König6a7f76e2016-08-24 15:51:49 +020070extern const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func;
Christian Königbb990bb2016-09-09 16:32:33 +020071
Christian König3da917b2017-10-27 14:17:09 +020072bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_mem_reg *mem);
Christian König9255d772017-08-07 17:11:33 +020073uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man);
Christian Königc1c7ce82017-10-16 16:50:32 +020074int amdgpu_gtt_mgr_recover(struct ttm_mem_type_manager *man);
Christian Königbb990bb2016-09-09 16:32:33 +020075
Christian König3c848bb2017-08-07 17:46:49 +020076uint64_t amdgpu_vram_mgr_usage(struct ttm_mem_type_manager *man);
77uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_mem_type_manager *man);
78
Christian Königc396ef92018-03-01 10:41:46 +010079int amdgpu_ttm_init(struct amdgpu_device *adev);
80void amdgpu_ttm_fini(struct amdgpu_device *adev);
Christian König57adc4c2018-03-01 11:01:52 +010081void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev,
82 bool enable);
Christian Königc396ef92018-03-01 10:41:46 +010083
Christian Königfc9c8f52017-06-29 11:46:15 +020084int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset,
85 uint64_t dst_offset, uint32_t byte_count,
Flora Cuic632d792016-08-02 11:32:41 +080086 struct reservation_object *resv,
Christian Königfc9c8f52017-06-29 11:46:15 +020087 struct dma_fence **fence, bool direct_submit,
88 bool vm_needs_flush);
Harish Kasiviswanathan1eca5a52017-10-03 15:41:56 -040089int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
90 struct amdgpu_copy_mem *src,
91 struct amdgpu_copy_mem *dst,
92 uint64_t size,
93 struct reservation_object *resv,
94 struct dma_fence **f);
Flora Cuic632d792016-08-02 11:32:41 +080095int amdgpu_fill_buffer(struct amdgpu_bo *bo,
Christian König44e1bae2018-01-24 19:58:45 +010096 uint32_t src_data,
Flora Cuic632d792016-08-02 11:32:41 +080097 struct reservation_object *resv,
Chris Wilsonf54d1862016-10-25 13:00:45 +010098 struct dma_fence **fence);
Flora Cuic632d792016-08-02 11:32:41 +080099
100int amdgpu_mmap(struct file *filp, struct vm_area_struct *vma);
Christian Königc5835bb2017-10-27 15:43:14 +0200101int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo);
Christian Königc1c7ce82017-10-16 16:50:32 +0200102int amdgpu_ttm_recover_gart(struct ttm_buffer_object *tbo);
Christian Königc855e252016-09-05 17:00:57 +0200103
Christian König711becf2017-09-08 17:19:19 +0200104int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages);
105void amdgpu_ttm_tt_set_user_pages(struct ttm_tt *ttm, struct page **pages);
106void amdgpu_ttm_tt_mark_user_pages(struct ttm_tt *ttm);
107int amdgpu_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
108 uint32_t flags);
109bool amdgpu_ttm_tt_has_userptr(struct ttm_tt *ttm);
110struct mm_struct *amdgpu_ttm_tt_get_usermm(struct ttm_tt *ttm);
111bool amdgpu_ttm_tt_affect_userptr(struct ttm_tt *ttm, unsigned long start,
112 unsigned long end);
113bool amdgpu_ttm_tt_userptr_invalidated(struct ttm_tt *ttm,
114 int *last_invalidated);
115bool amdgpu_ttm_tt_userptr_needs_pages(struct ttm_tt *ttm);
116bool amdgpu_ttm_tt_is_readonly(struct ttm_tt *ttm);
117uint64_t amdgpu_ttm_tt_pte_flags(struct amdgpu_device *adev, struct ttm_tt *ttm,
118 struct ttm_mem_reg *mem);
119
Flora Cuic632d792016-08-02 11:32:41 +0800120#endif