blob: 060ed5fec690f462e5dbbe6f8a06951b5b1a4e9c [file] [log] [blame]
George666e8452011-02-19 16:29:27 -06001/******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28****************************************************************************/
Joe Perches292b1192011-07-20 08:51:35 -070029
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
George666e8452011-02-19 16:29:27 -060032#include <linux/module.h>
33
34#include "../wifi.h"
35#include "../pci.h"
36#include "../usb.h"
37#include "../ps.h"
38#include "../cam.h"
39#include "reg.h"
40#include "def.h"
41#include "phy.h"
42#include "rf.h"
43#include "dm.h"
44#include "mac.h"
45#include "trx.h"
46
47/* macro to shorten lines */
48
49#define LINK_Q ui_link_quality
50#define RX_EVM rx_evm_percentage
51#define RX_SIGQ rx_mimo_signalquality
52
53
54void rtl92c_read_chip_version(struct ieee80211_hw *hw)
55{
56 struct rtl_priv *rtlpriv = rtl_priv(hw);
57 struct rtl_phy *rtlphy = &(rtlpriv->phy);
58 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
59 enum version_8192c chip_version = VERSION_UNKNOWN;
Joe Perches07839b12012-01-06 11:31:43 -080060 const char *versionid;
George666e8452011-02-19 16:29:27 -060061 u32 value32;
62
63 value32 = rtl_read_dword(rtlpriv, REG_SYS_CFG);
64 if (value32 & TRP_VAUX_EN) {
65 chip_version = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C :
66 VERSION_TEST_CHIP_88C;
67 } else {
68 /* Normal mass production chip. */
69 chip_version = NORMAL_CHIP;
70 chip_version |= ((value32 & TYPE_ID) ? CHIP_92C : 0);
71 chip_version |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0);
72 /* RTL8723 with BT function. */
73 chip_version |= ((value32 & BT_FUNC) ? CHIP_8723 : 0);
74 if (IS_VENDOR_UMC(chip_version))
75 chip_version |= ((value32 & CHIP_VER_RTL_MASK) ?
76 CHIP_VENDOR_UMC_B_CUT : 0);
77 if (IS_92C_SERIAL(chip_version)) {
78 value32 = rtl_read_dword(rtlpriv, REG_HPON_FSM);
79 chip_version |= ((CHIP_BONDING_IDENTIFIER(value32) ==
80 CHIP_BONDING_92C_1T2R) ? CHIP_92C_1T2R : 0);
81 } else if (IS_8723_SERIES(chip_version)) {
82 value32 = rtl_read_dword(rtlpriv, REG_GPIO_OUTSTS);
83 chip_version |= ((value32 & RF_RL_ID) ?
84 CHIP_8723_DRV_REV : 0);
85 }
86 }
87 rtlhal->version = (enum version_8192c)chip_version;
Joe Perchesd9595ce2012-01-06 11:31:42 -080088 pr_info("Chip version 0x%x\n", chip_version);
George666e8452011-02-19 16:29:27 -060089 switch (rtlhal->version) {
90 case VERSION_NORMAL_TSMC_CHIP_92C_1T2R:
Joe Perches07839b12012-01-06 11:31:43 -080091 versionid = "NORMAL_B_CHIP_92C";
George666e8452011-02-19 16:29:27 -060092 break;
93 case VERSION_NORMAL_TSMC_CHIP_92C:
Joe Perches07839b12012-01-06 11:31:43 -080094 versionid = "NORMAL_TSMC_CHIP_92C";
George666e8452011-02-19 16:29:27 -060095 break;
96 case VERSION_NORMAL_TSMC_CHIP_88C:
Joe Perches07839b12012-01-06 11:31:43 -080097 versionid = "NORMAL_TSMC_CHIP_88C";
George666e8452011-02-19 16:29:27 -060098 break;
99 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT:
Joe Perches07839b12012-01-06 11:31:43 -0800100 versionid = "NORMAL_UMC_CHIP_i92C_1T2R_A_CUT";
George666e8452011-02-19 16:29:27 -0600101 break;
102 case VERSION_NORMAL_UMC_CHIP_92C_A_CUT:
Joe Perches07839b12012-01-06 11:31:43 -0800103 versionid = "NORMAL_UMC_CHIP_92C_A_CUT";
George666e8452011-02-19 16:29:27 -0600104 break;
105 case VERSION_NORMAL_UMC_CHIP_88C_A_CUT:
Joe Perches07839b12012-01-06 11:31:43 -0800106 versionid = "NORMAL_UMC_CHIP_88C_A_CUT";
George666e8452011-02-19 16:29:27 -0600107 break;
108 case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT:
Joe Perches07839b12012-01-06 11:31:43 -0800109 versionid = "NORMAL_UMC_CHIP_92C_1T2R_B_CUT";
George666e8452011-02-19 16:29:27 -0600110 break;
111 case VERSION_NORMAL_UMC_CHIP_92C_B_CUT:
Joe Perches07839b12012-01-06 11:31:43 -0800112 versionid = "NORMAL_UMC_CHIP_92C_B_CUT";
George666e8452011-02-19 16:29:27 -0600113 break;
114 case VERSION_NORMAL_UMC_CHIP_88C_B_CUT:
Joe Perches07839b12012-01-06 11:31:43 -0800115 versionid = "NORMAL_UMC_CHIP_88C_B_CUT";
George666e8452011-02-19 16:29:27 -0600116 break;
117 case VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT:
Joe Perches07839b12012-01-06 11:31:43 -0800118 versionid = "NORMAL_UMC_CHIP_8723_1T1R_A_CUT";
George666e8452011-02-19 16:29:27 -0600119 break;
120 case VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT:
Joe Perches07839b12012-01-06 11:31:43 -0800121 versionid = "NORMAL_UMC_CHIP_8723_1T1R_B_CUT";
George666e8452011-02-19 16:29:27 -0600122 break;
123 case VERSION_TEST_CHIP_92C:
Joe Perches07839b12012-01-06 11:31:43 -0800124 versionid = "TEST_CHIP_92C";
George666e8452011-02-19 16:29:27 -0600125 break;
126 case VERSION_TEST_CHIP_88C:
Joe Perches07839b12012-01-06 11:31:43 -0800127 versionid = "TEST_CHIP_88C";
George666e8452011-02-19 16:29:27 -0600128 break;
129 default:
Joe Perches07839b12012-01-06 11:31:43 -0800130 versionid = "UNKNOWN";
George666e8452011-02-19 16:29:27 -0600131 break;
132 }
Joe Perches07839b12012-01-06 11:31:43 -0800133 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
134 "Chip Version ID: %s\n", versionid);
135
George666e8452011-02-19 16:29:27 -0600136 if (IS_92C_SERIAL(rtlhal->version))
137 rtlphy->rf_type =
138 (IS_92C_1T2R(rtlhal->version)) ? RF_1T2R : RF_2T2R;
139 else
140 rtlphy->rf_type = RF_1T1R;
141 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
Joe Perchesf30d7502012-01-04 19:40:41 -0800142 "Chip RF Type: %s\n",
143 rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R");
George666e8452011-02-19 16:29:27 -0600144 if (get_rf_type(rtlphy) == RF_1T1R)
145 rtlpriv->dm.rfpath_rxenable[0] = true;
146 else
147 rtlpriv->dm.rfpath_rxenable[0] =
148 rtlpriv->dm.rfpath_rxenable[1] = true;
Joe Perchesf30d7502012-01-04 19:40:41 -0800149 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
150 rtlhal->version);
George666e8452011-02-19 16:29:27 -0600151}
152
153/**
154 * writeLLT - LLT table write access
155 * @io: io callback
156 * @address: LLT logical address.
157 * @data: LLT data content
158 *
159 * Realtek hardware access function.
160 *
161 */
162bool rtl92c_llt_write(struct ieee80211_hw *hw, u32 address, u32 data)
163{
164 struct rtl_priv *rtlpriv = rtl_priv(hw);
165 bool status = true;
166 long count = 0;
167 u32 value = _LLT_INIT_ADDR(address) |
168 _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS);
169
170 rtl_write_dword(rtlpriv, REG_LLT_INIT, value);
171 do {
172 value = rtl_read_dword(rtlpriv, REG_LLT_INIT);
173 if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
174 break;
175 if (count > POLLING_LLT_THRESHOLD) {
176 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800177 "Failed to polling write LLT done at address %d! _LLT_OP_VALUE(%x)\n",
178 address, _LLT_OP_VALUE(value));
George666e8452011-02-19 16:29:27 -0600179 status = false;
180 break;
181 }
182 } while (++count);
183 return status;
184}
185/**
186 * rtl92c_init_LLT_table - Init LLT table
187 * @io: io callback
188 * @boundary:
189 *
190 * Realtek hardware access function.
191 *
192 */
193bool rtl92c_init_llt_table(struct ieee80211_hw *hw, u32 boundary)
194{
195 bool rst = true;
196 u32 i;
197
198 for (i = 0; i < (boundary - 1); i++) {
199 rst = rtl92c_llt_write(hw, i , i + 1);
200 if (true != rst) {
Joe Perches292b1192011-07-20 08:51:35 -0700201 pr_err("===> %s #1 fail\n", __func__);
George666e8452011-02-19 16:29:27 -0600202 return rst;
203 }
204 }
205 /* end of list */
206 rst = rtl92c_llt_write(hw, (boundary - 1), 0xFF);
207 if (true != rst) {
Joe Perches292b1192011-07-20 08:51:35 -0700208 pr_err("===> %s #2 fail\n", __func__);
George666e8452011-02-19 16:29:27 -0600209 return rst;
210 }
211 /* Make the other pages as ring buffer
212 * This ring buffer is used as beacon buffer if we config this MAC
213 * as two MAC transfer.
214 * Otherwise used as local loopback buffer.
215 */
216 for (i = boundary; i < LLT_LAST_ENTRY_OF_TX_PKT_BUFFER; i++) {
217 rst = rtl92c_llt_write(hw, i, (i + 1));
218 if (true != rst) {
Joe Perches292b1192011-07-20 08:51:35 -0700219 pr_err("===> %s #3 fail\n", __func__);
George666e8452011-02-19 16:29:27 -0600220 return rst;
221 }
222 }
223 /* Let last entry point to the start entry of ring buffer */
224 rst = rtl92c_llt_write(hw, LLT_LAST_ENTRY_OF_TX_PKT_BUFFER, boundary);
225 if (true != rst) {
Joe Perches292b1192011-07-20 08:51:35 -0700226 pr_err("===> %s #4 fail\n", __func__);
George666e8452011-02-19 16:29:27 -0600227 return rst;
228 }
229 return rst;
230}
231void rtl92c_set_key(struct ieee80211_hw *hw, u32 key_index,
232 u8 *p_macaddr, bool is_group, u8 enc_algo,
233 bool is_wepkey, bool clear_all)
234{
235 struct rtl_priv *rtlpriv = rtl_priv(hw);
236 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
237 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
238 u8 *macaddr = p_macaddr;
239 u32 entry_id = 0;
240 bool is_pairwise = false;
241 static u8 cam_const_addr[4][6] = {
242 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
243 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
244 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
245 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
246 };
247 static u8 cam_const_broad[] = {
248 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
249 };
250
251 if (clear_all) {
252 u8 idx = 0;
253 u8 cam_offset = 0;
254 u8 clear_number = 5;
255
Joe Perchesf30d7502012-01-04 19:40:41 -0800256 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
George666e8452011-02-19 16:29:27 -0600257 for (idx = 0; idx < clear_number; idx++) {
258 rtl_cam_mark_invalid(hw, cam_offset + idx);
259 rtl_cam_empty_entry(hw, cam_offset + idx);
260 if (idx < 5) {
261 memset(rtlpriv->sec.key_buf[idx], 0,
262 MAX_KEY_LEN);
263 rtlpriv->sec.key_len[idx] = 0;
264 }
265 }
266 } else {
267 switch (enc_algo) {
268 case WEP40_ENCRYPTION:
269 enc_algo = CAM_WEP40;
270 break;
271 case WEP104_ENCRYPTION:
272 enc_algo = CAM_WEP104;
273 break;
274 case TKIP_ENCRYPTION:
275 enc_algo = CAM_TKIP;
276 break;
277 case AESCCMP_ENCRYPTION:
278 enc_algo = CAM_AES;
279 break;
280 default:
281 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800282 "illegal switch case\n");
George666e8452011-02-19 16:29:27 -0600283 enc_algo = CAM_TKIP;
284 break;
285 }
286 if (is_wepkey || rtlpriv->sec.use_defaultkey) {
287 macaddr = cam_const_addr[key_index];
288 entry_id = key_index;
289 } else {
290 if (is_group) {
291 macaddr = cam_const_broad;
292 entry_id = key_index;
293 } else {
294 key_index = PAIRWISE_KEYIDX;
295 entry_id = CAM_PAIRWISE_KEY_POSITION;
296 is_pairwise = true;
297 }
298 }
299 if (rtlpriv->sec.key_len[key_index] == 0) {
300 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800301 "delete one entry\n");
George666e8452011-02-19 16:29:27 -0600302 rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
303 } else {
304 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
Joe Perchesf30d7502012-01-04 19:40:41 -0800305 "The insert KEY length is %d\n",
306 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
George666e8452011-02-19 16:29:27 -0600307 RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
Joe Perchesf30d7502012-01-04 19:40:41 -0800308 "The insert KEY is %x %x\n",
309 rtlpriv->sec.key_buf[0][0],
310 rtlpriv->sec.key_buf[0][1]);
George666e8452011-02-19 16:29:27 -0600311 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800312 "add one entry\n");
George666e8452011-02-19 16:29:27 -0600313 if (is_pairwise) {
314 RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
Joe Perchesaf086872012-01-04 19:40:40 -0800315 "Pairwise Key content",
George666e8452011-02-19 16:29:27 -0600316 rtlpriv->sec.pairwise_key,
317 rtlpriv->sec.
318 key_len[PAIRWISE_KEYIDX]);
319 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800320 "set Pairwise key\n");
George666e8452011-02-19 16:29:27 -0600321
322 rtl_cam_add_one_entry(hw, macaddr, key_index,
323 entry_id, enc_algo,
324 CAM_CONFIG_NO_USEDK,
325 rtlpriv->sec.
326 key_buf[key_index]);
327 } else {
328 RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800329 "set group key\n");
George666e8452011-02-19 16:29:27 -0600330 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
331 rtl_cam_add_one_entry(hw,
332 rtlefuse->dev_addr,
333 PAIRWISE_KEYIDX,
334 CAM_PAIRWISE_KEY_POSITION,
335 enc_algo,
336 CAM_CONFIG_NO_USEDK,
337 rtlpriv->sec.key_buf
338 [entry_id]);
339 }
340 rtl_cam_add_one_entry(hw, macaddr, key_index,
341 entry_id, enc_algo,
342 CAM_CONFIG_NO_USEDK,
343 rtlpriv->sec.key_buf[entry_id]);
344 }
345 }
346 }
347}
348
349u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw)
350{
351 struct rtl_priv *rtlpriv = rtl_priv(hw);
352
353 return rtl_read_dword(rtlpriv, REG_TXDMA_STATUS);
354}
355
356void rtl92c_enable_interrupt(struct ieee80211_hw *hw)
357{
358 struct rtl_priv *rtlpriv = rtl_priv(hw);
359 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
360 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
361 struct rtl_usb *rtlusb = rtl_usbdev(rtl_usbpriv(hw));
362
363 if (IS_HARDWARE_TYPE_8192CE(rtlhal)) {
364 rtl_write_dword(rtlpriv, REG_HIMR, rtlpci->irq_mask[0] &
365 0xFFFFFFFF);
366 rtl_write_dword(rtlpriv, REG_HIMRE, rtlpci->irq_mask[1] &
367 0xFFFFFFFF);
George666e8452011-02-19 16:29:27 -0600368 } else {
369 rtl_write_dword(rtlpriv, REG_HIMR, rtlusb->irq_mask[0] &
370 0xFFFFFFFF);
371 rtl_write_dword(rtlpriv, REG_HIMRE, rtlusb->irq_mask[1] &
372 0xFFFFFFFF);
George666e8452011-02-19 16:29:27 -0600373 }
374}
375
376void rtl92c_init_interrupt(struct ieee80211_hw *hw)
377{
378 rtl92c_enable_interrupt(hw);
379}
380
381void rtl92c_disable_interrupt(struct ieee80211_hw *hw)
382{
383 struct rtl_priv *rtlpriv = rtl_priv(hw);
George666e8452011-02-19 16:29:27 -0600384
385 rtl_write_dword(rtlpriv, REG_HIMR, IMR8190_DISABLED);
386 rtl_write_dword(rtlpriv, REG_HIMRE, IMR8190_DISABLED);
George666e8452011-02-19 16:29:27 -0600387}
388
389void rtl92c_set_qos(struct ieee80211_hw *hw, int aci)
390{
391 struct rtl_priv *rtlpriv = rtl_priv(hw);
392 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
393 u32 u4b_ac_param;
394
395 rtl92c_dm_init_edca_turbo(hw);
396 u4b_ac_param = (u32) mac->ac[aci].aifs;
397 u4b_ac_param |=
398 ((u32) le16_to_cpu(mac->ac[aci].cw_min) & 0xF) <<
399 AC_PARAM_ECW_MIN_OFFSET;
400 u4b_ac_param |=
401 ((u32) le16_to_cpu(mac->ac[aci].cw_max) & 0xF) <<
402 AC_PARAM_ECW_MAX_OFFSET;
403 u4b_ac_param |= (u32) le16_to_cpu(mac->ac[aci].tx_op) <<
404 AC_PARAM_TXOP_OFFSET;
Joe Perchesf30d7502012-01-04 19:40:41 -0800405 RT_TRACE(rtlpriv, COMP_QOS, DBG_LOUD, "queue:%x, ac_param:%x\n",
406 aci, u4b_ac_param);
George666e8452011-02-19 16:29:27 -0600407 switch (aci) {
408 case AC1_BK:
409 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, u4b_ac_param);
410 break;
411 case AC0_BE:
412 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, u4b_ac_param);
413 break;
414 case AC2_VI:
415 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, u4b_ac_param);
416 break;
417 case AC3_VO:
418 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, u4b_ac_param);
419 break;
420 default:
Joe Perches9d833ed2012-01-04 19:40:43 -0800421 RT_ASSERT(false, "invalid aci: %d !\n", aci);
George666e8452011-02-19 16:29:27 -0600422 break;
423 }
424}
425
426/*-------------------------------------------------------------------------
427 * HW MAC Address
428 *-------------------------------------------------------------------------*/
429void rtl92c_set_mac_addr(struct ieee80211_hw *hw, const u8 *addr)
430{
431 u32 i;
432 struct rtl_priv *rtlpriv = rtl_priv(hw);
433
434 for (i = 0 ; i < ETH_ALEN ; i++)
435 rtl_write_byte(rtlpriv, (REG_MACID + i), *(addr+i));
436
Joe Perchesf30d7502012-01-04 19:40:41 -0800437 RT_TRACE(rtlpriv, COMP_CMD, DBG_DMESG,
438 "MAC Address: %02X-%02X-%02X-%02X-%02X-%02X\n",
439 rtl_read_byte(rtlpriv, REG_MACID),
440 rtl_read_byte(rtlpriv, REG_MACID+1),
441 rtl_read_byte(rtlpriv, REG_MACID+2),
442 rtl_read_byte(rtlpriv, REG_MACID+3),
443 rtl_read_byte(rtlpriv, REG_MACID+4),
444 rtl_read_byte(rtlpriv, REG_MACID+5));
George666e8452011-02-19 16:29:27 -0600445}
446
447void rtl92c_init_driver_info_size(struct ieee80211_hw *hw, u8 size)
448{
449 struct rtl_priv *rtlpriv = rtl_priv(hw);
450 rtl_write_byte(rtlpriv, REG_RX_DRVINFO_SZ, size);
451}
452
453int rtl92c_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type)
454{
455 u8 value;
456 struct rtl_priv *rtlpriv = rtl_priv(hw);
457
458 switch (type) {
459 case NL80211_IFTYPE_UNSPECIFIED:
460 value = NT_NO_LINK;
461 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800462 "Set Network type to NO LINK!\n");
George666e8452011-02-19 16:29:27 -0600463 break;
464 case NL80211_IFTYPE_ADHOC:
465 value = NT_LINK_AD_HOC;
466 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800467 "Set Network type to Ad Hoc!\n");
George666e8452011-02-19 16:29:27 -0600468 break;
469 case NL80211_IFTYPE_STATION:
470 value = NT_LINK_AP;
471 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800472 "Set Network type to STA!\n");
George666e8452011-02-19 16:29:27 -0600473 break;
474 case NL80211_IFTYPE_AP:
475 value = NT_AS_AP;
476 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800477 "Set Network type to AP!\n");
George666e8452011-02-19 16:29:27 -0600478 break;
479 default:
480 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
Joe Perchesf30d7502012-01-04 19:40:41 -0800481 "Network type %d not supported!\n", type);
George666e8452011-02-19 16:29:27 -0600482 return -EOPNOTSUPP;
483 }
484 rtl_write_byte(rtlpriv, (REG_CR + 2), value);
485 return 0;
486}
487
488void rtl92c_init_network_type(struct ieee80211_hw *hw)
489{
490 rtl92c_set_network_type(hw, NL80211_IFTYPE_UNSPECIFIED);
491}
492
493void rtl92c_init_adaptive_ctrl(struct ieee80211_hw *hw)
494{
495 u16 value16;
496 u32 value32;
497 struct rtl_priv *rtlpriv = rtl_priv(hw);
498
499 /* Response Rate Set */
500 value32 = rtl_read_dword(rtlpriv, REG_RRSR);
501 value32 &= ~RATE_BITMAP_ALL;
502 value32 |= RATE_RRSR_CCK_ONLY_1M;
503 rtl_write_dword(rtlpriv, REG_RRSR, value32);
504 /* SIFS (used in NAV) */
505 value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10);
506 rtl_write_word(rtlpriv, REG_SPEC_SIFS, value16);
507 /* Retry Limit */
508 value16 = _LRL(0x30) | _SRL(0x30);
509 rtl_write_dword(rtlpriv, REG_RL, value16);
510}
511
512void rtl92c_init_rate_fallback(struct ieee80211_hw *hw)
513{
514 struct rtl_priv *rtlpriv = rtl_priv(hw);
515
516 /* Set Data Auto Rate Fallback Retry Count register. */
517 rtl_write_dword(rtlpriv, REG_DARFRC, 0x00000000);
518 rtl_write_dword(rtlpriv, REG_DARFRC+4, 0x10080404);
519 rtl_write_dword(rtlpriv, REG_RARFRC, 0x04030201);
520 rtl_write_dword(rtlpriv, REG_RARFRC+4, 0x08070605);
521}
522
523static void rtl92c_set_cck_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
524 u8 ctx_sifs)
525{
526 struct rtl_priv *rtlpriv = rtl_priv(hw);
527
528 rtl_write_byte(rtlpriv, REG_SIFS_CCK, trx_sifs);
529 rtl_write_byte(rtlpriv, (REG_SIFS_CCK + 1), ctx_sifs);
530}
531
532static void rtl92c_set_ofdm_sifs(struct ieee80211_hw *hw, u8 trx_sifs,
533 u8 ctx_sifs)
534{
535 struct rtl_priv *rtlpriv = rtl_priv(hw);
536
537 rtl_write_byte(rtlpriv, REG_SIFS_OFDM, trx_sifs);
538 rtl_write_byte(rtlpriv, (REG_SIFS_OFDM + 1), ctx_sifs);
539}
540
541void rtl92c_init_edca_param(struct ieee80211_hw *hw,
542 u16 queue, u16 txop, u8 cw_min, u8 cw_max, u8 aifs)
543{
544 /* sequence: VO, VI, BE, BK ==> the same as 92C hardware design.
545 * referenc : enum nl80211_txq_q or ieee80211_set_wmm_default function.
546 */
547 u32 value;
548 struct rtl_priv *rtlpriv = rtl_priv(hw);
549
550 value = (u32)aifs;
551 value |= ((u32)cw_min & 0xF) << 8;
552 value |= ((u32)cw_max & 0xF) << 12;
553 value |= (u32)txop << 16;
554 /* 92C hardware register sequence is the same as queue number. */
555 rtl_write_dword(rtlpriv, (REG_EDCA_VO_PARAM + (queue * 4)), value);
556}
557
558void rtl92c_init_edca(struct ieee80211_hw *hw)
559{
560 u16 value16;
561 struct rtl_priv *rtlpriv = rtl_priv(hw);
562
563 /* disable EDCCA count down, to reduce collison and retry */
564 value16 = rtl_read_word(rtlpriv, REG_RD_CTRL);
565 value16 |= DIS_EDCA_CNT_DWN;
566 rtl_write_word(rtlpriv, REG_RD_CTRL, value16);
567 /* Update SIFS timing. ??????????
568 * pHalData->SifsTime = 0x0e0e0a0a; */
569 rtl92c_set_cck_sifs(hw, 0xa, 0xa);
570 rtl92c_set_ofdm_sifs(hw, 0xe, 0xe);
571 /* Set CCK/OFDM SIFS to be 10us. */
572 rtl_write_word(rtlpriv, REG_SIFS_CCK, 0x0a0a);
573 rtl_write_word(rtlpriv, REG_SIFS_OFDM, 0x1010);
574 rtl_write_word(rtlpriv, REG_PROT_MODE_CTRL, 0x0204);
575 rtl_write_dword(rtlpriv, REG_BAR_MODE_CTRL, 0x014004);
576 /* TXOP */
577 rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM, 0x005EA42B);
578 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0x0000A44F);
579 rtl_write_dword(rtlpriv, REG_EDCA_VI_PARAM, 0x005EA324);
580 rtl_write_dword(rtlpriv, REG_EDCA_VO_PARAM, 0x002FA226);
581 /* PIFS */
582 rtl_write_byte(rtlpriv, REG_PIFS, 0x1C);
583 /* AGGR BREAK TIME Register */
584 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
585 rtl_write_word(rtlpriv, REG_NAV_PROT_LEN, 0x0040);
586 rtl_write_byte(rtlpriv, REG_BCNDMATIM, 0x02);
587 rtl_write_byte(rtlpriv, REG_ATIMWND, 0x02);
588}
589
590void rtl92c_init_ampdu_aggregation(struct ieee80211_hw *hw)
591{
592 struct rtl_priv *rtlpriv = rtl_priv(hw);
593
594 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, 0x99997631);
595 rtl_write_byte(rtlpriv, REG_AGGR_BREAK_TIME, 0x16);
596 /* init AMPDU aggregation number, tuning for Tx's TP, */
597 rtl_write_word(rtlpriv, 0x4CA, 0x0708);
598}
599
600void rtl92c_init_beacon_max_error(struct ieee80211_hw *hw, bool infra_mode)
601{
602 struct rtl_priv *rtlpriv = rtl_priv(hw);
603
604 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xFF);
605}
606
607void rtl92c_init_rdg_setting(struct ieee80211_hw *hw)
608{
609 struct rtl_priv *rtlpriv = rtl_priv(hw);
610
611 rtl_write_byte(rtlpriv, REG_RD_CTRL, 0xFF);
612 rtl_write_word(rtlpriv, REG_RD_NAV_NXT, 0x200);
613 rtl_write_byte(rtlpriv, REG_RD_RESP_PKT_TH, 0x05);
614}
615
616void rtl92c_init_retry_function(struct ieee80211_hw *hw)
617{
618 u8 value8;
619 struct rtl_priv *rtlpriv = rtl_priv(hw);
620
621 value8 = rtl_read_byte(rtlpriv, REG_FWHW_TXQ_CTRL);
622 value8 |= EN_AMPDU_RTY_NEW;
623 rtl_write_byte(rtlpriv, REG_FWHW_TXQ_CTRL, value8);
624 /* Set ACK timeout */
625 rtl_write_byte(rtlpriv, REG_ACKTO, 0x40);
626}
627
628void rtl92c_init_beacon_parameters(struct ieee80211_hw *hw,
629 enum version_8192c version)
630{
631 struct rtl_priv *rtlpriv = rtl_priv(hw);
632 struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
633
634 rtl_write_word(rtlpriv, REG_TBTT_PROHIBIT, 0x6404);/* ms */
635 rtl_write_byte(rtlpriv, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);/*ms*/
636 rtl_write_byte(rtlpriv, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME);
637 if (IS_NORMAL_CHIP(rtlhal->version))
638 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x660F);
639 else
640 rtl_write_word(rtlpriv, REG_BCNTCFG, 0x66FF);
641}
642
643void rtl92c_disable_fast_edca(struct ieee80211_hw *hw)
644{
645 struct rtl_priv *rtlpriv = rtl_priv(hw);
646
647 rtl_write_word(rtlpriv, REG_FAST_EDCA_CTRL, 0);
648}
649
650void rtl92c_set_min_space(struct ieee80211_hw *hw, bool is2T)
651{
652 struct rtl_priv *rtlpriv = rtl_priv(hw);
653 u8 value = is2T ? MAX_MSS_DENSITY_2T : MAX_MSS_DENSITY_1T;
654
655 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE, value);
656}
657
658u16 rtl92c_get_mgt_filter(struct ieee80211_hw *hw)
659{
660 struct rtl_priv *rtlpriv = rtl_priv(hw);
661
662 return rtl_read_word(rtlpriv, REG_RXFLTMAP0);
663}
664
665void rtl92c_set_mgt_filter(struct ieee80211_hw *hw, u16 filter)
666{
667 struct rtl_priv *rtlpriv = rtl_priv(hw);
668
669 rtl_write_word(rtlpriv, REG_RXFLTMAP0, filter);
670}
671
672u16 rtl92c_get_ctrl_filter(struct ieee80211_hw *hw)
673{
674 struct rtl_priv *rtlpriv = rtl_priv(hw);
675
676 return rtl_read_word(rtlpriv, REG_RXFLTMAP1);
677}
678
679void rtl92c_set_ctrl_filter(struct ieee80211_hw *hw, u16 filter)
680{
681 struct rtl_priv *rtlpriv = rtl_priv(hw);
682
683 rtl_write_word(rtlpriv, REG_RXFLTMAP1, filter);
684}
685
686u16 rtl92c_get_data_filter(struct ieee80211_hw *hw)
687{
688 struct rtl_priv *rtlpriv = rtl_priv(hw);
689
690 return rtl_read_word(rtlpriv, REG_RXFLTMAP2);
691}
692
693void rtl92c_set_data_filter(struct ieee80211_hw *hw, u16 filter)
694{
695 struct rtl_priv *rtlpriv = rtl_priv(hw);
696
697 rtl_write_word(rtlpriv, REG_RXFLTMAP2, filter);
698}
699/*==============================================================*/
700
701static u8 _rtl92c_query_rxpwrpercentage(char antpower)
702{
703 if ((antpower <= -100) || (antpower >= 20))
704 return 0;
705 else if (antpower >= 0)
706 return 100;
707 else
708 return 100 + antpower;
709}
710
711static u8 _rtl92c_evm_db_to_percentage(char value)
712{
713 char ret_val;
714
715 ret_val = value;
716 if (ret_val >= 0)
717 ret_val = 0;
718 if (ret_val <= -33)
719 ret_val = -33;
720 ret_val = 0 - ret_val;
721 ret_val *= 3;
722 if (ret_val == 99)
723 ret_val = 100;
724 return ret_val;
725}
726
727static long _rtl92c_translate_todbm(struct ieee80211_hw *hw,
728 u8 signal_strength_index)
729{
730 long signal_power;
731
732 signal_power = (long)((signal_strength_index + 1) >> 1);
733 signal_power -= 95;
734 return signal_power;
735}
736
737static long _rtl92c_signal_scale_mapping(struct ieee80211_hw *hw,
738 long currsig)
739{
740 long retsig;
741
742 if (currsig >= 61 && currsig <= 100)
743 retsig = 90 + ((currsig - 60) / 4);
744 else if (currsig >= 41 && currsig <= 60)
745 retsig = 78 + ((currsig - 40) / 2);
746 else if (currsig >= 31 && currsig <= 40)
747 retsig = 66 + (currsig - 30);
748 else if (currsig >= 21 && currsig <= 30)
749 retsig = 54 + (currsig - 20);
750 else if (currsig >= 5 && currsig <= 20)
751 retsig = 42 + (((currsig - 5) * 2) / 3);
752 else if (currsig == 4)
753 retsig = 36;
754 else if (currsig == 3)
755 retsig = 27;
756 else if (currsig == 2)
757 retsig = 18;
758 else if (currsig == 1)
759 retsig = 9;
760 else
761 retsig = currsig;
762 return retsig;
763}
764
765static void _rtl92c_query_rxphystatus(struct ieee80211_hw *hw,
766 struct rtl_stats *pstats,
767 struct rx_desc_92c *pdesc,
768 struct rx_fwinfo_92c *p_drvinfo,
769 bool packet_match_bssid,
770 bool packet_toself,
771 bool packet_beacon)
772{
773 struct rtl_priv *rtlpriv = rtl_priv(hw);
774 struct rtl_phy *rtlphy = &(rtlpriv->phy);
775 struct phy_sts_cck_8192s_t *cck_buf;
776 s8 rx_pwr_all = 0, rx_pwr[4];
777 u8 rf_rx_num = 0, evm, pwdb_all;
778 u8 i, max_spatial_stream;
779 u32 rssi, total_rssi = 0;
780 bool in_powersavemode = false;
781 bool is_cck_rate;
782
783 is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
784 pstats->packet_matchbssid = packet_match_bssid;
785 pstats->packet_toself = packet_toself;
786 pstats->is_cck = is_cck_rate;
787 pstats->packet_beacon = packet_beacon;
788 pstats->is_cck = is_cck_rate;
789 pstats->RX_SIGQ[0] = -1;
790 pstats->RX_SIGQ[1] = -1;
791 if (is_cck_rate) {
792 u8 report, cck_highpwr;
793 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
794 if (!in_powersavemode)
795 cck_highpwr = rtlphy->cck_high_power;
796 else
797 cck_highpwr = false;
798 if (!cck_highpwr) {
799 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
800 report = cck_buf->cck_agc_rpt & 0xc0;
801 report = report >> 6;
802 switch (report) {
803 case 0x3:
804 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
805 break;
806 case 0x2:
807 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
808 break;
809 case 0x1:
810 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
811 break;
812 case 0x0:
813 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
814 break;
815 }
816 } else {
817 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
818 report = p_drvinfo->cfosho[0] & 0x60;
819 report = report >> 5;
820 switch (report) {
821 case 0x3:
822 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
823 break;
824 case 0x2:
825 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
826 break;
827 case 0x1:
828 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
829 break;
830 case 0x0:
831 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
832 break;
833 }
834 }
835 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
836 pstats->rx_pwdb_all = pwdb_all;
837 pstats->recvsignalpower = rx_pwr_all;
838 if (packet_match_bssid) {
839 u8 sq;
840 if (pstats->rx_pwdb_all > 40)
841 sq = 100;
842 else {
843 sq = cck_buf->sq_rpt;
844 if (sq > 64)
845 sq = 0;
846 else if (sq < 20)
847 sq = 100;
848 else
849 sq = ((64 - sq) * 100) / 44;
850 }
851 pstats->signalquality = sq;
852 pstats->RX_SIGQ[0] = sq;
853 pstats->RX_SIGQ[1] = -1;
854 }
855 } else {
856 rtlpriv->dm.rfpath_rxenable[0] =
857 rtlpriv->dm.rfpath_rxenable[1] = true;
858 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
859 if (rtlpriv->dm.rfpath_rxenable[i])
860 rf_rx_num++;
861 rx_pwr[i] =
862 ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
863 rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
864 total_rssi += rssi;
865 rtlpriv->stats.rx_snr_db[i] =
866 (long)(p_drvinfo->rxsnr[i] / 2);
867
868 if (packet_match_bssid)
869 pstats->rx_mimo_signalstrength[i] = (u8) rssi;
870 }
871 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
872 pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
873 pstats->rx_pwdb_all = pwdb_all;
874 pstats->rxpower = rx_pwr_all;
875 pstats->recvsignalpower = rx_pwr_all;
876 if (GET_RX_DESC_RX_MCS(pdesc) &&
Larry Finger2b67e882011-08-22 16:50:16 -0500877 GET_RX_DESC_RX_MCS(pdesc) >= DESC92_RATEMCS8 &&
878 GET_RX_DESC_RX_MCS(pdesc) <= DESC92_RATEMCS15)
George666e8452011-02-19 16:29:27 -0600879 max_spatial_stream = 2;
880 else
881 max_spatial_stream = 1;
882 for (i = 0; i < max_spatial_stream; i++) {
883 evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
884 if (packet_match_bssid) {
885 if (i == 0)
886 pstats->signalquality =
887 (u8) (evm & 0xff);
888 pstats->RX_SIGQ[i] =
889 (u8) (evm & 0xff);
890 }
891 }
892 }
893 if (is_cck_rate)
894 pstats->signalstrength =
895 (u8) (_rtl92c_signal_scale_mapping(hw, pwdb_all));
896 else if (rf_rx_num != 0)
897 pstats->signalstrength =
898 (u8) (_rtl92c_signal_scale_mapping
899 (hw, total_rssi /= rf_rx_num));
900}
901
902static void _rtl92c_process_ui_rssi(struct ieee80211_hw *hw,
903 struct rtl_stats *pstats)
904{
905 struct rtl_priv *rtlpriv = rtl_priv(hw);
906 struct rtl_phy *rtlphy = &(rtlpriv->phy);
907 u8 rfpath;
908 u32 last_rssi, tmpval;
909
910 if (pstats->packet_toself || pstats->packet_beacon) {
911 rtlpriv->stats.rssi_calculate_cnt++;
912 if (rtlpriv->stats.ui_rssi.total_num++ >=
913 PHY_RSSI_SLID_WIN_MAX) {
914 rtlpriv->stats.ui_rssi.total_num =
915 PHY_RSSI_SLID_WIN_MAX;
916 last_rssi =
917 rtlpriv->stats.ui_rssi.elements[rtlpriv->
918 stats.ui_rssi.index];
919 rtlpriv->stats.ui_rssi.total_val -= last_rssi;
920 }
921 rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
922 rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
923 index++] = pstats->signalstrength;
924 if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
925 rtlpriv->stats.ui_rssi.index = 0;
926 tmpval = rtlpriv->stats.ui_rssi.total_val /
927 rtlpriv->stats.ui_rssi.total_num;
928 rtlpriv->stats.signal_strength =
929 _rtl92c_translate_todbm(hw, (u8) tmpval);
930 pstats->rssi = rtlpriv->stats.signal_strength;
931 }
932 if (!pstats->is_cck && pstats->packet_toself) {
933 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
934 rfpath++) {
935 if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
936 continue;
937 if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
938 rtlpriv->stats.rx_rssi_percentage[rfpath] =
939 pstats->rx_mimo_signalstrength[rfpath];
940 }
941 if (pstats->rx_mimo_signalstrength[rfpath] >
942 rtlpriv->stats.rx_rssi_percentage[rfpath]) {
943 rtlpriv->stats.rx_rssi_percentage[rfpath] =
944 ((rtlpriv->stats.
945 rx_rssi_percentage[rfpath] *
946 (RX_SMOOTH_FACTOR - 1)) +
947 (pstats->rx_mimo_signalstrength[rfpath])) /
948 (RX_SMOOTH_FACTOR);
949
950 rtlpriv->stats.rx_rssi_percentage[rfpath] =
951 rtlpriv->stats.rx_rssi_percentage[rfpath] +
952 1;
953 } else {
954 rtlpriv->stats.rx_rssi_percentage[rfpath] =
955 ((rtlpriv->stats.
956 rx_rssi_percentage[rfpath] *
957 (RX_SMOOTH_FACTOR - 1)) +
958 (pstats->rx_mimo_signalstrength[rfpath])) /
959 (RX_SMOOTH_FACTOR);
960 }
961 }
962 }
963}
964
965static void _rtl92c_update_rxsignalstatistics(struct ieee80211_hw *hw,
966 struct rtl_stats *pstats)
967{
968 struct rtl_priv *rtlpriv = rtl_priv(hw);
969 int weighting = 0;
970
971 if (rtlpriv->stats.recv_signal_power == 0)
972 rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
973 if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
974 weighting = 5;
975 else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
976 weighting = (-5);
977 rtlpriv->stats.recv_signal_power =
978 (rtlpriv->stats.recv_signal_power * 5 +
979 pstats->recvsignalpower + weighting) / 6;
980}
981
982static void _rtl92c_process_pwdb(struct ieee80211_hw *hw,
983 struct rtl_stats *pstats)
984{
985 struct rtl_priv *rtlpriv = rtl_priv(hw);
986 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
987 long undecorated_smoothed_pwdb = 0;
988
989 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
990 return;
991 } else {
992 undecorated_smoothed_pwdb =
993 rtlpriv->dm.undecorated_smoothed_pwdb;
994 }
995 if (pstats->packet_toself || pstats->packet_beacon) {
996 if (undecorated_smoothed_pwdb < 0)
997 undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
998 if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
999 undecorated_smoothed_pwdb =
1000 (((undecorated_smoothed_pwdb) *
1001 (RX_SMOOTH_FACTOR - 1)) +
1002 (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
1003 undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
1004 + 1;
1005 } else {
1006 undecorated_smoothed_pwdb =
1007 (((undecorated_smoothed_pwdb) *
1008 (RX_SMOOTH_FACTOR - 1)) +
1009 (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
1010 }
1011 rtlpriv->dm.undecorated_smoothed_pwdb =
1012 undecorated_smoothed_pwdb;
1013 _rtl92c_update_rxsignalstatistics(hw, pstats);
1014 }
1015}
1016
1017static void _rtl92c_process_LINK_Q(struct ieee80211_hw *hw,
1018 struct rtl_stats *pstats)
1019{
1020 struct rtl_priv *rtlpriv = rtl_priv(hw);
1021 u32 last_evm = 0, n_stream, tmpval;
1022
1023 if (pstats->signalquality != 0) {
1024 if (pstats->packet_toself || pstats->packet_beacon) {
1025 if (rtlpriv->stats.LINK_Q.total_num++ >=
1026 PHY_LINKQUALITY_SLID_WIN_MAX) {
1027 rtlpriv->stats.LINK_Q.total_num =
1028 PHY_LINKQUALITY_SLID_WIN_MAX;
1029 last_evm =
1030 rtlpriv->stats.LINK_Q.elements
1031 [rtlpriv->stats.LINK_Q.index];
1032 rtlpriv->stats.LINK_Q.total_val -=
1033 last_evm;
1034 }
1035 rtlpriv->stats.LINK_Q.total_val +=
1036 pstats->signalquality;
1037 rtlpriv->stats.LINK_Q.elements
1038 [rtlpriv->stats.LINK_Q.index++] =
1039 pstats->signalquality;
1040 if (rtlpriv->stats.LINK_Q.index >=
1041 PHY_LINKQUALITY_SLID_WIN_MAX)
1042 rtlpriv->stats.LINK_Q.index = 0;
1043 tmpval = rtlpriv->stats.LINK_Q.total_val /
1044 rtlpriv->stats.LINK_Q.total_num;
1045 rtlpriv->stats.signal_quality = tmpval;
1046 rtlpriv->stats.last_sigstrength_inpercent = tmpval;
1047 for (n_stream = 0; n_stream < 2;
1048 n_stream++) {
1049 if (pstats->RX_SIGQ[n_stream] != -1) {
1050 if (!rtlpriv->stats.RX_EVM[n_stream]) {
1051 rtlpriv->stats.RX_EVM[n_stream]
1052 = pstats->RX_SIGQ[n_stream];
1053 }
1054 rtlpriv->stats.RX_EVM[n_stream] =
1055 ((rtlpriv->stats.RX_EVM
1056 [n_stream] *
1057 (RX_SMOOTH_FACTOR - 1)) +
1058 (pstats->RX_SIGQ
1059 [n_stream] * 1)) /
1060 (RX_SMOOTH_FACTOR);
1061 }
1062 }
1063 }
1064 } else {
1065 ;
1066 }
1067}
1068
1069static void _rtl92c_process_phyinfo(struct ieee80211_hw *hw,
1070 u8 *buffer,
1071 struct rtl_stats *pcurrent_stats)
1072{
1073 if (!pcurrent_stats->packet_matchbssid &&
1074 !pcurrent_stats->packet_beacon)
1075 return;
1076 _rtl92c_process_ui_rssi(hw, pcurrent_stats);
1077 _rtl92c_process_pwdb(hw, pcurrent_stats);
1078 _rtl92c_process_LINK_Q(hw, pcurrent_stats);
1079}
1080
1081void rtl92c_translate_rx_signal_stuff(struct ieee80211_hw *hw,
1082 struct sk_buff *skb,
1083 struct rtl_stats *pstats,
1084 struct rx_desc_92c *pdesc,
1085 struct rx_fwinfo_92c *p_drvinfo)
1086{
1087 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1088 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1089 struct ieee80211_hdr *hdr;
1090 u8 *tmp_buf;
1091 u8 *praddr;
George666e8452011-02-19 16:29:27 -06001092 __le16 fc;
1093 u16 type, cpu_fc;
1094 bool packet_matchbssid, packet_toself, packet_beacon;
1095
1096 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
1097 hdr = (struct ieee80211_hdr *)tmp_buf;
1098 fc = hdr->frame_control;
1099 cpu_fc = le16_to_cpu(fc);
1100 type = WLAN_FC_GET_TYPE(fc);
1101 praddr = hdr->addr1;
George666e8452011-02-19 16:29:27 -06001102 packet_matchbssid =
1103 ((IEEE80211_FTYPE_CTL != type) &&
1104 (!compare_ether_addr(mac->bssid,
1105 (cpu_fc & IEEE80211_FCTL_TODS) ?
1106 hdr->addr1 : (cpu_fc & IEEE80211_FCTL_FROMDS) ?
1107 hdr->addr2 : hdr->addr3)) &&
1108 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
1109
1110 packet_toself = packet_matchbssid &&
1111 (!compare_ether_addr(praddr, rtlefuse->dev_addr));
1112 if (ieee80211_is_beacon(fc))
1113 packet_beacon = true;
1114 _rtl92c_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
1115 packet_matchbssid, packet_toself,
1116 packet_beacon);
1117 _rtl92c_process_phyinfo(hw, tmp_buf, pstats);
1118}