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Waiman Longd73a3392015-04-24 14:56:31 -04001#ifndef _ASM_X86_QSPINLOCK_H
2#define _ASM_X86_QSPINLOCK_H
3
Juergen Gross90434422017-09-06 19:36:24 +02004#include <linux/jump_label.h>
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -04005#include <asm/cpufeature.h>
Waiman Longd73a3392015-04-24 14:56:31 -04006#include <asm-generic/qspinlock_types.h>
Peter Zijlstra (Intel)f233f7f2015-04-24 14:56:38 -04007#include <asm/paravirt.h>
Waiman Longd73a3392015-04-24 14:56:31 -04008
9#define queued_spin_unlock queued_spin_unlock
10/**
11 * queued_spin_unlock - release a queued spinlock
12 * @lock : Pointer to queued spinlock structure
13 *
14 * A smp_store_release() on the least-significant byte.
15 */
Peter Zijlstra (Intel)f233f7f2015-04-24 14:56:38 -040016static inline void native_queued_spin_unlock(struct qspinlock *lock)
Waiman Longd73a3392015-04-24 14:56:31 -040017{
18 smp_store_release((u8 *)lock, 0);
19}
20
Peter Zijlstra (Intel)f233f7f2015-04-24 14:56:38 -040021#ifdef CONFIG_PARAVIRT_SPINLOCKS
22extern void native_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
23extern void __pv_init_lock_hash(void);
24extern void __pv_queued_spin_lock_slowpath(struct qspinlock *lock, u32 val);
25extern void __raw_callee_save___pv_queued_spin_unlock(struct qspinlock *lock);
26
27static inline void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
28{
29 pv_queued_spin_lock_slowpath(lock, val);
30}
31
32static inline void queued_spin_unlock(struct qspinlock *lock)
33{
34 pv_queued_spin_unlock(lock);
35}
Peter Zijlstra3cded412016-11-15 16:47:06 +010036
37#define vcpu_is_preempted vcpu_is_preempted
Waiman Long6c629852017-02-20 13:36:03 -050038static inline bool vcpu_is_preempted(long cpu)
Peter Zijlstra3cded412016-11-15 16:47:06 +010039{
40 return pv_vcpu_is_preempted(cpu);
41}
Peter Zijlstra (Intel)f233f7f2015-04-24 14:56:38 -040042#else
43static inline void queued_spin_unlock(struct qspinlock *lock)
44{
45 native_queued_spin_unlock(lock);
46}
47#endif
48
Peter Zijlstraa6b27782015-09-05 16:55:05 +020049#ifdef CONFIG_PARAVIRT
Juergen Gross90434422017-09-06 19:36:24 +020050DECLARE_STATIC_KEY_TRUE(virt_spin_lock_key);
51
52void native_pv_lock_init(void) __init;
53
Peter Zijlstra43b3f022015-09-04 17:25:23 +020054#define virt_spin_lock virt_spin_lock
Peter Zijlstra43b3f022015-09-04 17:25:23 +020055static inline bool virt_spin_lock(struct qspinlock *lock)
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -040056{
Juergen Gross90434422017-09-06 19:36:24 +020057 if (!static_branch_likely(&virt_spin_lock_key))
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -040058 return false;
59
Peter Zijlstra43b3f022015-09-04 17:25:23 +020060 /*
61 * On hypervisors without PARAVIRT_SPINLOCKS support we fall
62 * back to a Test-and-Set spinlock, because fair locks have
63 * horrible lock 'holder' preemption issues.
64 */
65
66 do {
67 while (atomic_read(&lock->val) != 0)
68 cpu_relax();
69 } while (atomic_cmpxchg(&lock->val, 0, _Q_LOCKED_VAL) != 0);
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -040070
71 return true;
72}
Juergen Gross90434422017-09-06 19:36:24 +020073#else
74static inline void native_pv_lock_init(void)
75{
76}
Peter Zijlstraa6b27782015-09-05 16:55:05 +020077#endif /* CONFIG_PARAVIRT */
Peter Zijlstra (Intel)2aa79af2015-04-24 14:56:36 -040078
Waiman Longd73a3392015-04-24 14:56:31 -040079#include <asm-generic/qspinlock.h>
80
81#endif /* _ASM_X86_QSPINLOCK_H */