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Benjamin Gaignard54026262014-07-30 19:24:55 +02001/*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
5 */
6
7#ifndef _STI_HDMI_H_
8#define _STI_HDMI_H_
9
Vincent Abriou5671cefb2016-02-10 11:24:28 +010010#include <linux/hdmi.h>
Benjamin Gaignard54026262014-07-30 19:24:55 +020011#include <linux/platform_device.h>
12
13#include <drm/drmP.h>
Benjamin Gaignardbca55952017-01-03 12:54:55 -020014#include <media/cec-notifier.h>
Benjamin Gaignard54026262014-07-30 19:24:55 +020015
16#define HDMI_STA 0x0010
17#define HDMI_STA_DLL_LCK BIT(5)
Vincent Abriou7ea6e6e2016-02-04 16:23:55 +010018#define HDMI_STA_HOT_PLUG BIT(4)
Benjamin Gaignard76569202014-10-09 08:53:35 +020019
Benjamin Gaignard54026262014-07-30 19:24:55 +020020struct sti_hdmi;
21
22struct hdmi_phy_ops {
23 bool (*start)(struct sti_hdmi *hdmi);
24 void (*stop)(struct sti_hdmi *hdmi);
25};
26
Arnaud Pouliquen2c348e52016-05-30 15:31:37 +020027struct hdmi_audio_params {
28 bool enabled;
29 unsigned int sample_width;
30 unsigned int sample_rate;
31 struct hdmi_audio_infoframe cea;
32};
33
Vincent Abriou5671cefb2016-02-10 11:24:28 +010034static const struct drm_prop_enum_list colorspace_mode_names[] = {
35 { HDMI_COLORSPACE_RGB, "rgb" },
36 { HDMI_COLORSPACE_YUV422, "yuv422" },
37 { HDMI_COLORSPACE_YUV444, "yuv444" },
38};
39
40#define DEFAULT_COLORSPACE_MODE HDMI_COLORSPACE_RGB
41
Benjamin Gaignard54026262014-07-30 19:24:55 +020042/**
43 * STI hdmi structure
44 *
45 * @dev: driver device
46 * @drm_dev: pointer to drm device
47 * @mode: current display mode selected
48 * @regs: hdmi register
49 * @syscfg: syscfg register for pll rejection configuration
50 * @clk_pix: hdmi pixel clock
51 * @clk_tmds: hdmi tmds clock
52 * @clk_phy: hdmi phy clock
53 * @clk_audio: hdmi audio clock
54 * @irq: hdmi interrupt number
55 * @irq_status: interrupt status register
56 * @phy_ops: phy start/stop operations
57 * @enabled: true if hdmi is enabled else false
Benjamin Gaignard54026262014-07-30 19:24:55 +020058 * @hpd: hot plug detect status
59 * @wait_event: wait event
60 * @event_received: wait event status
61 * @reset: reset control of the hdmi phy
Vincent Abriou5671cefb2016-02-10 11:24:28 +010062 * @ddc_adapt: i2c ddc adapter
63 * @colorspace: current colorspace selected
Vincent Abriou97d7c572017-02-02 09:45:48 +010064 * @hdmi_monitor: true if HDMI monitor detected else DVI monitor assumed
Arnaud Pouliquen2c348e52016-05-30 15:31:37 +020065 * @audio_pdev: ASoC hdmi-codec platform device
66 * @audio: hdmi audio parameters.
67 * @drm_connector: hdmi connector
Benjamin Gaignardbca55952017-01-03 12:54:55 -020068 * @notifier: hotplug detect notifier
Benjamin Gaignard54026262014-07-30 19:24:55 +020069 */
70struct sti_hdmi {
71 struct device dev;
72 struct drm_device *drm_dev;
73 struct drm_display_mode mode;
74 void __iomem *regs;
75 void __iomem *syscfg;
76 struct clk *clk_pix;
77 struct clk *clk_tmds;
78 struct clk *clk_phy;
79 struct clk *clk_audio;
80 int irq;
81 u32 irq_status;
82 struct hdmi_phy_ops *phy_ops;
83 bool enabled;
Benjamin Gaignard54026262014-07-30 19:24:55 +020084 bool hpd;
85 wait_queue_head_t wait_event;
86 bool event_received;
87 struct reset_control *reset;
Benjamin Gaignard41a14622014-09-08 15:52:08 +020088 struct i2c_adapter *ddc_adapt;
Vincent Abriou5671cefb2016-02-10 11:24:28 +010089 enum hdmi_colorspace colorspace;
Vincent Abriou97d7c572017-02-02 09:45:48 +010090 bool hdmi_monitor;
Arnaud Pouliquen2c348e52016-05-30 15:31:37 +020091 struct platform_device *audio_pdev;
92 struct hdmi_audio_params audio;
93 struct drm_connector *drm_connector;
Benjamin Gaignardbca55952017-01-03 12:54:55 -020094 struct cec_notifier *notifier;
Benjamin Gaignard54026262014-07-30 19:24:55 +020095};
96
97u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
98void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
99
100/**
101 * hdmi phy config structure
102 *
103 * A pointer to an array of these structures is passed to a TMDS (HDMI) output
104 * via the control interface to provide board and SoC specific
105 * configurations of the HDMI PHY. Each entry in the array specifies a hardware
106 * specific configuration for a given TMDS clock frequency range.
107 *
108 * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
109 * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
110 * @config: SoC specific register configuration
111 */
112struct hdmi_phy_config {
113 u32 min_tmds_freq;
114 u32 max_tmds_freq;
115 u32 config[4];
116};
117
118#endif