blob: d417acab0ecf7baa81fca755a97238cc1232131f [file] [log] [blame]
Rob Herringb7e78172015-01-28 10:16:18 -06001/*
2 * Copyright 2004 Koninklijke Philips Electronics NV
3 *
4 * Conversion to platform driver and DT:
5 * Copyright 2014 Linaro Ltd.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * 14/04/2005 Initial version, colin.king@philips.com
17 */
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/of_address.h>
21#include <linux/of_pci.h>
22#include <linux/of_platform.h>
23#include <linux/pci.h>
24#include <linux/platform_device.h>
25
26static void __iomem *versatile_pci_base;
27static void __iomem *versatile_cfg_base[2];
28
29#define PCI_IMAP(m) (versatile_pci_base + ((m) * 4))
30#define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4))
31#define PCI_SELFID (versatile_pci_base + 0xc)
32
33#define VP_PCI_DEVICE_ID 0x030010ee
34#define VP_PCI_CLASS_ID 0x0b400000
35
36static u32 pci_slot_ignore;
37
38static int __init versatile_pci_slot_ignore(char *str)
39{
40 int retval;
41 int slot;
42
43 while ((retval = get_option(&str, &slot))) {
44 if ((slot < 0) || (slot > 31))
45 pr_err("Illegal slot value: %d\n", slot);
46 else
47 pci_slot_ignore |= (1 << slot);
48 }
49 return 1;
50}
51__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
52
53
54static void __iomem *versatile_map_bus(struct pci_bus *bus,
55 unsigned int devfn, int offset)
56{
57 unsigned int busnr = bus->number;
58
59 if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
60 return NULL;
61
62 return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
63}
64
65static struct pci_ops pci_versatile_ops = {
66 .map_bus = versatile_map_bus,
67 .read = pci_generic_config_read32,
68 .write = pci_generic_config_write,
69};
70
71static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
72 struct list_head *res)
73{
74 int err, mem = 1, res_valid = 0;
75 struct device_node *np = dev->of_node;
76 resource_size_t iobase;
Lorenzo Pieralisi53f4f7e2016-08-15 17:50:43 +010077 struct resource_entry *win, *tmp;
Rob Herringb7e78172015-01-28 10:16:18 -060078
79 err = of_pci_get_host_bridge_resources(np, 0, 0xff, res, &iobase);
80 if (err)
81 return err;
82
Bjorn Helgaas2fbb3532016-05-31 12:09:28 -050083 err = devm_request_pci_bus_resources(dev, res);
84 if (err)
85 goto out_release_res;
86
Lorenzo Pieralisi53f4f7e2016-08-15 17:50:43 +010087 resource_list_for_each_entry_safe(win, tmp, res) {
Bjorn Helgaas2fbb3532016-05-31 12:09:28 -050088 struct resource *res = win->res;
Rob Herringb7e78172015-01-28 10:16:18 -060089
90 switch (resource_type(res)) {
91 case IORESOURCE_IO:
Rob Herringb7e78172015-01-28 10:16:18 -060092 err = pci_remap_iospace(res, iobase);
Lorenzo Pieralisi53f4f7e2016-08-15 17:50:43 +010093 if (err) {
Rob Herringb7e78172015-01-28 10:16:18 -060094 dev_warn(dev, "error %d: failed to map resource %pR\n",
95 err, res);
Lorenzo Pieralisi53f4f7e2016-08-15 17:50:43 +010096 resource_list_destroy_entry(win);
97 }
Rob Herringb7e78172015-01-28 10:16:18 -060098 break;
99 case IORESOURCE_MEM:
Rob Herringb7e78172015-01-28 10:16:18 -0600100 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
101
102 writel(res->start >> 28, PCI_IMAP(mem));
103 writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
104 mem++;
105
106 break;
Rob Herringb7e78172015-01-28 10:16:18 -0600107 }
Rob Herringb7e78172015-01-28 10:16:18 -0600108 }
109
Bjorn Helgaasda6163a2016-05-28 18:31:26 -0500110 if (res_valid)
111 return 0;
Rob Herringb7e78172015-01-28 10:16:18 -0600112
Bjorn Helgaasda6163a2016-05-28 18:31:26 -0500113 dev_err(dev, "non-prefetchable memory resource required\n");
114 err = -EINVAL;
Rob Herringb7e78172015-01-28 10:16:18 -0600115
116out_release_res:
117 pci_free_resource_list(res);
118 return err;
119}
120
Rob Herringb7e78172015-01-28 10:16:18 -0600121static int versatile_pci_probe(struct platform_device *pdev)
122{
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500123 struct device *dev = &pdev->dev;
Rob Herringb7e78172015-01-28 10:16:18 -0600124 struct resource *res;
125 int ret, i, myslot = -1;
126 u32 val;
127 void __iomem *local_pci_cfg_base;
Bjorn Helgaas70bc1b62017-02-08 15:42:26 -0600128 struct pci_bus *bus, *child;
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500129 struct pci_host_bridge *bridge;
Rob Herringb7e78172015-01-28 10:16:18 -0600130 LIST_HEAD(pci_res);
131
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500132 bridge = devm_pci_alloc_host_bridge(dev, 0);
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500133 if (!bridge)
134 return -ENOMEM;
135
Rob Herringb7e78172015-01-28 10:16:18 -0600136 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500137 versatile_pci_base = devm_ioremap_resource(dev, res);
Jisheng Zhang87358162015-04-03 21:17:05 +0800138 if (IS_ERR(versatile_pci_base))
139 return PTR_ERR(versatile_pci_base);
Rob Herringb7e78172015-01-28 10:16:18 -0600140
141 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500142 versatile_cfg_base[0] = devm_ioremap_resource(dev, res);
Jisheng Zhang87358162015-04-03 21:17:05 +0800143 if (IS_ERR(versatile_cfg_base[0]))
144 return PTR_ERR(versatile_cfg_base[0]);
Rob Herringb7e78172015-01-28 10:16:18 -0600145
146 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500147 versatile_cfg_base[1] = devm_pci_remap_cfg_resource(dev, res);
Jisheng Zhang87358162015-04-03 21:17:05 +0800148 if (IS_ERR(versatile_cfg_base[1]))
149 return PTR_ERR(versatile_cfg_base[1]);
Rob Herringb7e78172015-01-28 10:16:18 -0600150
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500151 ret = versatile_pci_parse_request_of_pci_ranges(dev, &pci_res);
Rob Herringb7e78172015-01-28 10:16:18 -0600152 if (ret)
153 return ret;
154
155 /*
156 * We need to discover the PCI core first to configure itself
157 * before the main PCI probing is performed
158 */
159 for (i = 0; i < 32; i++) {
160 if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
161 (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
162 myslot = i;
163 break;
164 }
165 }
166 if (myslot == -1) {
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500167 dev_err(dev, "Cannot find PCI core!\n");
Rob Herringb7e78172015-01-28 10:16:18 -0600168 return -EIO;
169 }
170 /*
171 * Do not to map Versatile FPGA PCI device into memory space
172 */
173 pci_slot_ignore |= (1 << myslot);
174
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500175 dev_info(dev, "PCI core found (slot %d)\n", myslot);
Rob Herringb7e78172015-01-28 10:16:18 -0600176
177 writel(myslot, PCI_SELFID);
178 local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
179
180 val = readl(local_pci_cfg_base + PCI_COMMAND);
181 val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
182 writel(val, local_pci_cfg_base + PCI_COMMAND);
183
184 /*
185 * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
186 */
187 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
188 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
189 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
190
191 /*
192 * For many years the kernel and QEMU were symbiotically buggy
193 * in that they both assumed the same broken IRQ mapping.
194 * QEMU therefore attempts to auto-detect old broken kernels
195 * so that they still work on newer QEMU as they did on old
196 * QEMU. Since we now use the correct (ie matching-hardware)
197 * IRQ mapping we write a definitely different value to a
198 * PCI_INTERRUPT_LINE register to tell QEMU that we expect
199 * real hardware behaviour and it need not be backwards
200 * compatible for us. This write is harmless on real hardware.
201 */
202 writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
203
204 pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
205 pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
206
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500207 list_splice_init(&pci_res, &bridge->windows);
Bjorn Helgaas7d630aa2017-06-27 17:40:00 -0500208 bridge->dev.parent = dev;
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500209 bridge->sysdata = NULL;
210 bridge->busnr = 0;
211 bridge->ops = &pci_versatile_ops;
Lorenzo Pieralisicf603742017-06-28 15:14:09 -0500212 bridge->map_irq = of_irq_parse_and_map_pci;
213 bridge->swizzle_irq = pci_common_swizzle;
Lorenzo Pieralisi4b380672017-06-28 15:13:58 -0500214
215 ret = pci_scan_root_bus_bridge(bridge);
216 if (ret < 0)
217 return ret;
218
219 bus = bridge->bus;
Rob Herringb7e78172015-01-28 10:16:18 -0600220
Rob Herringb7e78172015-01-28 10:16:18 -0600221 pci_assign_unassigned_bus_resources(bus);
Bjorn Helgaas70bc1b62017-02-08 15:42:26 -0600222 list_for_each_entry(child, &bus->children, node)
223 pcie_bus_configure_settings(child);
Yijing Wangb97ea282015-03-16 11:18:56 +0800224 pci_bus_add_devices(bus);
Rob Herringb7e78172015-01-28 10:16:18 -0600225
226 return 0;
227}
228
229static const struct of_device_id versatile_pci_of_match[] = {
230 { .compatible = "arm,versatile-pci", },
231 { },
232};
233MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
234
235static struct platform_driver versatile_pci_driver = {
236 .driver = {
237 .name = "versatile-pci",
238 .of_match_table = versatile_pci_of_match,
Brian Norrisa5f40e82017-04-20 15:36:25 -0500239 .suppress_bind_attrs = true,
Rob Herringb7e78172015-01-28 10:16:18 -0600240 },
241 .probe = versatile_pci_probe,
242};
243module_platform_driver(versatile_pci_driver);
244
245MODULE_DESCRIPTION("Versatile PCI driver");
246MODULE_LICENSE("GPL v2");