blob: 37bb2dcc113f179d990d7d9007d779d26e95540e [file] [log] [blame]
Arend van Spriel5b435de2011-10-05 13:19:03 +02001/*
2 * Copyright (c) 2010 Broadcom Corporation
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef _BRCM_PUB_H_
18#define _BRCM_PUB_H_
19
20#include <brcmu_wifi.h>
21#include "types.h"
22#include "defs.h"
23
24enum brcms_srom_id {
25 BRCMS_SROM_NULL,
26 BRCMS_SROM_CONT,
27 BRCMS_SROM_AA2G,
28 BRCMS_SROM_AA5G,
29 BRCMS_SROM_AG0,
30 BRCMS_SROM_AG1,
31 BRCMS_SROM_AG2,
32 BRCMS_SROM_AG3,
33 BRCMS_SROM_ANTSWCTL2G,
34 BRCMS_SROM_ANTSWCTL5G,
35 BRCMS_SROM_ANTSWITCH,
36 BRCMS_SROM_BOARDFLAGS2,
37 BRCMS_SROM_BOARDFLAGS,
38 BRCMS_SROM_BOARDNUM,
39 BRCMS_SROM_BOARDREV,
40 BRCMS_SROM_BOARDTYPE,
41 BRCMS_SROM_BW40PO,
42 BRCMS_SROM_BWDUPPO,
43 BRCMS_SROM_BXA2G,
44 BRCMS_SROM_BXA5G,
45 BRCMS_SROM_CC,
46 BRCMS_SROM_CCK2GPO,
47 BRCMS_SROM_CCKBW202GPO,
48 BRCMS_SROM_CCKBW20UL2GPO,
49 BRCMS_SROM_CCODE,
50 BRCMS_SROM_CDDPO,
51 BRCMS_SROM_DEVID,
52 BRCMS_SROM_ET1MACADDR,
53 BRCMS_SROM_EXTPAGAIN2G,
54 BRCMS_SROM_EXTPAGAIN5G,
55 BRCMS_SROM_FREQOFFSET_CORR,
56 BRCMS_SROM_HW_IQCAL_EN,
57 BRCMS_SROM_IL0MACADDR,
58 BRCMS_SROM_IQCAL_SWP_DIS,
59 BRCMS_SROM_LEDBH0,
60 BRCMS_SROM_LEDBH1,
61 BRCMS_SROM_LEDBH2,
62 BRCMS_SROM_LEDBH3,
63 BRCMS_SROM_LEDDC,
64 BRCMS_SROM_LEGOFDM40DUPPO,
65 BRCMS_SROM_LEGOFDMBW202GPO,
66 BRCMS_SROM_LEGOFDMBW205GHPO,
67 BRCMS_SROM_LEGOFDMBW205GLPO,
68 BRCMS_SROM_LEGOFDMBW205GMPO,
69 BRCMS_SROM_LEGOFDMBW20UL2GPO,
70 BRCMS_SROM_LEGOFDMBW20UL5GHPO,
71 BRCMS_SROM_LEGOFDMBW20UL5GLPO,
72 BRCMS_SROM_LEGOFDMBW20UL5GMPO,
73 BRCMS_SROM_MACADDR,
74 BRCMS_SROM_MCS2GPO0,
75 BRCMS_SROM_MCS2GPO1,
76 BRCMS_SROM_MCS2GPO2,
77 BRCMS_SROM_MCS2GPO3,
78 BRCMS_SROM_MCS2GPO4,
79 BRCMS_SROM_MCS2GPO5,
80 BRCMS_SROM_MCS2GPO6,
81 BRCMS_SROM_MCS2GPO7,
82 BRCMS_SROM_MCS32PO,
83 BRCMS_SROM_MCS5GHPO0,
84 BRCMS_SROM_MCS5GHPO1,
85 BRCMS_SROM_MCS5GHPO2,
86 BRCMS_SROM_MCS5GHPO3,
87 BRCMS_SROM_MCS5GHPO4,
88 BRCMS_SROM_MCS5GHPO5,
89 BRCMS_SROM_MCS5GHPO6,
90 BRCMS_SROM_MCS5GHPO7,
91 BRCMS_SROM_MCS5GLPO0,
92 BRCMS_SROM_MCS5GLPO1,
93 BRCMS_SROM_MCS5GLPO2,
94 BRCMS_SROM_MCS5GLPO3,
95 BRCMS_SROM_MCS5GLPO4,
96 BRCMS_SROM_MCS5GLPO5,
97 BRCMS_SROM_MCS5GLPO6,
98 BRCMS_SROM_MCS5GLPO7,
99 BRCMS_SROM_MCS5GPO0,
100 BRCMS_SROM_MCS5GPO1,
101 BRCMS_SROM_MCS5GPO2,
102 BRCMS_SROM_MCS5GPO3,
103 BRCMS_SROM_MCS5GPO4,
104 BRCMS_SROM_MCS5GPO5,
105 BRCMS_SROM_MCS5GPO6,
106 BRCMS_SROM_MCS5GPO7,
107 BRCMS_SROM_MCSBW202GPO,
108 BRCMS_SROM_MCSBW205GHPO,
109 BRCMS_SROM_MCSBW205GLPO,
110 BRCMS_SROM_MCSBW205GMPO,
111 BRCMS_SROM_MCSBW20UL2GPO,
112 BRCMS_SROM_MCSBW20UL5GHPO,
113 BRCMS_SROM_MCSBW20UL5GLPO,
114 BRCMS_SROM_MCSBW20UL5GMPO,
115 BRCMS_SROM_MCSBW402GPO,
116 BRCMS_SROM_MCSBW405GHPO,
117 BRCMS_SROM_MCSBW405GLPO,
118 BRCMS_SROM_MCSBW405GMPO,
119 BRCMS_SROM_MEASPOWER,
120 BRCMS_SROM_OFDM2GPO,
121 BRCMS_SROM_OFDM5GHPO,
122 BRCMS_SROM_OFDM5GLPO,
123 BRCMS_SROM_OFDM5GPO,
124 BRCMS_SROM_OPO,
125 BRCMS_SROM_PA0B0,
126 BRCMS_SROM_PA0B1,
127 BRCMS_SROM_PA0B2,
128 BRCMS_SROM_PA0ITSSIT,
129 BRCMS_SROM_PA0MAXPWR,
130 BRCMS_SROM_PA1B0,
131 BRCMS_SROM_PA1B1,
132 BRCMS_SROM_PA1B2,
133 BRCMS_SROM_PA1HIB0,
134 BRCMS_SROM_PA1HIB1,
135 BRCMS_SROM_PA1HIB2,
136 BRCMS_SROM_PA1HIMAXPWR,
137 BRCMS_SROM_PA1ITSSIT,
138 BRCMS_SROM_PA1LOB0,
139 BRCMS_SROM_PA1LOB1,
140 BRCMS_SROM_PA1LOB2,
141 BRCMS_SROM_PA1LOMAXPWR,
142 BRCMS_SROM_PA1MAXPWR,
143 BRCMS_SROM_PDETRANGE2G,
144 BRCMS_SROM_PDETRANGE5G,
145 BRCMS_SROM_PHYCAL_TEMPDELTA,
146 BRCMS_SROM_RAWTEMPSENSE,
147 BRCMS_SROM_REGREV,
148 BRCMS_SROM_REV,
149 BRCMS_SROM_RSSISAV2G,
150 BRCMS_SROM_RSSISAV5G,
151 BRCMS_SROM_RSSISMC2G,
152 BRCMS_SROM_RSSISMC5G,
153 BRCMS_SROM_RSSISMF2G,
154 BRCMS_SROM_RSSISMF5G,
155 BRCMS_SROM_RXCHAIN,
156 BRCMS_SROM_RXPO2G,
157 BRCMS_SROM_RXPO5G,
158 BRCMS_SROM_STBCPO,
159 BRCMS_SROM_TEMPCORRX,
160 BRCMS_SROM_TEMPOFFSET,
161 BRCMS_SROM_TEMPSENSE_OPTION,
162 BRCMS_SROM_TEMPSENSE_SLOPE,
163 BRCMS_SROM_TEMPTHRESH,
164 BRCMS_SROM_TRI2G,
165 BRCMS_SROM_TRI5GH,
166 BRCMS_SROM_TRI5GL,
167 BRCMS_SROM_TRI5G,
168 BRCMS_SROM_TRISO2G,
169 BRCMS_SROM_TRISO5G,
170 BRCMS_SROM_TSSIPOS2G,
171 BRCMS_SROM_TSSIPOS5G,
172 BRCMS_SROM_TXCHAIN,
173 BRCMS_SROM_TXPID2GA0,
174 BRCMS_SROM_TXPID2GA1,
175 BRCMS_SROM_TXPID2GA2,
176 BRCMS_SROM_TXPID2GA3,
177 BRCMS_SROM_TXPID5GA0,
178 BRCMS_SROM_TXPID5GA1,
179 BRCMS_SROM_TXPID5GA2,
180 BRCMS_SROM_TXPID5GA3,
181 BRCMS_SROM_TXPID5GHA0,
182 BRCMS_SROM_TXPID5GHA1,
183 BRCMS_SROM_TXPID5GHA2,
184 BRCMS_SROM_TXPID5GHA3,
185 BRCMS_SROM_TXPID5GLA0,
186 BRCMS_SROM_TXPID5GLA1,
187 BRCMS_SROM_TXPID5GLA2,
188 BRCMS_SROM_TXPID5GLA3,
189 /*
190 * per-path identifiers (see srom.c)
191 */
192 BRCMS_SROM_ITT2GA0,
193 BRCMS_SROM_ITT2GA1,
194 BRCMS_SROM_ITT2GA2,
195 BRCMS_SROM_ITT2GA3,
196 BRCMS_SROM_ITT5GA0,
197 BRCMS_SROM_ITT5GA1,
198 BRCMS_SROM_ITT5GA2,
199 BRCMS_SROM_ITT5GA3,
200 BRCMS_SROM_MAXP2GA0,
201 BRCMS_SROM_MAXP2GA1,
202 BRCMS_SROM_MAXP2GA2,
203 BRCMS_SROM_MAXP2GA3,
204 BRCMS_SROM_MAXP5GA0,
205 BRCMS_SROM_MAXP5GA1,
206 BRCMS_SROM_MAXP5GA2,
207 BRCMS_SROM_MAXP5GA3,
208 BRCMS_SROM_MAXP5GHA0,
209 BRCMS_SROM_MAXP5GHA1,
210 BRCMS_SROM_MAXP5GHA2,
211 BRCMS_SROM_MAXP5GHA3,
212 BRCMS_SROM_MAXP5GLA0,
213 BRCMS_SROM_MAXP5GLA1,
214 BRCMS_SROM_MAXP5GLA2,
215 BRCMS_SROM_MAXP5GLA3,
216 BRCMS_SROM_PA2GW0A0,
217 BRCMS_SROM_PA2GW0A1,
218 BRCMS_SROM_PA2GW0A2,
219 BRCMS_SROM_PA2GW0A3,
220 BRCMS_SROM_PA2GW1A0,
221 BRCMS_SROM_PA2GW1A1,
222 BRCMS_SROM_PA2GW1A2,
223 BRCMS_SROM_PA2GW1A3,
224 BRCMS_SROM_PA2GW2A0,
225 BRCMS_SROM_PA2GW2A1,
226 BRCMS_SROM_PA2GW2A2,
227 BRCMS_SROM_PA2GW2A3,
228 BRCMS_SROM_PA2GW3A0,
229 BRCMS_SROM_PA2GW3A1,
230 BRCMS_SROM_PA2GW3A2,
231 BRCMS_SROM_PA2GW3A3,
232 BRCMS_SROM_PA5GHW0A0,
233 BRCMS_SROM_PA5GHW0A1,
234 BRCMS_SROM_PA5GHW0A2,
235 BRCMS_SROM_PA5GHW0A3,
236 BRCMS_SROM_PA5GHW1A0,
237 BRCMS_SROM_PA5GHW1A1,
238 BRCMS_SROM_PA5GHW1A2,
239 BRCMS_SROM_PA5GHW1A3,
240 BRCMS_SROM_PA5GHW2A0,
241 BRCMS_SROM_PA5GHW2A1,
242 BRCMS_SROM_PA5GHW2A2,
243 BRCMS_SROM_PA5GHW2A3,
244 BRCMS_SROM_PA5GHW3A0,
245 BRCMS_SROM_PA5GHW3A1,
246 BRCMS_SROM_PA5GHW3A2,
247 BRCMS_SROM_PA5GHW3A3,
248 BRCMS_SROM_PA5GLW0A0,
249 BRCMS_SROM_PA5GLW0A1,
250 BRCMS_SROM_PA5GLW0A2,
251 BRCMS_SROM_PA5GLW0A3,
252 BRCMS_SROM_PA5GLW1A0,
253 BRCMS_SROM_PA5GLW1A1,
254 BRCMS_SROM_PA5GLW1A2,
255 BRCMS_SROM_PA5GLW1A3,
256 BRCMS_SROM_PA5GLW2A0,
257 BRCMS_SROM_PA5GLW2A1,
258 BRCMS_SROM_PA5GLW2A2,
259 BRCMS_SROM_PA5GLW2A3,
260 BRCMS_SROM_PA5GLW3A0,
261 BRCMS_SROM_PA5GLW3A1,
262 BRCMS_SROM_PA5GLW3A2,
263 BRCMS_SROM_PA5GLW3A3,
264 BRCMS_SROM_PA5GW0A0,
265 BRCMS_SROM_PA5GW0A1,
266 BRCMS_SROM_PA5GW0A2,
267 BRCMS_SROM_PA5GW0A3,
268 BRCMS_SROM_PA5GW1A0,
269 BRCMS_SROM_PA5GW1A1,
270 BRCMS_SROM_PA5GW1A2,
271 BRCMS_SROM_PA5GW1A3,
272 BRCMS_SROM_PA5GW2A0,
273 BRCMS_SROM_PA5GW2A1,
274 BRCMS_SROM_PA5GW2A2,
275 BRCMS_SROM_PA5GW2A3,
276 BRCMS_SROM_PA5GW3A0,
277 BRCMS_SROM_PA5GW3A1,
278 BRCMS_SROM_PA5GW3A2,
279 BRCMS_SROM_PA5GW3A3,
280};
281
282#define BRCMS_NUMRATES 16 /* max # of rates in a rateset */
283#define D11_PHY_HDR_LEN 6 /* Phy header length - 6 bytes */
284
285/* phy types */
286#define PHY_TYPE_A 0 /* Phy type A */
287#define PHY_TYPE_G 2 /* Phy type G */
288#define PHY_TYPE_N 4 /* Phy type N */
289#define PHY_TYPE_LP 5 /* Phy type Low Power A/B/G */
290#define PHY_TYPE_SSN 6 /* Phy type Single Stream N */
291#define PHY_TYPE_LCN 8 /* Phy type Single Stream N */
292#define PHY_TYPE_LCNXN 9 /* Phy type 2-stream N */
293#define PHY_TYPE_HT 7 /* Phy type 3-Stream N */
294
295/* bw */
296#define BRCMS_10_MHZ 10 /* 10Mhz nphy channel bandwidth */
297#define BRCMS_20_MHZ 20 /* 20Mhz nphy channel bandwidth */
298#define BRCMS_40_MHZ 40 /* 40Mhz nphy channel bandwidth */
299
300#define BRCMS_RSSI_MINVAL -200 /* Low value, e.g. for forcing roam */
301#define BRCMS_RSSI_NO_SIGNAL -91 /* NDIS RSSI link quality cutoffs */
302#define BRCMS_RSSI_VERY_LOW -80 /* Very low quality cutoffs */
303#define BRCMS_RSSI_LOW -70 /* Low quality cutoffs */
304#define BRCMS_RSSI_GOOD -68 /* Good quality cutoffs */
305#define BRCMS_RSSI_VERY_GOOD -58 /* Very good quality cutoffs */
306#define BRCMS_RSSI_EXCELLENT -57 /* Excellent quality cutoffs */
307
308/* a large TX Power as an init value to factor out of min() calculations,
309 * keep low enough to fit in an s8, units are .25 dBm
310 */
311#define BRCMS_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */
312
313/* rate related definitions */
314#define BRCMS_RATE_FLAG 0x80 /* Flag to indicate it is a basic rate */
315#define BRCMS_RATE_MASK 0x7f /* Rate value mask w/o basic rate flag */
316
317/* legacy rx Antenna diversity for SISO rates */
318#define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */
319#define ANT_RX_DIV_FORCE_1 1 /* Use antenna 1 */
320#define ANT_RX_DIV_START_1 2 /* Choose starting with 1 */
321#define ANT_RX_DIV_START_0 3 /* Choose starting with 0 */
322#define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */
323/* default antdiv setting */
324#define ANT_RX_DIV_DEF ANT_RX_DIV_START_0
325
326/* legacy rx Antenna diversity for SISO rates */
327/* Tx on antenna 0, "legacy term Main" */
328#define ANT_TX_FORCE_0 0
329/* Tx on antenna 1, "legacy term Aux" */
330#define ANT_TX_FORCE_1 1
331/* Tx on phy's last good Rx antenna */
332#define ANT_TX_LAST_RX 3
333/* driver's default tx antenna setting */
334#define ANT_TX_DEF 3
335
336/* Tx Chain values */
337/* def bitmap of txchain */
338#define TXCHAIN_DEF 0x1
339/* default bitmap of tx chains for nphy */
340#define TXCHAIN_DEF_NPHY 0x3
341/* default bitmap of tx chains for nphy */
342#define TXCHAIN_DEF_HTPHY 0x7
343/* def bitmap of rxchain */
344#define RXCHAIN_DEF 0x1
345/* default bitmap of rx chains for nphy */
346#define RXCHAIN_DEF_NPHY 0x3
347/* default bitmap of rx chains for nphy */
348#define RXCHAIN_DEF_HTPHY 0x7
349/* no antenna switch */
350#define ANTSWITCH_NONE 0
351/* antenna switch on 4321CB2, 2of3 */
352#define ANTSWITCH_TYPE_1 1
353/* antenna switch on 4321MPCI, 2of3 */
354#define ANTSWITCH_TYPE_2 2
355/* antenna switch on 4322, 2of3 */
356#define ANTSWITCH_TYPE_3 3
357
358#define RXBUFSZ PKTBUFSZ
359
360#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */
361
362struct brcm_rateset {
363 /* # rates in this set */
364 u32 count;
365 /* rates in 500kbps units w/hi bit set if basic */
366 u8 rates[WL_NUMRATES];
367};
368
369struct brcms_c_rateset {
370 uint count; /* number of rates in rates[] */
371 /* rates in 500kbps units w/hi bit set if basic */
372 u8 rates[BRCMS_NUMRATES];
373 u8 htphy_membership; /* HT PHY Membership */
374 u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */
375};
376
377/* All the HT-specific default advertised capabilities (including AMPDU)
378 * should be grouped here at one place
379 */
380#define AMPDU_DEF_MPDU_DENSITY 6 /* default mpdu density (110 ==> 4us) */
381
382/* wlc internal bss_info */
383struct brcms_bss_info {
384 u8 BSSID[ETH_ALEN]; /* network BSSID */
385 u16 flags; /* flags for internal attributes */
386 u8 SSID_len; /* the length of SSID */
387 u8 SSID[32]; /* SSID string */
388 s16 RSSI; /* receive signal strength (in dBm) */
389 s16 SNR; /* receive signal SNR in dB */
390 u16 beacon_period; /* units are Kusec */
391 u16 chanspec; /* Channel num, bw, ctrl_sb and band */
392 struct brcms_c_rateset rateset; /* supported rates */
393};
394
395#define MAC80211_PROMISC_BCNS (1 << 0)
396#define MAC80211_SCAN (1 << 1)
397
398/*
399 * Public portion of common driver state structure.
400 * The wlc handle points at this.
401 */
402struct brcms_pub {
403 struct brcms_c_info *wlc;
404 struct ieee80211_hw *ieee_hw;
405 struct scb_ampdu *global_ampdu;
406 uint mac80211_state;
407 uint unit; /* device instance number */
408 uint corerev; /* core revision */
409 struct si_pub *sih; /* SI handle (cookie for siutils calls) */
410 bool up; /* interface up and running */
411 bool hw_off; /* HW is off */
412 bool hw_up; /* one time hw up/down */
413 bool _piomode; /* true if pio mode */
414 uint _nbands; /* # bands supported */
415 uint now; /* # elapsed seconds */
416
417 bool promisc; /* promiscuous destination address */
418 bool delayed_down; /* down delayed */
419 bool associated; /* true:part of [I]BSS, false: not */
420 /* (union of stas_associated, aps_associated) */
421 bool _ampdu; /* ampdu enabled or not */
422 u8 _n_enab; /* bitmap of 11N + HT support */
423
424 u8 cur_etheraddr[ETH_ALEN]; /* our local ethernet address */
425
426 int bcmerror; /* last bcm error */
427
428 u32 radio_disabled; /* bit vector for radio disabled reasons */
429
430 u16 boardrev; /* version # of particular board */
431 u8 sromrev; /* version # of the srom */
432 char srom_ccode[BRCM_CNTRY_BUF_SZ]; /* Country Code in SROM */
433 u32 boardflags; /* Board specific flags from srom */
434 u32 boardflags2; /* More board flags if sromrev >= 4 */
435 bool phy_11ncapable; /* the PHY/HW is capable of 802.11N */
436
437 struct wl_cnt *_cnt; /* low-level counters in driver */
438};
439
440enum wlc_par_id {
441 IOV_MPC = 1,
442 IOV_RTSTHRESH,
443 IOV_QTXPOWER,
444 IOV_BCN_LI_BCN /* Beacon listen interval in # of beacons */
445};
446
447/***********************************************
448 * Feature-related macros to optimize out code *
449 * *********************************************
450 */
451
452#define ENAB_1x1 0x01
453#define ENAB_2x2 0x02
454#define ENAB_3x3 0x04
455#define ENAB_4x4 0x08
456#define SUPPORT_11N (ENAB_1x1|ENAB_2x2)
457#define SUPPORT_HT (ENAB_1x1|ENAB_2x2|ENAB_3x3)
458
459/* WL11N Support */
460#define AMPDU_AGG_HOST 1
461
462/* pri is priority encoded in the packet. This maps the Packet priority to
463 * enqueue precedence as defined in wlc_prec_map
464 */
465extern const u8 wlc_prio2prec_map[];
466#define BRCMS_PRIO_TO_PREC(pri) wlc_prio2prec_map[(pri) & 7]
467
468#define BRCMS_PREC_COUNT 16 /* Max precedence level implemented */
469
470/* Mask to describe all precedence levels */
471#define BRCMS_PREC_BMP_ALL MAXBITVAL(BRCMS_PREC_COUNT)
472
473/*
474 * This maps priority to one precedence higher - Used by PS-Poll response
475 * packets to simulate enqueue-at-head operation, but still maintain the
476 * order on the queue
477 */
478#define BRCMS_PRIO_TO_HI_PREC(pri) min(BRCMS_PRIO_TO_PREC(pri) + 1,\
479 BRCMS_PREC_COUNT - 1)
480
481/* Define a bitmap of precedences comprised by each AC */
482#define BRCMS_PREC_BMP_AC_BE (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_BE)) | \
483 NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_BE)) | \
484 NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_EE)) | \
485 NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_EE)))
486#define BRCMS_PREC_BMP_AC_BK (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_BK)) | \
487 NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_BK)) | \
488 NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_NONE)) | \
489 NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_NONE)))
490#define BRCMS_PREC_BMP_AC_VI (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_CL)) | \
491 NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_CL)) | \
492 NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_VI)) | \
493 NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_VI)))
494#define BRCMS_PREC_BMP_AC_VO (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_VO)) | \
495 NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_VO)) | \
496 NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_NC)) | \
497 NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_NC)))
498
499/* network protection config */
500#define BRCMS_PROT_G_SPEC 1 /* SPEC g protection */
501#define BRCMS_PROT_G_OVR 2 /* SPEC g prot override */
502#define BRCMS_PROT_G_USER 3 /* gmode specified by user */
503#define BRCMS_PROT_OVERLAP 4 /* overlap */
504#define BRCMS_PROT_N_USER 10 /* nmode specified by user */
505#define BRCMS_PROT_N_CFG 11 /* n protection */
506#define BRCMS_PROT_N_CFG_OVR 12 /* n protection override */
507#define BRCMS_PROT_N_NONGF 13 /* non-GF protection */
508#define BRCMS_PROT_N_NONGF_OVR 14 /* non-GF protection override */
509#define BRCMS_PROT_N_PAM_OVR 15 /* n preamble override */
510#define BRCMS_PROT_N_OBSS 16 /* non-HT OBSS present */
511
512/*
513 * 54g modes (basic bits may still be overridden)
514 *
515 * GMODE_LEGACY_B
516 * Rateset: 1b, 2b, 5.5, 11
517 * Preamble: Long
518 * Shortslot: Off
519 * GMODE_AUTO
520 * Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54
521 * Extended Rateset: 6, 9, 12, 48
522 * Preamble: Long
523 * Shortslot: Auto
524 * GMODE_ONLY
525 * Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54
526 * Extended Rateset: 6b, 9, 12b, 48
527 * Preamble: Short required
528 * Shortslot: Auto
529 * GMODE_B_DEFERRED
530 * Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54
531 * Extended Rateset: 6, 9, 12, 48
532 * Preamble: Long
533 * Shortslot: On
534 * GMODE_PERFORMANCE
535 * Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54
536 * Preamble: Short required
537 * Shortslot: On and required
538 * GMODE_LRS
539 * Rateset: 1b, 2b, 5.5b, 11b
540 * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54
541 * Preamble: Long
542 * Shortslot: Auto
543 */
544#define GMODE_LEGACY_B 0
545#define GMODE_AUTO 1
546#define GMODE_ONLY 2
547#define GMODE_B_DEFERRED 3
548#define GMODE_PERFORMANCE 4
549#define GMODE_LRS 5
550#define GMODE_MAX 6
551
552/* MCS values greater than this enable multiple streams */
553#define HIGHEST_SINGLE_STREAM_MCS 7
554
555#define MAXBANDS 2 /* Maximum #of bands */
556
557/* max number of antenna configurations */
558#define ANT_SELCFG_MAX 4
559
560struct brcms_antselcfg {
561 u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */
562 u8 num_antcfg; /* number of available antenna configurations */
563};
564
565/* common functions for every port */
Alwin Beukers94bdc2a2011-10-12 20:51:13 +0200566extern struct brcms_c_info *
Arend van Spriel5b435de2011-10-05 13:19:03 +0200567brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
568 bool piomode, void __iomem *regsva, struct pci_dev *btparam,
569 uint *perr);
570extern uint brcms_c_detach(struct brcms_c_info *wlc);
571extern int brcms_c_up(struct brcms_c_info *wlc);
572extern uint brcms_c_down(struct brcms_c_info *wlc);
573
574extern bool brcms_c_chipmatch(u16 vendor, u16 device);
575extern void brcms_c_init(struct brcms_c_info *wlc);
576extern void brcms_c_reset(struct brcms_c_info *wlc);
577
578extern void brcms_c_intrson(struct brcms_c_info *wlc);
579extern u32 brcms_c_intrsoff(struct brcms_c_info *wlc);
580extern void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask);
581extern bool brcms_c_intrsupd(struct brcms_c_info *wlc);
582extern bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc);
583extern bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded);
584extern void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc,
585 struct sk_buff *sdu,
586 struct ieee80211_hw *hw);
587extern bool brcms_c_aggregatable(struct brcms_c_info *wlc, u8 tid);
Arend van Spriel5b435de2011-10-05 13:19:03 +0200588extern void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx,
589 int val);
590extern int brcms_c_get_header_len(void);
Arend van Spriel5b435de2011-10-05 13:19:03 +0200591extern void brcms_c_set_addrmatch(struct brcms_c_info *wlc,
592 int match_reg_offset,
593 const u8 *addr);
594extern void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
595 const struct ieee80211_tx_queue_params *arg,
596 bool suspend);
597extern struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc);
Arend van Spriel5b435de2011-10-05 13:19:03 +0200598extern void brcms_c_ampdu_flush(struct brcms_c_info *wlc,
599 struct ieee80211_sta *sta, u16 tid);
600extern void brcms_c_ampdu_tx_operational(struct brcms_c_info *wlc, u8 tid,
601 u8 ba_wsize, uint max_rx_ampdu_bytes);
602extern char *getvar(struct si_pub *sih, enum brcms_srom_id id);
603extern int getintvar(struct si_pub *sih, enum brcms_srom_id id);
Arend van Spriel5b435de2011-10-05 13:19:03 +0200604extern int brcms_c_module_register(struct brcms_pub *pub,
605 const char *name, struct brcms_info *hdl,
606 int (*down_fn)(void *handle));
607extern int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
608 struct brcms_info *hdl);
609extern void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc);
610extern void brcms_c_enable_mac(struct brcms_c_info *wlc);
611extern void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state);
612extern void brcms_c_scan_start(struct brcms_c_info *wlc);
613extern void brcms_c_scan_stop(struct brcms_c_info *wlc);
614extern int brcms_c_get_curband(struct brcms_c_info *wlc);
615extern void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc,
616 bool drop);
Alwin Beukers94bdc2a2011-10-12 20:51:13 +0200617extern int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel);
618extern int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl);
619extern void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
Arend van Spriel5b435de2011-10-05 13:19:03 +0200620 struct brcm_rateset *currs);
Alwin Beukers94bdc2a2011-10-12 20:51:13 +0200621extern int brcms_c_set_rateset(struct brcms_c_info *wlc,
622 struct brcm_rateset *rs);
623extern int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period);
624extern u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx);
625extern void brcms_c_set_shortslot_override(struct brcms_c_info *wlc,
Arend van Spriel5b435de2011-10-05 13:19:03 +0200626 s8 sslot_override);
Alwin Beukers94bdc2a2011-10-12 20:51:13 +0200627extern void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc,
628 u8 interval);
629extern int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr);
630extern int brcms_c_get_tx_power(struct brcms_c_info *wlc);
631extern void brcms_c_set_radio_mpc(struct brcms_c_info *wlc, bool mpc);
Arend van Spriel5b435de2011-10-05 13:19:03 +0200632extern bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc);
Arend van Spriel5b435de2011-10-05 13:19:03 +0200633
634#endif /* _BRCM_PUB_H_ */