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Greg Rose92915f72010-01-09 02:24:10 +00001/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +00004 Copyright(c) 1999 - 2015 Intel Corporation.
Greg Rose92915f72010-01-09 02:24:10 +00005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +000016 this program; if not, see <http://www.gnu.org/licenses/>.
Greg Rose92915f72010-01-09 02:24:10 +000017
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
20
21 Contact Information:
22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25*******************************************************************************/
26
27#ifndef _IXGBEVF_H_
28#define _IXGBEVF_H_
29
30#include <linux/types.h>
Jiri Pirkodadcd652011-07-21 03:25:09 +000031#include <linux/bitops.h>
Greg Rose92915f72010-01-09 02:24:10 +000032#include <linux/timer.h>
33#include <linux/io.h>
34#include <linux/netdevice.h>
Jiri Pirkodadcd652011-07-21 03:25:09 +000035#include <linux/if_vlan.h>
Eric Dumazet4197aa72011-06-22 05:01:35 +000036#include <linux/u64_stats_sync.h>
Greg Rose92915f72010-01-09 02:24:10 +000037
38#include "vf.h"
39
Jacob Kellerc777cdf2013-09-21 06:24:20 +000040#ifdef CONFIG_NET_RX_BUSY_POLL
41#include <net/busy_poll.h>
Jacob Keller3b5dca22013-09-21 06:24:25 +000042#define BP_EXTENDED_STATS
Jacob Kellerc777cdf2013-09-21 06:24:20 +000043#endif
44
Emil Tantilove08400b2015-01-28 03:21:24 +000045#define IXGBE_MAX_TXD_PWR 14
46#define IXGBE_MAX_DATA_PER_TXD BIT(IXGBE_MAX_TXD_PWR)
47
48/* Tx Descriptors needed, worst case */
49#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
50#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
51
Greg Rose92915f72010-01-09 02:24:10 +000052/* wrapper around a pointer to a socket buffer,
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +000053 * so a DMA handle can be stored along with the buffer
54 */
Greg Rose92915f72010-01-09 02:24:10 +000055struct ixgbevf_tx_buffer {
Alexander Duycke757e3e2013-01-31 07:43:22 +000056 union ixgbe_adv_tx_desc *next_to_watch;
Emil Tantilov7ad1a092014-01-17 18:30:03 -080057 unsigned long time_stamp;
58 struct sk_buff *skb;
59 unsigned int bytecount;
60 unsigned short gso_segs;
61 __be16 protocol;
Emil Tantilov9bdfefd2014-01-17 18:30:04 -080062 DEFINE_DMA_UNMAP_ADDR(dma);
63 DEFINE_DMA_UNMAP_LEN(len);
Emil Tantilov7ad1a092014-01-17 18:30:03 -080064 u32 tx_flags;
Greg Rose92915f72010-01-09 02:24:10 +000065};
66
67struct ixgbevf_rx_buffer {
Greg Rose92915f72010-01-09 02:24:10 +000068 dma_addr_t dma;
Emil Tantilovbad17232014-11-21 02:57:15 +000069 struct page *page;
70 unsigned int page_offset;
Greg Rose92915f72010-01-09 02:24:10 +000071};
72
Emil Tantilov095e2612014-01-17 18:30:00 -080073struct ixgbevf_stats {
74 u64 packets;
75 u64 bytes;
76#ifdef BP_EXTENDED_STATS
77 u64 yields;
78 u64 misses;
79 u64 cleaned;
80#endif
81};
82
83struct ixgbevf_tx_queue_stats {
84 u64 restart_queue;
85 u64 tx_busy;
86 u64 tx_done_old;
87};
88
89struct ixgbevf_rx_queue_stats {
Emil Tantilov095e2612014-01-17 18:30:00 -080090 u64 alloc_rx_page_failed;
91 u64 alloc_rx_buff_failed;
92 u64 csum_err;
93};
94
Emil Tantilove08400b2015-01-28 03:21:24 +000095enum ixgbevf_ring_state_t {
96 __IXGBEVF_TX_DETECT_HANG,
97 __IXGBEVF_HANG_CHECK_ARMED,
98};
99
100#define check_for_tx_hang(ring) \
101 test_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
102#define set_check_for_tx_hang(ring) \
103 set_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
104#define clear_check_for_tx_hang(ring) \
105 clear_bit(__IXGBEVF_TX_DETECT_HANG, &(ring)->state)
106
Greg Rose92915f72010-01-09 02:24:10 +0000107struct ixgbevf_ring {
Alexander Duyck6b43c442012-05-11 08:32:45 +0000108 struct ixgbevf_ring *next;
Alexander Duyckfb401952012-05-11 08:33:16 +0000109 struct net_device *netdev;
110 struct device *dev;
Greg Rose92915f72010-01-09 02:24:10 +0000111 void *desc; /* descriptor ring memory */
112 dma_addr_t dma; /* phys. address of descriptor ring */
113 unsigned int size; /* length in bytes */
Emil Tantilovbad17232014-11-21 02:57:15 +0000114 u16 count; /* amount of descriptors */
115 u16 next_to_use;
116 u16 next_to_clean;
117 u16 next_to_alloc;
Greg Rose92915f72010-01-09 02:24:10 +0000118
Greg Rose92915f72010-01-09 02:24:10 +0000119 union {
120 struct ixgbevf_tx_buffer *tx_buffer_info;
121 struct ixgbevf_rx_buffer *rx_buffer_info;
122 };
Emil Tantilove08400b2015-01-28 03:21:24 +0000123 unsigned long state;
Emil Tantilov095e2612014-01-17 18:30:00 -0800124 struct ixgbevf_stats stats;
125 struct u64_stats_sync syncp;
126 union {
127 struct ixgbevf_tx_queue_stats tx_stats;
128 struct ixgbevf_rx_queue_stats rx_stats;
129 };
130
Greg Rose55fb2772012-11-06 05:53:32 +0000131 u64 hw_csum_rx_error;
Don Skidmore5cdab2f2013-10-30 07:45:39 +0000132 u8 __iomem *tail;
Emil Tantilovbad17232014-11-21 02:57:15 +0000133 struct sk_buff *skb;
Greg Rose92915f72010-01-09 02:24:10 +0000134
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000135 /* holds the special value that gets the hardware register offset
136 * associated with this ring, which is different for DCB and RSS modes
137 */
138 u16 reg_idx;
Emil Tantilov095e2612014-01-17 18:30:00 -0800139 int queue_index; /* needed for multiqueue queue management */
Greg Rose92915f72010-01-09 02:24:10 +0000140};
141
Greg Rose92915f72010-01-09 02:24:10 +0000142/* How many Rx Buffers do we bundle into one write to the hardware ? */
143#define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
144
Alexander Duyck56e94092012-07-20 08:10:03 +0000145#define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES
146#define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000147#define IXGBEVF_MAX_RSS_QUEUES 2
Vlad Zolotarov94cf66f2015-03-30 21:35:26 +0300148#define IXGBEVF_82599_RETA_SIZE 128
Greg Rose92915f72010-01-09 02:24:10 +0000149
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000150#define IXGBEVF_DEFAULT_TXD 1024
151#define IXGBEVF_DEFAULT_RXD 512
152#define IXGBEVF_MAX_TXD 4096
153#define IXGBEVF_MIN_TXD 64
154#define IXGBEVF_MAX_RXD 4096
155#define IXGBEVF_MIN_RXD 64
Greg Rose92915f72010-01-09 02:24:10 +0000156
157/* Supported Rx Buffer Sizes */
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000158#define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */
159#define IXGBEVF_RXBUFFER_2048 2048
Greg Rose92915f72010-01-09 02:24:10 +0000160
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000161#define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
162#define IXGBEVF_RX_BUFSZ IXGBEVF_RXBUFFER_2048
Greg Rose92915f72010-01-09 02:24:10 +0000163
164#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
165
166#define IXGBE_TX_FLAGS_CSUM (u32)(1)
167#define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
168#define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
169#define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
Greg Rose92915f72010-01-09 02:24:10 +0000170#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
171#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
172#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
173
Alexander Duyck6b43c442012-05-11 08:32:45 +0000174struct ixgbevf_ring_container {
175 struct ixgbevf_ring *ring; /* pointer to linked list of rings */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000176 unsigned int total_bytes; /* total bytes processed this int */
177 unsigned int total_packets; /* total packets processed this int */
Alexander Duyck6b43c442012-05-11 08:32:45 +0000178 u8 count; /* total number of rings in vector */
179 u8 itr; /* current ITR setting for ring */
180};
181
182/* iterator for handling rings in ring container */
183#define ixgbevf_for_each_ring(pos, head) \
184 for (pos = (head).ring; pos != NULL; pos = pos->next)
185
Greg Rose92915f72010-01-09 02:24:10 +0000186/* MAX_MSIX_Q_VECTORS of these are allocated,
187 * but we only use one per queue-specific vector.
188 */
189struct ixgbevf_q_vector {
190 struct ixgbevf_adapter *adapter;
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000191 /* index of q_vector within array, also used for finding the bit in
192 * EICR and friends that represents the vector for this ring
193 */
194 u16 v_idx;
195 u16 itr; /* Interrupt throttle rate written to EITR */
Greg Rose92915f72010-01-09 02:24:10 +0000196 struct napi_struct napi;
Alexander Duyck6b43c442012-05-11 08:32:45 +0000197 struct ixgbevf_ring_container rx, tx;
Alexander Duyckfa71ae22012-05-11 08:32:50 +0000198 char name[IFNAMSIZ + 9];
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000199#ifdef CONFIG_NET_RX_BUSY_POLL
200 unsigned int state;
201#define IXGBEVF_QV_STATE_IDLE 0
202#define IXGBEVF_QV_STATE_NAPI 1 /* NAPI owns this QV */
203#define IXGBEVF_QV_STATE_POLL 2 /* poll owns this QV */
204#define IXGBEVF_QV_STATE_DISABLED 4 /* QV is disabled */
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000205#define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL)
206#define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED)
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000207#define IXGBEVF_QV_STATE_NAPI_YIELD 8 /* NAPI yielded this QV */
208#define IXGBEVF_QV_STATE_POLL_YIELD 16 /* poll yielded this QV */
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000209#define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | \
210 IXGBEVF_QV_STATE_POLL_YIELD)
211#define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | \
212 IXGBEVF_QV_STATE_POLL_YIELD)
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000213 spinlock_t lock;
214#endif /* CONFIG_NET_RX_BUSY_POLL */
Greg Rose92915f72010-01-09 02:24:10 +0000215};
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000216
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000217#ifdef CONFIG_NET_RX_BUSY_POLL
218static inline void ixgbevf_qv_init_lock(struct ixgbevf_q_vector *q_vector)
219{
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000220 spin_lock_init(&q_vector->lock);
221 q_vector->state = IXGBEVF_QV_STATE_IDLE;
222}
223
224/* called from the device poll routine to get ownership of a q_vector */
225static inline bool ixgbevf_qv_lock_napi(struct ixgbevf_q_vector *q_vector)
226{
227 int rc = true;
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000228
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000229 spin_lock_bh(&q_vector->lock);
230 if (q_vector->state & IXGBEVF_QV_LOCKED) {
231 WARN_ON(q_vector->state & IXGBEVF_QV_STATE_NAPI);
232 q_vector->state |= IXGBEVF_QV_STATE_NAPI_YIELD;
233 rc = false;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000234#ifdef BP_EXTENDED_STATS
Emil Tantilov095e2612014-01-17 18:30:00 -0800235 q_vector->tx.ring->stats.yields++;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000236#endif
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000237 } else {
238 /* we don't care if someone yielded */
239 q_vector->state = IXGBEVF_QV_STATE_NAPI;
240 }
241 spin_unlock_bh(&q_vector->lock);
242 return rc;
243}
244
245/* returns true is someone tried to get the qv while napi had it */
246static inline bool ixgbevf_qv_unlock_napi(struct ixgbevf_q_vector *q_vector)
247{
248 int rc = false;
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000249
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000250 spin_lock_bh(&q_vector->lock);
251 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_POLL |
252 IXGBEVF_QV_STATE_NAPI_YIELD));
253
254 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD)
255 rc = true;
256 /* reset state to idle, unless QV is disabled */
257 q_vector->state &= IXGBEVF_QV_STATE_DISABLED;
258 spin_unlock_bh(&q_vector->lock);
259 return rc;
260}
261
262/* called from ixgbevf_low_latency_poll() */
263static inline bool ixgbevf_qv_lock_poll(struct ixgbevf_q_vector *q_vector)
264{
265 int rc = true;
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000266
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000267 spin_lock_bh(&q_vector->lock);
268 if ((q_vector->state & IXGBEVF_QV_LOCKED)) {
269 q_vector->state |= IXGBEVF_QV_STATE_POLL_YIELD;
270 rc = false;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000271#ifdef BP_EXTENDED_STATS
Emil Tantilov095e2612014-01-17 18:30:00 -0800272 q_vector->rx.ring->stats.yields++;
Jacob Keller3b5dca22013-09-21 06:24:25 +0000273#endif
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000274 } else {
275 /* preserve yield marks */
276 q_vector->state |= IXGBEVF_QV_STATE_POLL;
277 }
278 spin_unlock_bh(&q_vector->lock);
279 return rc;
280}
281
282/* returns true if someone tried to get the qv while it was locked */
283static inline bool ixgbevf_qv_unlock_poll(struct ixgbevf_q_vector *q_vector)
284{
285 int rc = false;
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000286
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000287 spin_lock_bh(&q_vector->lock);
288 WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_NAPI));
289
290 if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD)
291 rc = true;
292 /* reset state to idle, unless QV is disabled */
293 q_vector->state &= IXGBEVF_QV_STATE_DISABLED;
294 spin_unlock_bh(&q_vector->lock);
295 return rc;
296}
297
298/* true if a socket is polling, even if it did not get the lock */
299static inline bool ixgbevf_qv_busy_polling(struct ixgbevf_q_vector *q_vector)
300{
301 WARN_ON(!(q_vector->state & IXGBEVF_QV_OWNED));
302 return q_vector->state & IXGBEVF_QV_USER_PEND;
303}
304
305/* false if QV is currently owned */
306static inline bool ixgbevf_qv_disable(struct ixgbevf_q_vector *q_vector)
307{
308 int rc = true;
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000309
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000310 spin_lock_bh(&q_vector->lock);
311 if (q_vector->state & IXGBEVF_QV_OWNED)
312 rc = false;
Jacob Kellere689e722014-01-16 02:30:06 -0800313 q_vector->state |= IXGBEVF_QV_STATE_DISABLED;
Jacob Kellerc777cdf2013-09-21 06:24:20 +0000314 spin_unlock_bh(&q_vector->lock);
315 return rc;
316}
317
318#endif /* CONFIG_NET_RX_BUSY_POLL */
Greg Rose92915f72010-01-09 02:24:10 +0000319
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000320/* microsecond values for various ITR rates shifted by 2 to fit itr register
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000321 * with the first 3 bits reserved 0
322 */
323#define IXGBE_MIN_RSC_ITR 24
324#define IXGBE_100K_ITR 40
325#define IXGBE_20K_ITR 200
326#define IXGBE_10K_ITR 400
327#define IXGBE_8K_ITR 500
328
Greg Rose92915f72010-01-09 02:24:10 +0000329/* Helper macros to switch between ints/sec and what the register uses.
330 * And yes, it's the same math going both ways. The lowest value
331 * supported by all of the ixgbe hardware is 8.
332 */
333#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
334 ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
335#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
336
Emil Tantilovec62fe22014-11-08 01:39:20 +0000337/* ixgbevf_test_staterr - tests bits in Rx descriptor status and error fields */
338static inline __le32 ixgbevf_test_staterr(union ixgbe_adv_rx_desc *rx_desc,
339 const u32 stat_err_bits)
340{
341 return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits);
342}
343
Don Skidmoref880d072013-10-23 02:17:52 +0000344static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring)
345{
346 u16 ntc = ring->next_to_clean;
347 u16 ntu = ring->next_to_use;
348
349 return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
350}
Greg Rose92915f72010-01-09 02:24:10 +0000351
Mark Rustad06380db2014-03-04 03:02:23 +0000352static inline void ixgbevf_write_tail(struct ixgbevf_ring *ring, u32 value)
353{
354 writel(value, ring->tail);
355}
356
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000357#define IXGBEVF_RX_DESC(R, i) \
Alexander Duyck908421f2012-05-11 08:33:00 +0000358 (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000359#define IXGBEVF_TX_DESC(R, i) \
Alexander Duyck908421f2012-05-11 08:33:00 +0000360 (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000361#define IXGBEVF_TX_CTXTDESC(R, i) \
Alexander Duyck908421f2012-05-11 08:33:00 +0000362 (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
Greg Rose92915f72010-01-09 02:24:10 +0000363
Alexander Duyckc88887e2012-08-22 02:04:37 +0000364#define IXGBE_MAX_JUMBO_FRAME_SIZE 9728 /* Maximum Supported Size 9.5KB */
Greg Rose92915f72010-01-09 02:24:10 +0000365
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000366#define OTHER_VECTOR 1
367#define NON_Q_VECTORS (OTHER_VECTOR)
Greg Rose92915f72010-01-09 02:24:10 +0000368
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000369#define MAX_MSIX_Q_VECTORS 2
Greg Rose92915f72010-01-09 02:24:10 +0000370
Jeff Kirsherdec0d8e2015-02-10 11:42:33 +0000371#define MIN_MSIX_Q_VECTORS 1
372#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
Greg Rose92915f72010-01-09 02:24:10 +0000373
374/* board specific private data structure */
375struct ixgbevf_adapter {
Emil Tantilovdff80522014-11-08 01:39:25 +0000376 /* this field must be first, see ixgbevf_process_skb_fields */
Jiri Pirkodadcd652011-07-21 03:25:09 +0000377 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
Emil Tantilovdff80522014-11-08 01:39:25 +0000378
Greg Rose92915f72010-01-09 02:24:10 +0000379 struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
Greg Rose92915f72010-01-09 02:24:10 +0000380
381 /* Interrupt Throttle Rate */
Alexander Duyck5f3600e2012-05-11 08:32:55 +0000382 u16 rx_itr_setting;
383 u16 tx_itr_setting;
384
385 /* interrupt masks */
386 u32 eims_enable_mask;
387 u32 eims_other;
Greg Rose92915f72010-01-09 02:24:10 +0000388
389 /* TX */
Greg Rose92915f72010-01-09 02:24:10 +0000390 int num_tx_queues;
Emil Tantilov97031922014-01-17 18:30:01 -0800391 struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */
Greg Rose92915f72010-01-09 02:24:10 +0000392 u64 restart_queue;
Greg Rose92915f72010-01-09 02:24:10 +0000393 u32 tx_timeout_count;
Greg Rose92915f72010-01-09 02:24:10 +0000394
395 /* RX */
Greg Rose92915f72010-01-09 02:24:10 +0000396 int num_rx_queues;
Emil Tantilov97031922014-01-17 18:30:01 -0800397 struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */
Greg Rose92915f72010-01-09 02:24:10 +0000398 u64 hw_csum_rx_error;
399 u64 hw_rx_no_dma_resources;
Greg Rose92915f72010-01-09 02:24:10 +0000400 int num_msix_vectors;
Greg Rose92915f72010-01-09 02:24:10 +0000401 u32 alloc_rx_page_failed;
402 u32 alloc_rx_buff_failed;
403
404 /* Some features need tri-state capability,
405 * thus the additional *_CAPABLE flags.
406 */
407 u32 flags;
Emil Tantilov9ac5c5c2015-01-28 03:21:34 +0000408#define IXGBEVF_FLAG_RESET_REQUESTED (u32)(1)
Don Skidmore220fe052013-09-21 01:40:49 +0000409#define IXGBEVF_FLAG_QUEUE_RESET_REQUESTED (u32)(1 << 2)
Alexander Duyck77d5dfc2012-05-11 08:32:19 +0000410
Emil Tantilov97031922014-01-17 18:30:01 -0800411 struct msix_entry *msix_entries;
412
Greg Rose92915f72010-01-09 02:24:10 +0000413 /* OS defined structs */
414 struct net_device *netdev;
415 struct pci_dev *pdev;
Greg Rose92915f72010-01-09 02:24:10 +0000416
417 /* structs defined in ixgbe_vf.h */
418 struct ixgbe_hw hw;
419 u16 msg_enable;
Greg Rose92915f72010-01-09 02:24:10 +0000420 /* Interrupt Throttle Rate */
421 u32 eitr_param;
422
Emil Tantilov97031922014-01-17 18:30:01 -0800423 struct ixgbevf_hw_stats stats;
424
Greg Rose92915f72010-01-09 02:24:10 +0000425 unsigned long state;
Greg Rose92915f72010-01-09 02:24:10 +0000426 u64 tx_busy;
427 unsigned int tx_ring_count;
428 unsigned int rx_ring_count;
429
Jacob Keller3b5dca22013-09-21 06:24:25 +0000430#ifdef BP_EXTENDED_STATS
431 u64 bp_rx_yields;
432 u64 bp_rx_cleaned;
433 u64 bp_rx_missed;
434
435 u64 bp_tx_yields;
436 u64 bp_tx_cleaned;
437 u64 bp_tx_missed;
438#endif
439
Mark Rustaddbf8b0d2014-03-04 03:02:34 +0000440 u8 __iomem *io_addr; /* Mainly for iounmap use */
Greg Rose92915f72010-01-09 02:24:10 +0000441 u32 link_speed;
442 bool link_up;
Greg Rose92915f72010-01-09 02:24:10 +0000443
Emil Tantilov9ac5c5c2015-01-28 03:21:34 +0000444 struct timer_list service_timer;
445 struct work_struct service_task;
446
Alexander Duyck1c55ed72012-05-11 08:33:06 +0000447 spinlock_t mbx_lock;
Emil Tantilove66c92a2015-01-28 03:21:29 +0000448 unsigned long last_reset;
Greg Rose92915f72010-01-09 02:24:10 +0000449};
450
451enum ixbgevf_state_t {
452 __IXGBEVF_TESTING,
453 __IXGBEVF_RESETTING,
Mark Rustad2e7cfbd2014-03-04 03:02:13 +0000454 __IXGBEVF_DOWN,
Mark Rustadbc0c7152014-03-12 00:38:45 +0000455 __IXGBEVF_DISABLED,
Mark Rustad2e7cfbd2014-03-04 03:02:13 +0000456 __IXGBEVF_REMOVING,
Emil Tantilov9ac5c5c2015-01-28 03:21:34 +0000457 __IXGBEVF_SERVICE_SCHED,
458 __IXGBEVF_SERVICE_INITED,
Greg Rose92915f72010-01-09 02:24:10 +0000459};
460
461enum ixgbevf_boards {
462 board_82599_vf,
Greg Rose2316aa22010-12-02 07:12:26 +0000463 board_X540_vf,
Emil Tantilov47068b02014-11-22 07:59:56 +0000464 board_X550_vf,
465 board_X550EM_x_vf,
Greg Rose92915f72010-01-09 02:24:10 +0000466};
467
Stephen Hemminger3d8fe982012-01-18 22:13:34 +0000468extern const struct ixgbevf_info ixgbevf_82599_vf_info;
469extern const struct ixgbevf_info ixgbevf_X540_vf_info;
Emil Tantilov47068b02014-11-22 07:59:56 +0000470extern const struct ixgbevf_info ixgbevf_X550_vf_info;
471extern const struct ixgbevf_info ixgbevf_X550EM_x_vf_info;
Stephen Hemmingerb5417bf2012-01-18 22:13:33 +0000472extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
Greg Rose92915f72010-01-09 02:24:10 +0000473
474/* needed by ethtool.c */
Stephen Hemminger3d8fe982012-01-18 22:13:34 +0000475extern const char ixgbevf_driver_name[];
Greg Rose92915f72010-01-09 02:24:10 +0000476extern const char ixgbevf_driver_version[];
477
Joe Perches5ccc9212013-09-23 11:37:59 -0700478void ixgbevf_up(struct ixgbevf_adapter *adapter);
479void ixgbevf_down(struct ixgbevf_adapter *adapter);
480void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
481void ixgbevf_reset(struct ixgbevf_adapter *adapter);
482void ixgbevf_set_ethtool_ops(struct net_device *netdev);
Emil Tantilov05d063a2014-01-17 18:29:59 -0800483int ixgbevf_setup_rx_resources(struct ixgbevf_ring *);
484int ixgbevf_setup_tx_resources(struct ixgbevf_ring *);
485void ixgbevf_free_rx_resources(struct ixgbevf_ring *);
486void ixgbevf_free_tx_resources(struct ixgbevf_ring *);
Joe Perches5ccc9212013-09-23 11:37:59 -0700487void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
488int ethtool_ioctl(struct ifreq *ifr);
Greg Rose92915f72010-01-09 02:24:10 +0000489
Jacob Keller38496232013-10-22 06:19:18 +0000490extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector);
491
Joe Perches5ccc9212013-09-23 11:37:59 -0700492void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
493void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
Greg Rose92915f72010-01-09 02:24:10 +0000494
495#ifdef DEBUG
Joe Perches5ccc9212013-09-23 11:37:59 -0700496char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
Greg Rose92915f72010-01-09 02:24:10 +0000497#define hw_dbg(hw, format, arg...) \
498 printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
499#else
500#define hw_dbg(hw, format, arg...) do {} while (0)
501#endif
502
503#endif /* _IXGBEVF_H_ */