| Kishon Vijay Abraham I | 950bf63 | 2017-01-06 18:22:48 +0530 | [diff] [blame^] | 1 | menu "DesignWare PCI Core Support" |
| 2 | depends on PCI |
| 3 | |
| 4 | config PCIE_DW |
| 5 | bool |
| 6 | depends on PCI_MSI_IRQ_DOMAIN |
| 7 | |
| 8 | config PCI_DRA7XX |
| 9 | bool "TI DRA7xx PCIe controller" |
| 10 | depends on OF && HAS_IOMEM && TI_PIPE3 |
| 11 | depends on PCI_MSI_IRQ_DOMAIN |
| 12 | select PCIE_DW |
| 13 | help |
| 14 | Enables support for the PCIe controller in the DRA7xx SoC. There |
| 15 | are two instances of PCIe controller in DRA7xx. This controller can |
| 16 | act both as EP and RC. This reuses the Designware core. |
| 17 | |
| 18 | config PCIE_DW_PLAT |
| 19 | bool "Platform bus based DesignWare PCIe Controller" |
| 20 | depends on PCI_MSI_IRQ_DOMAIN |
| 21 | select PCIE_DW |
| 22 | ---help--- |
| 23 | This selects the DesignWare PCIe controller support. Select this if |
| 24 | you have a PCIe controller on Platform bus. |
| 25 | |
| 26 | If you have a controller with this interface, say Y or M here. |
| 27 | |
| 28 | If unsure, say N. |
| 29 | |
| 30 | config PCI_EXYNOS |
| 31 | bool "Samsung Exynos PCIe controller" |
| 32 | depends on SOC_EXYNOS5440 |
| 33 | depends on PCI_MSI_IRQ_DOMAIN |
| 34 | select PCIEPORTBUS |
| 35 | select PCIE_DW |
| 36 | |
| 37 | config PCI_IMX6 |
| 38 | bool "Freescale i.MX6 PCIe controller" |
| 39 | depends on SOC_IMX6Q |
| 40 | depends on PCI_MSI_IRQ_DOMAIN |
| 41 | select PCIEPORTBUS |
| 42 | select PCIE_DW |
| 43 | |
| 44 | config PCIE_SPEAR13XX |
| 45 | bool "STMicroelectronics SPEAr PCIe controller" |
| 46 | depends on ARCH_SPEAR13XX |
| 47 | depends on PCI_MSI_IRQ_DOMAIN |
| 48 | select PCIEPORTBUS |
| 49 | select PCIE_DW |
| 50 | help |
| 51 | Say Y here if you want PCIe support on SPEAr13XX SoCs. |
| 52 | |
| 53 | config PCI_KEYSTONE |
| 54 | bool "TI Keystone PCIe controller" |
| 55 | depends on ARCH_KEYSTONE |
| 56 | depends on PCI_MSI_IRQ_DOMAIN |
| 57 | select PCIEPORTBUS |
| 58 | select PCIE_DW |
| 59 | help |
| 60 | Say Y here if you want to enable PCI controller support on Keystone |
| 61 | SoCs. The PCI controller on Keystone is based on Designware hardware |
| 62 | and therefore the driver re-uses the Designware core functions to |
| 63 | implement the driver. |
| 64 | |
| 65 | config PCI_LAYERSCAPE |
| 66 | bool "Freescale Layerscape PCIe controller" |
| 67 | depends on OF && (ARM || ARCH_LAYERSCAPE) |
| 68 | depends on PCI_MSI_IRQ_DOMAIN |
| 69 | select MFD_SYSCON |
| 70 | select PCIE_DW |
| 71 | help |
| 72 | Say Y here if you want PCIe controller support on Layerscape SoCs. |
| 73 | |
| 74 | config PCI_HISI |
| 75 | depends on OF && ARM64 |
| 76 | bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers" |
| 77 | depends on PCI_MSI_IRQ_DOMAIN |
| 78 | select PCIEPORTBUS |
| 79 | select PCIE_DW |
| 80 | help |
| 81 | Say Y here if you want PCIe controller support on HiSilicon |
| 82 | Hip05 and Hip06 SoCs |
| 83 | |
| 84 | config PCIE_QCOM |
| 85 | bool "Qualcomm PCIe controller" |
| 86 | depends on ARCH_QCOM && OF |
| 87 | depends on PCI_MSI_IRQ_DOMAIN |
| 88 | select PCIEPORTBUS |
| 89 | select PCIE_DW |
| 90 | help |
| 91 | Say Y here to enable PCIe controller support on Qualcomm SoCs. The |
| 92 | PCIe controller uses the Designware core plus Qualcomm-specific |
| 93 | hardware wrappers. |
| 94 | |
| 95 | config PCIE_ARMADA_8K |
| 96 | bool "Marvell Armada-8K PCIe controller" |
| 97 | depends on ARCH_MVEBU |
| 98 | depends on PCI_MSI_IRQ_DOMAIN |
| 99 | select PCIEPORTBUS |
| 100 | select PCIE_DW |
| 101 | help |
| 102 | Say Y here if you want to enable PCIe controller support on |
| 103 | Armada-8K SoCs. The PCIe controller on Armada-8K is based on |
| 104 | Designware hardware and therefore the driver re-uses the |
| 105 | Designware core functions to implement the driver. |
| 106 | |
| 107 | config PCIE_ARTPEC6 |
| 108 | bool "Axis ARTPEC-6 PCIe controller" |
| 109 | depends on MACH_ARTPEC6 |
| 110 | depends on PCI_MSI_IRQ_DOMAIN |
| 111 | select PCIEPORTBUS |
| 112 | select PCIE_DW |
| 113 | help |
| 114 | Say Y here to enable PCIe controller support on Axis ARTPEC-6 |
| 115 | SoCs. This PCIe controller uses the DesignWare core. |
| 116 | |
| 117 | endmenu |