blob: 7b1ce97d76fd06f1acfb14f973cb34695cd948f7 [file] [log] [blame]
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
Ido Schimmel7f71eb42015-12-15 16:03:37 +010051#include <linux/list.h>
Jiri Pirko56ade8f2015-10-16 14:01:37 +020052#include <net/switchdev.h>
53#include <generated/utsrelease.h>
54
55#include "spectrum.h"
56#include "core.h"
57#include "reg.h"
58#include "port.h"
59#include "trap.h"
60#include "txheader.h"
61
62static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
63static const char mlxsw_sp_driver_version[] = "1.0";
64
65/* tx_hdr_version
66 * Tx header version.
67 * Must be set to 1.
68 */
69MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
70
71/* tx_hdr_ctl
72 * Packet control type.
73 * 0 - Ethernet control (e.g. EMADs, LACP)
74 * 1 - Ethernet data
75 */
76MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
77
78/* tx_hdr_proto
79 * Packet protocol type. Must be set to 1 (Ethernet).
80 */
81MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
82
83/* tx_hdr_rx_is_router
84 * Packet is sent from the router. Valid for data packets only.
85 */
86MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
87
88/* tx_hdr_fid_valid
89 * Indicates if the 'fid' field is valid and should be used for
90 * forwarding lookup. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
93
94/* tx_hdr_swid
95 * Switch partition ID. Must be set to 0.
96 */
97MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
98
99/* tx_hdr_control_tclass
100 * Indicates if the packet should use the control TClass and not one
101 * of the data TClasses.
102 */
103MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
104
105/* tx_hdr_etclass
106 * Egress TClass to be used on the egress device on the egress port.
107 */
108MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
109
110/* tx_hdr_port_mid
111 * Destination local port for unicast packets.
112 * Destination multicast ID for multicast packets.
113 *
114 * Control packets are directed to a specific egress port, while data
115 * packets are transmitted through the CPU port (0) into the switch partition,
116 * where forwarding rules are applied.
117 */
118MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
119
120/* tx_hdr_fid
121 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
122 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
123 * Valid for data packets only.
124 */
125MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
126
127/* tx_hdr_type
128 * 0 - Data packets
129 * 6 - Control packets
130 */
131MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
132
133static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
134 const struct mlxsw_tx_info *tx_info)
135{
136 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
137
138 memset(txhdr, 0, MLXSW_TXHDR_LEN);
139
140 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
141 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
142 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
143 mlxsw_tx_hdr_swid_set(txhdr, 0);
144 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
145 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
146 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
147}
148
149static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
150{
151 char spad_pl[MLXSW_REG_SPAD_LEN];
152 int err;
153
154 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
155 if (err)
156 return err;
157 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
158 return 0;
159}
160
161static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
162 bool is_up)
163{
164 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
165 char paos_pl[MLXSW_REG_PAOS_LEN];
166
167 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
168 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
169 MLXSW_PORT_ADMIN_STATUS_DOWN);
170 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
171}
172
173static int mlxsw_sp_port_oper_status_get(struct mlxsw_sp_port *mlxsw_sp_port,
174 bool *p_is_up)
175{
176 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
177 char paos_pl[MLXSW_REG_PAOS_LEN];
178 u8 oper_status;
179 int err;
180
181 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, 0);
182 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
183 if (err)
184 return err;
185 oper_status = mlxsw_reg_paos_oper_status_get(paos_pl);
186 *p_is_up = oper_status == MLXSW_PORT_ADMIN_STATUS_UP ? true : false;
187 return 0;
188}
189
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200190static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
191 unsigned char *addr)
192{
193 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
194 char ppad_pl[MLXSW_REG_PPAD_LEN];
195
196 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
197 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
198 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
199}
200
201static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
202{
203 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
204 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
205
206 ether_addr_copy(addr, mlxsw_sp->base_mac);
207 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
208 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
209}
210
211static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
212 u16 vid, enum mlxsw_reg_spms_state state)
213{
214 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
215 char *spms_pl;
216 int err;
217
218 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
219 if (!spms_pl)
220 return -ENOMEM;
221 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
222 mlxsw_reg_spms_vid_pack(spms_pl, vid, state);
223 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
224 kfree(spms_pl);
225 return err;
226}
227
228static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
229{
230 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
231 char pmtu_pl[MLXSW_REG_PMTU_LEN];
232 int max_mtu;
233 int err;
234
235 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
236 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
237 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
238 if (err)
239 return err;
240 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
241
242 if (mtu > max_mtu)
243 return -EINVAL;
244
245 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
246 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
247}
248
249static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
250{
251 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
252 char pspa_pl[MLXSW_REG_PSPA_LEN];
253
254 mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port);
255 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
256}
257
258static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
259 bool enable)
260{
261 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
262 char svpe_pl[MLXSW_REG_SVPE_LEN];
263
264 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
265 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
266}
267
268int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
269 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
270 u16 vid)
271{
272 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
273 char svfa_pl[MLXSW_REG_SVFA_LEN];
274
275 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
276 fid, vid);
277 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
278}
279
280static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
281 u16 vid, bool learn_enable)
282{
283 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
284 char *spvmlr_pl;
285 int err;
286
287 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
288 if (!spvmlr_pl)
289 return -ENOMEM;
290 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid, vid,
291 learn_enable);
292 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
293 kfree(spvmlr_pl);
294 return err;
295}
296
297static int
298mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
299{
300 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
301 char sspr_pl[MLXSW_REG_SSPR_LEN];
302
303 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
304 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
305}
306
307static int mlxsw_sp_port_module_check(struct mlxsw_sp_port *mlxsw_sp_port,
308 bool *p_usable)
309{
310 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
311 char pmlp_pl[MLXSW_REG_PMLP_LEN];
312 int err;
313
314 mlxsw_reg_pmlp_pack(pmlp_pl, mlxsw_sp_port->local_port);
315 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
316 if (err)
317 return err;
318 *p_usable = mlxsw_reg_pmlp_width_get(pmlp_pl) ? true : false;
319 return 0;
320}
321
322static int mlxsw_sp_port_open(struct net_device *dev)
323{
324 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
325 int err;
326
327 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
328 if (err)
329 return err;
330 netif_start_queue(dev);
331 return 0;
332}
333
334static int mlxsw_sp_port_stop(struct net_device *dev)
335{
336 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
337
338 netif_stop_queue(dev);
339 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
340}
341
342static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
343 struct net_device *dev)
344{
345 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
346 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
347 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
348 const struct mlxsw_tx_info tx_info = {
349 .local_port = mlxsw_sp_port->local_port,
350 .is_emad = false,
351 };
352 u64 len;
353 int err;
354
355 if (mlxsw_core_skb_transmit_busy(mlxsw_sp, &tx_info))
356 return NETDEV_TX_BUSY;
357
358 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
359 struct sk_buff *skb_orig = skb;
360
361 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
362 if (!skb) {
363 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
364 dev_kfree_skb_any(skb_orig);
365 return NETDEV_TX_OK;
366 }
367 }
368
369 if (eth_skb_pad(skb)) {
370 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
371 return NETDEV_TX_OK;
372 }
373
374 mlxsw_sp_txhdr_construct(skb, &tx_info);
375 len = skb->len;
376 /* Due to a race we might fail here because of a full queue. In that
377 * unlikely case we simply drop the packet.
378 */
379 err = mlxsw_core_skb_transmit(mlxsw_sp, skb, &tx_info);
380
381 if (!err) {
382 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
383 u64_stats_update_begin(&pcpu_stats->syncp);
384 pcpu_stats->tx_packets++;
385 pcpu_stats->tx_bytes += len;
386 u64_stats_update_end(&pcpu_stats->syncp);
387 } else {
388 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
389 dev_kfree_skb_any(skb);
390 }
391 return NETDEV_TX_OK;
392}
393
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100394static void mlxsw_sp_set_rx_mode(struct net_device *dev)
395{
396}
397
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200398static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
399{
400 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
401 struct sockaddr *addr = p;
402 int err;
403
404 if (!is_valid_ether_addr(addr->sa_data))
405 return -EADDRNOTAVAIL;
406
407 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
408 if (err)
409 return err;
410 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
411 return 0;
412}
413
414static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
415{
416 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
417 int err;
418
419 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
420 if (err)
421 return err;
422 dev->mtu = mtu;
423 return 0;
424}
425
426static struct rtnl_link_stats64 *
427mlxsw_sp_port_get_stats64(struct net_device *dev,
428 struct rtnl_link_stats64 *stats)
429{
430 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
431 struct mlxsw_sp_port_pcpu_stats *p;
432 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
433 u32 tx_dropped = 0;
434 unsigned int start;
435 int i;
436
437 for_each_possible_cpu(i) {
438 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
439 do {
440 start = u64_stats_fetch_begin_irq(&p->syncp);
441 rx_packets = p->rx_packets;
442 rx_bytes = p->rx_bytes;
443 tx_packets = p->tx_packets;
444 tx_bytes = p->tx_bytes;
445 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
446
447 stats->rx_packets += rx_packets;
448 stats->rx_bytes += rx_bytes;
449 stats->tx_packets += tx_packets;
450 stats->tx_bytes += tx_bytes;
451 /* tx_dropped is u32, updated without syncp protection. */
452 tx_dropped += p->tx_dropped;
453 }
454 stats->tx_dropped = tx_dropped;
455 return stats;
456}
457
458int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
459 u16 vid_end, bool is_member, bool untagged)
460{
461 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
462 char *spvm_pl;
463 int err;
464
465 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
466 if (!spvm_pl)
467 return -ENOMEM;
468
469 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
470 vid_end, is_member, untagged);
471 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
472 kfree(spvm_pl);
473 return err;
474}
475
476static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
477{
478 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
479 u16 vid, last_visited_vid;
480 int err;
481
482 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
483 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
484 vid);
485 if (err) {
486 last_visited_vid = vid;
487 goto err_port_vid_to_fid_set;
488 }
489 }
490
491 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
492 if (err) {
493 last_visited_vid = VLAN_N_VID;
494 goto err_port_vid_to_fid_set;
495 }
496
497 return 0;
498
499err_port_vid_to_fid_set:
500 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
501 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
502 vid);
503 return err;
504}
505
506static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
507{
508 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
509 u16 vid;
510 int err;
511
512 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
513 if (err)
514 return err;
515
516 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
517 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
518 vid, vid);
519 if (err)
520 return err;
521 }
522
523 return 0;
524}
525
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100526static struct mlxsw_sp_vfid *
527mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp, u16 vid)
528{
529 struct mlxsw_sp_vfid *vfid;
530
531 list_for_each_entry(vfid, &mlxsw_sp->port_vfids.list, list) {
532 if (vfid->vid == vid)
533 return vfid;
534 }
535
536 return NULL;
537}
538
539static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
540{
541 return find_first_zero_bit(mlxsw_sp->port_vfids.mapped,
542 MLXSW_SP_VFID_PORT_MAX);
543}
544
545static int __mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp, u16 vfid)
546{
547 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
548 char sfmr_pl[MLXSW_REG_SFMR_LEN];
549
550 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID, fid, 0);
551 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
552}
553
554static void __mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp, u16 vfid)
555{
556 u16 fid = mlxsw_sp_vfid_to_fid(vfid);
557 char sfmr_pl[MLXSW_REG_SFMR_LEN];
558
559 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID, fid, 0);
560 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
561}
562
563static struct mlxsw_sp_vfid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
564 u16 vid)
565{
566 struct device *dev = mlxsw_sp->bus_info->dev;
567 struct mlxsw_sp_vfid *vfid;
568 u16 n_vfid;
569 int err;
570
571 n_vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
572 if (n_vfid == MLXSW_SP_VFID_PORT_MAX) {
573 dev_err(dev, "No available vFIDs\n");
574 return ERR_PTR(-ERANGE);
575 }
576
577 err = __mlxsw_sp_vfid_create(mlxsw_sp, n_vfid);
578 if (err) {
579 dev_err(dev, "Failed to create vFID=%d\n", n_vfid);
580 return ERR_PTR(err);
581 }
582
583 vfid = kzalloc(sizeof(*vfid), GFP_KERNEL);
584 if (!vfid)
585 goto err_allocate_vfid;
586
587 vfid->vfid = n_vfid;
588 vfid->vid = vid;
589
590 list_add(&vfid->list, &mlxsw_sp->port_vfids.list);
591 set_bit(n_vfid, mlxsw_sp->port_vfids.mapped);
592
593 return vfid;
594
595err_allocate_vfid:
596 __mlxsw_sp_vfid_destroy(mlxsw_sp, n_vfid);
597 return ERR_PTR(-ENOMEM);
598}
599
600static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
601 struct mlxsw_sp_vfid *vfid)
602{
603 clear_bit(vfid->vfid, mlxsw_sp->port_vfids.mapped);
604 list_del(&vfid->list);
605
606 __mlxsw_sp_vfid_destroy(mlxsw_sp, vfid->vfid);
607
608 kfree(vfid);
609}
610
611static struct mlxsw_sp_port *
612mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port,
613 struct mlxsw_sp_vfid *vfid)
614{
615 struct mlxsw_sp_port *mlxsw_sp_vport;
616
617 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
618 if (!mlxsw_sp_vport)
619 return NULL;
620
621 /* dev will be set correctly after the VLAN device is linked
622 * with the real device. In case of bridge SELF invocation, dev
623 * will remain as is.
624 */
625 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
626 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
627 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
628 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
629 mlxsw_sp_vport->vport.vfid = vfid;
630 mlxsw_sp_vport->vport.vid = vfid->vid;
631
632 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
633
634 return mlxsw_sp_vport;
635}
636
637static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
638{
639 list_del(&mlxsw_sp_vport->vport.list);
640 kfree(mlxsw_sp_vport);
641}
642
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200643int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
644 u16 vid)
645{
646 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
647 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100648 struct mlxsw_sp_port *mlxsw_sp_vport;
649 struct mlxsw_sp_vfid *vfid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200650 int err;
651
652 /* VLAN 0 is added to HW filter when device goes up, but it is
653 * reserved in our case, so simply return.
654 */
655 if (!vid)
656 return 0;
657
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100658 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200659 netdev_warn(dev, "VID=%d already configured\n", vid);
660 return 0;
661 }
662
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100663 vfid = mlxsw_sp_vfid_find(mlxsw_sp, vid);
664 if (!vfid) {
665 vfid = mlxsw_sp_vfid_create(mlxsw_sp, vid);
666 if (IS_ERR(vfid)) {
667 netdev_err(dev, "Failed to create vFID for VID=%d\n",
668 vid);
669 return PTR_ERR(vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200670 }
671 }
672
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100673 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vfid);
674 if (!mlxsw_sp_vport) {
675 netdev_err(dev, "Failed to create vPort for VID=%d\n", vid);
676 err = -ENOMEM;
677 goto err_port_vport_create;
678 }
679
680 if (!vfid->nr_vports) {
681 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid,
Ido Schimmel19ae6122015-12-15 16:03:39 +0100682 true, false);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100683 if (err) {
684 netdev_err(dev, "Failed to setup flooding for vFID=%d\n",
685 vfid->vfid);
686 goto err_vport_flood_set;
687 }
688 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200689
690 /* When adding the first VLAN interface on a bridged port we need to
691 * transition all the active 802.1Q bridge VLANs to use explicit
692 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
693 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100694 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200695 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
696 if (err) {
697 netdev_err(dev, "Failed to set to Virtual mode\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100698 goto err_port_vp_mode_trans;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200699 }
700 }
701
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100702 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200703 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100704 true,
705 mlxsw_sp_vfid_to_fid(vfid->vfid),
706 vid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200707 if (err) {
708 netdev_err(dev, "Failed to map {Port, VID=%d} to vFID=%d\n",
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100709 vid, vfid->vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200710 goto err_port_vid_to_fid_set;
711 }
712
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100713 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200714 if (err) {
715 netdev_err(dev, "Failed to disable learning for VID=%d\n", vid);
716 goto err_port_vid_learning_set;
717 }
718
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100719 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200720 if (err) {
721 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
722 vid);
723 goto err_port_add_vid;
724 }
725
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100726 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200727 MLXSW_REG_SPMS_STATE_FORWARDING);
728 if (err) {
729 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
730 goto err_port_stp_state_set;
731 }
732
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100733 vfid->nr_vports++;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200734
735 return 0;
736
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200737err_port_stp_state_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100738 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200739err_port_add_vid:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100740 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200741err_port_vid_learning_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100742 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200743 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID, false,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100744 mlxsw_sp_vfid_to_fid(vfid->vfid), vid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200745err_port_vid_to_fid_set:
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100746 if (list_is_singular(&mlxsw_sp_port->vports_list))
747 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
748err_port_vp_mode_trans:
749 if (!vfid->nr_vports)
Ido Schimmel19ae6122015-12-15 16:03:39 +0100750 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, vfid->vfid, false,
751 false);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100752err_vport_flood_set:
753 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
754err_port_vport_create:
755 if (!vfid->nr_vports)
756 mlxsw_sp_vfid_destroy(mlxsw_sp, vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200757 return err;
758}
759
760int mlxsw_sp_port_kill_vid(struct net_device *dev,
761 __be16 __always_unused proto, u16 vid)
762{
763 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100764 struct mlxsw_sp_port *mlxsw_sp_vport;
765 struct mlxsw_sp_vfid *vfid;
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200766 int err;
767
768 /* VLAN 0 is removed from HW filter when device goes down, but
769 * it is reserved in our case, so simply return.
770 */
771 if (!vid)
772 return 0;
773
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100774 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
775 if (!mlxsw_sp_vport) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200776 netdev_warn(dev, "VID=%d does not exist\n", vid);
777 return 0;
778 }
779
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100780 vfid = mlxsw_sp_vport->vport.vfid;
781
782 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_vport, vid,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200783 MLXSW_REG_SPMS_STATE_DISCARDING);
784 if (err) {
785 netdev_err(dev, "Failed to set STP state for VID=%d\n", vid);
786 return err;
787 }
788
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100789 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200790 if (err) {
791 netdev_err(dev, "Failed to set VLAN membership for VID=%d\n",
792 vid);
793 return err;
794 }
795
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100796 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200797 if (err) {
798 netdev_err(dev, "Failed to enable learning for VID=%d\n", vid);
799 return err;
800 }
801
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100802 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200803 MLXSW_REG_SVFA_MT_PORT_VID_TO_FID,
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100804 false,
805 mlxsw_sp_vfid_to_fid(vfid->vfid),
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200806 vid);
807 if (err) {
808 netdev_err(dev, "Failed to invalidate {Port, VID=%d} to vFID=%d mapping\n",
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100809 vid, vfid->vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200810 return err;
811 }
812
813 /* When removing the last VLAN interface on a bridged port we need to
814 * transition all active 802.1Q bridge VLANs to use VID to FID
815 * mappings and set port's mode to VLAN mode.
816 */
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100817 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200818 err = mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
819 if (err) {
820 netdev_err(dev, "Failed to set to VLAN mode\n");
821 return err;
822 }
823 }
824
Ido Schimmel7f71eb42015-12-15 16:03:37 +0100825 vfid->nr_vports--;
826 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
827
828 /* Destroy the vFID if no vPorts are assigned to it anymore. */
829 if (!vfid->nr_vports)
830 mlxsw_sp_vfid_destroy(mlxsw_sp_port->mlxsw_sp, vfid);
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200831
832 return 0;
833}
834
835static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
836 .ndo_open = mlxsw_sp_port_open,
837 .ndo_stop = mlxsw_sp_port_stop,
838 .ndo_start_xmit = mlxsw_sp_port_xmit,
Jiri Pirkoc5b9b512015-12-03 12:12:22 +0100839 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200840 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
841 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
842 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
843 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
844 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
845 .ndo_fdb_add = switchdev_port_fdb_add,
846 .ndo_fdb_del = switchdev_port_fdb_del,
847 .ndo_fdb_dump = switchdev_port_fdb_dump,
848 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
849 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
850 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
851};
852
853static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
854 struct ethtool_drvinfo *drvinfo)
855{
856 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
857 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
858
859 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
860 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
861 sizeof(drvinfo->version));
862 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
863 "%d.%d.%d",
864 mlxsw_sp->bus_info->fw_rev.major,
865 mlxsw_sp->bus_info->fw_rev.minor,
866 mlxsw_sp->bus_info->fw_rev.subminor);
867 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
868 sizeof(drvinfo->bus_info));
869}
870
871struct mlxsw_sp_port_hw_stats {
872 char str[ETH_GSTRING_LEN];
873 u64 (*getter)(char *payload);
874};
875
876static const struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
877 {
878 .str = "a_frames_transmitted_ok",
879 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
880 },
881 {
882 .str = "a_frames_received_ok",
883 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
884 },
885 {
886 .str = "a_frame_check_sequence_errors",
887 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
888 },
889 {
890 .str = "a_alignment_errors",
891 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
892 },
893 {
894 .str = "a_octets_transmitted_ok",
895 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
896 },
897 {
898 .str = "a_octets_received_ok",
899 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
900 },
901 {
902 .str = "a_multicast_frames_xmitted_ok",
903 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
904 },
905 {
906 .str = "a_broadcast_frames_xmitted_ok",
907 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
908 },
909 {
910 .str = "a_multicast_frames_received_ok",
911 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
912 },
913 {
914 .str = "a_broadcast_frames_received_ok",
915 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
916 },
917 {
918 .str = "a_in_range_length_errors",
919 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
920 },
921 {
922 .str = "a_out_of_range_length_field",
923 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
924 },
925 {
926 .str = "a_frame_too_long_errors",
927 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
928 },
929 {
930 .str = "a_symbol_error_during_carrier",
931 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
932 },
933 {
934 .str = "a_mac_control_frames_transmitted",
935 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
936 },
937 {
938 .str = "a_mac_control_frames_received",
939 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
940 },
941 {
942 .str = "a_unsupported_opcodes_received",
943 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
944 },
945 {
946 .str = "a_pause_mac_ctrl_frames_received",
947 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
948 },
949 {
950 .str = "a_pause_mac_ctrl_frames_xmitted",
951 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
952 },
953};
954
955#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
956
957static void mlxsw_sp_port_get_strings(struct net_device *dev,
958 u32 stringset, u8 *data)
959{
960 u8 *p = data;
961 int i;
962
963 switch (stringset) {
964 case ETH_SS_STATS:
965 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
966 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
967 ETH_GSTRING_LEN);
968 p += ETH_GSTRING_LEN;
969 }
970 break;
971 }
972}
973
Ido Schimmel3a66ee32015-11-27 13:45:55 +0100974static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
975 enum ethtool_phys_id_state state)
976{
977 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
978 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
979 char mlcr_pl[MLXSW_REG_MLCR_LEN];
980 bool active;
981
982 switch (state) {
983 case ETHTOOL_ID_ACTIVE:
984 active = true;
985 break;
986 case ETHTOOL_ID_INACTIVE:
987 active = false;
988 break;
989 default:
990 return -EOPNOTSUPP;
991 }
992
993 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
994 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
995}
996
Jiri Pirko56ade8f2015-10-16 14:01:37 +0200997static void mlxsw_sp_port_get_stats(struct net_device *dev,
998 struct ethtool_stats *stats, u64 *data)
999{
1000 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1001 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1002 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
1003 int i;
1004 int err;
1005
1006 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port);
1007 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
1008 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++)
1009 data[i] = !err ? mlxsw_sp_port_hw_stats[i].getter(ppcnt_pl) : 0;
1010}
1011
1012static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1013{
1014 switch (sset) {
1015 case ETH_SS_STATS:
1016 return MLXSW_SP_PORT_HW_STATS_LEN;
1017 default:
1018 return -EOPNOTSUPP;
1019 }
1020}
1021
1022struct mlxsw_sp_port_link_mode {
1023 u32 mask;
1024 u32 supported;
1025 u32 advertised;
1026 u32 speed;
1027};
1028
1029static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1030 {
1031 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1032 .supported = SUPPORTED_100baseT_Full,
1033 .advertised = ADVERTISED_100baseT_Full,
1034 .speed = 100,
1035 },
1036 {
1037 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1038 .speed = 100,
1039 },
1040 {
1041 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1042 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1043 .supported = SUPPORTED_1000baseKX_Full,
1044 .advertised = ADVERTISED_1000baseKX_Full,
1045 .speed = 1000,
1046 },
1047 {
1048 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1049 .supported = SUPPORTED_10000baseT_Full,
1050 .advertised = ADVERTISED_10000baseT_Full,
1051 .speed = 10000,
1052 },
1053 {
1054 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1055 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1056 .supported = SUPPORTED_10000baseKX4_Full,
1057 .advertised = ADVERTISED_10000baseKX4_Full,
1058 .speed = 10000,
1059 },
1060 {
1061 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1062 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1063 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1064 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1065 .supported = SUPPORTED_10000baseKR_Full,
1066 .advertised = ADVERTISED_10000baseKR_Full,
1067 .speed = 10000,
1068 },
1069 {
1070 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1071 .supported = SUPPORTED_20000baseKR2_Full,
1072 .advertised = ADVERTISED_20000baseKR2_Full,
1073 .speed = 20000,
1074 },
1075 {
1076 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1077 .supported = SUPPORTED_40000baseCR4_Full,
1078 .advertised = ADVERTISED_40000baseCR4_Full,
1079 .speed = 40000,
1080 },
1081 {
1082 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1083 .supported = SUPPORTED_40000baseKR4_Full,
1084 .advertised = ADVERTISED_40000baseKR4_Full,
1085 .speed = 40000,
1086 },
1087 {
1088 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1089 .supported = SUPPORTED_40000baseSR4_Full,
1090 .advertised = ADVERTISED_40000baseSR4_Full,
1091 .speed = 40000,
1092 },
1093 {
1094 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1095 .supported = SUPPORTED_40000baseLR4_Full,
1096 .advertised = ADVERTISED_40000baseLR4_Full,
1097 .speed = 40000,
1098 },
1099 {
1100 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1101 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1102 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1103 .speed = 25000,
1104 },
1105 {
1106 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1107 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1108 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1109 .speed = 50000,
1110 },
1111 {
1112 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1113 .supported = SUPPORTED_56000baseKR4_Full,
1114 .advertised = ADVERTISED_56000baseKR4_Full,
1115 .speed = 56000,
1116 },
1117 {
1118 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1119 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1120 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1121 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1122 .speed = 100000,
1123 },
1124};
1125
1126#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1127
1128static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1129{
1130 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1131 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1132 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1133 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1134 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1135 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1136 return SUPPORTED_FIBRE;
1137
1138 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1139 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1140 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1141 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1142 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1143 return SUPPORTED_Backplane;
1144 return 0;
1145}
1146
1147static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1148{
1149 u32 modes = 0;
1150 int i;
1151
1152 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1153 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1154 modes |= mlxsw_sp_port_link_mode[i].supported;
1155 }
1156 return modes;
1157}
1158
1159static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1160{
1161 u32 modes = 0;
1162 int i;
1163
1164 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1165 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1166 modes |= mlxsw_sp_port_link_mode[i].advertised;
1167 }
1168 return modes;
1169}
1170
1171static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1172 struct ethtool_cmd *cmd)
1173{
1174 u32 speed = SPEED_UNKNOWN;
1175 u8 duplex = DUPLEX_UNKNOWN;
1176 int i;
1177
1178 if (!carrier_ok)
1179 goto out;
1180
1181 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1182 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1183 speed = mlxsw_sp_port_link_mode[i].speed;
1184 duplex = DUPLEX_FULL;
1185 break;
1186 }
1187 }
1188out:
1189 ethtool_cmd_speed_set(cmd, speed);
1190 cmd->duplex = duplex;
1191}
1192
1193static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1194{
1195 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1196 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1197 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1198 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1199 return PORT_FIBRE;
1200
1201 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1202 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1203 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1204 return PORT_DA;
1205
1206 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1207 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1208 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1209 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1210 return PORT_NONE;
1211
1212 return PORT_OTHER;
1213}
1214
1215static int mlxsw_sp_port_get_settings(struct net_device *dev,
1216 struct ethtool_cmd *cmd)
1217{
1218 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1219 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1220 char ptys_pl[MLXSW_REG_PTYS_LEN];
1221 u32 eth_proto_cap;
1222 u32 eth_proto_admin;
1223 u32 eth_proto_oper;
1224 int err;
1225
1226 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1227 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1228 if (err) {
1229 netdev_err(dev, "Failed to get proto");
1230 return err;
1231 }
1232 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1233 &eth_proto_admin, &eth_proto_oper);
1234
1235 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1236 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
1237 SUPPORTED_Pause | SUPPORTED_Asym_Pause;
1238 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1239 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1240 eth_proto_oper, cmd);
1241
1242 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1243 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1244 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1245
1246 cmd->transceiver = XCVR_INTERNAL;
1247 return 0;
1248}
1249
1250static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1251{
1252 u32 ptys_proto = 0;
1253 int i;
1254
1255 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1256 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1257 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1258 }
1259 return ptys_proto;
1260}
1261
1262static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1263{
1264 u32 ptys_proto = 0;
1265 int i;
1266
1267 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1268 if (speed == mlxsw_sp_port_link_mode[i].speed)
1269 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1270 }
1271 return ptys_proto;
1272}
1273
1274static int mlxsw_sp_port_set_settings(struct net_device *dev,
1275 struct ethtool_cmd *cmd)
1276{
1277 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1278 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1279 char ptys_pl[MLXSW_REG_PTYS_LEN];
1280 u32 speed;
1281 u32 eth_proto_new;
1282 u32 eth_proto_cap;
1283 u32 eth_proto_admin;
1284 bool is_up;
1285 int err;
1286
1287 speed = ethtool_cmd_speed(cmd);
1288
1289 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1290 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1291 mlxsw_sp_to_ptys_speed(speed);
1292
1293 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1294 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1295 if (err) {
1296 netdev_err(dev, "Failed to get proto");
1297 return err;
1298 }
1299 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1300
1301 eth_proto_new = eth_proto_new & eth_proto_cap;
1302 if (!eth_proto_new) {
1303 netdev_err(dev, "Not supported proto admin requested");
1304 return -EINVAL;
1305 }
1306 if (eth_proto_new == eth_proto_admin)
1307 return 0;
1308
1309 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1310 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1311 if (err) {
1312 netdev_err(dev, "Failed to set proto admin");
1313 return err;
1314 }
1315
1316 err = mlxsw_sp_port_oper_status_get(mlxsw_sp_port, &is_up);
1317 if (err) {
1318 netdev_err(dev, "Failed to get oper status");
1319 return err;
1320 }
1321 if (!is_up)
1322 return 0;
1323
1324 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1325 if (err) {
1326 netdev_err(dev, "Failed to set admin status");
1327 return err;
1328 }
1329
1330 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1331 if (err) {
1332 netdev_err(dev, "Failed to set admin status");
1333 return err;
1334 }
1335
1336 return 0;
1337}
1338
1339static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1340 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1341 .get_link = ethtool_op_get_link,
1342 .get_strings = mlxsw_sp_port_get_strings,
Ido Schimmel3a66ee32015-11-27 13:45:55 +01001343 .set_phys_id = mlxsw_sp_port_set_phys_id,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001344 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1345 .get_sset_count = mlxsw_sp_port_get_sset_count,
1346 .get_settings = mlxsw_sp_port_get_settings,
1347 .set_settings = mlxsw_sp_port_set_settings,
1348};
1349
1350static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1351{
1352 struct mlxsw_sp_port *mlxsw_sp_port;
1353 struct net_device *dev;
1354 bool usable;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001355 size_t bytes;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001356 int err;
1357
1358 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
1359 if (!dev)
1360 return -ENOMEM;
1361 mlxsw_sp_port = netdev_priv(dev);
1362 mlxsw_sp_port->dev = dev;
1363 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
1364 mlxsw_sp_port->local_port = local_port;
1365 mlxsw_sp_port->learning = 1;
1366 mlxsw_sp_port->learning_sync = 1;
Ido Schimmel02930382015-10-28 10:16:58 +01001367 mlxsw_sp_port->uc_flood = 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001368 mlxsw_sp_port->pvid = 1;
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001369 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
1370 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
1371 if (!mlxsw_sp_port->active_vlans) {
1372 err = -ENOMEM;
1373 goto err_port_active_vlans_alloc;
1374 }
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001375 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001376
1377 mlxsw_sp_port->pcpu_stats =
1378 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
1379 if (!mlxsw_sp_port->pcpu_stats) {
1380 err = -ENOMEM;
1381 goto err_alloc_stats;
1382 }
1383
1384 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
1385 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
1386
1387 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
1388 if (err) {
1389 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
1390 mlxsw_sp_port->local_port);
1391 goto err_dev_addr_init;
1392 }
1393
1394 netif_carrier_off(dev);
1395
1396 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
1397 NETIF_F_HW_VLAN_CTAG_FILTER;
1398
1399 /* Each packet needs to have a Tx header (metadata) on top all other
1400 * headers.
1401 */
1402 dev->hard_header_len += MLXSW_TXHDR_LEN;
1403
1404 err = mlxsw_sp_port_module_check(mlxsw_sp_port, &usable);
1405 if (err) {
1406 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to check module\n",
1407 mlxsw_sp_port->local_port);
1408 goto err_port_module_check;
1409 }
1410
1411 if (!usable) {
1412 dev_dbg(mlxsw_sp->bus_info->dev, "Port %d: Not usable, skipping initialization\n",
1413 mlxsw_sp_port->local_port);
1414 goto port_not_usable;
1415 }
1416
1417 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
1418 if (err) {
1419 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
1420 mlxsw_sp_port->local_port);
1421 goto err_port_system_port_mapping_set;
1422 }
1423
1424 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
1425 if (err) {
1426 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
1427 mlxsw_sp_port->local_port);
1428 goto err_port_swid_set;
1429 }
1430
1431 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
1432 if (err) {
1433 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
1434 mlxsw_sp_port->local_port);
1435 goto err_port_mtu_set;
1436 }
1437
1438 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1439 if (err)
1440 goto err_port_admin_status_set;
1441
1442 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
1443 if (err) {
1444 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
1445 mlxsw_sp_port->local_port);
1446 goto err_port_buffers_init;
1447 }
1448
1449 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
1450 err = register_netdev(dev);
1451 if (err) {
1452 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
1453 mlxsw_sp_port->local_port);
1454 goto err_register_netdev;
1455 }
1456
1457 err = mlxsw_sp_port_vlan_init(mlxsw_sp_port);
1458 if (err)
1459 goto err_port_vlan_init;
1460
1461 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
1462 return 0;
1463
1464err_port_vlan_init:
1465 unregister_netdev(dev);
1466err_register_netdev:
1467err_port_buffers_init:
1468err_port_admin_status_set:
1469err_port_mtu_set:
1470err_port_swid_set:
1471err_port_system_port_mapping_set:
1472port_not_usable:
1473err_port_module_check:
1474err_dev_addr_init:
1475 free_percpu(mlxsw_sp_port->pcpu_stats);
1476err_alloc_stats:
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001477 kfree(mlxsw_sp_port->active_vlans);
1478err_port_active_vlans_alloc:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001479 free_netdev(dev);
1480 return err;
1481}
1482
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001483static void mlxsw_sp_port_vports_fini(struct mlxsw_sp_port *mlxsw_sp_port)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001484{
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001485 struct net_device *dev = mlxsw_sp_port->dev;
1486 struct mlxsw_sp_port *mlxsw_sp_vport, *tmp;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001487
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001488 list_for_each_entry_safe(mlxsw_sp_vport, tmp,
1489 &mlxsw_sp_port->vports_list, vport.list) {
1490 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
1491
1492 /* vPorts created for VLAN devices should already be gone
1493 * by now, since we unregistered the port netdev.
1494 */
1495 WARN_ON(is_vlan_dev(mlxsw_sp_vport->dev));
1496 mlxsw_sp_port_kill_vid(dev, 0, vid);
1497 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001498}
1499
1500static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
1501{
1502 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1503
1504 if (!mlxsw_sp_port)
1505 return;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001506 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001507 mlxsw_sp_port_vports_fini(mlxsw_sp_port);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001508 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
1509 free_percpu(mlxsw_sp_port->pcpu_stats);
Ido Schimmelbd40e9d2015-12-15 16:03:36 +01001510 kfree(mlxsw_sp_port->active_vlans);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001511 free_netdev(mlxsw_sp_port->dev);
1512}
1513
1514static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
1515{
1516 int i;
1517
1518 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
1519 mlxsw_sp_port_remove(mlxsw_sp, i);
1520 kfree(mlxsw_sp->ports);
1521}
1522
1523static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
1524{
1525 size_t alloc_size;
1526 int i;
1527 int err;
1528
1529 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
1530 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
1531 if (!mlxsw_sp->ports)
1532 return -ENOMEM;
1533
1534 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
1535 err = mlxsw_sp_port_create(mlxsw_sp, i);
1536 if (err)
1537 goto err_port_create;
1538 }
1539 return 0;
1540
1541err_port_create:
1542 for (i--; i >= 1; i--)
1543 mlxsw_sp_port_remove(mlxsw_sp, i);
1544 kfree(mlxsw_sp->ports);
1545 return err;
1546}
1547
1548static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
1549 char *pude_pl, void *priv)
1550{
1551 struct mlxsw_sp *mlxsw_sp = priv;
1552 struct mlxsw_sp_port *mlxsw_sp_port;
1553 enum mlxsw_reg_pude_oper_status status;
1554 u8 local_port;
1555
1556 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
1557 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1558 if (!mlxsw_sp_port) {
1559 dev_warn(mlxsw_sp->bus_info->dev, "Port %d: Link event received for non-existent port\n",
1560 local_port);
1561 return;
1562 }
1563
1564 status = mlxsw_reg_pude_oper_status_get(pude_pl);
1565 if (status == MLXSW_PORT_OPER_STATUS_UP) {
1566 netdev_info(mlxsw_sp_port->dev, "link up\n");
1567 netif_carrier_on(mlxsw_sp_port->dev);
1568 } else {
1569 netdev_info(mlxsw_sp_port->dev, "link down\n");
1570 netif_carrier_off(mlxsw_sp_port->dev);
1571 }
1572}
1573
1574static struct mlxsw_event_listener mlxsw_sp_pude_event = {
1575 .func = mlxsw_sp_pude_event_func,
1576 .trap_id = MLXSW_TRAP_ID_PUDE,
1577};
1578
1579static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
1580 enum mlxsw_event_trap_id trap_id)
1581{
1582 struct mlxsw_event_listener *el;
1583 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1584 int err;
1585
1586 switch (trap_id) {
1587 case MLXSW_TRAP_ID_PUDE:
1588 el = &mlxsw_sp_pude_event;
1589 break;
1590 }
1591 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
1592 if (err)
1593 return err;
1594
1595 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
1596 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1597 if (err)
1598 goto err_event_trap_set;
1599
1600 return 0;
1601
1602err_event_trap_set:
1603 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1604 return err;
1605}
1606
1607static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
1608 enum mlxsw_event_trap_id trap_id)
1609{
1610 struct mlxsw_event_listener *el;
1611
1612 switch (trap_id) {
1613 case MLXSW_TRAP_ID_PUDE:
1614 el = &mlxsw_sp_pude_event;
1615 break;
1616 }
1617 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
1618}
1619
1620static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
1621 void *priv)
1622{
1623 struct mlxsw_sp *mlxsw_sp = priv;
1624 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
1625 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
1626
1627 if (unlikely(!mlxsw_sp_port)) {
1628 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
1629 local_port);
1630 return;
1631 }
1632
1633 skb->dev = mlxsw_sp_port->dev;
1634
1635 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
1636 u64_stats_update_begin(&pcpu_stats->syncp);
1637 pcpu_stats->rx_packets++;
1638 pcpu_stats->rx_bytes += skb->len;
1639 u64_stats_update_end(&pcpu_stats->syncp);
1640
1641 skb->protocol = eth_type_trans(skb, skb->dev);
1642 netif_receive_skb(skb);
1643}
1644
1645static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
1646 {
1647 .func = mlxsw_sp_rx_listener_func,
1648 .local_port = MLXSW_PORT_DONT_CARE,
1649 .trap_id = MLXSW_TRAP_ID_FDB_MC,
1650 },
1651 /* Traps for specific L2 packet types, not trapped as FDB MC */
1652 {
1653 .func = mlxsw_sp_rx_listener_func,
1654 .local_port = MLXSW_PORT_DONT_CARE,
1655 .trap_id = MLXSW_TRAP_ID_STP,
1656 },
1657 {
1658 .func = mlxsw_sp_rx_listener_func,
1659 .local_port = MLXSW_PORT_DONT_CARE,
1660 .trap_id = MLXSW_TRAP_ID_LACP,
1661 },
1662 {
1663 .func = mlxsw_sp_rx_listener_func,
1664 .local_port = MLXSW_PORT_DONT_CARE,
1665 .trap_id = MLXSW_TRAP_ID_EAPOL,
1666 },
1667 {
1668 .func = mlxsw_sp_rx_listener_func,
1669 .local_port = MLXSW_PORT_DONT_CARE,
1670 .trap_id = MLXSW_TRAP_ID_LLDP,
1671 },
1672 {
1673 .func = mlxsw_sp_rx_listener_func,
1674 .local_port = MLXSW_PORT_DONT_CARE,
1675 .trap_id = MLXSW_TRAP_ID_MMRP,
1676 },
1677 {
1678 .func = mlxsw_sp_rx_listener_func,
1679 .local_port = MLXSW_PORT_DONT_CARE,
1680 .trap_id = MLXSW_TRAP_ID_MVRP,
1681 },
1682 {
1683 .func = mlxsw_sp_rx_listener_func,
1684 .local_port = MLXSW_PORT_DONT_CARE,
1685 .trap_id = MLXSW_TRAP_ID_RPVST,
1686 },
1687 {
1688 .func = mlxsw_sp_rx_listener_func,
1689 .local_port = MLXSW_PORT_DONT_CARE,
1690 .trap_id = MLXSW_TRAP_ID_DHCP,
1691 },
1692 {
1693 .func = mlxsw_sp_rx_listener_func,
1694 .local_port = MLXSW_PORT_DONT_CARE,
1695 .trap_id = MLXSW_TRAP_ID_IGMP_QUERY,
1696 },
1697 {
1698 .func = mlxsw_sp_rx_listener_func,
1699 .local_port = MLXSW_PORT_DONT_CARE,
1700 .trap_id = MLXSW_TRAP_ID_IGMP_V1_REPORT,
1701 },
1702 {
1703 .func = mlxsw_sp_rx_listener_func,
1704 .local_port = MLXSW_PORT_DONT_CARE,
1705 .trap_id = MLXSW_TRAP_ID_IGMP_V2_REPORT,
1706 },
1707 {
1708 .func = mlxsw_sp_rx_listener_func,
1709 .local_port = MLXSW_PORT_DONT_CARE,
1710 .trap_id = MLXSW_TRAP_ID_IGMP_V2_LEAVE,
1711 },
1712 {
1713 .func = mlxsw_sp_rx_listener_func,
1714 .local_port = MLXSW_PORT_DONT_CARE,
1715 .trap_id = MLXSW_TRAP_ID_IGMP_V3_REPORT,
1716 },
1717};
1718
1719static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
1720{
1721 char htgt_pl[MLXSW_REG_HTGT_LEN];
1722 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1723 int i;
1724 int err;
1725
1726 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
1727 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
1728 if (err)
1729 return err;
1730
1731 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
1732 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
1733 if (err)
1734 return err;
1735
1736 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
1737 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
1738 &mlxsw_sp_rx_listener[i],
1739 mlxsw_sp);
1740 if (err)
1741 goto err_rx_listener_register;
1742
1743 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,
1744 mlxsw_sp_rx_listener[i].trap_id);
1745 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1746 if (err)
1747 goto err_rx_trap_set;
1748 }
1749 return 0;
1750
1751err_rx_trap_set:
1752 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1753 &mlxsw_sp_rx_listener[i],
1754 mlxsw_sp);
1755err_rx_listener_register:
1756 for (i--; i >= 0; i--) {
1757 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
1758 mlxsw_sp_rx_listener[i].trap_id);
1759 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1760
1761 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1762 &mlxsw_sp_rx_listener[i],
1763 mlxsw_sp);
1764 }
1765 return err;
1766}
1767
1768static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
1769{
1770 char hpkt_pl[MLXSW_REG_HPKT_LEN];
1771 int i;
1772
1773 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
1774 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD,
1775 mlxsw_sp_rx_listener[i].trap_id);
1776 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
1777
1778 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
1779 &mlxsw_sp_rx_listener[i],
1780 mlxsw_sp);
1781 }
1782}
1783
1784static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
1785 enum mlxsw_reg_sfgc_type type,
1786 enum mlxsw_reg_sfgc_bridge_type bridge_type)
1787{
1788 enum mlxsw_flood_table_type table_type;
1789 enum mlxsw_sp_flood_table flood_table;
1790 char sfgc_pl[MLXSW_REG_SFGC_LEN];
1791
Ido Schimmel19ae6122015-12-15 16:03:39 +01001792 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001793 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
Ido Schimmel19ae6122015-12-15 16:03:39 +01001794 else
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001795 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
Ido Schimmel19ae6122015-12-15 16:03:39 +01001796
1797 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
1798 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
1799 else
1800 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001801
1802 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
1803 flood_table);
1804 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
1805}
1806
1807static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
1808{
1809 int type, err;
1810
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001811 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
1812 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
1813 continue;
1814
1815 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
1816 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
1817 if (err)
1818 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001819
1820 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
1821 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
1822 if (err)
1823 return err;
1824 }
1825
1826 return 0;
1827}
1828
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001829static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
1830{
1831 char slcr_pl[MLXSW_REG_SLCR_LEN];
1832
1833 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
1834 MLXSW_REG_SLCR_LAG_HASH_DMAC |
1835 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
1836 MLXSW_REG_SLCR_LAG_HASH_VLANID |
1837 MLXSW_REG_SLCR_LAG_HASH_SIP |
1838 MLXSW_REG_SLCR_LAG_HASH_DIP |
1839 MLXSW_REG_SLCR_LAG_HASH_SPORT |
1840 MLXSW_REG_SLCR_LAG_HASH_DPORT |
1841 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
1842 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
1843}
1844
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001845static int mlxsw_sp_init(void *priv, struct mlxsw_core *mlxsw_core,
1846 const struct mlxsw_bus_info *mlxsw_bus_info)
1847{
1848 struct mlxsw_sp *mlxsw_sp = priv;
1849 int err;
1850
1851 mlxsw_sp->core = mlxsw_core;
1852 mlxsw_sp->bus_info = mlxsw_bus_info;
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001853 INIT_LIST_HEAD(&mlxsw_sp->port_vfids.list);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001854
1855 err = mlxsw_sp_base_mac_get(mlxsw_sp);
1856 if (err) {
1857 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
1858 return err;
1859 }
1860
1861 err = mlxsw_sp_ports_create(mlxsw_sp);
1862 if (err) {
1863 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
Ido Schimmel7f71eb42015-12-15 16:03:37 +01001864 return err;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001865 }
1866
1867 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1868 if (err) {
1869 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
1870 goto err_event_register;
1871 }
1872
1873 err = mlxsw_sp_traps_init(mlxsw_sp);
1874 if (err) {
1875 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
1876 goto err_rx_listener_register;
1877 }
1878
1879 err = mlxsw_sp_flood_init(mlxsw_sp);
1880 if (err) {
1881 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
1882 goto err_flood_init;
1883 }
1884
1885 err = mlxsw_sp_buffers_init(mlxsw_sp);
1886 if (err) {
1887 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
1888 goto err_buffers_init;
1889 }
1890
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001891 err = mlxsw_sp_lag_init(mlxsw_sp);
1892 if (err) {
1893 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
1894 goto err_lag_init;
1895 }
1896
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001897 err = mlxsw_sp_switchdev_init(mlxsw_sp);
1898 if (err) {
1899 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
1900 goto err_switchdev_init;
1901 }
1902
1903 return 0;
1904
1905err_switchdev_init:
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001906err_lag_init:
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001907err_buffers_init:
1908err_flood_init:
1909 mlxsw_sp_traps_fini(mlxsw_sp);
1910err_rx_listener_register:
1911 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1912err_event_register:
1913 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001914 return err;
1915}
1916
1917static void mlxsw_sp_fini(void *priv)
1918{
1919 struct mlxsw_sp *mlxsw_sp = priv;
1920
1921 mlxsw_sp_switchdev_fini(mlxsw_sp);
1922 mlxsw_sp_traps_fini(mlxsw_sp);
1923 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
1924 mlxsw_sp_ports_remove(mlxsw_sp);
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001925}
1926
1927static struct mlxsw_config_profile mlxsw_sp_config_profile = {
1928 .used_max_vepa_channels = 1,
1929 .max_vepa_channels = 0,
1930 .used_max_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001931 .max_lag = MLXSW_SP_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001932 .used_max_port_per_lag = 1,
Jiri Pirko0d65fc12015-12-03 12:12:28 +01001933 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001934 .used_max_mid = 1,
1935 .max_mid = 7000,
1936 .used_max_pgt = 1,
1937 .max_pgt = 0,
1938 .used_max_system_port = 1,
1939 .max_system_port = 64,
1940 .used_max_vlan_groups = 1,
1941 .max_vlan_groups = 127,
1942 .used_max_regions = 1,
1943 .max_regions = 400,
1944 .used_flood_tables = 1,
1945 .used_flood_mode = 1,
1946 .flood_mode = 3,
1947 .max_fid_offset_flood_tables = 2,
1948 .fid_offset_flood_table_size = VLAN_N_VID - 1,
Ido Schimmel19ae6122015-12-15 16:03:39 +01001949 .max_fid_flood_tables = 2,
1950 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
Jiri Pirko56ade8f2015-10-16 14:01:37 +02001951 .used_max_ib_mc = 1,
1952 .max_ib_mc = 0,
1953 .used_max_pkey = 1,
1954 .max_pkey = 0,
1955 .swid_config = {
1956 {
1957 .used_type = 1,
1958 .type = MLXSW_PORT_SWID_TYPE_ETH,
1959 }
1960 },
1961};
1962
1963static struct mlxsw_driver mlxsw_sp_driver = {
1964 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
1965 .owner = THIS_MODULE,
1966 .priv_size = sizeof(struct mlxsw_sp),
1967 .init = mlxsw_sp_init,
1968 .fini = mlxsw_sp_fini,
1969 .txhdr_construct = mlxsw_sp_txhdr_construct,
1970 .txhdr_len = MLXSW_TXHDR_LEN,
1971 .profile = &mlxsw_sp_config_profile,
1972};
1973
1974static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
1975{
1976 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
1977}
1978
1979static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port)
1980{
1981 struct net_device *dev = mlxsw_sp_port->dev;
1982 int err;
1983
1984 /* When port is not bridged untagged packets are tagged with
1985 * PVID=VID=1, thereby creating an implicit VLAN interface in
1986 * the device. Remove it and let bridge code take care of its
1987 * own VLANs.
1988 */
1989 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
1990 if (err)
1991 netdev_err(dev, "Failed to remove VID 1\n");
1992
1993 return err;
1994}
1995
1996static int mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
1997{
1998 struct net_device *dev = mlxsw_sp_port->dev;
1999 int err;
2000
2001 /* Add implicit VLAN interface in the device, so that untagged
2002 * packets will be classified to the default vFID.
2003 */
2004 err = mlxsw_sp_port_add_vid(dev, 0, 1);
2005 if (err)
2006 netdev_err(dev, "Failed to add VID 1\n");
2007
2008 return err;
2009}
2010
2011static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
2012 struct net_device *br_dev)
2013{
2014 return !mlxsw_sp->master_bridge.dev ||
2015 mlxsw_sp->master_bridge.dev == br_dev;
2016}
2017
2018static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
2019 struct net_device *br_dev)
2020{
2021 mlxsw_sp->master_bridge.dev = br_dev;
2022 mlxsw_sp->master_bridge.ref_count++;
2023}
2024
2025static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp,
2026 struct net_device *br_dev)
2027{
2028 if (--mlxsw_sp->master_bridge.ref_count == 0)
2029 mlxsw_sp->master_bridge.dev = NULL;
2030}
2031
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002032static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002033{
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002034 char sldr_pl[MLXSW_REG_SLDR_LEN];
2035
2036 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
2037 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2038}
2039
2040static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
2041{
2042 char sldr_pl[MLXSW_REG_SLDR_LEN];
2043
2044 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
2045 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2046}
2047
2048static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2049 u16 lag_id, u8 port_index)
2050{
2051 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2052 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2053
2054 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
2055 lag_id, port_index);
2056 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2057}
2058
2059static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2060 u16 lag_id)
2061{
2062 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2063 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2064
2065 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
2066 lag_id);
2067 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2068}
2069
2070static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
2071 u16 lag_id)
2072{
2073 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2074 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2075
2076 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
2077 lag_id);
2078 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2079}
2080
2081static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
2082 u16 lag_id)
2083{
2084 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2085 char slcor_pl[MLXSW_REG_SLCOR_LEN];
2086
2087 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
2088 lag_id);
2089 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
2090}
2091
2092static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2093 struct net_device *lag_dev,
2094 u16 *p_lag_id)
2095{
2096 struct mlxsw_sp_upper *lag;
2097 int free_lag_id = -1;
2098 int i;
2099
2100 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
2101 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
2102 if (lag->ref_count) {
2103 if (lag->dev == lag_dev) {
2104 *p_lag_id = i;
2105 return 0;
2106 }
2107 } else if (free_lag_id < 0) {
2108 free_lag_id = i;
2109 }
2110 }
2111 if (free_lag_id < 0)
2112 return -EBUSY;
2113 *p_lag_id = free_lag_id;
2114 return 0;
2115}
2116
2117static bool
2118mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
2119 struct net_device *lag_dev,
2120 struct netdev_lag_upper_info *lag_upper_info)
2121{
2122 u16 lag_id;
2123
2124 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
2125 return false;
2126 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
2127 return false;
2128 return true;
2129}
2130
2131static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
2132 u16 lag_id, u8 *p_port_index)
2133{
2134 int i;
2135
2136 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
2137 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
2138 *p_port_index = i;
2139 return 0;
2140 }
2141 }
2142 return -EBUSY;
2143}
2144
2145static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
2146 struct net_device *lag_dev)
2147{
2148 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2149 struct mlxsw_sp_upper *lag;
2150 u16 lag_id;
2151 u8 port_index;
2152 int err;
2153
2154 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
2155 if (err)
2156 return err;
2157 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2158 if (!lag->ref_count) {
2159 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
2160 if (err)
2161 return err;
2162 lag->dev = lag_dev;
2163 }
2164
2165 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
2166 if (err)
2167 return err;
2168 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
2169 if (err)
2170 goto err_col_port_add;
2171 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
2172 if (err)
2173 goto err_col_port_enable;
2174
2175 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
2176 mlxsw_sp_port->local_port);
2177 mlxsw_sp_port->lag_id = lag_id;
2178 mlxsw_sp_port->lagged = 1;
2179 lag->ref_count++;
2180 return 0;
2181
2182err_col_port_add:
2183 if (!lag->ref_count)
2184 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2185err_col_port_enable:
2186 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
2187 return err;
2188}
2189
2190static int mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
2191 struct net_device *lag_dev)
2192{
2193 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2194 struct mlxsw_sp_upper *lag;
2195 u16 lag_id = mlxsw_sp_port->lag_id;
2196 int err;
2197
2198 if (!mlxsw_sp_port->lagged)
2199 return 0;
2200 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
2201 WARN_ON(lag->ref_count == 0);
2202
2203 err = mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
2204 if (err)
2205 return err;
Dan Carpenter82a06422015-12-09 13:33:51 +03002206 err = mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002207 if (err)
2208 return err;
2209
2210 if (lag->ref_count == 1) {
2211 err = mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
2212 if (err)
2213 return err;
2214 }
2215
2216 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
2217 mlxsw_sp_port->local_port);
2218 mlxsw_sp_port->lagged = 0;
2219 lag->ref_count--;
2220 return 0;
2221}
2222
Jiri Pirko74581202015-12-03 12:12:30 +01002223static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
2224 u16 lag_id)
2225{
2226 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2227 char sldr_pl[MLXSW_REG_SLDR_LEN];
2228
2229 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
2230 mlxsw_sp_port->local_port);
2231 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2232}
2233
2234static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
2235 u16 lag_id)
2236{
2237 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2238 char sldr_pl[MLXSW_REG_SLDR_LEN];
2239
2240 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
2241 mlxsw_sp_port->local_port);
2242 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
2243}
2244
2245static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
2246 bool lag_tx_enabled)
2247{
2248 if (lag_tx_enabled)
2249 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
2250 mlxsw_sp_port->lag_id);
2251 else
2252 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
2253 mlxsw_sp_port->lag_id);
2254}
2255
2256static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
2257 struct netdev_lag_lower_state_info *info)
2258{
2259 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
2260}
2261
2262static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
2263 unsigned long event, void *ptr)
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002264{
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002265 struct netdev_notifier_changeupper_info *info;
2266 struct mlxsw_sp_port *mlxsw_sp_port;
2267 struct net_device *upper_dev;
2268 struct mlxsw_sp *mlxsw_sp;
2269 int err;
2270
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002271 mlxsw_sp_port = netdev_priv(dev);
2272 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
2273 info = ptr;
2274
2275 switch (event) {
2276 case NETDEV_PRECHANGEUPPER:
2277 upper_dev = info->upper_dev;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002278 if (!info->master || !info->linking)
2279 break;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002280 /* HW limitation forbids to put ports to multiple bridges. */
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002281 if (netif_is_bridge_master(upper_dev) &&
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002282 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
2283 return NOTIFY_BAD;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002284 if (netif_is_lag_master(upper_dev) &&
2285 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
2286 info->upper_info))
2287 return NOTIFY_BAD;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002288 break;
2289 case NETDEV_CHANGEUPPER:
2290 upper_dev = info->upper_dev;
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002291 if (!info->master)
2292 break;
2293 if (netif_is_bridge_master(upper_dev)) {
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002294 if (info->linking) {
2295 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port);
2296 if (err)
2297 netdev_err(dev, "Failed to join bridge\n");
2298 mlxsw_sp_master_bridge_inc(mlxsw_sp, upper_dev);
Jiri Pirko0d9b9702015-10-28 10:16:56 +01002299 mlxsw_sp_port->bridged = 1;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002300 } else {
2301 err = mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
2302 if (err)
2303 netdev_err(dev, "Failed to leave bridge\n");
Jiri Pirko0d9b9702015-10-28 10:16:56 +01002304 mlxsw_sp_port->bridged = 0;
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002305 mlxsw_sp_master_bridge_dec(mlxsw_sp, upper_dev);
2306 }
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002307 } else if (netif_is_lag_master(upper_dev)) {
2308 if (info->linking) {
2309 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
2310 upper_dev);
2311 if (err) {
2312 netdev_err(dev, "Failed to join link aggregation\n");
2313 return NOTIFY_BAD;
2314 }
2315 } else {
2316 err = mlxsw_sp_port_lag_leave(mlxsw_sp_port,
2317 upper_dev);
2318 if (err) {
2319 netdev_err(dev, "Failed to leave link aggregation\n");
2320 return NOTIFY_BAD;
2321 }
2322 }
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002323 }
2324 break;
2325 }
2326
2327 return NOTIFY_DONE;
2328}
2329
Jiri Pirko74581202015-12-03 12:12:30 +01002330static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
2331 unsigned long event, void *ptr)
2332{
2333 struct netdev_notifier_changelowerstate_info *info;
2334 struct mlxsw_sp_port *mlxsw_sp_port;
2335 int err;
2336
2337 mlxsw_sp_port = netdev_priv(dev);
2338 info = ptr;
2339
2340 switch (event) {
2341 case NETDEV_CHANGELOWERSTATE:
2342 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
2343 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
2344 info->lower_state_info);
2345 if (err)
2346 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
2347 }
2348 break;
2349 }
2350
2351 return NOTIFY_DONE;
2352}
2353
2354static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
2355 unsigned long event, void *ptr)
2356{
2357 switch (event) {
2358 case NETDEV_PRECHANGEUPPER:
2359 case NETDEV_CHANGEUPPER:
2360 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
2361 case NETDEV_CHANGELOWERSTATE:
2362 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
2363 }
2364
2365 return NOTIFY_DONE;
2366}
2367
Jiri Pirko0d65fc12015-12-03 12:12:28 +01002368static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
2369 unsigned long event, void *ptr)
2370{
2371 struct net_device *dev;
2372 struct list_head *iter;
2373 int ret;
2374
2375 netdev_for_each_lower_dev(lag_dev, dev, iter) {
2376 if (mlxsw_sp_port_dev_check(dev)) {
2377 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
2378 if (ret == NOTIFY_BAD)
2379 return ret;
2380 }
2381 }
2382
2383 return NOTIFY_DONE;
2384}
2385
2386static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
2387 unsigned long event, void *ptr)
2388{
2389 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2390
2391 if (mlxsw_sp_port_dev_check(dev))
2392 return mlxsw_sp_netdevice_port_event(dev, event, ptr);
2393
2394 if (netif_is_lag_master(dev))
2395 return mlxsw_sp_netdevice_lag_event(dev, event, ptr);
2396
2397 return NOTIFY_DONE;
2398}
2399
Jiri Pirko56ade8f2015-10-16 14:01:37 +02002400static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
2401 .notifier_call = mlxsw_sp_netdevice_event,
2402};
2403
2404static int __init mlxsw_sp_module_init(void)
2405{
2406 int err;
2407
2408 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
2409 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
2410 if (err)
2411 goto err_core_driver_register;
2412 return 0;
2413
2414err_core_driver_register:
2415 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
2416 return err;
2417}
2418
2419static void __exit mlxsw_sp_module_exit(void)
2420{
2421 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
2422 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
2423}
2424
2425module_init(mlxsw_sp_module_init);
2426module_exit(mlxsw_sp_module_exit);
2427
2428MODULE_LICENSE("Dual BSD/GPL");
2429MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
2430MODULE_DESCRIPTION("Mellanox Spectrum driver");
2431MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);