blob: 3d77d95bbc9d2d4f2add6be67762f62a6414a94f [file] [log] [blame]
Stefan Agnera67970a2016-06-26 01:47:53 -07001/*
2 * Copyright 2015 Freescale Semiconductor, Inc.
3 * Copyright 2016 Toradex AG
4 *
5 * This file is dual-licensed: you can use it either under the terms
6 * of the GPL or the X11 license, at your option. Note that this dual
7 * licensing only applies to this file, and not this project as a
8 * whole.
9 *
10 * a) This file is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This file is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * Or, alternatively,
21 *
22 * b) Permission is hereby granted, free of charge, to any person
23 * obtaining a copy of this software and associated documentation
24 * files (the "Software"), to deal in the Software without
25 * restriction, including without limitation the rights to use,
26 * copy, modify, merge, publish, distribute, sublicense, and/or
27 * sell copies of the Software, and to permit persons to whom the
28 * Software is furnished to do so, subject to the following
29 * conditions:
30 *
31 * The above copyright notice and this permission notice shall be
32 * included in all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
35 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
36 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
37 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
38 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
39 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
40 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
41 * OTHER DEALINGS IN THE SOFTWARE.
42 */
43
44#include "imx7s.dtsi"
45
46/ {
47 cpus {
48 cpu1: cpu@1 {
49 compatible = "arm,cortex-a7";
50 device_type = "cpu";
51 reg = <1>;
52 };
53 };
54
Stefan Agner974a3ab2016-07-25 23:42:35 -070055 soc {
56 etm@3007d000 {
57 compatible = "arm,coresight-etm3x", "arm,primecell";
58 reg = <0x3007d000 0x1000>;
Stefan Agnera67970a2016-06-26 01:47:53 -070059
Stefan Agner974a3ab2016-07-25 23:42:35 -070060 /*
61 * System will hang if added nosmp in kernel command line
62 * without arm,primecell-periphid because amba bus try to
63 * read id and core1 power off at this time.
64 */
65 arm,primecell-periphid = <0xbb956>;
66 cpu = <&cpu1>;
67 clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
68 clock-names = "apb_pclk";
Stefan Agnera67970a2016-06-26 01:47:53 -070069
Stefan Agner974a3ab2016-07-25 23:42:35 -070070 port {
71 etm1_out_port: endpoint {
72 remote-endpoint = <&ca_funnel_in_port1>;
73 };
Stefan Agnera67970a2016-06-26 01:47:53 -070074 };
75 };
76 };
77};
78
79&aips3 {
80 usbotg2: usb@30b20000 {
81 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
82 reg = <0x30b20000 0x200>;
83 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
84 clocks = <&clks IMX7D_USB_CTRL_CLK>;
85 fsl,usbphy = <&usbphynop2>;
86 fsl,usbmisc = <&usbmisc2 0>;
87 phy-clkgate-delay-us = <400>;
88 status = "disabled";
89 };
90
91 usbmisc2: usbmisc@30b20200 {
92 #index-cells = <1>;
93 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
94 reg = <0x30b20200 0x200>;
95 };
96
97 usbphynop2: usbphynop2 {
98 compatible = "usb-nop-xceiv";
99 clocks = <&clks IMX7D_USB_PHY2_CLK>;
100 clock-names = "main_clk";
101 };
102
103 fec2: ethernet@30bf0000 {
104 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
105 reg = <0x30bf0000 0x10000>;
106 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
107 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
108 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
109 clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
110 <&clks IMX7D_ENET_AXI_ROOT_CLK>,
111 <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
112 <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
113 <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
114 clock-names = "ipg", "ahb", "ptp",
115 "enet_clk_ref", "enet_out";
116 fsl,num-tx-queues=<3>;
117 fsl,num-rx-queues=<3>;
118 status = "disabled";
119 };
120};
121
122&ca_funnel_ports {
123 port@1 {
124 reg = <1>;
125 ca_funnel_in_port1: endpoint {
126 slave-mode;
127 remote-endpoint = <&etm1_out_port>;
128 };
129 };
130};