blob: a110f968987f2ccac3337ec8110eb51e900aa33b [file] [log] [blame]
oulijun9a443532016-07-21 19:06:38 +08001/*
2 * Copyright (c) 2016 Hisilicon Limited.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
Salil528f1de2016-08-24 04:44:50 +080033#include <linux/acpi.h>
oulijun9a443532016-07-21 19:06:38 +080034#include <linux/of_platform.h>
Arnd Bergmann3ecc16c2017-02-17 15:38:26 +010035#include <linux/module.h>
oulijun9a443532016-07-21 19:06:38 +080036#include <rdma/ib_addr.h>
37#include <rdma/ib_smi.h>
38#include <rdma/ib_user_verbs.h>
Shaobo Xu82547462016-11-23 19:41:08 +000039#include <rdma/ib_cache.h>
oulijun9a443532016-07-21 19:06:38 +080040#include "hns_roce_common.h"
41#include "hns_roce_device.h"
Leon Romanovsky4d409952016-10-19 20:13:07 +030042#include <rdma/hns-abi.h>
oulijun9a443532016-07-21 19:06:38 +080043#include "hns_roce_hem.h"
44
45/**
oulijun9a443532016-07-21 19:06:38 +080046 * hns_get_gid_index - Get gid index.
47 * @hr_dev: pointer to structure hns_roce_dev.
48 * @port: port, value range: 0 ~ MAX
49 * @gid_index: gid_index, value range: 0 ~ MAX
50 * Description:
51 * N ports shared gids, allocation method as follow:
52 * GID[0][0], GID[1][0],.....GID[N - 1][0],
53 * GID[0][0], GID[1][0],.....GID[N - 1][0],
54 * And so on
55 */
56int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)
57{
58 return gid_index * hr_dev->caps.num_ports + port;
59}
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +080060EXPORT_SYMBOL_GPL(hns_get_gid_index);
oulijun9a443532016-07-21 19:06:38 +080061
oulijun9a443532016-07-21 19:06:38 +080062static void hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr)
63{
64 u8 phy_port;
65 u32 i = 0;
66
67 if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM))
68 return;
69
70 for (i = 0; i < MAC_ADDR_OCTET_NUM; i++)
71 hr_dev->dev_addr[port][i] = addr[i];
72
73 phy_port = hr_dev->iboe.phy_port[port];
74 hr_dev->hw->set_mac(hr_dev, phy_port, addr);
75}
76
Shaobo Xu82547462016-11-23 19:41:08 +000077static int hns_roce_add_gid(struct ib_device *device, u8 port_num,
78 unsigned int index, const union ib_gid *gid,
79 const struct ib_gid_attr *attr, void **context)
oulijun9a443532016-07-21 19:06:38 +080080{
Shaobo Xu82547462016-11-23 19:41:08 +000081 struct hns_roce_dev *hr_dev = to_hr_dev(device);
82 u8 port = port_num - 1;
83 unsigned long flags;
oulijun9a443532016-07-21 19:06:38 +080084
Shaobo Xu82547462016-11-23 19:41:08 +000085 if (port >= hr_dev->caps.num_ports)
86 return -EINVAL;
87
88 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
89
90 hr_dev->hw->set_gid(hr_dev, port, index, (union ib_gid *)gid);
91
92 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
93
94 return 0;
95}
96
97static int hns_roce_del_gid(struct ib_device *device, u8 port_num,
98 unsigned int index, void **context)
99{
100 struct hns_roce_dev *hr_dev = to_hr_dev(device);
101 union ib_gid zgid = { {0} };
102 u8 port = port_num - 1;
103 unsigned long flags;
104
105 if (port >= hr_dev->caps.num_ports)
106 return -EINVAL;
107
108 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
109
110 hr_dev->hw->set_gid(hr_dev, port, index, &zgid);
111
112 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
113
114 return 0;
oulijun9a443532016-07-21 19:06:38 +0800115}
116
117static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port,
118 unsigned long event)
119{
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800120 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800121 struct net_device *netdev;
oulijun9a443532016-07-21 19:06:38 +0800122
123 netdev = hr_dev->iboe.netdevs[port];
124 if (!netdev) {
125 dev_err(dev, "port(%d) can't find netdev\n", port);
126 return -ENODEV;
127 }
128
oulijun9a443532016-07-21 19:06:38 +0800129 switch (event) {
130 case NETDEV_UP:
131 case NETDEV_CHANGE:
132 case NETDEV_REGISTER:
133 case NETDEV_CHANGEADDR:
134 hns_roce_set_mac(hr_dev, port, netdev->dev_addr);
oulijun9a443532016-07-21 19:06:38 +0800135 break;
136 case NETDEV_DOWN:
137 /*
Salile84e40be2016-11-23 19:41:09 +0000138 * In v1 engine, only support all ports closed together.
139 */
oulijun9a443532016-07-21 19:06:38 +0800140 break;
141 default:
142 dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event));
143 break;
144 }
145
Shaobo Xu82547462016-11-23 19:41:08 +0000146 return 0;
oulijun9a443532016-07-21 19:06:38 +0800147}
148
149static int hns_roce_netdev_event(struct notifier_block *self,
150 unsigned long event, void *ptr)
151{
152 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
153 struct hns_roce_ib_iboe *iboe = NULL;
154 struct hns_roce_dev *hr_dev = NULL;
155 u8 port = 0;
156 int ret = 0;
157
158 hr_dev = container_of(self, struct hns_roce_dev, iboe.nb);
159 iboe = &hr_dev->iboe;
160
161 for (port = 0; port < hr_dev->caps.num_ports; port++) {
162 if (dev == iboe->netdevs[port]) {
163 ret = handle_en_event(hr_dev, port, event);
164 if (ret)
165 return NOTIFY_DONE;
166 break;
167 }
168 }
169
170 return NOTIFY_DONE;
171}
172
Shaobo Xu82547462016-11-23 19:41:08 +0000173static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev)
oulijun9a443532016-07-21 19:06:38 +0800174{
Shaobo Xu82547462016-11-23 19:41:08 +0000175 u8 i;
oulijun9a443532016-07-21 19:06:38 +0800176
177 for (i = 0; i < hr_dev->caps.num_ports; i++) {
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800178 if (hr_dev->hw->set_mtu)
179 hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i],
180 hr_dev->caps.max_mtu);
oulijun9a443532016-07-21 19:06:38 +0800181 hns_roce_set_mac(hr_dev, i, hr_dev->iboe.netdevs[i]->dev_addr);
oulijun9a443532016-07-21 19:06:38 +0800182 }
183
Shaobo Xu82547462016-11-23 19:41:08 +0000184 return 0;
oulijun9a443532016-07-21 19:06:38 +0800185}
186
187static int hns_roce_query_device(struct ib_device *ib_dev,
188 struct ib_device_attr *props,
189 struct ib_udata *uhw)
190{
191 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
192
193 memset(props, 0, sizeof(*props));
194
195 props->sys_image_guid = hr_dev->sys_image_guid;
196 props->max_mr_size = (u64)(~(0ULL));
197 props->page_size_cap = hr_dev->caps.page_size_cap;
198 props->vendor_id = hr_dev->vendor_id;
199 props->vendor_part_id = hr_dev->vendor_part_id;
200 props->hw_ver = hr_dev->hw_rev;
201 props->max_qp = hr_dev->caps.num_qps;
202 props->max_qp_wr = hr_dev->caps.max_wqes;
203 props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT |
Lijun Oua74aab62016-09-15 23:48:08 +0100204 IB_DEVICE_RC_RNR_NAK_GEN;
Wei Hu(Xavier)cfc85f32017-08-30 17:23:04 +0800205 props->max_sge = max(hr_dev->caps.max_sq_sg, hr_dev->caps.max_rq_sg);
oulijun9a443532016-07-21 19:06:38 +0800206 props->max_sge_rd = 1;
207 props->max_cq = hr_dev->caps.num_cqs;
208 props->max_cqe = hr_dev->caps.max_cqes;
209 props->max_mr = hr_dev->caps.num_mtpts;
210 props->max_pd = hr_dev->caps.num_pds;
211 props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma;
212 props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma;
213 props->atomic_cap = IB_ATOMIC_NONE;
214 props->max_pkeys = 1;
215 props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay;
216
217 return 0;
218}
219
Lijun Ou2eefca22016-09-15 23:48:06 +0100220static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev,
221 u8 port_num)
222{
223 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
224 struct net_device *ndev;
225
226 if (port_num < 1 || port_num > hr_dev->caps.num_ports)
227 return NULL;
228
229 rcu_read_lock();
230
231 ndev = hr_dev->iboe.netdevs[port_num - 1];
232 if (ndev)
233 dev_hold(ndev);
234
235 rcu_read_unlock();
236 return ndev;
237}
238
oulijun9a443532016-07-21 19:06:38 +0800239static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num,
240 struct ib_port_attr *props)
241{
242 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800243 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800244 struct net_device *net_dev;
245 unsigned long flags;
246 enum ib_mtu mtu;
247 u8 port;
248
249 assert(port_num > 0);
250 port = port_num - 1;
251
Or Gerlitzc4550c62017-01-24 13:02:39 +0200252 /* props being zeroed by the caller, avoid zeroing it here */
oulijun9a443532016-07-21 19:06:38 +0800253
254 props->max_mtu = hr_dev->caps.max_mtu;
255 props->gid_tbl_len = hr_dev->caps.gid_table_len[port];
256 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
257 IB_PORT_VENDOR_CLASS_SUP |
258 IB_PORT_BOOT_MGMT_SUP;
259 props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN;
260 props->pkey_tbl_len = 1;
261 props->active_width = IB_WIDTH_4X;
262 props->active_speed = 1;
263
264 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
265
266 net_dev = hr_dev->iboe.netdevs[port];
267 if (!net_dev) {
268 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
269 dev_err(dev, "find netdev %d failed!\r\n", port);
270 return -EINVAL;
271 }
272
273 mtu = iboe_get_mtu(net_dev->mtu);
274 props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256;
275 props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ?
276 IB_PORT_ACTIVE : IB_PORT_DOWN;
277 props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3;
278
279 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
280
281 return 0;
282}
283
284static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device,
285 u8 port_num)
286{
287 return IB_LINK_LAYER_ETHERNET;
288}
289
290static int hns_roce_query_gid(struct ib_device *ib_dev, u8 port_num, int index,
291 union ib_gid *gid)
292{
oulijun9a443532016-07-21 19:06:38 +0800293 return 0;
294}
295
296static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index,
297 u16 *pkey)
298{
299 *pkey = PKEY_ID;
300
301 return 0;
302}
303
304static int hns_roce_modify_device(struct ib_device *ib_dev, int mask,
305 struct ib_device_modify *props)
306{
307 unsigned long flags;
308
309 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
310 return -EOPNOTSUPP;
311
312 if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
313 spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags);
314 memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE);
315 spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags);
316 }
317
318 return 0;
319}
320
321static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask,
322 struct ib_port_modify *props)
323{
324 return 0;
325}
326
327static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev,
328 struct ib_udata *udata)
329{
330 int ret = 0;
331 struct hns_roce_ucontext *context;
332 struct hns_roce_ib_alloc_ucontext_resp resp;
333 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
334
335 resp.qp_tab_size = hr_dev->caps.num_qps;
336
337 context = kmalloc(sizeof(*context), GFP_KERNEL);
338 if (!context)
339 return ERR_PTR(-ENOMEM);
340
341 ret = hns_roce_uar_alloc(hr_dev, &context->uar);
342 if (ret)
343 goto error_fail_uar_alloc;
344
345 ret = ib_copy_to_udata(udata, &resp, sizeof(resp));
346 if (ret)
347 goto error_fail_copy_to_udata;
348
349 return &context->ibucontext;
350
351error_fail_copy_to_udata:
352 hns_roce_uar_free(hr_dev, &context->uar);
353
354error_fail_uar_alloc:
355 kfree(context);
356
357 return ERR_PTR(ret);
358}
359
360static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext)
361{
362 struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext);
363
364 hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar);
365 kfree(context);
366
367 return 0;
368}
369
370static int hns_roce_mmap(struct ib_ucontext *context,
371 struct vm_area_struct *vma)
372{
Wei Hu (Xavier)8f3e9f32016-11-23 19:41:00 +0000373 struct hns_roce_dev *hr_dev = to_hr_dev(context->device);
374
oulijun9a443532016-07-21 19:06:38 +0800375 if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0)
376 return -EINVAL;
377
378 if (vma->vm_pgoff == 0) {
379 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
380 if (io_remap_pfn_range(vma, vma->vm_start,
381 to_hr_ucontext(context)->uar.pfn,
382 PAGE_SIZE, vma->vm_page_prot))
383 return -EAGAIN;
Wei Hu (Xavier)8f3e9f32016-11-23 19:41:00 +0000384 } else if (vma->vm_pgoff == 1 && hr_dev->hw_rev == HNS_ROCE_HW_VER1) {
385 /* vm_pgoff: 1 -- TPTR */
386 if (io_remap_pfn_range(vma, vma->vm_start,
387 hr_dev->tptr_dma_addr >> PAGE_SHIFT,
388 hr_dev->tptr_size,
389 vma->vm_page_prot))
390 return -EAGAIN;
391 } else
oulijun9a443532016-07-21 19:06:38 +0800392 return -EINVAL;
oulijun9a443532016-07-21 19:06:38 +0800393
394 return 0;
395}
396
397static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num,
398 struct ib_port_immutable *immutable)
399{
400 struct ib_port_attr attr;
401 int ret;
402
Or Gerlitzc4550c62017-01-24 13:02:39 +0200403 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
404
405 ret = ib_query_port(ib_dev, port_num, &attr);
oulijun9a443532016-07-21 19:06:38 +0800406 if (ret)
407 return ret;
408
409 immutable->pkey_tbl_len = attr.pkey_tbl_len;
410 immutable->gid_tbl_len = attr.gid_tbl_len;
411
oulijun9a443532016-07-21 19:06:38 +0800412 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
413
414 return 0;
415}
416
417static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev)
418{
419 struct hns_roce_ib_iboe *iboe = &hr_dev->iboe;
420
421 unregister_inetaddr_notifier(&iboe->nb_inet);
422 unregister_netdevice_notifier(&iboe->nb);
423 ib_unregister_device(&hr_dev->ib_dev);
424}
425
426static int hns_roce_register_device(struct hns_roce_dev *hr_dev)
427{
428 int ret;
429 struct hns_roce_ib_iboe *iboe = NULL;
430 struct ib_device *ib_dev = NULL;
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800431 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800432
433 iboe = &hr_dev->iboe;
Lijun Ou49fdf6b2016-09-20 17:07:02 +0100434 spin_lock_init(&iboe->lock);
oulijun9a443532016-07-21 19:06:38 +0800435
436 ib_dev = &hr_dev->ib_dev;
Lijun Ou3b5184b2016-11-29 23:10:30 +0000437 strlcpy(ib_dev->name, "hns_%d", IB_DEVICE_NAME_MAX);
oulijun9a443532016-07-21 19:06:38 +0800438
439 ib_dev->owner = THIS_MODULE;
440 ib_dev->node_type = RDMA_NODE_IB_CA;
Bart Van Asschefecd02e2017-01-20 13:04:18 -0800441 ib_dev->dev.parent = dev;
oulijun9a443532016-07-21 19:06:38 +0800442
443 ib_dev->phys_port_cnt = hr_dev->caps.num_ports;
444 ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey;
445 ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors;
446 ib_dev->uverbs_abi_ver = 1;
447 ib_dev->uverbs_cmd_mask =
448 (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) |
449 (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) |
450 (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) |
451 (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) |
452 (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) |
453 (1ULL << IB_USER_VERBS_CMD_REG_MR) |
454 (1ULL << IB_USER_VERBS_CMD_DEREG_MR) |
455 (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
456 (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) |
457 (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) |
458 (1ULL << IB_USER_VERBS_CMD_CREATE_QP) |
459 (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) |
460 (1ULL << IB_USER_VERBS_CMD_QUERY_QP) |
461 (1ULL << IB_USER_VERBS_CMD_DESTROY_QP);
462
463 /* HCA||device||port */
464 ib_dev->modify_device = hns_roce_modify_device;
465 ib_dev->query_device = hns_roce_query_device;
466 ib_dev->query_port = hns_roce_query_port;
467 ib_dev->modify_port = hns_roce_modify_port;
468 ib_dev->get_link_layer = hns_roce_get_link_layer;
Lijun Ou2eefca22016-09-15 23:48:06 +0100469 ib_dev->get_netdev = hns_roce_get_netdev;
oulijun9a443532016-07-21 19:06:38 +0800470 ib_dev->query_gid = hns_roce_query_gid;
Shaobo Xu82547462016-11-23 19:41:08 +0000471 ib_dev->add_gid = hns_roce_add_gid;
472 ib_dev->del_gid = hns_roce_del_gid;
oulijun9a443532016-07-21 19:06:38 +0800473 ib_dev->query_pkey = hns_roce_query_pkey;
474 ib_dev->alloc_ucontext = hns_roce_alloc_ucontext;
475 ib_dev->dealloc_ucontext = hns_roce_dealloc_ucontext;
476 ib_dev->mmap = hns_roce_mmap;
477
478 /* PD */
479 ib_dev->alloc_pd = hns_roce_alloc_pd;
480 ib_dev->dealloc_pd = hns_roce_dealloc_pd;
481
482 /* AH */
483 ib_dev->create_ah = hns_roce_create_ah;
484 ib_dev->query_ah = hns_roce_query_ah;
485 ib_dev->destroy_ah = hns_roce_destroy_ah;
486
487 /* QP */
488 ib_dev->create_qp = hns_roce_create_qp;
489 ib_dev->modify_qp = hns_roce_modify_qp;
490 ib_dev->query_qp = hr_dev->hw->query_qp;
491 ib_dev->destroy_qp = hr_dev->hw->destroy_qp;
492 ib_dev->post_send = hr_dev->hw->post_send;
493 ib_dev->post_recv = hr_dev->hw->post_recv;
494
495 /* CQ */
496 ib_dev->create_cq = hns_roce_ib_create_cq;
497 ib_dev->destroy_cq = hns_roce_ib_destroy_cq;
498 ib_dev->req_notify_cq = hr_dev->hw->req_notify_cq;
499 ib_dev->poll_cq = hr_dev->hw->poll_cq;
500
501 /* MR */
502 ib_dev->get_dma_mr = hns_roce_get_dma_mr;
503 ib_dev->reg_user_mr = hns_roce_reg_user_mr;
504 ib_dev->dereg_mr = hns_roce_dereg_mr;
505
506 /* OTHERS */
507 ib_dev->get_port_immutable = hns_roce_port_immutable;
508
509 ret = ib_register_device(ib_dev, NULL);
510 if (ret) {
511 dev_err(dev, "ib_register_device failed!\n");
512 return ret;
513 }
514
Shaobo Xu82547462016-11-23 19:41:08 +0000515 ret = hns_roce_setup_mtu_mac(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800516 if (ret) {
Shaobo Xu82547462016-11-23 19:41:08 +0000517 dev_err(dev, "setup_mtu_mac failed!\n");
518 goto error_failed_setup_mtu_mac;
oulijun9a443532016-07-21 19:06:38 +0800519 }
520
oulijun9a443532016-07-21 19:06:38 +0800521 iboe->nb.notifier_call = hns_roce_netdev_event;
522 ret = register_netdevice_notifier(&iboe->nb);
523 if (ret) {
524 dev_err(dev, "register_netdevice_notifier failed!\n");
Shaobo Xu82547462016-11-23 19:41:08 +0000525 goto error_failed_setup_mtu_mac;
oulijun9a443532016-07-21 19:06:38 +0800526 }
527
528 return 0;
529
Shaobo Xu82547462016-11-23 19:41:08 +0000530error_failed_setup_mtu_mac:
oulijun9a443532016-07-21 19:06:38 +0800531 ib_unregister_device(ib_dev);
532
533 return ret;
534}
535
oulijun9a443532016-07-21 19:06:38 +0800536static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
537{
538 int ret;
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800539 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800540
541 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table,
542 HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz,
543 hr_dev->caps.num_mtt_segs, 1);
544 if (ret) {
545 dev_err(dev, "Failed to init MTT context memory, aborting.\n");
546 return ret;
547 }
548
Shaobo Xu9766edc2017-08-30 17:23:09 +0800549 if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE)) {
550 ret = hns_roce_init_hem_table(hr_dev,
551 &hr_dev->mr_table.mtt_cqe_table,
552 HEM_TYPE_CQE, hr_dev->caps.mtt_entry_sz,
553 hr_dev->caps.num_cqe_segs, 1);
554 if (ret) {
555 dev_err(dev, "Failed to init MTT CQE context memory, aborting.\n");
556 goto err_unmap_cqe;
557 }
558 }
559
oulijun9a443532016-07-21 19:06:38 +0800560 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,
561 HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,
562 hr_dev->caps.num_mtpts, 1);
563 if (ret) {
564 dev_err(dev, "Failed to init MTPT context memory, aborting.\n");
565 goto err_unmap_mtt;
566 }
567
568 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table,
569 HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz,
570 hr_dev->caps.num_qps, 1);
571 if (ret) {
572 dev_err(dev, "Failed to init QP context memory, aborting.\n");
573 goto err_unmap_dmpt;
574 }
575
576 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table,
577 HEM_TYPE_IRRL,
578 hr_dev->caps.irrl_entry_sz *
579 hr_dev->caps.max_qp_init_rdma,
580 hr_dev->caps.num_qps, 1);
581 if (ret) {
582 dev_err(dev, "Failed to init irrl_table memory, aborting.\n");
583 goto err_unmap_qp;
584 }
585
586 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table,
587 HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz,
588 hr_dev->caps.num_cqs, 1);
589 if (ret) {
590 dev_err(dev, "Failed to init CQ context memory, aborting.\n");
591 goto err_unmap_irrl;
592 }
593
594 return 0;
595
596err_unmap_irrl:
597 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
598
599err_unmap_qp:
600 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
601
602err_unmap_dmpt:
603 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
604
605err_unmap_mtt:
606 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
Shaobo Xu9766edc2017-08-30 17:23:09 +0800607 if (hns_roce_check_whether_mhop(hr_dev, HEM_TYPE_CQE))
608 hns_roce_cleanup_hem_table(hr_dev,
609 &hr_dev->mr_table.mtt_cqe_table);
610
611err_unmap_cqe:
612 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
oulijun9a443532016-07-21 19:06:38 +0800613
614 return ret;
615}
616
617/**
Salile84e40be2016-11-23 19:41:09 +0000618 * hns_roce_setup_hca - setup host channel adapter
619 * @hr_dev: pointer to hns roce device
620 * Return : int
621 */
oulijun9a443532016-07-21 19:06:38 +0800622static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)
623{
624 int ret;
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800625 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800626
627 spin_lock_init(&hr_dev->sm_lock);
oulijun9a443532016-07-21 19:06:38 +0800628 spin_lock_init(&hr_dev->bt_cmd_lock);
629
630 ret = hns_roce_init_uar_table(hr_dev);
631 if (ret) {
632 dev_err(dev, "Failed to initialize uar table. aborting\n");
633 return ret;
634 }
635
636 ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar);
637 if (ret) {
638 dev_err(dev, "Failed to allocate priv_uar.\n");
639 goto err_uar_table_free;
640 }
641
642 ret = hns_roce_init_pd_table(hr_dev);
643 if (ret) {
644 dev_err(dev, "Failed to init protected domain table.\n");
645 goto err_uar_alloc_free;
646 }
647
648 ret = hns_roce_init_mr_table(hr_dev);
649 if (ret) {
650 dev_err(dev, "Failed to init memory region table.\n");
651 goto err_pd_table_free;
652 }
653
654 ret = hns_roce_init_cq_table(hr_dev);
655 if (ret) {
656 dev_err(dev, "Failed to init completion queue table.\n");
657 goto err_mr_table_free;
658 }
659
660 ret = hns_roce_init_qp_table(hr_dev);
661 if (ret) {
662 dev_err(dev, "Failed to init queue pair table.\n");
663 goto err_cq_table_free;
664 }
665
666 return 0;
667
668err_cq_table_free:
669 hns_roce_cleanup_cq_table(hr_dev);
670
671err_mr_table_free:
672 hns_roce_cleanup_mr_table(hr_dev);
673
674err_pd_table_free:
675 hns_roce_cleanup_pd_table(hr_dev);
676
677err_uar_alloc_free:
678 hns_roce_uar_free(hr_dev, &hr_dev->priv_uar);
679
680err_uar_table_free:
681 hns_roce_cleanup_uar_table(hr_dev);
682 return ret;
683}
684
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800685int hns_roce_init(struct hns_roce_dev *hr_dev)
oulijun9a443532016-07-21 19:06:38 +0800686{
687 int ret;
Wei Hu(Xavier)13ca9702017-08-30 17:23:02 +0800688 struct device *dev = hr_dev->dev;
oulijun9a443532016-07-21 19:06:38 +0800689
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800690 if (hr_dev->hw->reset) {
691 ret = hr_dev->hw->reset(hr_dev, true);
692 if (ret) {
693 dev_err(dev, "Reset RoCE engine failed!\n");
694 return ret;
695 }
oulijun9a443532016-07-21 19:06:38 +0800696 }
697
Wei Hu(Xavier)a04ff732017-08-30 17:23:03 +0800698 if (hr_dev->hw->cmq_init) {
699 ret = hr_dev->hw->cmq_init(hr_dev);
700 if (ret) {
701 dev_err(dev, "Init RoCE Command Queue failed!\n");
702 goto error_failed_cmq_init;
703 }
704 }
705
Wei Hu(Xavier)cfc85f32017-08-30 17:23:04 +0800706 ret = hr_dev->hw->hw_profile(hr_dev);
707 if (ret) {
708 dev_err(dev, "Get RoCE engine profile failed!\n");
709 goto error_failed_cmd_init;
710 }
oulijun9a443532016-07-21 19:06:38 +0800711
712 ret = hns_roce_cmd_init(hr_dev);
713 if (ret) {
714 dev_err(dev, "cmd init failed!\n");
715 goto error_failed_cmd_init;
716 }
717
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800718 if (hr_dev->cmd_mod) {
719 ret = hns_roce_init_eq_table(hr_dev);
720 if (ret) {
721 dev_err(dev, "eq init failed!\n");
722 goto error_failed_eq_table;
723 }
oulijun9a443532016-07-21 19:06:38 +0800724 }
725
726 if (hr_dev->cmd_mod) {
727 ret = hns_roce_cmd_use_events(hr_dev);
728 if (ret) {
729 dev_err(dev, "Switch to event-driven cmd failed!\n");
730 goto error_failed_use_event;
731 }
732 }
733
734 ret = hns_roce_init_hem(hr_dev);
735 if (ret) {
736 dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n");
737 goto error_failed_init_hem;
738 }
739
740 ret = hns_roce_setup_hca(hr_dev);
741 if (ret) {
742 dev_err(dev, "setup hca failed!\n");
743 goto error_failed_setup_hca;
744 }
745
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800746 if (hr_dev->hw->hw_init) {
747 ret = hr_dev->hw->hw_init(hr_dev);
748 if (ret) {
749 dev_err(dev, "hw_init failed!\n");
750 goto error_failed_engine_init;
751 }
oulijun9a443532016-07-21 19:06:38 +0800752 }
753
754 ret = hns_roce_register_device(hr_dev);
755 if (ret)
756 goto error_failed_register_device;
757
758 return 0;
759
760error_failed_register_device:
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800761 if (hr_dev->hw->hw_exit)
762 hr_dev->hw->hw_exit(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800763
764error_failed_engine_init:
765 hns_roce_cleanup_bitmap(hr_dev);
766
767error_failed_setup_hca:
768 hns_roce_cleanup_hem(hr_dev);
769
770error_failed_init_hem:
771 if (hr_dev->cmd_mod)
772 hns_roce_cmd_use_polling(hr_dev);
773
774error_failed_use_event:
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800775 if (hr_dev->cmd_mod)
776 hns_roce_cleanup_eq_table(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800777
778error_failed_eq_table:
779 hns_roce_cmd_cleanup(hr_dev);
780
781error_failed_cmd_init:
Wei Hu(Xavier)a04ff732017-08-30 17:23:03 +0800782 if (hr_dev->hw->cmq_exit)
783 hr_dev->hw->cmq_exit(hr_dev);
784
785error_failed_cmq_init:
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800786 if (hr_dev->hw->reset) {
787 ret = hr_dev->hw->reset(hr_dev, false);
788 if (ret)
789 dev_err(dev, "Dereset RoCE engine failed!\n");
790 }
oulijun9a443532016-07-21 19:06:38 +0800791
792 return ret;
793}
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800794EXPORT_SYMBOL_GPL(hns_roce_init);
oulijun9a443532016-07-21 19:06:38 +0800795
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800796void hns_roce_exit(struct hns_roce_dev *hr_dev)
oulijun9a443532016-07-21 19:06:38 +0800797{
oulijun9a443532016-07-21 19:06:38 +0800798 hns_roce_unregister_device(hr_dev);
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800799 if (hr_dev->hw->hw_exit)
800 hr_dev->hw->hw_exit(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800801 hns_roce_cleanup_bitmap(hr_dev);
802 hns_roce_cleanup_hem(hr_dev);
803
804 if (hr_dev->cmd_mod)
805 hns_roce_cmd_use_polling(hr_dev);
806
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800807 if (hr_dev->cmd_mod)
808 hns_roce_cleanup_eq_table(hr_dev);
oulijun9a443532016-07-21 19:06:38 +0800809 hns_roce_cmd_cleanup(hr_dev);
Wei Hu(Xavier)a04ff732017-08-30 17:23:03 +0800810 if (hr_dev->hw->cmq_exit)
811 hr_dev->hw->cmq_exit(hr_dev);
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800812 if (hr_dev->hw->reset)
813 hr_dev->hw->reset(hr_dev, false);
oulijun9a443532016-07-21 19:06:38 +0800814}
Wei Hu(Xavier)08805fd2017-08-30 17:22:59 +0800815EXPORT_SYMBOL_GPL(hns_roce_exit);
oulijun9a443532016-07-21 19:06:38 +0800816
817MODULE_LICENSE("Dual BSD/GPL");
818MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>");
819MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>");
820MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>");
821MODULE_DESCRIPTION("HNS RoCE Driver");