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Peter Ujfalusia53b8e32011-06-04 08:16:41 +03001/*
2 * twl-common.c
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc..
5 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/i2c.h>
24#include <linux/i2c/twl.h>
25#include <linux/gpio.h>
Peter Ujfalusib22f9542011-06-07 10:26:46 +030026#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030028
29#include <plat/i2c.h>
Peter Ujfalusib22f9542011-06-07 10:26:46 +030030#include <plat/usb.h>
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030031
32#include "twl-common.h"
Kevin Hilman46232a32011-11-23 14:43:01 -080033#include "pm.h"
Tero Kristo49c008e2012-02-20 12:26:08 +020034#include "voltage.h"
Kevin Hilman5941b812012-06-28 10:01:32 -070035#include "mux.h"
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030036
37static struct i2c_board_info __initdata pmic_i2c_board_info = {
38 .addr = 0x48,
39 .flags = I2C_CLIENT_WAKE,
40};
41
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030042static struct i2c_board_info __initdata omap4_i2c1_board_info[] = {
43 {
44 .addr = 0x48,
45 .flags = I2C_CLIENT_WAKE,
46 },
47 {
48 I2C_BOARD_INFO("twl6040", 0x4b),
49 },
50};
51
Peter Ujfalusida0085f2012-06-21 01:36:02 -070052#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
Tero Kristo49c008e2012-02-20 12:26:08 +020053static int twl_set_voltage(void *data, int target_uV)
54{
55 struct voltagedomain *voltdm = (struct voltagedomain *)data;
56 return voltdm_scale(voltdm, target_uV);
57}
58
59static int twl_get_voltage(void *data)
60{
61 struct voltagedomain *voltdm = (struct voltagedomain *)data;
62 return voltdm_get_voltage(voltdm);
63}
Peter Ujfalusida0085f2012-06-21 01:36:02 -070064#endif
Tero Kristo49c008e2012-02-20 12:26:08 +020065
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030066void __init omap_pmic_init(int bus, u32 clkrate,
67 const char *pmic_type, int pmic_irq,
68 struct twl4030_platform_data *pmic_data)
69{
70 strncpy(pmic_i2c_board_info.type, pmic_type,
71 sizeof(pmic_i2c_board_info.type));
72 pmic_i2c_board_info.irq = pmic_irq;
73 pmic_i2c_board_info.platform_data = pmic_data;
74
75 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
76}
Peter Ujfalusib22f9542011-06-07 10:26:46 +030077
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030078void __init omap4_pmic_init(const char *pmic_type,
79 struct twl4030_platform_data *pmic_data,
80 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
81{
82 /* PMIC part*/
Kevin Hilman5941b812012-06-28 10:01:32 -070083 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +030084 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
85 sizeof(omap4_i2c1_board_info[0].type));
86 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
87 omap4_i2c1_board_info[0].platform_data = pmic_data;
88
89 /* TWL6040 audio IC part */
90 omap4_i2c1_board_info[1].irq = twl6040_irq;
91 omap4_i2c1_board_info[1].platform_data = twl6040_data;
92
93 omap_register_i2c_bus(1, 400, omap4_i2c1_board_info, 2);
94
95}
96
Kevin Hilman46232a32011-11-23 14:43:01 -080097void __init omap_pmic_late_init(void)
98{
Masanari Iida260db902012-07-12 00:56:57 +090099 /* Init the OMAP TWL parameters (if PMIC has been registered) */
Peter Ujfalusi8eaeb932012-04-03 11:56:51 +0300100 if (pmic_i2c_board_info.irq)
101 omap3_twl_init();
102 if (omap4_i2c1_board_info[0].irq)
103 omap4_twl_init();
Kevin Hilman46232a32011-11-23 14:43:01 -0800104}
105
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300106#if defined(CONFIG_ARCH_OMAP3)
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300107static struct twl4030_usb_data omap3_usb_pdata = {
108 .usb_mode = T2_USB_MODE_ULPI,
109};
110
111static int omap3_batt_table[] = {
112/* 0 C */
11330800, 29500, 28300, 27100,
11426000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
11517200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
11611600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
1178020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
1185640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
1194040, 3910, 3790, 3670, 3550
120};
121
122static struct twl4030_bci_platform_data omap3_bci_pdata = {
123 .battery_tmp_tbl = omap3_batt_table,
124 .tblsize = ARRAY_SIZE(omap3_batt_table),
125};
126
127static struct twl4030_madc_platform_data omap3_madc_pdata = {
128 .irq_line = 1,
129};
130
Peter Ujfalusi4ae6df5e2011-05-31 15:21:13 +0300131static struct twl4030_codec_data omap3_codec;
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300132
Peter Ujfalusi4ae6df5e2011-05-31 15:21:13 +0300133static struct twl4030_audio_data omap3_audio_pdata = {
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300134 .audio_mclk = 26000000,
Peter Ujfalusi4ae6df5e2011-05-31 15:21:13 +0300135 .codec = &omap3_codec,
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +0300136};
137
Peter Ujfalusib252b0ef2011-06-07 11:38:24 +0300138static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
139 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
140};
141
142static struct regulator_init_data omap3_vdac_idata = {
143 .constraints = {
144 .min_uV = 1800000,
145 .max_uV = 1800000,
146 .valid_modes_mask = REGULATOR_MODE_NORMAL
147 | REGULATOR_MODE_STANDBY,
148 .valid_ops_mask = REGULATOR_CHANGE_MODE
149 | REGULATOR_CHANGE_STATUS,
150 },
151 .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies),
152 .consumer_supplies = omap3_vdda_dac_supplies,
153};
154
155static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
156 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
Tomi Valkeinen7c68dd92011-08-03 14:00:57 +0300157 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
Peter Ujfalusib252b0ef2011-06-07 11:38:24 +0300158};
159
160static struct regulator_init_data omap3_vpll2_idata = {
161 .constraints = {
162 .min_uV = 1800000,
163 .max_uV = 1800000,
164 .valid_modes_mask = REGULATOR_MODE_NORMAL
165 | REGULATOR_MODE_STANDBY,
166 .valid_ops_mask = REGULATOR_CHANGE_MODE
167 | REGULATOR_CHANGE_STATUS,
168 },
169 .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies),
170 .consumer_supplies = omap3_vpll2_supplies,
171};
172
Tero Kristo23e22a52012-02-20 12:26:07 +0200173static struct regulator_consumer_supply omap3_vdd1_supply[] = {
174 REGULATOR_SUPPLY("vcc", "mpu.0"),
175};
176
177static struct regulator_consumer_supply omap3_vdd2_supply[] = {
178 REGULATOR_SUPPLY("vcc", "l3_main.0"),
179};
180
181static struct regulator_init_data omap3_vdd1 = {
182 .constraints = {
183 .name = "vdd_mpu_iva",
184 .min_uV = 600000,
185 .max_uV = 1450000,
186 .valid_modes_mask = REGULATOR_MODE_NORMAL,
187 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
188 },
189 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd1_supply),
190 .consumer_supplies = omap3_vdd1_supply,
191};
192
193static struct regulator_init_data omap3_vdd2 = {
194 .constraints = {
195 .name = "vdd_core",
196 .min_uV = 600000,
197 .max_uV = 1450000,
198 .valid_modes_mask = REGULATOR_MODE_NORMAL,
199 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
200 },
201 .num_consumer_supplies = ARRAY_SIZE(omap3_vdd2_supply),
202 .consumer_supplies = omap3_vdd2_supply,
203};
204
Tero Kristo49c008e2012-02-20 12:26:08 +0200205static struct twl_regulator_driver_data omap3_vdd1_drvdata = {
206 .get_voltage = twl_get_voltage,
207 .set_voltage = twl_set_voltage,
208};
209
210static struct twl_regulator_driver_data omap3_vdd2_drvdata = {
211 .get_voltage = twl_get_voltage,
212 .set_voltage = twl_set_voltage,
213};
214
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300215void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
216 u32 pdata_flags, u32 regulators_flags)
217{
Tero Kristo49c008e2012-02-20 12:26:08 +0200218 if (!pmic_data->vdd1) {
219 omap3_vdd1.driver_data = &omap3_vdd1_drvdata;
220 omap3_vdd1_drvdata.data = voltdm_lookup("mpu_iva");
Tero Kristo23e22a52012-02-20 12:26:07 +0200221 pmic_data->vdd1 = &omap3_vdd1;
Tero Kristo49c008e2012-02-20 12:26:08 +0200222 }
223 if (!pmic_data->vdd2) {
224 omap3_vdd2.driver_data = &omap3_vdd2_drvdata;
225 omap3_vdd2_drvdata.data = voltdm_lookup("core");
Tero Kristo23e22a52012-02-20 12:26:07 +0200226 pmic_data->vdd2 = &omap3_vdd2;
Tero Kristo49c008e2012-02-20 12:26:08 +0200227 }
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300228
229 /* Common platform data configurations */
230 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
231 pmic_data->usb = &omap3_usb_pdata;
232
233 if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
234 pmic_data->bci = &omap3_bci_pdata;
235
236 if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
237 pmic_data->madc = &omap3_madc_pdata;
238
239 if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
240 pmic_data->audio = &omap3_audio_pdata;
241
242 /* Common regulator configurations */
243 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
244 pmic_data->vdac = &omap3_vdac_idata;
245
246 if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
247 pmic_data->vpll2 = &omap3_vpll2_idata;
248}
249#endif /* CONFIG_ARCH_OMAP3 */
250
251#if defined(CONFIG_ARCH_OMAP4)
252static struct twl4030_usb_data omap4_usb_pdata = {
253 .phy_init = omap4430_phy_init,
254 .phy_exit = omap4430_phy_exit,
255 .phy_power = omap4430_phy_power,
256 .phy_set_clock = omap4430_phy_set_clk,
257 .phy_suspend = omap4430_phy_suspend,
258};
259
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300260static struct regulator_init_data omap4_vdac_idata = {
261 .constraints = {
262 .min_uV = 1800000,
263 .max_uV = 1800000,
264 .valid_modes_mask = REGULATOR_MODE_NORMAL
265 | REGULATOR_MODE_STANDBY,
266 .valid_ops_mask = REGULATOR_CHANGE_MODE
267 | REGULATOR_CHANGE_STATUS,
268 },
Peter Ujfalusifde01902012-05-09 14:19:16 -0700269 .supply_regulator = "V2V1",
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300270};
271
272static struct regulator_init_data omap4_vaux2_idata = {
273 .constraints = {
274 .min_uV = 1200000,
275 .max_uV = 2800000,
276 .apply_uV = true,
277 .valid_modes_mask = REGULATOR_MODE_NORMAL
278 | REGULATOR_MODE_STANDBY,
279 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
280 | REGULATOR_CHANGE_MODE
281 | REGULATOR_CHANGE_STATUS,
282 },
283};
284
285static struct regulator_init_data omap4_vaux3_idata = {
286 .constraints = {
287 .min_uV = 1000000,
288 .max_uV = 3000000,
289 .apply_uV = true,
290 .valid_modes_mask = REGULATOR_MODE_NORMAL
291 | REGULATOR_MODE_STANDBY,
292 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
293 | REGULATOR_CHANGE_MODE
294 | REGULATOR_CHANGE_STATUS,
295 },
296};
297
298static struct regulator_consumer_supply omap4_vmmc_supply[] = {
299 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
300};
301
302/* VMMC1 for MMC1 card */
303static struct regulator_init_data omap4_vmmc_idata = {
304 .constraints = {
305 .min_uV = 1200000,
306 .max_uV = 3000000,
307 .apply_uV = true,
308 .valid_modes_mask = REGULATOR_MODE_NORMAL
309 | REGULATOR_MODE_STANDBY,
310 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
311 | REGULATOR_CHANGE_MODE
312 | REGULATOR_CHANGE_STATUS,
313 },
314 .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply),
315 .consumer_supplies = omap4_vmmc_supply,
316};
317
318static struct regulator_init_data omap4_vpp_idata = {
319 .constraints = {
320 .min_uV = 1800000,
321 .max_uV = 2500000,
322 .apply_uV = true,
323 .valid_modes_mask = REGULATOR_MODE_NORMAL
324 | REGULATOR_MODE_STANDBY,
325 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
326 | REGULATOR_CHANGE_MODE
327 | REGULATOR_CHANGE_STATUS,
328 },
329};
330
331static struct regulator_init_data omap4_vana_idata = {
332 .constraints = {
333 .min_uV = 2100000,
334 .max_uV = 2100000,
335 .valid_modes_mask = REGULATOR_MODE_NORMAL
336 | REGULATOR_MODE_STANDBY,
337 .valid_ops_mask = REGULATOR_CHANGE_MODE
338 | REGULATOR_CHANGE_STATUS,
339 },
340};
341
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300342static struct regulator_consumer_supply omap4_vcxio_supply[] = {
343 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dss"),
344 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.0"),
345 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi.1"),
346};
347
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300348static struct regulator_init_data omap4_vcxio_idata = {
349 .constraints = {
350 .min_uV = 1800000,
351 .max_uV = 1800000,
352 .valid_modes_mask = REGULATOR_MODE_NORMAL
353 | REGULATOR_MODE_STANDBY,
354 .valid_ops_mask = REGULATOR_CHANGE_MODE
355 | REGULATOR_CHANGE_STATUS,
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300356 .always_on = true,
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300357 },
Tomi Valkeinen4e6a0ab2011-08-03 14:13:52 +0300358 .num_consumer_supplies = ARRAY_SIZE(omap4_vcxio_supply),
359 .consumer_supplies = omap4_vcxio_supply,
Peter Ujfalusifde01902012-05-09 14:19:16 -0700360 .supply_regulator = "V2V1",
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300361};
362
363static struct regulator_init_data omap4_vusb_idata = {
364 .constraints = {
365 .min_uV = 3300000,
366 .max_uV = 3300000,
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300367 .valid_modes_mask = REGULATOR_MODE_NORMAL
368 | REGULATOR_MODE_STANDBY,
369 .valid_ops_mask = REGULATOR_CHANGE_MODE
370 | REGULATOR_CHANGE_STATUS,
371 },
372};
373
374static struct regulator_init_data omap4_clk32kg_idata = {
375 .constraints = {
376 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
377 },
378};
379
Tero Kristoe160dda2012-02-22 12:40:40 +0200380static struct regulator_consumer_supply omap4_vdd1_supply[] = {
381 REGULATOR_SUPPLY("vcc", "mpu.0"),
382};
383
384static struct regulator_consumer_supply omap4_vdd2_supply[] = {
385 REGULATOR_SUPPLY("vcc", "iva.0"),
386};
387
388static struct regulator_consumer_supply omap4_vdd3_supply[] = {
389 REGULATOR_SUPPLY("vcc", "l3_main.0"),
390};
391
392static struct regulator_init_data omap4_vdd1 = {
393 .constraints = {
394 .name = "vdd_mpu",
395 .min_uV = 500000,
396 .max_uV = 1500000,
397 .valid_modes_mask = REGULATOR_MODE_NORMAL,
398 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
399 },
400 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd1_supply),
401 .consumer_supplies = omap4_vdd1_supply,
402};
403
404static struct regulator_init_data omap4_vdd2 = {
405 .constraints = {
406 .name = "vdd_iva",
407 .min_uV = 500000,
408 .max_uV = 1500000,
409 .valid_modes_mask = REGULATOR_MODE_NORMAL,
410 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
411 },
412 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd2_supply),
413 .consumer_supplies = omap4_vdd2_supply,
414};
415
416static struct regulator_init_data omap4_vdd3 = {
417 .constraints = {
418 .name = "vdd_core",
419 .min_uV = 500000,
420 .max_uV = 1500000,
421 .valid_modes_mask = REGULATOR_MODE_NORMAL,
422 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
423 },
424 .num_consumer_supplies = ARRAY_SIZE(omap4_vdd3_supply),
425 .consumer_supplies = omap4_vdd3_supply,
426};
427
428
429static struct twl_regulator_driver_data omap4_vdd1_drvdata = {
430 .get_voltage = twl_get_voltage,
431 .set_voltage = twl_set_voltage,
432};
433
434static struct twl_regulator_driver_data omap4_vdd2_drvdata = {
435 .get_voltage = twl_get_voltage,
436 .set_voltage = twl_set_voltage,
437};
438
439static struct twl_regulator_driver_data omap4_vdd3_drvdata = {
440 .get_voltage = twl_get_voltage,
441 .set_voltage = twl_set_voltage,
442};
443
Peter Ujfalusifde01902012-05-09 14:19:16 -0700444static struct regulator_consumer_supply omap4_v1v8_supply[] = {
445 REGULATOR_SUPPLY("vio", "1-004b"),
446};
447
448static struct regulator_init_data omap4_v1v8_idata = {
449 .constraints = {
450 .min_uV = 1800000,
451 .max_uV = 1800000,
452 .valid_modes_mask = REGULATOR_MODE_NORMAL
453 | REGULATOR_MODE_STANDBY,
454 .valid_ops_mask = REGULATOR_CHANGE_MODE
455 | REGULATOR_CHANGE_STATUS,
456 .always_on = true,
457 },
458 .num_consumer_supplies = ARRAY_SIZE(omap4_v1v8_supply),
459 .consumer_supplies = omap4_v1v8_supply,
460};
461
462static struct regulator_consumer_supply omap4_v2v1_supply[] = {
463 REGULATOR_SUPPLY("v2v1", "1-004b"),
464};
465
466static struct regulator_init_data omap4_v2v1_idata = {
467 .constraints = {
468 .min_uV = 2100000,
469 .max_uV = 2100000,
470 .valid_modes_mask = REGULATOR_MODE_NORMAL
471 | REGULATOR_MODE_STANDBY,
472 .valid_ops_mask = REGULATOR_CHANGE_MODE
473 | REGULATOR_CHANGE_STATUS,
474 },
475 .num_consumer_supplies = ARRAY_SIZE(omap4_v2v1_supply),
476 .consumer_supplies = omap4_v2v1_supply,
477};
478
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300479void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
480 u32 pdata_flags, u32 regulators_flags)
481{
Tero Kristoe160dda2012-02-22 12:40:40 +0200482 if (!pmic_data->vdd1) {
483 omap4_vdd1.driver_data = &omap4_vdd1_drvdata;
484 omap4_vdd1_drvdata.data = voltdm_lookup("mpu");
485 pmic_data->vdd1 = &omap4_vdd1;
486 }
487
488 if (!pmic_data->vdd2) {
489 omap4_vdd2.driver_data = &omap4_vdd2_drvdata;
490 omap4_vdd2_drvdata.data = voltdm_lookup("iva");
491 pmic_data->vdd2 = &omap4_vdd2;
492 }
493
494 if (!pmic_data->vdd3) {
495 omap4_vdd3.driver_data = &omap4_vdd3_drvdata;
496 omap4_vdd3_drvdata.data = voltdm_lookup("core");
497 pmic_data->vdd3 = &omap4_vdd3;
498 }
499
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300500 /* Common platform data configurations */
501 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
502 pmic_data->usb = &omap4_usb_pdata;
503
504 /* Common regulator configurations */
505 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
506 pmic_data->vdac = &omap4_vdac_idata;
507
508 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
509 pmic_data->vaux2 = &omap4_vaux2_idata;
510
511 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
512 pmic_data->vaux3 = &omap4_vaux3_idata;
513
514 if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
515 pmic_data->vmmc = &omap4_vmmc_idata;
516
517 if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
518 pmic_data->vpp = &omap4_vpp_idata;
519
520 if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
521 pmic_data->vana = &omap4_vana_idata;
522
523 if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
524 pmic_data->vcxio = &omap4_vcxio_idata;
525
526 if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
527 pmic_data->vusb = &omap4_vusb_idata;
528
529 if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
530 !pmic_data->clk32kg)
531 pmic_data->clk32kg = &omap4_clk32kg_idata;
Peter Ujfalusifde01902012-05-09 14:19:16 -0700532
533 if (regulators_flags & TWL_COMMON_REGULATOR_V1V8 && !pmic_data->v1v8)
534 pmic_data->v1v8 = &omap4_v1v8_idata;
535
536 if (regulators_flags & TWL_COMMON_REGULATOR_V2V1 && !pmic_data->v2v1)
537 pmic_data->v2v1 = &omap4_v2v1_idata;
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300538}
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300539#endif /* CONFIG_ARCH_OMAP4 */