blob: 7a03bea48a9ad36870a56868c7798d8ce1fc67cb [file] [log] [blame]
Jeeja KPe4e2d2f2015-10-07 11:31:52 +01001/*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/firmware.h>
22#include <sound/soc.h>
23#include <sound/soc-topology.h>
24#include "skl-sst-dsp.h"
25#include "skl-sst-ipc.h"
26#include "skl-topology.h"
27#include "skl.h"
28#include "skl-tplg-interface.h"
29
Jeeja KPf7590d42015-10-07 11:31:53 +010030#define SKL_CH_FIXUP_MASK (1 << 0)
31#define SKL_RATE_FIXUP_MASK (1 << 1)
32#define SKL_FMT_FIXUP_MASK (1 << 2)
33
Jeeja KPe4e2d2f2015-10-07 11:31:52 +010034/*
35 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
36 * ignore. This helpers checks if the SKL driver handles this widget type
37 */
38static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
39{
40 switch (w->id) {
41 case snd_soc_dapm_dai_link:
42 case snd_soc_dapm_dai_in:
43 case snd_soc_dapm_aif_in:
44 case snd_soc_dapm_aif_out:
45 case snd_soc_dapm_dai_out:
46 case snd_soc_dapm_switch:
47 return false;
48 default:
49 return true;
50 }
51}
52
53/*
54 * Each pipelines needs memory to be allocated. Check if we have free memory
55 * from available pool. Then only add this to pool
56 * This is freed when pipe is deleted
57 * Note: DSP does actual memory management we only keep track for complete
58 * pool
59 */
60static bool skl_tplg_alloc_pipe_mem(struct skl *skl,
61 struct skl_module_cfg *mconfig)
62{
63 struct skl_sst *ctx = skl->skl_sst;
64
65 if (skl->resource.mem + mconfig->pipe->memory_pages >
66 skl->resource.max_mem) {
67 dev_err(ctx->dev,
68 "%s: module_id %d instance %d\n", __func__,
69 mconfig->id.module_id,
70 mconfig->id.instance_id);
71 dev_err(ctx->dev,
72 "exceeds ppl memory available %d mem %d\n",
73 skl->resource.max_mem, skl->resource.mem);
74 return false;
75 }
76
77 skl->resource.mem += mconfig->pipe->memory_pages;
78 return true;
79}
80
81/*
82 * Pipeline needs needs DSP CPU resources for computation, this is
83 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
84 *
85 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
86 * pipe. This adds the mcps to driver counter
87 * This is removed on pipeline delete
88 */
89static bool skl_tplg_alloc_pipe_mcps(struct skl *skl,
90 struct skl_module_cfg *mconfig)
91{
92 struct skl_sst *ctx = skl->skl_sst;
93
94 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
95 dev_err(ctx->dev,
96 "%s: module_id %d instance %d\n", __func__,
97 mconfig->id.module_id, mconfig->id.instance_id);
98 dev_err(ctx->dev,
99 "exceeds ppl memory available %d > mem %d\n",
100 skl->resource.max_mcps, skl->resource.mcps);
101 return false;
102 }
103
104 skl->resource.mcps += mconfig->mcps;
105 return true;
106}
107
108/*
109 * Free the mcps when tearing down
110 */
111static void
112skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
113{
114 skl->resource.mcps -= mconfig->mcps;
115}
116
117/*
118 * Free the memory when tearing down
119 */
120static void
121skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
122{
123 skl->resource.mem -= mconfig->pipe->memory_pages;
124}
125
Jeeja KPf7590d42015-10-07 11:31:53 +0100126
127static void skl_dump_mconfig(struct skl_sst *ctx,
128 struct skl_module_cfg *mcfg)
129{
130 dev_dbg(ctx->dev, "Dumping config\n");
131 dev_dbg(ctx->dev, "Input Format:\n");
Hardik T Shah4cd98992015-10-27 09:22:55 +0900132 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels);
133 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq);
134 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg);
135 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth);
Jeeja KPf7590d42015-10-07 11:31:53 +0100136 dev_dbg(ctx->dev, "Output Format:\n");
Hardik T Shah4cd98992015-10-27 09:22:55 +0900137 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels);
138 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq);
139 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth);
140 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg);
Jeeja KPf7590d42015-10-07 11:31:53 +0100141}
142
143static void skl_tplg_update_params(struct skl_module_fmt *fmt,
144 struct skl_pipe_params *params, int fixup)
145{
146 if (fixup & SKL_RATE_FIXUP_MASK)
147 fmt->s_freq = params->s_freq;
148 if (fixup & SKL_CH_FIXUP_MASK)
149 fmt->channels = params->ch;
Jeeja KP98256f82015-11-23 22:26:25 +0530150 if (fixup & SKL_FMT_FIXUP_MASK) {
151 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
152
153 /*
154 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
155 * container so update bit depth accordingly
156 */
157 switch (fmt->valid_bit_depth) {
158 case SKL_DEPTH_16BIT:
159 fmt->bit_depth = fmt->valid_bit_depth;
160 break;
161
162 default:
163 fmt->bit_depth = SKL_DEPTH_32BIT;
164 break;
165 }
166 }
167
Jeeja KPf7590d42015-10-07 11:31:53 +0100168}
169
170/*
171 * A pipeline may have modules which impact the pcm parameters, like SRC,
172 * channel converter, format converter.
173 * We need to calculate the output params by applying the 'fixup'
174 * Topology will tell driver which type of fixup is to be applied by
175 * supplying the fixup mask, so based on that we calculate the output
176 *
177 * Now In FE the pcm hw_params is source/target format. Same is applicable
178 * for BE with its hw_params invoked.
179 * here based on FE, BE pipeline and direction we calculate the input and
180 * outfix and then apply that for a module
181 */
182static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
183 struct skl_pipe_params *params, bool is_fe)
184{
185 int in_fixup, out_fixup;
186 struct skl_module_fmt *in_fmt, *out_fmt;
187
Hardik T Shah4cd98992015-10-27 09:22:55 +0900188 /* Fixups will be applied to pin 0 only */
189 in_fmt = &m_cfg->in_fmt[0];
190 out_fmt = &m_cfg->out_fmt[0];
Jeeja KPf7590d42015-10-07 11:31:53 +0100191
192 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
193 if (is_fe) {
194 in_fixup = m_cfg->params_fixup;
195 out_fixup = (~m_cfg->converter) &
196 m_cfg->params_fixup;
197 } else {
198 out_fixup = m_cfg->params_fixup;
199 in_fixup = (~m_cfg->converter) &
200 m_cfg->params_fixup;
201 }
202 } else {
203 if (is_fe) {
204 out_fixup = m_cfg->params_fixup;
205 in_fixup = (~m_cfg->converter) &
206 m_cfg->params_fixup;
207 } else {
208 in_fixup = m_cfg->params_fixup;
209 out_fixup = (~m_cfg->converter) &
210 m_cfg->params_fixup;
211 }
212 }
213
214 skl_tplg_update_params(in_fmt, params, in_fixup);
215 skl_tplg_update_params(out_fmt, params, out_fixup);
216}
217
218/*
219 * A module needs input and output buffers, which are dependent upon pcm
220 * params, so once we have calculate params, we need buffer calculation as
221 * well.
222 */
223static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
224 struct skl_module_cfg *mcfg)
225{
226 int multiplier = 1;
Hardik T Shah4cd98992015-10-27 09:22:55 +0900227 struct skl_module_fmt *in_fmt, *out_fmt;
228
229
230 /* Since fixups is applied to pin 0 only, ibs, obs needs
231 * change for pin 0 only
232 */
233 in_fmt = &mcfg->in_fmt[0];
234 out_fmt = &mcfg->out_fmt[0];
Jeeja KPf7590d42015-10-07 11:31:53 +0100235
236 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
237 multiplier = 5;
Hardik T Shah4cd98992015-10-27 09:22:55 +0900238 mcfg->ibs = (in_fmt->s_freq / 1000) *
239 (mcfg->in_fmt->channels) *
240 (mcfg->in_fmt->bit_depth >> 3) *
Jeeja KPf7590d42015-10-07 11:31:53 +0100241 multiplier;
242
Hardik T Shah4cd98992015-10-27 09:22:55 +0900243 mcfg->obs = (mcfg->out_fmt->s_freq / 1000) *
244 (mcfg->out_fmt->channels) *
245 (mcfg->out_fmt->bit_depth >> 3) *
Jeeja KPf7590d42015-10-07 11:31:53 +0100246 multiplier;
247}
248
249static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
250 struct skl_sst *ctx)
251{
252 struct skl_module_cfg *m_cfg = w->priv;
253 struct skl_pipe_params *params = m_cfg->pipe->p_params;
254 int p_conn_type = m_cfg->pipe->conn_type;
255 bool is_fe;
256
257 if (!m_cfg->params_fixup)
258 return;
259
260 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
261 w->name);
262
263 skl_dump_mconfig(ctx, m_cfg);
264
265 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
266 is_fe = true;
267 else
268 is_fe = false;
269
270 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
271 skl_tplg_update_buffer_size(ctx, m_cfg);
272
273 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
274 w->name);
275
276 skl_dump_mconfig(ctx, m_cfg);
277}
278
Jeeja KPe4e2d2f2015-10-07 11:31:52 +0100279/*
280 * A pipe can have multiple modules, each of them will be a DAPM widget as
281 * well. While managing a pipeline we need to get the list of all the
282 * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps
283 * to get the SKL type widgets in that pipeline
284 */
285static int skl_tplg_alloc_pipe_widget(struct device *dev,
286 struct snd_soc_dapm_widget *w, struct skl_pipe *pipe)
287{
288 struct skl_module_cfg *src_module = NULL;
289 struct snd_soc_dapm_path *p = NULL;
290 struct skl_pipe_module *p_module = NULL;
291
292 p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL);
293 if (!p_module)
294 return -ENOMEM;
295
296 p_module->w = w;
297 list_add_tail(&p_module->node, &pipe->w_list);
298
299 snd_soc_dapm_widget_for_each_sink_path(w, p) {
300 if ((p->sink->priv == NULL)
301 && (!is_skl_dsp_widget_type(w)))
302 continue;
303
304 if ((p->sink->priv != NULL) && p->connect
305 && is_skl_dsp_widget_type(p->sink)) {
306
307 src_module = p->sink->priv;
308 if (pipe->ppl_id == src_module->pipe->ppl_id)
309 skl_tplg_alloc_pipe_widget(dev,
310 p->sink, pipe);
311 }
312 }
313 return 0;
314}
315
316/*
317 * Inside a pipe instance, we can have various modules. These modules need
318 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
319 * skl_init_module() routine, so invoke that for all modules in a pipeline
320 */
321static int
322skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
323{
324 struct skl_pipe_module *w_module;
325 struct snd_soc_dapm_widget *w;
326 struct skl_module_cfg *mconfig;
327 struct skl_sst *ctx = skl->skl_sst;
328 int ret = 0;
329
330 list_for_each_entry(w_module, &pipe->w_list, node) {
331 w = w_module->w;
332 mconfig = w->priv;
333
334 /* check resource available */
335 if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
336 return -ENOMEM;
337
Jeeja KPf7590d42015-10-07 11:31:53 +0100338 /*
339 * apply fix/conversion to module params based on
340 * FE/BE params
341 */
342 skl_tplg_update_module_params(w, ctx);
Jeeja KP9939a9c2015-11-28 15:01:47 +0530343 ret = skl_init_module(ctx, mconfig);
Jeeja KPe4e2d2f2015-10-07 11:31:52 +0100344 if (ret < 0)
345 return ret;
346 }
347
348 return 0;
349}
Vinod Kould93f8e52015-10-07 11:31:54 +0100350
351/*
352 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
353 * need create the pipeline. So we do following:
354 * - check the resources
355 * - Create the pipeline
356 * - Initialize the modules in pipeline
357 * - finally bind all modules together
358 */
359static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
360 struct skl *skl)
361{
362 int ret;
363 struct skl_module_cfg *mconfig = w->priv;
364 struct skl_pipe_module *w_module;
365 struct skl_pipe *s_pipe = mconfig->pipe;
366 struct skl_module_cfg *src_module = NULL, *dst_module;
367 struct skl_sst *ctx = skl->skl_sst;
368
369 /* check resource available */
370 if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
371 return -EBUSY;
372
373 if (!skl_tplg_alloc_pipe_mem(skl, mconfig))
374 return -ENOMEM;
375
376 /*
377 * Create a list of modules for pipe.
378 * This list contains modules from source to sink
379 */
380 ret = skl_create_pipeline(ctx, mconfig->pipe);
381 if (ret < 0)
382 return ret;
383
384 /*
385 * we create a w_list of all widgets in that pipe. This list is not
386 * freed on PMD event as widgets within a pipe are static. This
387 * saves us cycles to get widgets in pipe every time.
388 *
389 * So if we have already initialized all the widgets of a pipeline
390 * we skip, so check for list_empty and create the list if empty
391 */
392 if (list_empty(&s_pipe->w_list)) {
393 ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe);
394 if (ret < 0)
395 return ret;
396 }
397
398 /* Init all pipe modules from source to sink */
399 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
400 if (ret < 0)
401 return ret;
402
403 /* Bind modules from source to sink */
404 list_for_each_entry(w_module, &s_pipe->w_list, node) {
405 dst_module = w_module->w->priv;
406
407 if (src_module == NULL) {
408 src_module = dst_module;
409 continue;
410 }
411
412 ret = skl_bind_modules(ctx, src_module, dst_module);
413 if (ret < 0)
414 return ret;
415
416 src_module = dst_module;
417 }
418
419 return 0;
420}
421
Jeeja KP8724ff12015-10-27 09:22:52 +0900422static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
423 struct skl *skl,
424 struct skl_module_cfg *src_mconfig)
Vinod Kould93f8e52015-10-07 11:31:54 +0100425{
426 struct snd_soc_dapm_path *p;
Jeeja KP0ed95d72015-11-13 19:22:11 +0530427 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
Jeeja KP8724ff12015-10-27 09:22:52 +0900428 struct skl_module_cfg *sink_mconfig;
Vinod Kould93f8e52015-10-07 11:31:54 +0100429 struct skl_sst *ctx = skl->skl_sst;
Jeeja KP8724ff12015-10-27 09:22:52 +0900430 int ret;
Vinod Kould93f8e52015-10-07 11:31:54 +0100431
Jeeja KP8724ff12015-10-27 09:22:52 +0900432 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Kould93f8e52015-10-07 11:31:54 +0100433 if (!p->connect)
434 continue;
435
436 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
437 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
438
Jeeja KP0ed95d72015-11-13 19:22:11 +0530439 next_sink = p->sink;
Vinod Kould93f8e52015-10-07 11:31:54 +0100440 /*
441 * here we will check widgets in sink pipelines, so that
442 * can be any widgets type and we are only interested if
443 * they are ones used for SKL so check that first
444 */
445 if ((p->sink->priv != NULL) &&
446 is_skl_dsp_widget_type(p->sink)) {
447
448 sink = p->sink;
Vinod Kould93f8e52015-10-07 11:31:54 +0100449 sink_mconfig = sink->priv;
450
451 /* Bind source to sink, mixin is always source */
452 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
453 if (ret)
454 return ret;
455
456 /* Start sinks pipe first */
457 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
Jeeja KPd1730c32015-10-27 09:22:53 +0900458 if (sink_mconfig->pipe->conn_type !=
459 SKL_PIPE_CONN_TYPE_FE)
460 ret = skl_run_pipe(ctx,
461 sink_mconfig->pipe);
Vinod Kould93f8e52015-10-07 11:31:54 +0100462 if (ret)
463 return ret;
464 }
Vinod Kould93f8e52015-10-07 11:31:54 +0100465 }
466 }
467
Jeeja KP8724ff12015-10-27 09:22:52 +0900468 if (!sink)
Jeeja KP0ed95d72015-11-13 19:22:11 +0530469 return skl_tplg_bind_sinks(next_sink, skl, src_mconfig);
Jeeja KP8724ff12015-10-27 09:22:52 +0900470
471 return 0;
472}
473
474/*
475 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
476 * we need to do following:
477 * - Bind to sink pipeline
478 * Since the sink pipes can be running and we don't get mixer event on
479 * connect for already running mixer, we need to find the sink pipes
480 * here and bind to them. This way dynamic connect works.
481 * - Start sink pipeline, if not running
482 * - Then run current pipe
483 */
484static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
485 struct skl *skl)
486{
487 struct skl_module_cfg *src_mconfig;
488 struct skl_sst *ctx = skl->skl_sst;
489 int ret = 0;
490
491 src_mconfig = w->priv;
492
493 /*
494 * find which sink it is connected to, bind with the sink,
495 * if sink is not started, start sink pipe first, then start
496 * this pipe
497 */
498 ret = skl_tplg_bind_sinks(w, skl, src_mconfig);
499 if (ret)
500 return ret;
501
Vinod Kould93f8e52015-10-07 11:31:54 +0100502 /* Start source pipe last after starting all sinks */
Jeeja KPd1730c32015-10-27 09:22:53 +0900503 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
504 return skl_run_pipe(ctx, src_mconfig->pipe);
Vinod Kould93f8e52015-10-07 11:31:54 +0100505
506 return 0;
507}
508
Jeeja KP8724ff12015-10-27 09:22:52 +0900509static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
510 struct snd_soc_dapm_widget *w, struct skl *skl)
511{
512 struct snd_soc_dapm_path *p;
513 struct snd_soc_dapm_widget *src_w = NULL;
514 struct skl_sst *ctx = skl->skl_sst;
515
516 snd_soc_dapm_widget_for_each_source_path(w, p) {
517 src_w = p->source;
518 if (!p->connect)
519 continue;
520
521 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
522 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
523
524 /*
525 * here we will check widgets in sink pipelines, so that can
526 * be any widgets type and we are only interested if they are
527 * ones used for SKL so check that first
528 */
529 if ((p->source->priv != NULL) &&
530 is_skl_dsp_widget_type(p->source)) {
531 return p->source;
532 }
533 }
534
535 if (src_w != NULL)
536 return skl_get_src_dsp_widget(src_w, skl);
537
538 return NULL;
539}
540
Vinod Kould93f8e52015-10-07 11:31:54 +0100541/*
542 * in the Post-PMU event of mixer we need to do following:
543 * - Check if this pipe is running
544 * - if not, then
545 * - bind this pipeline to its source pipeline
546 * if source pipe is already running, this means it is a dynamic
547 * connection and we need to bind only to that pipe
548 * - start this pipeline
549 */
550static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
551 struct skl *skl)
552{
553 int ret = 0;
Vinod Kould93f8e52015-10-07 11:31:54 +0100554 struct snd_soc_dapm_widget *source, *sink;
555 struct skl_module_cfg *src_mconfig, *sink_mconfig;
556 struct skl_sst *ctx = skl->skl_sst;
557 int src_pipe_started = 0;
558
559 sink = w;
560 sink_mconfig = sink->priv;
561
562 /*
563 * If source pipe is already started, that means source is driving
564 * one more sink before this sink got connected, Since source is
565 * started, bind this sink to source and start this pipe.
566 */
Jeeja KP8724ff12015-10-27 09:22:52 +0900567 source = skl_get_src_dsp_widget(w, skl);
568 if (source != NULL) {
569 src_mconfig = source->priv;
570 sink_mconfig = sink->priv;
571 src_pipe_started = 1;
Vinod Kould93f8e52015-10-07 11:31:54 +0100572
573 /*
Jeeja KP8724ff12015-10-27 09:22:52 +0900574 * check pipe state, then no need to bind or start the
575 * pipe
Vinod Kould93f8e52015-10-07 11:31:54 +0100576 */
Jeeja KP8724ff12015-10-27 09:22:52 +0900577 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
578 src_pipe_started = 0;
Vinod Kould93f8e52015-10-07 11:31:54 +0100579 }
580
581 if (src_pipe_started) {
582 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
583 if (ret)
584 return ret;
585
Jeeja KPd1730c32015-10-27 09:22:53 +0900586 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
587 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
Vinod Kould93f8e52015-10-07 11:31:54 +0100588 }
589
590 return ret;
591}
592
593/*
594 * in the Pre-PMD event of mixer we need to do following:
595 * - Stop the pipe
596 * - find the source connections and remove that from dapm_path_list
597 * - unbind with source pipelines if still connected
598 */
599static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
600 struct skl *skl)
601{
Vinod Kould93f8e52015-10-07 11:31:54 +0100602 struct skl_module_cfg *src_mconfig, *sink_mconfig;
Jeeja KPce1b5552015-10-27 09:22:51 +0900603 int ret = 0, i;
Vinod Kould93f8e52015-10-07 11:31:54 +0100604 struct skl_sst *ctx = skl->skl_sst;
605
Jeeja KPce1b5552015-10-27 09:22:51 +0900606 sink_mconfig = w->priv;
Vinod Kould93f8e52015-10-07 11:31:54 +0100607
608 /* Stop the pipe */
609 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
610 if (ret)
611 return ret;
612
Jeeja KPce1b5552015-10-27 09:22:51 +0900613 for (i = 0; i < sink_mconfig->max_in_queue; i++) {
614 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
615 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
616 if (!src_mconfig)
617 continue;
618 /*
619 * If path_found == 1, that means pmd for source
620 * pipe has not occurred, source is connected to
621 * some other sink. so its responsibility of sink
622 * to unbind itself from source.
623 */
624 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
625 if (ret < 0)
626 return ret;
Vinod Kould93f8e52015-10-07 11:31:54 +0100627
Jeeja KPce1b5552015-10-27 09:22:51 +0900628 ret = skl_unbind_modules(ctx,
629 src_mconfig, sink_mconfig);
Vinod Kould93f8e52015-10-07 11:31:54 +0100630 }
631 }
632
Vinod Kould93f8e52015-10-07 11:31:54 +0100633 return ret;
634}
635
636/*
637 * in the Post-PMD event of mixer we need to do following:
638 * - Free the mcps used
639 * - Free the mem used
640 * - Unbind the modules within the pipeline
641 * - Delete the pipeline (modules are not required to be explicitly
642 * deleted, pipeline delete is enough here
643 */
644static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
645 struct skl *skl)
646{
647 struct skl_module_cfg *mconfig = w->priv;
648 struct skl_pipe_module *w_module;
649 struct skl_module_cfg *src_module = NULL, *dst_module;
650 struct skl_sst *ctx = skl->skl_sst;
651 struct skl_pipe *s_pipe = mconfig->pipe;
652 int ret = 0;
653
654 skl_tplg_free_pipe_mcps(skl, mconfig);
Vinod Koul65976872015-11-23 22:26:29 +0530655 skl_tplg_free_pipe_mem(skl, mconfig);
Vinod Kould93f8e52015-10-07 11:31:54 +0100656
657 list_for_each_entry(w_module, &s_pipe->w_list, node) {
658 dst_module = w_module->w->priv;
659
Vinod Koul7ae3cb12015-11-05 21:34:10 +0530660 skl_tplg_free_pipe_mcps(skl, dst_module);
Vinod Kould93f8e52015-10-07 11:31:54 +0100661 if (src_module == NULL) {
662 src_module = dst_module;
663 continue;
664 }
665
666 ret = skl_unbind_modules(ctx, src_module, dst_module);
667 if (ret < 0)
668 return ret;
669
670 src_module = dst_module;
671 }
672
673 ret = skl_delete_pipe(ctx, mconfig->pipe);
Vinod Kould93f8e52015-10-07 11:31:54 +0100674
675 return ret;
676}
677
678/*
679 * in the Post-PMD event of PGA we need to do following:
680 * - Free the mcps used
681 * - Stop the pipeline
682 * - In source pipe is connected, unbind with source pipelines
683 */
684static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
685 struct skl *skl)
686{
Vinod Kould93f8e52015-10-07 11:31:54 +0100687 struct skl_module_cfg *src_mconfig, *sink_mconfig;
Jeeja KPce1b5552015-10-27 09:22:51 +0900688 int ret = 0, i;
Vinod Kould93f8e52015-10-07 11:31:54 +0100689 struct skl_sst *ctx = skl->skl_sst;
690
Jeeja KPce1b5552015-10-27 09:22:51 +0900691 src_mconfig = w->priv;
Vinod Kould93f8e52015-10-07 11:31:54 +0100692
Vinod Kould93f8e52015-10-07 11:31:54 +0100693 /* Stop the pipe since this is a mixin module */
694 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
695 if (ret)
696 return ret;
697
Jeeja KPce1b5552015-10-27 09:22:51 +0900698 for (i = 0; i < src_mconfig->max_out_queue; i++) {
699 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
700 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
701 if (!sink_mconfig)
702 continue;
703 /*
704 * This is a connecter and if path is found that means
705 * unbind between source and sink has not happened yet
706 */
707 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
708 if (ret < 0)
709 return ret;
710 ret = skl_unbind_modules(ctx, src_mconfig,
711 sink_mconfig);
Vinod Kould93f8e52015-10-07 11:31:54 +0100712 }
713 }
714
Vinod Kould93f8e52015-10-07 11:31:54 +0100715 return ret;
716}
717
718/*
719 * In modelling, we assume there will be ONLY one mixer in a pipeline. If
720 * mixer is not required then it is treated as static mixer aka vmixer with
721 * a hard path to source module
722 * So we don't need to check if source is started or not as hard path puts
723 * dependency on each other
724 */
725static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
726 struct snd_kcontrol *k, int event)
727{
728 struct snd_soc_dapm_context *dapm = w->dapm;
729 struct skl *skl = get_skl_ctx(dapm->dev);
730
731 switch (event) {
732 case SND_SOC_DAPM_PRE_PMU:
733 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
734
735 case SND_SOC_DAPM_POST_PMD:
736 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
737 }
738
739 return 0;
740}
741
742/*
743 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
744 * second one is required that is created as another pipe entity.
745 * The mixer is responsible for pipe management and represent a pipeline
746 * instance
747 */
748static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
749 struct snd_kcontrol *k, int event)
750{
751 struct snd_soc_dapm_context *dapm = w->dapm;
752 struct skl *skl = get_skl_ctx(dapm->dev);
753
754 switch (event) {
755 case SND_SOC_DAPM_PRE_PMU:
756 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
757
758 case SND_SOC_DAPM_POST_PMU:
759 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
760
761 case SND_SOC_DAPM_PRE_PMD:
762 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
763
764 case SND_SOC_DAPM_POST_PMD:
765 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
766 }
767
768 return 0;
769}
770
771/*
772 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
773 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
774 * the sink when it is running (two FE to one BE or one FE to two BE)
775 * scenarios
776 */
777static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
778 struct snd_kcontrol *k, int event)
779
780{
781 struct snd_soc_dapm_context *dapm = w->dapm;
782 struct skl *skl = get_skl_ctx(dapm->dev);
783
784 switch (event) {
785 case SND_SOC_DAPM_PRE_PMU:
786 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
787
788 case SND_SOC_DAPM_POST_PMD:
789 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
790 }
791
792 return 0;
793}
Vinod Koulcfb0a872015-10-07 11:31:55 +0100794
795/*
796 * The FE params are passed by hw_params of the DAI.
797 * On hw_params, the params are stored in Gateway module of the FE and we
798 * need to calculate the format in DSP module configuration, that
799 * conversion is done here
800 */
801int skl_tplg_update_pipe_params(struct device *dev,
802 struct skl_module_cfg *mconfig,
803 struct skl_pipe_params *params)
804{
805 struct skl_pipe *pipe = mconfig->pipe;
806 struct skl_module_fmt *format = NULL;
807
808 memcpy(pipe->p_params, params, sizeof(*params));
809
810 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
Hardik T Shah4cd98992015-10-27 09:22:55 +0900811 format = &mconfig->in_fmt[0];
Vinod Koulcfb0a872015-10-07 11:31:55 +0100812 else
Hardik T Shah4cd98992015-10-27 09:22:55 +0900813 format = &mconfig->out_fmt[0];
Vinod Koulcfb0a872015-10-07 11:31:55 +0100814
815 /* set the hw_params */
816 format->s_freq = params->s_freq;
817 format->channels = params->ch;
818 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
819
820 /*
821 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
822 * container so update bit depth accordingly
823 */
824 switch (format->valid_bit_depth) {
825 case SKL_DEPTH_16BIT:
826 format->bit_depth = format->valid_bit_depth;
827 break;
828
829 case SKL_DEPTH_24BIT:
Jeeja KP6654f392015-10-27 09:22:46 +0900830 case SKL_DEPTH_32BIT:
Vinod Koulcfb0a872015-10-07 11:31:55 +0100831 format->bit_depth = SKL_DEPTH_32BIT;
832 break;
833
834 default:
835 dev_err(dev, "Invalid bit depth %x for pipe\n",
836 format->valid_bit_depth);
837 return -EINVAL;
838 }
839
840 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
841 mconfig->ibs = (format->s_freq / 1000) *
842 (format->channels) *
843 (format->bit_depth >> 3);
844 } else {
845 mconfig->obs = (format->s_freq / 1000) *
846 (format->channels) *
847 (format->bit_depth >> 3);
848 }
849
850 return 0;
851}
852
853/*
854 * Query the module config for the FE DAI
855 * This is used to find the hw_params set for that DAI and apply to FE
856 * pipeline
857 */
858struct skl_module_cfg *
859skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
860{
861 struct snd_soc_dapm_widget *w;
862 struct snd_soc_dapm_path *p = NULL;
863
864 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
865 w = dai->playback_widget;
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530866 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100867 if (p->connect && p->sink->power &&
Jeeja KPa28f51d2015-10-27 09:22:44 +0900868 !is_skl_dsp_widget_type(p->sink))
Vinod Koulcfb0a872015-10-07 11:31:55 +0100869 continue;
870
871 if (p->sink->priv) {
872 dev_dbg(dai->dev, "set params for %s\n",
873 p->sink->name);
874 return p->sink->priv;
875 }
876 }
877 } else {
878 w = dai->capture_widget;
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530879 snd_soc_dapm_widget_for_each_source_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100880 if (p->connect && p->source->power &&
Jeeja KPa28f51d2015-10-27 09:22:44 +0900881 !is_skl_dsp_widget_type(p->source))
Vinod Koulcfb0a872015-10-07 11:31:55 +0100882 continue;
883
884 if (p->source->priv) {
885 dev_dbg(dai->dev, "set params for %s\n",
886 p->source->name);
887 return p->source->priv;
888 }
889 }
890 }
891
892 return NULL;
893}
894
895static u8 skl_tplg_be_link_type(int dev_type)
896{
897 int ret;
898
899 switch (dev_type) {
900 case SKL_DEVICE_BT:
901 ret = NHLT_LINK_SSP;
902 break;
903
904 case SKL_DEVICE_DMIC:
905 ret = NHLT_LINK_DMIC;
906 break;
907
908 case SKL_DEVICE_I2S:
909 ret = NHLT_LINK_SSP;
910 break;
911
912 case SKL_DEVICE_HDALINK:
913 ret = NHLT_LINK_HDA;
914 break;
915
916 default:
917 ret = NHLT_LINK_INVALID;
918 break;
919 }
920
921 return ret;
922}
923
924/*
925 * Fill the BE gateway parameters
926 * The BE gateway expects a blob of parameters which are kept in the ACPI
927 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
928 * The port can have multiple settings so pick based on the PCM
929 * parameters
930 */
931static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
932 struct skl_module_cfg *mconfig,
933 struct skl_pipe_params *params)
934{
935 struct skl_pipe *pipe = mconfig->pipe;
936 struct nhlt_specific_cfg *cfg;
937 struct skl *skl = get_skl_ctx(dai->dev);
938 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
939
940 memcpy(pipe->p_params, params, sizeof(*params));
941
Jeeja KPb30c2752015-10-27 09:22:48 +0900942 if (link_type == NHLT_LINK_HDA)
943 return 0;
944
Vinod Koulcfb0a872015-10-07 11:31:55 +0100945 /* update the blob based on virtual bus_id*/
946 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
947 params->s_fmt, params->ch,
948 params->s_freq, params->stream);
949 if (cfg) {
950 mconfig->formats_config.caps_size = cfg->size;
Jeeja KPbc032812015-10-22 23:22:35 +0530951 mconfig->formats_config.caps = (u32 *) &cfg->caps;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100952 } else {
953 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
954 mconfig->vbus_id, link_type,
955 params->stream);
956 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
957 params->ch, params->s_freq, params->s_fmt);
958 return -EINVAL;
959 }
960
961 return 0;
962}
963
964static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
965 struct snd_soc_dapm_widget *w,
966 struct skl_pipe_params *params)
967{
968 struct snd_soc_dapm_path *p;
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530969 int ret = -EIO;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100970
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530971 snd_soc_dapm_widget_for_each_source_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100972 if (p->connect && is_skl_dsp_widget_type(p->source) &&
973 p->source->priv) {
974
Jeeja KP9a03cb42015-10-27 09:22:54 +0900975 ret = skl_tplg_be_fill_pipe_params(dai,
976 p->source->priv, params);
977 if (ret < 0)
978 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100979 } else {
Jeeja KP9a03cb42015-10-27 09:22:54 +0900980 ret = skl_tplg_be_set_src_pipe_params(dai,
981 p->source, params);
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530982 if (ret < 0)
983 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100984 }
985 }
986
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530987 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100988}
989
990static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
991 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
992{
993 struct snd_soc_dapm_path *p = NULL;
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +0530994 int ret = -EIO;
Vinod Koulcfb0a872015-10-07 11:31:55 +0100995
Subhransu S. Prustyf0900eb2015-10-22 23:22:36 +0530996 snd_soc_dapm_widget_for_each_sink_path(w, p) {
Vinod Koulcfb0a872015-10-07 11:31:55 +0100997 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
998 p->sink->priv) {
999
Jeeja KP9a03cb42015-10-27 09:22:54 +09001000 ret = skl_tplg_be_fill_pipe_params(dai,
1001 p->sink->priv, params);
1002 if (ret < 0)
1003 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +01001004 } else {
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +05301005 ret = skl_tplg_be_set_sink_pipe_params(
Vinod Koulcfb0a872015-10-07 11:31:55 +01001006 dai, p->sink, params);
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +05301007 if (ret < 0)
1008 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +01001009 }
1010 }
1011
Subhransu S. Prusty4d8adccb2015-10-22 23:22:37 +05301012 return ret;
Vinod Koulcfb0a872015-10-07 11:31:55 +01001013}
1014
1015/*
1016 * BE hw_params can be a source parameters (capture) or sink parameters
1017 * (playback). Based on sink and source we need to either find the source
1018 * list or the sink list and set the pipeline parameters
1019 */
1020int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1021 struct skl_pipe_params *params)
1022{
1023 struct snd_soc_dapm_widget *w;
1024
1025 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1026 w = dai->playback_widget;
1027
1028 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1029
1030 } else {
1031 w = dai->capture_widget;
1032
1033 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1034 }
1035
1036 return 0;
1037}
Vinod Koul3af36702015-10-07 11:31:56 +01001038
1039static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1040 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1041 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
1042 {SKL_PGA_EVENT, skl_tplg_pga_event},
1043};
1044
1045/*
1046 * The topology binary passes the pin info for a module so initialize the pin
1047 * info passed into module instance
1048 */
Jeeja KP6abca1d2015-10-22 23:22:42 +05301049static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin,
1050 struct skl_module_pin *m_pin,
1051 bool is_dynamic, int max_pin)
Vinod Koul3af36702015-10-07 11:31:56 +01001052{
1053 int i;
1054
1055 for (i = 0; i < max_pin; i++) {
Jeeja KP6abca1d2015-10-22 23:22:42 +05301056 m_pin[i].id.module_id = dfw_pin[i].module_id;
1057 m_pin[i].id.instance_id = dfw_pin[i].instance_id;
Vinod Koul3af36702015-10-07 11:31:56 +01001058 m_pin[i].in_use = false;
Jeeja KP6abca1d2015-10-22 23:22:42 +05301059 m_pin[i].is_dynamic = is_dynamic;
Jeeja KP4f745702015-10-27 09:22:49 +09001060 m_pin[i].pin_state = SKL_PIN_UNBIND;
Vinod Koul3af36702015-10-07 11:31:56 +01001061 }
1062}
1063
1064/*
1065 * Add pipeline from topology binary into driver pipeline list
1066 *
1067 * If already added we return that instance
1068 * Otherwise we create a new instance and add into driver list
1069 */
1070static struct skl_pipe *skl_tplg_add_pipe(struct device *dev,
1071 struct skl *skl, struct skl_dfw_pipe *dfw_pipe)
1072{
1073 struct skl_pipeline *ppl;
1074 struct skl_pipe *pipe;
1075 struct skl_pipe_params *params;
1076
1077 list_for_each_entry(ppl, &skl->ppl_list, node) {
1078 if (ppl->pipe->ppl_id == dfw_pipe->pipe_id)
1079 return ppl->pipe;
1080 }
1081
1082 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
1083 if (!ppl)
1084 return NULL;
1085
1086 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
1087 if (!pipe)
1088 return NULL;
1089
1090 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
1091 if (!params)
1092 return NULL;
1093
1094 pipe->ppl_id = dfw_pipe->pipe_id;
1095 pipe->memory_pages = dfw_pipe->memory_pages;
1096 pipe->pipe_priority = dfw_pipe->pipe_priority;
1097 pipe->conn_type = dfw_pipe->conn_type;
1098 pipe->state = SKL_PIPE_INVALID;
1099 pipe->p_params = params;
1100 INIT_LIST_HEAD(&pipe->w_list);
1101
1102 ppl->pipe = pipe;
1103 list_add(&ppl->node, &skl->ppl_list);
1104
1105 return ppl->pipe;
1106}
1107
Hardik T Shah4cd98992015-10-27 09:22:55 +09001108static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt,
1109 struct skl_dfw_module_fmt *src_fmt,
1110 int pins)
1111{
1112 int i;
1113
1114 for (i = 0; i < pins; i++) {
1115 dst_fmt[i].channels = src_fmt[i].channels;
1116 dst_fmt[i].s_freq = src_fmt[i].freq;
1117 dst_fmt[i].bit_depth = src_fmt[i].bit_depth;
1118 dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth;
1119 dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg;
1120 dst_fmt[i].ch_map = src_fmt[i].ch_map;
1121 dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style;
1122 dst_fmt[i].sample_type = src_fmt[i].sample_type;
1123 }
1124}
1125
Vinod Koul3af36702015-10-07 11:31:56 +01001126/*
1127 * Topology core widget load callback
1128 *
1129 * This is used to save the private data for each widget which gives
1130 * information to the driver about module and pipeline parameters which DSP
1131 * FW expects like ids, resource values, formats etc
1132 */
1133static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001134 struct snd_soc_dapm_widget *w,
1135 struct snd_soc_tplg_dapm_widget *tplg_w)
Vinod Koul3af36702015-10-07 11:31:56 +01001136{
1137 int ret;
1138 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1139 struct skl *skl = ebus_to_skl(ebus);
1140 struct hdac_bus *bus = ebus_to_hbus(ebus);
1141 struct skl_module_cfg *mconfig;
1142 struct skl_pipe *pipe;
Jeeja KPb663a8c2015-10-07 11:31:57 +01001143 struct skl_dfw_module *dfw_config =
1144 (struct skl_dfw_module *)tplg_w->priv.data;
Vinod Koul3af36702015-10-07 11:31:56 +01001145
1146 if (!tplg_w->priv.size)
1147 goto bind_event;
1148
1149 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
1150
1151 if (!mconfig)
1152 return -ENOMEM;
1153
1154 w->priv = mconfig;
1155 mconfig->id.module_id = dfw_config->module_id;
1156 mconfig->id.instance_id = dfw_config->instance_id;
1157 mconfig->mcps = dfw_config->max_mcps;
1158 mconfig->ibs = dfw_config->ibs;
1159 mconfig->obs = dfw_config->obs;
1160 mconfig->core_id = dfw_config->core_id;
1161 mconfig->max_in_queue = dfw_config->max_in_queue;
1162 mconfig->max_out_queue = dfw_config->max_out_queue;
1163 mconfig->is_loadable = dfw_config->is_loadable;
Hardik T Shah4cd98992015-10-27 09:22:55 +09001164 skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt,
1165 MODULE_MAX_IN_PINS);
1166 skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt,
1167 MODULE_MAX_OUT_PINS);
1168
Vinod Koul3af36702015-10-07 11:31:56 +01001169 mconfig->params_fixup = dfw_config->params_fixup;
1170 mconfig->converter = dfw_config->converter;
1171 mconfig->m_type = dfw_config->module_type;
1172 mconfig->vbus_id = dfw_config->vbus_id;
1173
1174 pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe);
1175 if (pipe)
1176 mconfig->pipe = pipe;
1177
1178 mconfig->dev_type = dfw_config->dev_type;
1179 mconfig->hw_conn_type = dfw_config->hw_conn_type;
1180 mconfig->time_slot = dfw_config->time_slot;
1181 mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
1182
Hardik T Shah65aecfa2015-10-27 09:22:57 +09001183 if (dfw_config->is_loadable)
1184 memcpy(mconfig->guid, dfw_config->uuid,
1185 ARRAY_SIZE(dfw_config->uuid));
1186
Hardik T Shah4cd98992015-10-27 09:22:55 +09001187 mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) *
1188 sizeof(*mconfig->m_in_pin),
1189 GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001190 if (!mconfig->m_in_pin)
1191 return -ENOMEM;
1192
Jeeja KP6abca1d2015-10-22 23:22:42 +05301193 mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) *
1194 sizeof(*mconfig->m_out_pin),
1195 GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001196 if (!mconfig->m_out_pin)
1197 return -ENOMEM;
1198
Jeeja KP6abca1d2015-10-22 23:22:42 +05301199 skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin,
1200 dfw_config->is_dynamic_in_pin,
1201 mconfig->max_in_queue);
1202
1203 skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin,
1204 dfw_config->is_dynamic_out_pin,
1205 mconfig->max_out_queue);
1206
Vinod Koul3af36702015-10-07 11:31:56 +01001207
1208 if (mconfig->formats_config.caps_size == 0)
1209 goto bind_event;
1210
1211 mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001212 mconfig->formats_config.caps_size, GFP_KERNEL);
Vinod Koul3af36702015-10-07 11:31:56 +01001213
1214 if (mconfig->formats_config.caps == NULL)
1215 return -ENOMEM;
1216
1217 memcpy(mconfig->formats_config.caps, dfw_config->caps.caps,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001218 dfw_config->caps.caps_size);
Vinod Koul3af36702015-10-07 11:31:56 +01001219
1220bind_event:
1221 if (tplg_w->event_type == 0) {
Vinod Koul3373f712015-10-07 16:39:38 +01001222 dev_dbg(bus->dev, "ASoC: No event handler required\n");
Vinod Koul3af36702015-10-07 11:31:56 +01001223 return 0;
1224 }
1225
1226 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
Jeeja KPb663a8c2015-10-07 11:31:57 +01001227 ARRAY_SIZE(skl_tplg_widget_ops),
1228 tplg_w->event_type);
Vinod Koul3af36702015-10-07 11:31:56 +01001229
1230 if (ret) {
1231 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
1232 __func__, tplg_w->event_type);
1233 return -EINVAL;
1234 }
1235
1236 return 0;
1237}
1238
1239static struct snd_soc_tplg_ops skl_tplg_ops = {
1240 .widget_load = skl_tplg_widget_load,
1241};
1242
1243/* This will be read from topology manifest, currently defined here */
1244#define SKL_MAX_MCPS 30000000
1245#define SKL_FW_MAX_MEM 1000000
1246
1247/*
1248 * SKL topology init routine
1249 */
1250int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
1251{
1252 int ret;
1253 const struct firmware *fw;
1254 struct hdac_bus *bus = ebus_to_hbus(ebus);
1255 struct skl *skl = ebus_to_skl(ebus);
1256
1257 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
1258 if (ret < 0) {
Jeeja KPb663a8c2015-10-07 11:31:57 +01001259 dev_err(bus->dev, "tplg fw %s load failed with %d\n",
Vinod Koul3af36702015-10-07 11:31:56 +01001260 "dfw_sst.bin", ret);
1261 return ret;
1262 }
1263
1264 /*
1265 * The complete tplg for SKL is loaded as index 0, we don't use
1266 * any other index
1267 */
Jeeja KPb663a8c2015-10-07 11:31:57 +01001268 ret = snd_soc_tplg_component_load(&platform->component,
1269 &skl_tplg_ops, fw, 0);
Vinod Koul3af36702015-10-07 11:31:56 +01001270 if (ret < 0) {
1271 dev_err(bus->dev, "tplg component load failed%d\n", ret);
1272 return -EINVAL;
1273 }
1274
1275 skl->resource.max_mcps = SKL_MAX_MCPS;
1276 skl->resource.max_mem = SKL_FW_MAX_MEM;
1277
1278 return 0;
1279}