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Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +09001/*
2 * xHCI host controller driver for R-Car SoCs
3 *
4 * Copyright (C) 2014 Renesas Electronics Corporation
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 */
10
11#include <linux/firmware.h>
12#include <linux/module.h>
13#include <linux/platform_device.h>
14#include <linux/usb/phy.h>
15
16#include "xhci.h"
Yoshihiro Shimoda9bf9d9d2015-11-24 13:09:51 +020017#include "xhci-plat.h"
Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +090018#include "xhci-rcar.h"
19
Yoshihiro Shimoda9bf9d9d2015-11-24 13:09:51 +020020MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +090021
22/*** Register Offset ***/
23#define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */
24#define RCAR_USB3_DL_CTRL 0x250 /* FW Download Control & Status */
25#define RCAR_USB3_FW_DATA0 0x258 /* FW Data0 */
26
27#define RCAR_USB3_LCLK 0xa44 /* LCLK Select */
28#define RCAR_USB3_CONF1 0xa48 /* USB3.0 Configuration1 */
29#define RCAR_USB3_CONF2 0xa5c /* USB3.0 Configuration2 */
30#define RCAR_USB3_CONF3 0xaa8 /* USB3.0 Configuration3 */
31#define RCAR_USB3_RX_POL 0xab0 /* USB3.0 RX Polarity */
32#define RCAR_USB3_TX_POL 0xab8 /* USB3.0 TX Polarity */
33
34/*** Register Settings ***/
35/* Interrupt Enable */
36#define RCAR_USB3_INT_XHC_ENA 0x00000001
37#define RCAR_USB3_INT_PME_ENA 0x00000002
38#define RCAR_USB3_INT_HSE_ENA 0x00000004
39#define RCAR_USB3_INT_ENA_VAL (RCAR_USB3_INT_XHC_ENA | \
40 RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
41
42/* FW Download Control & Status */
43#define RCAR_USB3_DL_CTRL_ENABLE 0x00000001
44#define RCAR_USB3_DL_CTRL_FW_SUCCESS 0x00000010
45#define RCAR_USB3_DL_CTRL_FW_SET_DATA0 0x00000100
46
47/* LCLK Select */
48#define RCAR_USB3_LCLK_ENA_VAL 0x01030001
49
50/* USB3.0 Configuration */
51#define RCAR_USB3_CONF1_VAL 0x00030204
52#define RCAR_USB3_CONF2_VAL 0x00030300
53#define RCAR_USB3_CONF3_VAL 0x13802007
54
55/* USB3.0 Polarity */
56#define RCAR_USB3_RX_POL_VAL BIT(21)
57#define RCAR_USB3_TX_POL_VAL BIT(4)
58
Yoshihiro Shimoda9bf9d9d2015-11-24 13:09:51 +020059static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
60{
61 /* LCLK Select */
62 writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
63 /* USB3.0 Configuration */
64 writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
65 writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
66 writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
67 /* USB3.0 Polarity */
68 writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
69 writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
70}
71
Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +090072void xhci_rcar_start(struct usb_hcd *hcd)
73{
74 u32 temp;
75
76 if (hcd->regs != NULL) {
77 /* Interrupt Enable */
78 temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
79 temp |= RCAR_USB3_INT_ENA_VAL;
80 writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
Yoshihiro Shimoda9bf9d9d2015-11-24 13:09:51 +020081 if (xhci_plat_type_is(hcd, XHCI_PLAT_TYPE_RENESAS_RCAR_GEN2))
82 xhci_rcar_start_gen2(hcd);
Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +090083 }
84}
85
Yoshihiro Shimoda9bf9d9d2015-11-24 13:09:51 +020086static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +090087{
Yoshihiro Shimoda9bf9d9d2015-11-24 13:09:51 +020088 struct device *dev = hcd->self.controller;
89 void __iomem *regs = hcd->regs;
90 struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +090091 const struct firmware *fw;
92 int retval, index, j, time;
93 int timeout = 10000;
94 u32 data, val, temp;
95
96 /* request R-Car USB3.0 firmware */
Yoshihiro Shimoda9bf9d9d2015-11-24 13:09:51 +020097 retval = request_firmware(&fw, priv->firmware_name, dev);
Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +090098 if (retval)
99 return retval;
100
101 /* download R-Car USB3.0 firmware */
102 temp = readl(regs + RCAR_USB3_DL_CTRL);
103 temp |= RCAR_USB3_DL_CTRL_ENABLE;
104 writel(temp, regs + RCAR_USB3_DL_CTRL);
105
106 for (index = 0; index < fw->size; index += 4) {
107 /* to avoid reading beyond the end of the buffer */
108 for (data = 0, j = 3; j >= 0; j--) {
109 if ((j + index) < fw->size)
110 data |= fw->data[index + j] << (8 * j);
111 }
112 writel(data, regs + RCAR_USB3_FW_DATA0);
113 temp = readl(regs + RCAR_USB3_DL_CTRL);
114 temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
115 writel(temp, regs + RCAR_USB3_DL_CTRL);
116
117 for (time = 0; time < timeout; time++) {
118 val = readl(regs + RCAR_USB3_DL_CTRL);
119 if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
120 break;
121 udelay(1);
122 }
123 if (time == timeout) {
124 retval = -ETIMEDOUT;
125 break;
126 }
127 }
128
129 temp = readl(regs + RCAR_USB3_DL_CTRL);
130 temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
131 writel(temp, regs + RCAR_USB3_DL_CTRL);
132
133 for (time = 0; time < timeout; time++) {
134 val = readl(regs + RCAR_USB3_DL_CTRL);
135 if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
136 retval = 0;
137 break;
138 }
139 udelay(1);
140 }
141 if (time == timeout)
142 retval = -ETIMEDOUT;
143
144 release_firmware(fw);
145
146 return retval;
147}
148
149/* This function needs to initialize a "phy" of usb before */
150int xhci_rcar_init_quirk(struct usb_hcd *hcd)
151{
152 /* If hcd->regs is NULL, we don't just call the following function */
153 if (!hcd->regs)
154 return 0;
155
Yoshihiro Shimoda9bf9d9d2015-11-24 13:09:51 +0200156 return xhci_rcar_download_firmware(hcd);
Yoshihiro Shimoda4ac89182014-07-09 10:08:52 +0900157}