Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | |
| 3 | Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers |
| 4 | |
| 5 | Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com> |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 6 | Portions Copyright 2002 by Mylex (An IBM Business Unit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | |
| 8 | This program is free software; you may redistribute and/or modify it under |
| 9 | the terms of the GNU General Public License Version 2 as published by the |
| 10 | Free Software Foundation. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, but |
| 13 | WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY |
| 14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 15 | for complete details. |
| 16 | |
| 17 | */ |
| 18 | |
| 19 | |
| 20 | #define DAC960_DriverVersion "2.5.47" |
| 21 | #define DAC960_DriverDate "14 November 2002" |
| 22 | |
| 23 | |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/types.h> |
| 26 | #include <linux/miscdevice.h> |
| 27 | #include <linux/blkdev.h> |
| 28 | #include <linux/bio.h> |
| 29 | #include <linux/completion.h> |
| 30 | #include <linux/delay.h> |
| 31 | #include <linux/genhd.h> |
| 32 | #include <linux/hdreg.h> |
| 33 | #include <linux/blkpg.h> |
| 34 | #include <linux/interrupt.h> |
| 35 | #include <linux/ioport.h> |
| 36 | #include <linux/mm.h> |
| 37 | #include <linux/slab.h> |
| 38 | #include <linux/proc_fs.h> |
| 39 | #include <linux/reboot.h> |
| 40 | #include <linux/spinlock.h> |
| 41 | #include <linux/timer.h> |
| 42 | #include <linux/pci.h> |
| 43 | #include <linux/init.h> |
| 44 | #include <asm/io.h> |
| 45 | #include <asm/uaccess.h> |
| 46 | #include "DAC960.h" |
| 47 | |
| 48 | #define DAC960_GAM_MINOR 252 |
| 49 | |
| 50 | |
| 51 | static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers]; |
| 52 | static int DAC960_ControllerCount; |
| 53 | static struct proc_dir_entry *DAC960_ProcDirectoryEntry; |
| 54 | |
| 55 | static long disk_size(DAC960_Controller_T *p, int drive_nr) |
| 56 | { |
| 57 | if (p->FirmwareType == DAC960_V1_Controller) { |
| 58 | if (drive_nr >= p->LogicalDriveCount) |
| 59 | return 0; |
| 60 | return p->V1.LogicalDriveInformation[drive_nr]. |
| 61 | LogicalDriveSize; |
| 62 | } else { |
| 63 | DAC960_V2_LogicalDeviceInfo_T *i = |
| 64 | p->V2.LogicalDeviceInformation[drive_nr]; |
| 65 | if (i == NULL) |
| 66 | return 0; |
| 67 | return i->ConfigurableDeviceSize; |
| 68 | } |
| 69 | } |
| 70 | |
| 71 | static int DAC960_open(struct inode *inode, struct file *file) |
| 72 | { |
| 73 | struct gendisk *disk = inode->i_bdev->bd_disk; |
| 74 | DAC960_Controller_T *p = disk->queue->queuedata; |
| 75 | int drive_nr = (long)disk->private_data; |
| 76 | |
| 77 | if (p->FirmwareType == DAC960_V1_Controller) { |
| 78 | if (p->V1.LogicalDriveInformation[drive_nr]. |
| 79 | LogicalDriveState == DAC960_V1_LogicalDrive_Offline) |
| 80 | return -ENXIO; |
| 81 | } else { |
| 82 | DAC960_V2_LogicalDeviceInfo_T *i = |
| 83 | p->V2.LogicalDeviceInformation[drive_nr]; |
| 84 | if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline) |
| 85 | return -ENXIO; |
| 86 | } |
| 87 | |
| 88 | check_disk_change(inode->i_bdev); |
| 89 | |
| 90 | if (!get_capacity(p->disks[drive_nr])) |
| 91 | return -ENXIO; |
| 92 | return 0; |
| 93 | } |
| 94 | |
Christoph Hellwig | a885c8c | 2006-01-08 01:02:50 -0800 | [diff] [blame] | 95 | static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | { |
Christoph Hellwig | a885c8c | 2006-01-08 01:02:50 -0800 | [diff] [blame] | 97 | struct gendisk *disk = bdev->bd_disk; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | DAC960_Controller_T *p = disk->queue->queuedata; |
| 99 | int drive_nr = (long)disk->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | |
| 101 | if (p->FirmwareType == DAC960_V1_Controller) { |
Christoph Hellwig | a885c8c | 2006-01-08 01:02:50 -0800 | [diff] [blame] | 102 | geo->heads = p->V1.GeometryTranslationHeads; |
| 103 | geo->sectors = p->V1.GeometryTranslationSectors; |
| 104 | geo->cylinders = p->V1.LogicalDriveInformation[drive_nr]. |
| 105 | LogicalDriveSize / (geo->heads * geo->sectors); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | } else { |
| 107 | DAC960_V2_LogicalDeviceInfo_T *i = |
| 108 | p->V2.LogicalDeviceInformation[drive_nr]; |
| 109 | switch (i->DriveGeometry) { |
| 110 | case DAC960_V2_Geometry_128_32: |
Christoph Hellwig | a885c8c | 2006-01-08 01:02:50 -0800 | [diff] [blame] | 111 | geo->heads = 128; |
| 112 | geo->sectors = 32; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 113 | break; |
| 114 | case DAC960_V2_Geometry_255_63: |
Christoph Hellwig | a885c8c | 2006-01-08 01:02:50 -0800 | [diff] [blame] | 115 | geo->heads = 255; |
| 116 | geo->sectors = 63; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 117 | break; |
| 118 | default: |
| 119 | DAC960_Error("Illegal Logical Device Geometry %d\n", |
| 120 | p, i->DriveGeometry); |
| 121 | return -EINVAL; |
| 122 | } |
| 123 | |
Christoph Hellwig | a885c8c | 2006-01-08 01:02:50 -0800 | [diff] [blame] | 124 | geo->cylinders = i->ConfigurableDeviceSize / |
| 125 | (geo->heads * geo->sectors); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | } |
| 127 | |
Christoph Hellwig | a885c8c | 2006-01-08 01:02:50 -0800 | [diff] [blame] | 128 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | static int DAC960_media_changed(struct gendisk *disk) |
| 132 | { |
| 133 | DAC960_Controller_T *p = disk->queue->queuedata; |
| 134 | int drive_nr = (long)disk->private_data; |
| 135 | |
| 136 | if (!p->LogicalDriveInitiallyAccessible[drive_nr]) |
| 137 | return 1; |
| 138 | return 0; |
| 139 | } |
| 140 | |
| 141 | static int DAC960_revalidate_disk(struct gendisk *disk) |
| 142 | { |
| 143 | DAC960_Controller_T *p = disk->queue->queuedata; |
| 144 | int unit = (long)disk->private_data; |
| 145 | |
| 146 | set_capacity(disk, disk_size(p, unit)); |
| 147 | return 0; |
| 148 | } |
| 149 | |
| 150 | static struct block_device_operations DAC960_BlockDeviceOperations = { |
| 151 | .owner = THIS_MODULE, |
| 152 | .open = DAC960_open, |
Christoph Hellwig | a885c8c | 2006-01-08 01:02:50 -0800 | [diff] [blame] | 153 | .getgeo = DAC960_getgeo, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | .media_changed = DAC960_media_changed, |
| 155 | .revalidate_disk = DAC960_revalidate_disk, |
| 156 | }; |
| 157 | |
| 158 | |
| 159 | /* |
| 160 | DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name, |
| 161 | Copyright Notice, and Electronic Mail Address. |
| 162 | */ |
| 163 | |
| 164 | static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller) |
| 165 | { |
| 166 | DAC960_Announce("***** DAC960 RAID Driver Version " |
| 167 | DAC960_DriverVersion " of " |
| 168 | DAC960_DriverDate " *****\n", Controller); |
| 169 | DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff " |
| 170 | "<lnz@dandelion.com>\n", Controller); |
| 171 | } |
| 172 | |
| 173 | |
| 174 | /* |
| 175 | DAC960_Failure prints a standardized error message, and then returns false. |
| 176 | */ |
| 177 | |
| 178 | static boolean DAC960_Failure(DAC960_Controller_T *Controller, |
| 179 | unsigned char *ErrorMessage) |
| 180 | { |
| 181 | DAC960_Error("While configuring DAC960 PCI RAID Controller at\n", |
| 182 | Controller); |
| 183 | if (Controller->IO_Address == 0) |
| 184 | DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A " |
| 185 | "PCI Address 0x%X\n", Controller, |
| 186 | Controller->Bus, Controller->Device, |
| 187 | Controller->Function, Controller->PCI_Address); |
| 188 | else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address " |
| 189 | "0x%X PCI Address 0x%X\n", Controller, |
| 190 | Controller->Bus, Controller->Device, |
| 191 | Controller->Function, Controller->IO_Address, |
| 192 | Controller->PCI_Address); |
| 193 | DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage); |
| 194 | return false; |
| 195 | } |
| 196 | |
| 197 | /* |
| 198 | init_dma_loaf() and slice_dma_loaf() are helper functions for |
| 199 | aggregating the dma-mapped memory for a well-known collection of |
| 200 | data structures that are of different lengths. |
| 201 | |
| 202 | These routines don't guarantee any alignment. The caller must |
| 203 | include any space needed for alignment in the sizes of the structures |
| 204 | that are passed in. |
| 205 | */ |
| 206 | |
| 207 | static boolean init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf, |
| 208 | size_t len) |
| 209 | { |
| 210 | void *cpu_addr; |
| 211 | dma_addr_t dma_handle; |
| 212 | |
| 213 | cpu_addr = pci_alloc_consistent(dev, len, &dma_handle); |
| 214 | if (cpu_addr == NULL) |
| 215 | return false; |
| 216 | |
| 217 | loaf->cpu_free = loaf->cpu_base = cpu_addr; |
| 218 | loaf->dma_free =loaf->dma_base = dma_handle; |
| 219 | loaf->length = len; |
| 220 | memset(cpu_addr, 0, len); |
| 221 | return true; |
| 222 | } |
| 223 | |
| 224 | static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len, |
| 225 | dma_addr_t *dma_handle) |
| 226 | { |
| 227 | void *cpu_end = loaf->cpu_free + len; |
| 228 | void *cpu_addr = loaf->cpu_free; |
| 229 | |
| 230 | if (cpu_end > loaf->cpu_base + loaf->length) |
| 231 | BUG(); |
| 232 | *dma_handle = loaf->dma_free; |
| 233 | loaf->cpu_free = cpu_end; |
| 234 | loaf->dma_free += len; |
| 235 | return cpu_addr; |
| 236 | } |
| 237 | |
| 238 | static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle) |
| 239 | { |
| 240 | if (loaf_handle->cpu_base != NULL) |
| 241 | pci_free_consistent(dev, loaf_handle->length, |
| 242 | loaf_handle->cpu_base, loaf_handle->dma_base); |
| 243 | } |
| 244 | |
| 245 | |
| 246 | /* |
| 247 | DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary |
| 248 | data structures for Controller. It returns true on success and false on |
| 249 | failure. |
| 250 | */ |
| 251 | |
| 252 | static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller) |
| 253 | { |
| 254 | int CommandAllocationLength, CommandAllocationGroupSize; |
| 255 | int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount; |
| 256 | void *AllocationPointer = NULL; |
| 257 | void *ScatterGatherCPU = NULL; |
| 258 | dma_addr_t ScatterGatherDMA; |
| 259 | struct pci_pool *ScatterGatherPool; |
| 260 | void *RequestSenseCPU = NULL; |
| 261 | dma_addr_t RequestSenseDMA; |
| 262 | struct pci_pool *RequestSensePool = NULL; |
| 263 | |
| 264 | if (Controller->FirmwareType == DAC960_V1_Controller) |
| 265 | { |
| 266 | CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker); |
| 267 | CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize; |
| 268 | ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather", |
| 269 | Controller->PCIDevice, |
| 270 | DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T), |
| 271 | sizeof(DAC960_V1_ScatterGatherSegment_T), 0); |
| 272 | if (ScatterGatherPool == NULL) |
| 273 | return DAC960_Failure(Controller, |
| 274 | "AUXILIARY STRUCTURE CREATION (SG)"); |
| 275 | Controller->ScatterGatherPool = ScatterGatherPool; |
| 276 | } |
| 277 | else |
| 278 | { |
| 279 | CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker); |
| 280 | CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize; |
| 281 | ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather", |
| 282 | Controller->PCIDevice, |
| 283 | DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T), |
| 284 | sizeof(DAC960_V2_ScatterGatherSegment_T), 0); |
| 285 | if (ScatterGatherPool == NULL) |
| 286 | return DAC960_Failure(Controller, |
| 287 | "AUXILIARY STRUCTURE CREATION (SG)"); |
| 288 | RequestSensePool = pci_pool_create("DAC960_V2_RequestSense", |
| 289 | Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T), |
| 290 | sizeof(int), 0); |
| 291 | if (RequestSensePool == NULL) { |
| 292 | pci_pool_destroy(ScatterGatherPool); |
| 293 | return DAC960_Failure(Controller, |
| 294 | "AUXILIARY STRUCTURE CREATION (SG)"); |
| 295 | } |
| 296 | Controller->ScatterGatherPool = ScatterGatherPool; |
| 297 | Controller->V2.RequestSensePool = RequestSensePool; |
| 298 | } |
| 299 | Controller->CommandAllocationGroupSize = CommandAllocationGroupSize; |
| 300 | Controller->FreeCommands = NULL; |
| 301 | for (CommandIdentifier = 1; |
| 302 | CommandIdentifier <= Controller->DriverQueueDepth; |
| 303 | CommandIdentifier++) |
| 304 | { |
| 305 | DAC960_Command_T *Command; |
| 306 | if (--CommandsRemaining <= 0) |
| 307 | { |
| 308 | CommandsRemaining = |
| 309 | Controller->DriverQueueDepth - CommandIdentifier + 1; |
| 310 | if (CommandsRemaining > CommandAllocationGroupSize) |
| 311 | CommandsRemaining = CommandAllocationGroupSize; |
| 312 | CommandGroupByteCount = |
| 313 | CommandsRemaining * CommandAllocationLength; |
| 314 | AllocationPointer = kmalloc(CommandGroupByteCount, GFP_ATOMIC); |
| 315 | if (AllocationPointer == NULL) |
| 316 | return DAC960_Failure(Controller, |
| 317 | "AUXILIARY STRUCTURE CREATION"); |
| 318 | memset(AllocationPointer, 0, CommandGroupByteCount); |
| 319 | } |
| 320 | Command = (DAC960_Command_T *) AllocationPointer; |
| 321 | AllocationPointer += CommandAllocationLength; |
| 322 | Command->CommandIdentifier = CommandIdentifier; |
| 323 | Command->Controller = Controller; |
| 324 | Command->Next = Controller->FreeCommands; |
| 325 | Controller->FreeCommands = Command; |
| 326 | Controller->Commands[CommandIdentifier-1] = Command; |
| 327 | ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, SLAB_ATOMIC, |
| 328 | &ScatterGatherDMA); |
| 329 | if (ScatterGatherCPU == NULL) |
| 330 | return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION"); |
| 331 | |
| 332 | if (RequestSensePool != NULL) { |
| 333 | RequestSenseCPU = pci_pool_alloc(RequestSensePool, SLAB_ATOMIC, |
| 334 | &RequestSenseDMA); |
| 335 | if (RequestSenseCPU == NULL) { |
| 336 | pci_pool_free(ScatterGatherPool, ScatterGatherCPU, |
| 337 | ScatterGatherDMA); |
| 338 | return DAC960_Failure(Controller, |
| 339 | "AUXILIARY STRUCTURE CREATION"); |
| 340 | } |
| 341 | } |
| 342 | if (Controller->FirmwareType == DAC960_V1_Controller) { |
| 343 | Command->cmd_sglist = Command->V1.ScatterList; |
| 344 | Command->V1.ScatterGatherList = |
| 345 | (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU; |
| 346 | Command->V1.ScatterGatherListDMA = ScatterGatherDMA; |
| 347 | } else { |
| 348 | Command->cmd_sglist = Command->V2.ScatterList; |
| 349 | Command->V2.ScatterGatherList = |
| 350 | (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU; |
| 351 | Command->V2.ScatterGatherListDMA = ScatterGatherDMA; |
| 352 | Command->V2.RequestSense = |
| 353 | (DAC960_SCSI_RequestSense_T *)RequestSenseCPU; |
| 354 | Command->V2.RequestSenseDMA = RequestSenseDMA; |
| 355 | } |
| 356 | } |
| 357 | return true; |
| 358 | } |
| 359 | |
| 360 | |
| 361 | /* |
| 362 | DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data |
| 363 | structures for Controller. |
| 364 | */ |
| 365 | |
| 366 | static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller) |
| 367 | { |
| 368 | int i; |
| 369 | struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool; |
| 370 | struct pci_pool *RequestSensePool = NULL; |
| 371 | void *ScatterGatherCPU; |
| 372 | dma_addr_t ScatterGatherDMA; |
| 373 | void *RequestSenseCPU; |
| 374 | dma_addr_t RequestSenseDMA; |
| 375 | DAC960_Command_T *CommandGroup = NULL; |
| 376 | |
| 377 | |
| 378 | if (Controller->FirmwareType == DAC960_V2_Controller) |
| 379 | RequestSensePool = Controller->V2.RequestSensePool; |
| 380 | |
| 381 | Controller->FreeCommands = NULL; |
| 382 | for (i = 0; i < Controller->DriverQueueDepth; i++) |
| 383 | { |
| 384 | DAC960_Command_T *Command = Controller->Commands[i]; |
| 385 | |
| 386 | if (Command == NULL) |
| 387 | continue; |
| 388 | |
| 389 | if (Controller->FirmwareType == DAC960_V1_Controller) { |
| 390 | ScatterGatherCPU = (void *)Command->V1.ScatterGatherList; |
| 391 | ScatterGatherDMA = Command->V1.ScatterGatherListDMA; |
| 392 | RequestSenseCPU = NULL; |
| 393 | RequestSenseDMA = (dma_addr_t)0; |
| 394 | } else { |
| 395 | ScatterGatherCPU = (void *)Command->V2.ScatterGatherList; |
| 396 | ScatterGatherDMA = Command->V2.ScatterGatherListDMA; |
| 397 | RequestSenseCPU = (void *)Command->V2.RequestSense; |
| 398 | RequestSenseDMA = Command->V2.RequestSenseDMA; |
| 399 | } |
| 400 | if (ScatterGatherCPU != NULL) |
| 401 | pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA); |
| 402 | if (RequestSenseCPU != NULL) |
| 403 | pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA); |
| 404 | |
| 405 | if ((Command->CommandIdentifier |
| 406 | % Controller->CommandAllocationGroupSize) == 1) { |
| 407 | /* |
| 408 | * We can't free the group of commands until all of the |
| 409 | * request sense and scatter gather dma structures are free. |
| 410 | * Remember the beginning of the group, but don't free it |
| 411 | * until we've reached the beginning of the next group. |
| 412 | */ |
Jesper Juhl | 6044ec8 | 2005-11-07 01:01:32 -0800 | [diff] [blame] | 413 | kfree(CommandGroup); |
| 414 | CommandGroup = Command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 415 | } |
| 416 | Controller->Commands[i] = NULL; |
| 417 | } |
Jesper Juhl | 6044ec8 | 2005-11-07 01:01:32 -0800 | [diff] [blame] | 418 | kfree(CommandGroup); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 419 | |
| 420 | if (Controller->CombinedStatusBuffer != NULL) |
| 421 | { |
| 422 | kfree(Controller->CombinedStatusBuffer); |
| 423 | Controller->CombinedStatusBuffer = NULL; |
| 424 | Controller->CurrentStatusBuffer = NULL; |
| 425 | } |
| 426 | |
| 427 | if (ScatterGatherPool != NULL) |
| 428 | pci_pool_destroy(ScatterGatherPool); |
Jesper Juhl | 6044ec8 | 2005-11-07 01:01:32 -0800 | [diff] [blame] | 429 | if (Controller->FirmwareType == DAC960_V1_Controller) |
| 430 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | |
| 432 | if (RequestSensePool != NULL) |
| 433 | pci_pool_destroy(RequestSensePool); |
| 434 | |
Jesper Juhl | 6044ec8 | 2005-11-07 01:01:32 -0800 | [diff] [blame] | 435 | for (i = 0; i < DAC960_MaxLogicalDrives; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | kfree(Controller->V2.LogicalDeviceInformation[i]); |
| 437 | Controller->V2.LogicalDeviceInformation[i] = NULL; |
Jesper Juhl | 6044ec8 | 2005-11-07 01:01:32 -0800 | [diff] [blame] | 438 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | |
| 440 | for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++) |
| 441 | { |
Jesper Juhl | 6044ec8 | 2005-11-07 01:01:32 -0800 | [diff] [blame] | 442 | kfree(Controller->V2.PhysicalDeviceInformation[i]); |
| 443 | Controller->V2.PhysicalDeviceInformation[i] = NULL; |
| 444 | kfree(Controller->V2.InquiryUnitSerialNumber[i]); |
| 445 | Controller->V2.InquiryUnitSerialNumber[i] = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | } |
| 447 | } |
| 448 | |
| 449 | |
| 450 | /* |
| 451 | DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1 |
| 452 | Firmware Controllers. |
| 453 | */ |
| 454 | |
| 455 | static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command) |
| 456 | { |
| 457 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 458 | memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T)); |
| 459 | Command->V1.CommandStatus = 0; |
| 460 | } |
| 461 | |
| 462 | |
| 463 | /* |
| 464 | DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2 |
| 465 | Firmware Controllers. |
| 466 | */ |
| 467 | |
| 468 | static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command) |
| 469 | { |
| 470 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 471 | memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T)); |
| 472 | Command->V2.CommandStatus = 0; |
| 473 | } |
| 474 | |
| 475 | |
| 476 | /* |
| 477 | DAC960_AllocateCommand allocates a Command structure from Controller's |
| 478 | free list. During driver initialization, a special initialization command |
| 479 | has been placed on the free list to guarantee that command allocation can |
| 480 | never fail. |
| 481 | */ |
| 482 | |
| 483 | static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T |
| 484 | *Controller) |
| 485 | { |
| 486 | DAC960_Command_T *Command = Controller->FreeCommands; |
| 487 | if (Command == NULL) return NULL; |
| 488 | Controller->FreeCommands = Command->Next; |
| 489 | Command->Next = NULL; |
| 490 | return Command; |
| 491 | } |
| 492 | |
| 493 | |
| 494 | /* |
| 495 | DAC960_DeallocateCommand deallocates Command, returning it to Controller's |
| 496 | free list. |
| 497 | */ |
| 498 | |
| 499 | static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command) |
| 500 | { |
| 501 | DAC960_Controller_T *Controller = Command->Controller; |
| 502 | |
| 503 | Command->Request = NULL; |
| 504 | Command->Next = Controller->FreeCommands; |
| 505 | Controller->FreeCommands = Command; |
| 506 | } |
| 507 | |
| 508 | |
| 509 | /* |
| 510 | DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue. |
| 511 | */ |
| 512 | |
| 513 | static void DAC960_WaitForCommand(DAC960_Controller_T *Controller) |
| 514 | { |
| 515 | spin_unlock_irq(&Controller->queue_lock); |
| 516 | __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands); |
| 517 | spin_lock_irq(&Controller->queue_lock); |
| 518 | } |
| 519 | |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 520 | /* |
| 521 | DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers. |
| 522 | */ |
| 523 | |
| 524 | static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command) |
| 525 | { |
| 526 | DAC960_Controller_T *Controller = Command->Controller; |
| 527 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 528 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 529 | DAC960_V2_CommandMailbox_T *NextCommandMailbox = |
| 530 | Controller->V2.NextCommandMailbox; |
| 531 | |
| 532 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 533 | DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); |
| 534 | |
| 535 | if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 || |
| 536 | Controller->V2.PreviousCommandMailbox2->Words[0] == 0) |
| 537 | DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress); |
| 538 | |
| 539 | Controller->V2.PreviousCommandMailbox2 = |
| 540 | Controller->V2.PreviousCommandMailbox1; |
| 541 | Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox; |
| 542 | |
| 543 | if (++NextCommandMailbox > Controller->V2.LastCommandMailbox) |
| 544 | NextCommandMailbox = Controller->V2.FirstCommandMailbox; |
| 545 | |
| 546 | Controller->V2.NextCommandMailbox = NextCommandMailbox; |
| 547 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | |
| 549 | /* |
| 550 | DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers. |
| 551 | */ |
| 552 | |
| 553 | static void DAC960_BA_QueueCommand(DAC960_Command_T *Command) |
| 554 | { |
| 555 | DAC960_Controller_T *Controller = Command->Controller; |
| 556 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 557 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 558 | DAC960_V2_CommandMailbox_T *NextCommandMailbox = |
| 559 | Controller->V2.NextCommandMailbox; |
| 560 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 561 | DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); |
| 562 | if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 || |
| 563 | Controller->V2.PreviousCommandMailbox2->Words[0] == 0) |
| 564 | DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress); |
| 565 | Controller->V2.PreviousCommandMailbox2 = |
| 566 | Controller->V2.PreviousCommandMailbox1; |
| 567 | Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox; |
| 568 | if (++NextCommandMailbox > Controller->V2.LastCommandMailbox) |
| 569 | NextCommandMailbox = Controller->V2.FirstCommandMailbox; |
| 570 | Controller->V2.NextCommandMailbox = NextCommandMailbox; |
| 571 | } |
| 572 | |
| 573 | |
| 574 | /* |
| 575 | DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers. |
| 576 | */ |
| 577 | |
| 578 | static void DAC960_LP_QueueCommand(DAC960_Command_T *Command) |
| 579 | { |
| 580 | DAC960_Controller_T *Controller = Command->Controller; |
| 581 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 582 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 583 | DAC960_V2_CommandMailbox_T *NextCommandMailbox = |
| 584 | Controller->V2.NextCommandMailbox; |
| 585 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 586 | DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); |
| 587 | if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 || |
| 588 | Controller->V2.PreviousCommandMailbox2->Words[0] == 0) |
| 589 | DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress); |
| 590 | Controller->V2.PreviousCommandMailbox2 = |
| 591 | Controller->V2.PreviousCommandMailbox1; |
| 592 | Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox; |
| 593 | if (++NextCommandMailbox > Controller->V2.LastCommandMailbox) |
| 594 | NextCommandMailbox = Controller->V2.FirstCommandMailbox; |
| 595 | Controller->V2.NextCommandMailbox = NextCommandMailbox; |
| 596 | } |
| 597 | |
| 598 | |
| 599 | /* |
| 600 | DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series |
| 601 | Controllers with Dual Mode Firmware. |
| 602 | */ |
| 603 | |
| 604 | static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command) |
| 605 | { |
| 606 | DAC960_Controller_T *Controller = Command->Controller; |
| 607 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 608 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 609 | DAC960_V1_CommandMailbox_T *NextCommandMailbox = |
| 610 | Controller->V1.NextCommandMailbox; |
| 611 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 612 | DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); |
| 613 | if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 || |
| 614 | Controller->V1.PreviousCommandMailbox2->Words[0] == 0) |
| 615 | DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress); |
| 616 | Controller->V1.PreviousCommandMailbox2 = |
| 617 | Controller->V1.PreviousCommandMailbox1; |
| 618 | Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox; |
| 619 | if (++NextCommandMailbox > Controller->V1.LastCommandMailbox) |
| 620 | NextCommandMailbox = Controller->V1.FirstCommandMailbox; |
| 621 | Controller->V1.NextCommandMailbox = NextCommandMailbox; |
| 622 | } |
| 623 | |
| 624 | |
| 625 | /* |
| 626 | DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series |
| 627 | Controllers with Single Mode Firmware. |
| 628 | */ |
| 629 | |
| 630 | static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command) |
| 631 | { |
| 632 | DAC960_Controller_T *Controller = Command->Controller; |
| 633 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 634 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 635 | DAC960_V1_CommandMailbox_T *NextCommandMailbox = |
| 636 | Controller->V1.NextCommandMailbox; |
| 637 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 638 | DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); |
| 639 | if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 || |
| 640 | Controller->V1.PreviousCommandMailbox2->Words[0] == 0) |
| 641 | DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress); |
| 642 | Controller->V1.PreviousCommandMailbox2 = |
| 643 | Controller->V1.PreviousCommandMailbox1; |
| 644 | Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox; |
| 645 | if (++NextCommandMailbox > Controller->V1.LastCommandMailbox) |
| 646 | NextCommandMailbox = Controller->V1.FirstCommandMailbox; |
| 647 | Controller->V1.NextCommandMailbox = NextCommandMailbox; |
| 648 | } |
| 649 | |
| 650 | |
| 651 | /* |
| 652 | DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series |
| 653 | Controllers with Dual Mode Firmware. |
| 654 | */ |
| 655 | |
| 656 | static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command) |
| 657 | { |
| 658 | DAC960_Controller_T *Controller = Command->Controller; |
| 659 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 660 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 661 | DAC960_V1_CommandMailbox_T *NextCommandMailbox = |
| 662 | Controller->V1.NextCommandMailbox; |
| 663 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 664 | DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); |
| 665 | if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 || |
| 666 | Controller->V1.PreviousCommandMailbox2->Words[0] == 0) |
| 667 | DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress); |
| 668 | Controller->V1.PreviousCommandMailbox2 = |
| 669 | Controller->V1.PreviousCommandMailbox1; |
| 670 | Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox; |
| 671 | if (++NextCommandMailbox > Controller->V1.LastCommandMailbox) |
| 672 | NextCommandMailbox = Controller->V1.FirstCommandMailbox; |
| 673 | Controller->V1.NextCommandMailbox = NextCommandMailbox; |
| 674 | } |
| 675 | |
| 676 | |
| 677 | /* |
| 678 | DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series |
| 679 | Controllers with Single Mode Firmware. |
| 680 | */ |
| 681 | |
| 682 | static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command) |
| 683 | { |
| 684 | DAC960_Controller_T *Controller = Command->Controller; |
| 685 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 686 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 687 | DAC960_V1_CommandMailbox_T *NextCommandMailbox = |
| 688 | Controller->V1.NextCommandMailbox; |
| 689 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 690 | DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); |
| 691 | if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 || |
| 692 | Controller->V1.PreviousCommandMailbox2->Words[0] == 0) |
| 693 | DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress); |
| 694 | Controller->V1.PreviousCommandMailbox2 = |
| 695 | Controller->V1.PreviousCommandMailbox1; |
| 696 | Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox; |
| 697 | if (++NextCommandMailbox > Controller->V1.LastCommandMailbox) |
| 698 | NextCommandMailbox = Controller->V1.FirstCommandMailbox; |
| 699 | Controller->V1.NextCommandMailbox = NextCommandMailbox; |
| 700 | } |
| 701 | |
| 702 | |
| 703 | /* |
| 704 | DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers. |
| 705 | */ |
| 706 | |
| 707 | static void DAC960_PD_QueueCommand(DAC960_Command_T *Command) |
| 708 | { |
| 709 | DAC960_Controller_T *Controller = Command->Controller; |
| 710 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 711 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 712 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 713 | while (DAC960_PD_MailboxFullP(ControllerBaseAddress)) |
| 714 | udelay(1); |
| 715 | DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox); |
| 716 | DAC960_PD_NewCommand(ControllerBaseAddress); |
| 717 | } |
| 718 | |
| 719 | |
| 720 | /* |
| 721 | DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers. |
| 722 | */ |
| 723 | |
| 724 | static void DAC960_P_QueueCommand(DAC960_Command_T *Command) |
| 725 | { |
| 726 | DAC960_Controller_T *Controller = Command->Controller; |
| 727 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 728 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 729 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; |
| 730 | switch (CommandMailbox->Common.CommandOpcode) |
| 731 | { |
| 732 | case DAC960_V1_Enquiry: |
| 733 | CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old; |
| 734 | break; |
| 735 | case DAC960_V1_GetDeviceState: |
| 736 | CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old; |
| 737 | break; |
| 738 | case DAC960_V1_Read: |
| 739 | CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old; |
| 740 | DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox); |
| 741 | break; |
| 742 | case DAC960_V1_Write: |
| 743 | CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old; |
| 744 | DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox); |
| 745 | break; |
| 746 | case DAC960_V1_ReadWithScatterGather: |
| 747 | CommandMailbox->Common.CommandOpcode = |
| 748 | DAC960_V1_ReadWithScatterGather_Old; |
| 749 | DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox); |
| 750 | break; |
| 751 | case DAC960_V1_WriteWithScatterGather: |
| 752 | CommandMailbox->Common.CommandOpcode = |
| 753 | DAC960_V1_WriteWithScatterGather_Old; |
| 754 | DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox); |
| 755 | break; |
| 756 | default: |
| 757 | break; |
| 758 | } |
| 759 | while (DAC960_PD_MailboxFullP(ControllerBaseAddress)) |
| 760 | udelay(1); |
| 761 | DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox); |
| 762 | DAC960_PD_NewCommand(ControllerBaseAddress); |
| 763 | } |
| 764 | |
| 765 | |
| 766 | /* |
| 767 | DAC960_ExecuteCommand executes Command and waits for completion. |
| 768 | */ |
| 769 | |
| 770 | static void DAC960_ExecuteCommand(DAC960_Command_T *Command) |
| 771 | { |
| 772 | DAC960_Controller_T *Controller = Command->Controller; |
| 773 | DECLARE_COMPLETION(Completion); |
| 774 | unsigned long flags; |
| 775 | Command->Completion = &Completion; |
| 776 | |
| 777 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 778 | DAC960_QueueCommand(Command); |
| 779 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 780 | |
| 781 | if (in_interrupt()) |
| 782 | return; |
| 783 | wait_for_completion(&Completion); |
| 784 | } |
| 785 | |
| 786 | |
| 787 | /* |
| 788 | DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3 |
| 789 | Command and waits for completion. It returns true on success and false |
| 790 | on failure. |
| 791 | */ |
| 792 | |
| 793 | static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller, |
| 794 | DAC960_V1_CommandOpcode_T CommandOpcode, |
| 795 | dma_addr_t DataDMA) |
| 796 | { |
| 797 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); |
| 798 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 799 | DAC960_V1_CommandStatus_T CommandStatus; |
| 800 | DAC960_V1_ClearCommand(Command); |
| 801 | Command->CommandType = DAC960_ImmediateCommand; |
| 802 | CommandMailbox->Type3.CommandOpcode = CommandOpcode; |
| 803 | CommandMailbox->Type3.BusAddress = DataDMA; |
| 804 | DAC960_ExecuteCommand(Command); |
| 805 | CommandStatus = Command->V1.CommandStatus; |
| 806 | DAC960_DeallocateCommand(Command); |
| 807 | return (CommandStatus == DAC960_V1_NormalCompletion); |
| 808 | } |
| 809 | |
| 810 | |
| 811 | /* |
| 812 | DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B |
| 813 | Command and waits for completion. It returns true on success and false |
| 814 | on failure. |
| 815 | */ |
| 816 | |
| 817 | static boolean DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller, |
| 818 | DAC960_V1_CommandOpcode_T CommandOpcode, |
| 819 | unsigned char CommandOpcode2, |
| 820 | dma_addr_t DataDMA) |
| 821 | { |
| 822 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); |
| 823 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 824 | DAC960_V1_CommandStatus_T CommandStatus; |
| 825 | DAC960_V1_ClearCommand(Command); |
| 826 | Command->CommandType = DAC960_ImmediateCommand; |
| 827 | CommandMailbox->Type3B.CommandOpcode = CommandOpcode; |
| 828 | CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2; |
| 829 | CommandMailbox->Type3B.BusAddress = DataDMA; |
| 830 | DAC960_ExecuteCommand(Command); |
| 831 | CommandStatus = Command->V1.CommandStatus; |
| 832 | DAC960_DeallocateCommand(Command); |
| 833 | return (CommandStatus == DAC960_V1_NormalCompletion); |
| 834 | } |
| 835 | |
| 836 | |
| 837 | /* |
| 838 | DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D |
| 839 | Command and waits for completion. It returns true on success and false |
| 840 | on failure. |
| 841 | */ |
| 842 | |
| 843 | static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller, |
| 844 | DAC960_V1_CommandOpcode_T CommandOpcode, |
| 845 | unsigned char Channel, |
| 846 | unsigned char TargetID, |
| 847 | dma_addr_t DataDMA) |
| 848 | { |
| 849 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); |
| 850 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 851 | DAC960_V1_CommandStatus_T CommandStatus; |
| 852 | DAC960_V1_ClearCommand(Command); |
| 853 | Command->CommandType = DAC960_ImmediateCommand; |
| 854 | CommandMailbox->Type3D.CommandOpcode = CommandOpcode; |
| 855 | CommandMailbox->Type3D.Channel = Channel; |
| 856 | CommandMailbox->Type3D.TargetID = TargetID; |
| 857 | CommandMailbox->Type3D.BusAddress = DataDMA; |
| 858 | DAC960_ExecuteCommand(Command); |
| 859 | CommandStatus = Command->V1.CommandStatus; |
| 860 | DAC960_DeallocateCommand(Command); |
| 861 | return (CommandStatus == DAC960_V1_NormalCompletion); |
| 862 | } |
| 863 | |
| 864 | |
| 865 | /* |
| 866 | DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information |
| 867 | Reading IOCTL Command and waits for completion. It returns true on success |
| 868 | and false on failure. |
| 869 | |
| 870 | Return data in The controller's HealthStatusBuffer, which is dma-able memory |
| 871 | */ |
| 872 | |
| 873 | static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller) |
| 874 | { |
| 875 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); |
| 876 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 877 | DAC960_V2_CommandStatus_T CommandStatus; |
| 878 | DAC960_V2_ClearCommand(Command); |
| 879 | Command->CommandType = DAC960_ImmediateCommand; |
| 880 | CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL; |
| 881 | CommandMailbox->Common.CommandControlBits |
| 882 | .DataTransferControllerToHost = true; |
| 883 | CommandMailbox->Common.CommandControlBits |
| 884 | .NoAutoRequestSense = true; |
| 885 | CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T); |
| 886 | CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus; |
| 887 | CommandMailbox->Common.DataTransferMemoryAddress |
| 888 | .ScatterGatherSegments[0] |
| 889 | .SegmentDataPointer = |
| 890 | Controller->V2.HealthStatusBufferDMA; |
| 891 | CommandMailbox->Common.DataTransferMemoryAddress |
| 892 | .ScatterGatherSegments[0] |
| 893 | .SegmentByteCount = |
| 894 | CommandMailbox->Common.DataTransferSize; |
| 895 | DAC960_ExecuteCommand(Command); |
| 896 | CommandStatus = Command->V2.CommandStatus; |
| 897 | DAC960_DeallocateCommand(Command); |
| 898 | return (CommandStatus == DAC960_V2_NormalCompletion); |
| 899 | } |
| 900 | |
| 901 | |
| 902 | /* |
| 903 | DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller |
| 904 | Information Reading IOCTL Command and waits for completion. It returns |
| 905 | true on success and false on failure. |
| 906 | |
| 907 | Data is returned in the controller's V2.NewControllerInformation dma-able |
| 908 | memory buffer. |
| 909 | */ |
| 910 | |
| 911 | static boolean DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller) |
| 912 | { |
| 913 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); |
| 914 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 915 | DAC960_V2_CommandStatus_T CommandStatus; |
| 916 | DAC960_V2_ClearCommand(Command); |
| 917 | Command->CommandType = DAC960_ImmediateCommand; |
| 918 | CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL; |
| 919 | CommandMailbox->ControllerInfo.CommandControlBits |
| 920 | .DataTransferControllerToHost = true; |
| 921 | CommandMailbox->ControllerInfo.CommandControlBits |
| 922 | .NoAutoRequestSense = true; |
| 923 | CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T); |
| 924 | CommandMailbox->ControllerInfo.ControllerNumber = 0; |
| 925 | CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo; |
| 926 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress |
| 927 | .ScatterGatherSegments[0] |
| 928 | .SegmentDataPointer = |
| 929 | Controller->V2.NewControllerInformationDMA; |
| 930 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress |
| 931 | .ScatterGatherSegments[0] |
| 932 | .SegmentByteCount = |
| 933 | CommandMailbox->ControllerInfo.DataTransferSize; |
| 934 | DAC960_ExecuteCommand(Command); |
| 935 | CommandStatus = Command->V2.CommandStatus; |
| 936 | DAC960_DeallocateCommand(Command); |
| 937 | return (CommandStatus == DAC960_V2_NormalCompletion); |
| 938 | } |
| 939 | |
| 940 | |
| 941 | /* |
| 942 | DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical |
| 943 | Device Information Reading IOCTL Command and waits for completion. It |
| 944 | returns true on success and false on failure. |
| 945 | |
| 946 | Data is returned in the controller's V2.NewLogicalDeviceInformation |
| 947 | */ |
| 948 | |
| 949 | static boolean DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller, |
| 950 | unsigned short LogicalDeviceNumber) |
| 951 | { |
| 952 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); |
| 953 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 954 | DAC960_V2_CommandStatus_T CommandStatus; |
| 955 | |
| 956 | DAC960_V2_ClearCommand(Command); |
| 957 | Command->CommandType = DAC960_ImmediateCommand; |
| 958 | CommandMailbox->LogicalDeviceInfo.CommandOpcode = |
| 959 | DAC960_V2_IOCTL; |
| 960 | CommandMailbox->LogicalDeviceInfo.CommandControlBits |
| 961 | .DataTransferControllerToHost = true; |
| 962 | CommandMailbox->LogicalDeviceInfo.CommandControlBits |
| 963 | .NoAutoRequestSense = true; |
| 964 | CommandMailbox->LogicalDeviceInfo.DataTransferSize = |
| 965 | sizeof(DAC960_V2_LogicalDeviceInfo_T); |
| 966 | CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber = |
| 967 | LogicalDeviceNumber; |
| 968 | CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid; |
| 969 | CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress |
| 970 | .ScatterGatherSegments[0] |
| 971 | .SegmentDataPointer = |
| 972 | Controller->V2.NewLogicalDeviceInformationDMA; |
| 973 | CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress |
| 974 | .ScatterGatherSegments[0] |
| 975 | .SegmentByteCount = |
| 976 | CommandMailbox->LogicalDeviceInfo.DataTransferSize; |
| 977 | DAC960_ExecuteCommand(Command); |
| 978 | CommandStatus = Command->V2.CommandStatus; |
| 979 | DAC960_DeallocateCommand(Command); |
| 980 | return (CommandStatus == DAC960_V2_NormalCompletion); |
| 981 | } |
| 982 | |
| 983 | |
| 984 | /* |
| 985 | DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read |
| 986 | Physical Device Information" IOCTL Command and waits for completion. It |
| 987 | returns true on success and false on failure. |
| 988 | |
| 989 | The Channel, TargetID, LogicalUnit arguments should be 0 the first time |
| 990 | this function is called for a given controller. This will return data |
| 991 | for the "first" device on that controller. The returned data includes a |
| 992 | Channel, TargetID, LogicalUnit that can be passed in to this routine to |
| 993 | get data for the NEXT device on that controller. |
| 994 | |
| 995 | Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able |
| 996 | memory buffer. |
| 997 | |
| 998 | */ |
| 999 | |
| 1000 | static boolean DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller, |
| 1001 | unsigned char Channel, |
| 1002 | unsigned char TargetID, |
| 1003 | unsigned char LogicalUnit) |
| 1004 | { |
| 1005 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); |
| 1006 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 1007 | DAC960_V2_CommandStatus_T CommandStatus; |
| 1008 | |
| 1009 | DAC960_V2_ClearCommand(Command); |
| 1010 | Command->CommandType = DAC960_ImmediateCommand; |
| 1011 | CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL; |
| 1012 | CommandMailbox->PhysicalDeviceInfo.CommandControlBits |
| 1013 | .DataTransferControllerToHost = true; |
| 1014 | CommandMailbox->PhysicalDeviceInfo.CommandControlBits |
| 1015 | .NoAutoRequestSense = true; |
| 1016 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize = |
| 1017 | sizeof(DAC960_V2_PhysicalDeviceInfo_T); |
| 1018 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit; |
| 1019 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID; |
| 1020 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel; |
| 1021 | CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = |
| 1022 | DAC960_V2_GetPhysicalDeviceInfoValid; |
| 1023 | CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress |
| 1024 | .ScatterGatherSegments[0] |
| 1025 | .SegmentDataPointer = |
| 1026 | Controller->V2.NewPhysicalDeviceInformationDMA; |
| 1027 | CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress |
| 1028 | .ScatterGatherSegments[0] |
| 1029 | .SegmentByteCount = |
| 1030 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize; |
| 1031 | DAC960_ExecuteCommand(Command); |
| 1032 | CommandStatus = Command->V2.CommandStatus; |
| 1033 | DAC960_DeallocateCommand(Command); |
| 1034 | return (CommandStatus == DAC960_V2_NormalCompletion); |
| 1035 | } |
| 1036 | |
| 1037 | |
| 1038 | static void DAC960_V2_ConstructNewUnitSerialNumber( |
| 1039 | DAC960_Controller_T *Controller, |
| 1040 | DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID, |
| 1041 | int LogicalUnit) |
| 1042 | { |
| 1043 | CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru; |
| 1044 | CommandMailbox->SCSI_10.CommandControlBits |
| 1045 | .DataTransferControllerToHost = true; |
| 1046 | CommandMailbox->SCSI_10.CommandControlBits |
| 1047 | .NoAutoRequestSense = true; |
| 1048 | CommandMailbox->SCSI_10.DataTransferSize = |
| 1049 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); |
| 1050 | CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit; |
| 1051 | CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID; |
| 1052 | CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel; |
| 1053 | CommandMailbox->SCSI_10.CDBLength = 6; |
| 1054 | CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */ |
| 1055 | CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */ |
| 1056 | CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */ |
| 1057 | CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */ |
| 1058 | CommandMailbox->SCSI_10.SCSI_CDB[4] = |
| 1059 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); |
| 1060 | CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */ |
| 1061 | CommandMailbox->SCSI_10.DataTransferMemoryAddress |
| 1062 | .ScatterGatherSegments[0] |
| 1063 | .SegmentDataPointer = |
| 1064 | Controller->V2.NewInquiryUnitSerialNumberDMA; |
| 1065 | CommandMailbox->SCSI_10.DataTransferMemoryAddress |
| 1066 | .ScatterGatherSegments[0] |
| 1067 | .SegmentByteCount = |
| 1068 | CommandMailbox->SCSI_10.DataTransferSize; |
| 1069 | } |
| 1070 | |
| 1071 | |
| 1072 | /* |
| 1073 | DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through |
| 1074 | Inquiry command to a SCSI device identified by Channel number, |
| 1075 | Target id, Logical Unit Number. This function Waits for completion |
| 1076 | of the command. |
| 1077 | |
| 1078 | The return data includes Unit Serial Number information for the |
| 1079 | specified device. |
| 1080 | |
| 1081 | Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able |
| 1082 | memory buffer. |
| 1083 | */ |
| 1084 | |
| 1085 | static boolean DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller, |
| 1086 | int Channel, int TargetID, int LogicalUnit) |
| 1087 | { |
| 1088 | DAC960_Command_T *Command; |
| 1089 | DAC960_V2_CommandMailbox_T *CommandMailbox; |
| 1090 | DAC960_V2_CommandStatus_T CommandStatus; |
| 1091 | |
| 1092 | Command = DAC960_AllocateCommand(Controller); |
| 1093 | CommandMailbox = &Command->V2.CommandMailbox; |
| 1094 | DAC960_V2_ClearCommand(Command); |
| 1095 | Command->CommandType = DAC960_ImmediateCommand; |
| 1096 | |
| 1097 | DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox, |
| 1098 | Channel, TargetID, LogicalUnit); |
| 1099 | |
| 1100 | DAC960_ExecuteCommand(Command); |
| 1101 | CommandStatus = Command->V2.CommandStatus; |
| 1102 | DAC960_DeallocateCommand(Command); |
| 1103 | return (CommandStatus == DAC960_V2_NormalCompletion); |
| 1104 | } |
| 1105 | |
| 1106 | |
| 1107 | /* |
| 1108 | DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device |
| 1109 | Operation IOCTL Command and waits for completion. It returns true on |
| 1110 | success and false on failure. |
| 1111 | */ |
| 1112 | |
| 1113 | static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller, |
| 1114 | DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode, |
| 1115 | DAC960_V2_OperationDevice_T |
| 1116 | OperationDevice) |
| 1117 | { |
| 1118 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); |
| 1119 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 1120 | DAC960_V2_CommandStatus_T CommandStatus; |
| 1121 | DAC960_V2_ClearCommand(Command); |
| 1122 | Command->CommandType = DAC960_ImmediateCommand; |
| 1123 | CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL; |
| 1124 | CommandMailbox->DeviceOperation.CommandControlBits |
| 1125 | .DataTransferControllerToHost = true; |
| 1126 | CommandMailbox->DeviceOperation.CommandControlBits |
| 1127 | .NoAutoRequestSense = true; |
| 1128 | CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode; |
| 1129 | CommandMailbox->DeviceOperation.OperationDevice = OperationDevice; |
| 1130 | DAC960_ExecuteCommand(Command); |
| 1131 | CommandStatus = Command->V2.CommandStatus; |
| 1132 | DAC960_DeallocateCommand(Command); |
| 1133 | return (CommandStatus == DAC960_V2_NormalCompletion); |
| 1134 | } |
| 1135 | |
| 1136 | |
| 1137 | /* |
| 1138 | DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface |
| 1139 | for DAC960 V1 Firmware Controllers. |
| 1140 | |
| 1141 | PD and P controller types have no memory mailbox, but still need the |
| 1142 | other dma mapped memory. |
| 1143 | */ |
| 1144 | |
| 1145 | static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T |
| 1146 | *Controller) |
| 1147 | { |
| 1148 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 1149 | DAC960_HardwareType_T hw_type = Controller->HardwareType; |
| 1150 | struct pci_dev *PCI_Device = Controller->PCIDevice; |
| 1151 | struct dma_loaf *DmaPages = &Controller->DmaPages; |
| 1152 | size_t DmaPagesSize; |
| 1153 | size_t CommandMailboxesSize; |
| 1154 | size_t StatusMailboxesSize; |
| 1155 | |
| 1156 | DAC960_V1_CommandMailbox_T *CommandMailboxesMemory; |
| 1157 | dma_addr_t CommandMailboxesMemoryDMA; |
| 1158 | |
| 1159 | DAC960_V1_StatusMailbox_T *StatusMailboxesMemory; |
| 1160 | dma_addr_t StatusMailboxesMemoryDMA; |
| 1161 | |
| 1162 | DAC960_V1_CommandMailbox_T CommandMailbox; |
| 1163 | DAC960_V1_CommandStatus_T CommandStatus; |
| 1164 | int TimeoutCounter; |
| 1165 | int i; |
| 1166 | |
| 1167 | |
| 1168 | if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V1_PciDmaMask)) |
| 1169 | return DAC960_Failure(Controller, "DMA mask out of range"); |
| 1170 | Controller->BounceBufferLimit = DAC690_V1_PciDmaMask; |
| 1171 | |
| 1172 | if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) { |
| 1173 | CommandMailboxesSize = 0; |
| 1174 | StatusMailboxesSize = 0; |
| 1175 | } else { |
| 1176 | CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T); |
| 1177 | StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T); |
| 1178 | } |
| 1179 | DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize + |
| 1180 | sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) + |
| 1181 | sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) + |
| 1182 | sizeof(DAC960_V1_RebuildProgress_T) + |
| 1183 | sizeof(DAC960_V1_LogicalDriveInformationArray_T) + |
| 1184 | sizeof(DAC960_V1_BackgroundInitializationStatus_T) + |
| 1185 | sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) + |
| 1186 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); |
| 1187 | |
| 1188 | if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) |
| 1189 | return false; |
| 1190 | |
| 1191 | |
| 1192 | if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) |
| 1193 | goto skip_mailboxes; |
| 1194 | |
| 1195 | CommandMailboxesMemory = slice_dma_loaf(DmaPages, |
| 1196 | CommandMailboxesSize, &CommandMailboxesMemoryDMA); |
| 1197 | |
| 1198 | /* These are the base addresses for the command memory mailbox array */ |
| 1199 | Controller->V1.FirstCommandMailbox = CommandMailboxesMemory; |
| 1200 | Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA; |
| 1201 | |
| 1202 | CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1; |
| 1203 | Controller->V1.LastCommandMailbox = CommandMailboxesMemory; |
| 1204 | Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox; |
| 1205 | Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox; |
| 1206 | Controller->V1.PreviousCommandMailbox2 = |
| 1207 | Controller->V1.LastCommandMailbox - 1; |
| 1208 | |
| 1209 | /* These are the base addresses for the status memory mailbox array */ |
| 1210 | StatusMailboxesMemory = slice_dma_loaf(DmaPages, |
| 1211 | StatusMailboxesSize, &StatusMailboxesMemoryDMA); |
| 1212 | |
| 1213 | Controller->V1.FirstStatusMailbox = StatusMailboxesMemory; |
| 1214 | Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA; |
| 1215 | StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1; |
| 1216 | Controller->V1.LastStatusMailbox = StatusMailboxesMemory; |
| 1217 | Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox; |
| 1218 | |
| 1219 | skip_mailboxes: |
| 1220 | Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages, |
| 1221 | sizeof(DAC960_V1_DCDB_T), |
| 1222 | &Controller->V1.MonitoringDCDB_DMA); |
| 1223 | |
| 1224 | Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages, |
| 1225 | sizeof(DAC960_V1_Enquiry_T), |
| 1226 | &Controller->V1.NewEnquiryDMA); |
| 1227 | |
| 1228 | Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages, |
| 1229 | sizeof(DAC960_V1_ErrorTable_T), |
| 1230 | &Controller->V1.NewErrorTableDMA); |
| 1231 | |
| 1232 | Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages, |
| 1233 | sizeof(DAC960_V1_EventLogEntry_T), |
| 1234 | &Controller->V1.EventLogEntryDMA); |
| 1235 | |
| 1236 | Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages, |
| 1237 | sizeof(DAC960_V1_RebuildProgress_T), |
| 1238 | &Controller->V1.RebuildProgressDMA); |
| 1239 | |
| 1240 | Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages, |
| 1241 | sizeof(DAC960_V1_LogicalDriveInformationArray_T), |
| 1242 | &Controller->V1.NewLogicalDriveInformationDMA); |
| 1243 | |
| 1244 | Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages, |
| 1245 | sizeof(DAC960_V1_BackgroundInitializationStatus_T), |
| 1246 | &Controller->V1.BackgroundInitializationStatusDMA); |
| 1247 | |
| 1248 | Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages, |
| 1249 | sizeof(DAC960_V1_DeviceState_T), |
| 1250 | &Controller->V1.NewDeviceStateDMA); |
| 1251 | |
| 1252 | Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages, |
| 1253 | sizeof(DAC960_SCSI_Inquiry_T), |
| 1254 | &Controller->V1.NewInquiryStandardDataDMA); |
| 1255 | |
| 1256 | Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages, |
| 1257 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), |
| 1258 | &Controller->V1.NewInquiryUnitSerialNumberDMA); |
| 1259 | |
| 1260 | if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) |
| 1261 | return true; |
| 1262 | |
| 1263 | /* Enable the Memory Mailbox Interface. */ |
| 1264 | Controller->V1.DualModeMemoryMailboxInterface = true; |
| 1265 | CommandMailbox.TypeX.CommandOpcode = 0x2B; |
| 1266 | CommandMailbox.TypeX.CommandIdentifier = 0; |
| 1267 | CommandMailbox.TypeX.CommandOpcode2 = 0x14; |
| 1268 | CommandMailbox.TypeX.CommandMailboxesBusAddress = |
| 1269 | Controller->V1.FirstCommandMailboxDMA; |
| 1270 | CommandMailbox.TypeX.StatusMailboxesBusAddress = |
| 1271 | Controller->V1.FirstStatusMailboxDMA; |
| 1272 | #define TIMEOUT_COUNT 1000000 |
| 1273 | |
| 1274 | for (i = 0; i < 2; i++) |
| 1275 | switch (Controller->HardwareType) |
| 1276 | { |
| 1277 | case DAC960_LA_Controller: |
| 1278 | TimeoutCounter = TIMEOUT_COUNT; |
| 1279 | while (--TimeoutCounter >= 0) |
| 1280 | { |
| 1281 | if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress)) |
| 1282 | break; |
| 1283 | udelay(10); |
| 1284 | } |
| 1285 | if (TimeoutCounter < 0) return false; |
| 1286 | DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox); |
| 1287 | DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress); |
| 1288 | TimeoutCounter = TIMEOUT_COUNT; |
| 1289 | while (--TimeoutCounter >= 0) |
| 1290 | { |
| 1291 | if (DAC960_LA_HardwareMailboxStatusAvailableP( |
| 1292 | ControllerBaseAddress)) |
| 1293 | break; |
| 1294 | udelay(10); |
| 1295 | } |
| 1296 | if (TimeoutCounter < 0) return false; |
| 1297 | CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress); |
| 1298 | DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); |
| 1299 | DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); |
| 1300 | if (CommandStatus == DAC960_V1_NormalCompletion) return true; |
| 1301 | Controller->V1.DualModeMemoryMailboxInterface = false; |
| 1302 | CommandMailbox.TypeX.CommandOpcode2 = 0x10; |
| 1303 | break; |
| 1304 | case DAC960_PG_Controller: |
| 1305 | TimeoutCounter = TIMEOUT_COUNT; |
| 1306 | while (--TimeoutCounter >= 0) |
| 1307 | { |
| 1308 | if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress)) |
| 1309 | break; |
| 1310 | udelay(10); |
| 1311 | } |
| 1312 | if (TimeoutCounter < 0) return false; |
| 1313 | DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox); |
| 1314 | DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress); |
| 1315 | |
| 1316 | TimeoutCounter = TIMEOUT_COUNT; |
| 1317 | while (--TimeoutCounter >= 0) |
| 1318 | { |
| 1319 | if (DAC960_PG_HardwareMailboxStatusAvailableP( |
| 1320 | ControllerBaseAddress)) |
| 1321 | break; |
| 1322 | udelay(10); |
| 1323 | } |
| 1324 | if (TimeoutCounter < 0) return false; |
| 1325 | CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress); |
| 1326 | DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); |
| 1327 | DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); |
| 1328 | if (CommandStatus == DAC960_V1_NormalCompletion) return true; |
| 1329 | Controller->V1.DualModeMemoryMailboxInterface = false; |
| 1330 | CommandMailbox.TypeX.CommandOpcode2 = 0x10; |
| 1331 | break; |
| 1332 | default: |
| 1333 | DAC960_Failure(Controller, "Unknown Controller Type\n"); |
| 1334 | break; |
| 1335 | } |
| 1336 | return false; |
| 1337 | } |
| 1338 | |
| 1339 | |
| 1340 | /* |
| 1341 | DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface |
| 1342 | for DAC960 V2 Firmware Controllers. |
| 1343 | |
| 1344 | Aggregate the space needed for the controller's memory mailbox and |
| 1345 | the other data structures that will be targets of dma transfers with |
| 1346 | the controller. Allocate a dma-mapped region of memory to hold these |
| 1347 | structures. Then, save CPU pointers and dma_addr_t values to reference |
| 1348 | the structures that are contained in that region. |
| 1349 | */ |
| 1350 | |
| 1351 | static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T |
| 1352 | *Controller) |
| 1353 | { |
| 1354 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 1355 | struct pci_dev *PCI_Device = Controller->PCIDevice; |
| 1356 | struct dma_loaf *DmaPages = &Controller->DmaPages; |
| 1357 | size_t DmaPagesSize; |
| 1358 | size_t CommandMailboxesSize; |
| 1359 | size_t StatusMailboxesSize; |
| 1360 | |
| 1361 | DAC960_V2_CommandMailbox_T *CommandMailboxesMemory; |
| 1362 | dma_addr_t CommandMailboxesMemoryDMA; |
| 1363 | |
| 1364 | DAC960_V2_StatusMailbox_T *StatusMailboxesMemory; |
| 1365 | dma_addr_t StatusMailboxesMemoryDMA; |
| 1366 | |
| 1367 | DAC960_V2_CommandMailbox_T *CommandMailbox; |
| 1368 | dma_addr_t CommandMailboxDMA; |
| 1369 | DAC960_V2_CommandStatus_T CommandStatus; |
| 1370 | |
| 1371 | if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V2_PciDmaMask)) |
| 1372 | return DAC960_Failure(Controller, "DMA mask out of range"); |
| 1373 | Controller->BounceBufferLimit = DAC690_V2_PciDmaMask; |
| 1374 | |
| 1375 | /* This is a temporary dma mapping, used only in the scope of this function */ |
| 1376 | CommandMailbox = |
| 1377 | (DAC960_V2_CommandMailbox_T *)pci_alloc_consistent( PCI_Device, |
| 1378 | sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA); |
| 1379 | if (CommandMailbox == NULL) |
| 1380 | return false; |
| 1381 | |
| 1382 | CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T); |
| 1383 | StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T); |
| 1384 | DmaPagesSize = |
| 1385 | CommandMailboxesSize + StatusMailboxesSize + |
| 1386 | sizeof(DAC960_V2_HealthStatusBuffer_T) + |
| 1387 | sizeof(DAC960_V2_ControllerInfo_T) + |
| 1388 | sizeof(DAC960_V2_LogicalDeviceInfo_T) + |
| 1389 | sizeof(DAC960_V2_PhysicalDeviceInfo_T) + |
| 1390 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) + |
| 1391 | sizeof(DAC960_V2_Event_T) + |
| 1392 | sizeof(DAC960_V2_PhysicalToLogicalDevice_T); |
| 1393 | |
| 1394 | if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) { |
| 1395 | pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T), |
| 1396 | CommandMailbox, CommandMailboxDMA); |
| 1397 | return false; |
| 1398 | } |
| 1399 | |
| 1400 | CommandMailboxesMemory = slice_dma_loaf(DmaPages, |
| 1401 | CommandMailboxesSize, &CommandMailboxesMemoryDMA); |
| 1402 | |
| 1403 | /* These are the base addresses for the command memory mailbox array */ |
| 1404 | Controller->V2.FirstCommandMailbox = CommandMailboxesMemory; |
| 1405 | Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA; |
| 1406 | |
| 1407 | CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1; |
| 1408 | Controller->V2.LastCommandMailbox = CommandMailboxesMemory; |
| 1409 | Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox; |
| 1410 | Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox; |
| 1411 | Controller->V2.PreviousCommandMailbox2 = |
| 1412 | Controller->V2.LastCommandMailbox - 1; |
| 1413 | |
| 1414 | /* These are the base addresses for the status memory mailbox array */ |
| 1415 | StatusMailboxesMemory = slice_dma_loaf(DmaPages, |
| 1416 | StatusMailboxesSize, &StatusMailboxesMemoryDMA); |
| 1417 | |
| 1418 | Controller->V2.FirstStatusMailbox = StatusMailboxesMemory; |
| 1419 | Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA; |
| 1420 | StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1; |
| 1421 | Controller->V2.LastStatusMailbox = StatusMailboxesMemory; |
| 1422 | Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox; |
| 1423 | |
| 1424 | Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages, |
| 1425 | sizeof(DAC960_V2_HealthStatusBuffer_T), |
| 1426 | &Controller->V2.HealthStatusBufferDMA); |
| 1427 | |
| 1428 | Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages, |
| 1429 | sizeof(DAC960_V2_ControllerInfo_T), |
| 1430 | &Controller->V2.NewControllerInformationDMA); |
| 1431 | |
| 1432 | Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages, |
| 1433 | sizeof(DAC960_V2_LogicalDeviceInfo_T), |
| 1434 | &Controller->V2.NewLogicalDeviceInformationDMA); |
| 1435 | |
| 1436 | Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages, |
| 1437 | sizeof(DAC960_V2_PhysicalDeviceInfo_T), |
| 1438 | &Controller->V2.NewPhysicalDeviceInformationDMA); |
| 1439 | |
| 1440 | Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages, |
| 1441 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), |
| 1442 | &Controller->V2.NewInquiryUnitSerialNumberDMA); |
| 1443 | |
| 1444 | Controller->V2.Event = slice_dma_loaf(DmaPages, |
| 1445 | sizeof(DAC960_V2_Event_T), |
| 1446 | &Controller->V2.EventDMA); |
| 1447 | |
| 1448 | Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages, |
| 1449 | sizeof(DAC960_V2_PhysicalToLogicalDevice_T), |
| 1450 | &Controller->V2.PhysicalToLogicalDeviceDMA); |
| 1451 | |
| 1452 | /* |
| 1453 | Enable the Memory Mailbox Interface. |
| 1454 | |
| 1455 | I don't know why we can't just use one of the memory mailboxes |
| 1456 | we just allocated to do this, instead of using this temporary one. |
| 1457 | Try this change later. |
| 1458 | */ |
| 1459 | memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T)); |
| 1460 | CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1; |
| 1461 | CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL; |
| 1462 | CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true; |
| 1463 | CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB = |
| 1464 | (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10; |
| 1465 | CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB = |
| 1466 | (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10; |
| 1467 | CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0; |
| 1468 | CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0; |
| 1469 | CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0; |
| 1470 | CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox; |
| 1471 | CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1; |
| 1472 | CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress = |
| 1473 | Controller->V2.HealthStatusBufferDMA; |
| 1474 | CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress = |
| 1475 | Controller->V2.FirstCommandMailboxDMA; |
| 1476 | CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress = |
| 1477 | Controller->V2.FirstStatusMailboxDMA; |
| 1478 | switch (Controller->HardwareType) |
| 1479 | { |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 1480 | case DAC960_GEM_Controller: |
| 1481 | while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress)) |
| 1482 | udelay(1); |
| 1483 | DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA); |
| 1484 | DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress); |
| 1485 | while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress)) |
| 1486 | udelay(1); |
| 1487 | CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress); |
| 1488 | DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); |
| 1489 | DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); |
| 1490 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1491 | case DAC960_BA_Controller: |
| 1492 | while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress)) |
| 1493 | udelay(1); |
| 1494 | DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA); |
| 1495 | DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress); |
| 1496 | while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress)) |
| 1497 | udelay(1); |
| 1498 | CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress); |
| 1499 | DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); |
| 1500 | DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); |
| 1501 | break; |
| 1502 | case DAC960_LP_Controller: |
| 1503 | while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress)) |
| 1504 | udelay(1); |
| 1505 | DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA); |
| 1506 | DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress); |
| 1507 | while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress)) |
| 1508 | udelay(1); |
| 1509 | CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress); |
| 1510 | DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); |
| 1511 | DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); |
| 1512 | break; |
| 1513 | default: |
| 1514 | DAC960_Failure(Controller, "Unknown Controller Type\n"); |
| 1515 | CommandStatus = DAC960_V2_AbormalCompletion; |
| 1516 | break; |
| 1517 | } |
| 1518 | pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T), |
| 1519 | CommandMailbox, CommandMailboxDMA); |
| 1520 | return (CommandStatus == DAC960_V2_NormalCompletion); |
| 1521 | } |
| 1522 | |
| 1523 | |
| 1524 | /* |
| 1525 | DAC960_V1_ReadControllerConfiguration reads the Configuration Information |
| 1526 | from DAC960 V1 Firmware Controllers and initializes the Controller structure. |
| 1527 | */ |
| 1528 | |
| 1529 | static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T |
| 1530 | *Controller) |
| 1531 | { |
| 1532 | DAC960_V1_Enquiry2_T *Enquiry2; |
| 1533 | dma_addr_t Enquiry2DMA; |
| 1534 | DAC960_V1_Config2_T *Config2; |
| 1535 | dma_addr_t Config2DMA; |
| 1536 | int LogicalDriveNumber, Channel, TargetID; |
| 1537 | struct dma_loaf local_dma; |
| 1538 | |
| 1539 | if (!init_dma_loaf(Controller->PCIDevice, &local_dma, |
| 1540 | sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T))) |
| 1541 | return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION"); |
| 1542 | |
| 1543 | Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA); |
| 1544 | Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA); |
| 1545 | |
| 1546 | if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry, |
| 1547 | Controller->V1.NewEnquiryDMA)) { |
| 1548 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1549 | return DAC960_Failure(Controller, "ENQUIRY"); |
| 1550 | } |
| 1551 | memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry, |
| 1552 | sizeof(DAC960_V1_Enquiry_T)); |
| 1553 | |
| 1554 | if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) { |
| 1555 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1556 | return DAC960_Failure(Controller, "ENQUIRY2"); |
| 1557 | } |
| 1558 | |
| 1559 | if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) { |
| 1560 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1561 | return DAC960_Failure(Controller, "READ CONFIG2"); |
| 1562 | } |
| 1563 | |
| 1564 | if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation, |
| 1565 | Controller->V1.NewLogicalDriveInformationDMA)) { |
| 1566 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1567 | return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION"); |
| 1568 | } |
| 1569 | memcpy(&Controller->V1.LogicalDriveInformation, |
| 1570 | Controller->V1.NewLogicalDriveInformation, |
| 1571 | sizeof(DAC960_V1_LogicalDriveInformationArray_T)); |
| 1572 | |
| 1573 | for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++) |
| 1574 | for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) { |
| 1575 | if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState, |
| 1576 | Channel, TargetID, |
| 1577 | Controller->V1.NewDeviceStateDMA)) { |
| 1578 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1579 | return DAC960_Failure(Controller, "GET DEVICE STATE"); |
| 1580 | } |
| 1581 | memcpy(&Controller->V1.DeviceState[Channel][TargetID], |
| 1582 | Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T)); |
| 1583 | } |
| 1584 | /* |
| 1585 | Initialize the Controller Model Name and Full Model Name fields. |
| 1586 | */ |
| 1587 | switch (Enquiry2->HardwareID.SubModel) |
| 1588 | { |
| 1589 | case DAC960_V1_P_PD_PU: |
| 1590 | if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra) |
| 1591 | strcpy(Controller->ModelName, "DAC960PU"); |
| 1592 | else strcpy(Controller->ModelName, "DAC960PD"); |
| 1593 | break; |
| 1594 | case DAC960_V1_PL: |
| 1595 | strcpy(Controller->ModelName, "DAC960PL"); |
| 1596 | break; |
| 1597 | case DAC960_V1_PG: |
| 1598 | strcpy(Controller->ModelName, "DAC960PG"); |
| 1599 | break; |
| 1600 | case DAC960_V1_PJ: |
| 1601 | strcpy(Controller->ModelName, "DAC960PJ"); |
| 1602 | break; |
| 1603 | case DAC960_V1_PR: |
| 1604 | strcpy(Controller->ModelName, "DAC960PR"); |
| 1605 | break; |
| 1606 | case DAC960_V1_PT: |
| 1607 | strcpy(Controller->ModelName, "DAC960PT"); |
| 1608 | break; |
| 1609 | case DAC960_V1_PTL0: |
| 1610 | strcpy(Controller->ModelName, "DAC960PTL0"); |
| 1611 | break; |
| 1612 | case DAC960_V1_PRL: |
| 1613 | strcpy(Controller->ModelName, "DAC960PRL"); |
| 1614 | break; |
| 1615 | case DAC960_V1_PTL1: |
| 1616 | strcpy(Controller->ModelName, "DAC960PTL1"); |
| 1617 | break; |
| 1618 | case DAC960_V1_1164P: |
| 1619 | strcpy(Controller->ModelName, "DAC1164P"); |
| 1620 | break; |
| 1621 | default: |
| 1622 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1623 | return DAC960_Failure(Controller, "MODEL VERIFICATION"); |
| 1624 | } |
| 1625 | strcpy(Controller->FullModelName, "Mylex "); |
| 1626 | strcat(Controller->FullModelName, Controller->ModelName); |
| 1627 | /* |
| 1628 | Initialize the Controller Firmware Version field and verify that it |
| 1629 | is a supported firmware version. The supported firmware versions are: |
| 1630 | |
| 1631 | DAC1164P 5.06 and above |
| 1632 | DAC960PTL/PRL/PJ/PG 4.06 and above |
| 1633 | DAC960PU/PD/PL 3.51 and above |
| 1634 | DAC960PU/PD/PL/P 2.73 and above |
| 1635 | */ |
| 1636 | #if defined(CONFIG_ALPHA) |
| 1637 | /* |
| 1638 | DEC Alpha machines were often equipped with DAC960 cards that were |
| 1639 | OEMed from Mylex, and had their own custom firmware. Version 2.70, |
| 1640 | the last custom FW revision to be released by DEC for these older |
| 1641 | controllers, appears to work quite well with this driver. |
| 1642 | |
| 1643 | Cards tested successfully were several versions each of the PD and |
| 1644 | PU, called by DEC the KZPSC and KZPAC, respectively, and having |
| 1645 | the Manufacturer Numbers (from Mylex), usually on a sticker on the |
| 1646 | back of the board, of: |
| 1647 | |
| 1648 | KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel) |
| 1649 | KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel) |
| 1650 | */ |
| 1651 | # define FIRMWARE_27X "2.70" |
| 1652 | #else |
| 1653 | # define FIRMWARE_27X "2.73" |
| 1654 | #endif |
| 1655 | |
| 1656 | if (Enquiry2->FirmwareID.MajorVersion == 0) |
| 1657 | { |
| 1658 | Enquiry2->FirmwareID.MajorVersion = |
| 1659 | Controller->V1.Enquiry.MajorFirmwareVersion; |
| 1660 | Enquiry2->FirmwareID.MinorVersion = |
| 1661 | Controller->V1.Enquiry.MinorFirmwareVersion; |
| 1662 | Enquiry2->FirmwareID.FirmwareType = '0'; |
| 1663 | Enquiry2->FirmwareID.TurnID = 0; |
| 1664 | } |
| 1665 | sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d", |
| 1666 | Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion, |
| 1667 | Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID); |
| 1668 | if (!((Controller->FirmwareVersion[0] == '5' && |
| 1669 | strcmp(Controller->FirmwareVersion, "5.06") >= 0) || |
| 1670 | (Controller->FirmwareVersion[0] == '4' && |
| 1671 | strcmp(Controller->FirmwareVersion, "4.06") >= 0) || |
| 1672 | (Controller->FirmwareVersion[0] == '3' && |
| 1673 | strcmp(Controller->FirmwareVersion, "3.51") >= 0) || |
| 1674 | (Controller->FirmwareVersion[0] == '2' && |
| 1675 | strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0))) |
| 1676 | { |
| 1677 | DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION"); |
| 1678 | DAC960_Error("Firmware Version = '%s'\n", Controller, |
| 1679 | Controller->FirmwareVersion); |
| 1680 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1681 | return false; |
| 1682 | } |
| 1683 | /* |
| 1684 | Initialize the Controller Channels, Targets, Memory Size, and SAF-TE |
| 1685 | Enclosure Management Enabled fields. |
| 1686 | */ |
| 1687 | Controller->Channels = Enquiry2->ActualChannels; |
| 1688 | Controller->Targets = Enquiry2->MaxTargets; |
| 1689 | Controller->MemorySize = Enquiry2->MemorySize >> 20; |
| 1690 | Controller->V1.SAFTE_EnclosureManagementEnabled = |
| 1691 | (Enquiry2->FaultManagementType == DAC960_V1_SAFTE); |
| 1692 | /* |
| 1693 | Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive |
| 1694 | Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and |
| 1695 | Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one |
| 1696 | less than the Controller Queue Depth to allow for an automatic drive |
| 1697 | rebuild operation. |
| 1698 | */ |
| 1699 | Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands; |
| 1700 | Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1; |
| 1701 | if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth) |
| 1702 | Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth; |
| 1703 | Controller->LogicalDriveCount = |
| 1704 | Controller->V1.Enquiry.NumberOfLogicalDrives; |
| 1705 | Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand; |
| 1706 | Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries; |
| 1707 | Controller->DriverScatterGatherLimit = |
| 1708 | Controller->ControllerScatterGatherLimit; |
| 1709 | if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit) |
| 1710 | Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit; |
| 1711 | /* |
| 1712 | Initialize the Stripe Size, Segment Size, and Geometry Translation. |
| 1713 | */ |
| 1714 | Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor |
| 1715 | >> (10 - DAC960_BlockSizeBits); |
| 1716 | Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor |
| 1717 | >> (10 - DAC960_BlockSizeBits); |
| 1718 | switch (Config2->DriveGeometry) |
| 1719 | { |
| 1720 | case DAC960_V1_Geometry_128_32: |
| 1721 | Controller->V1.GeometryTranslationHeads = 128; |
| 1722 | Controller->V1.GeometryTranslationSectors = 32; |
| 1723 | break; |
| 1724 | case DAC960_V1_Geometry_255_63: |
| 1725 | Controller->V1.GeometryTranslationHeads = 255; |
| 1726 | Controller->V1.GeometryTranslationSectors = 63; |
| 1727 | break; |
| 1728 | default: |
| 1729 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1730 | return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY"); |
| 1731 | } |
| 1732 | /* |
| 1733 | Initialize the Background Initialization Status. |
| 1734 | */ |
| 1735 | if ((Controller->FirmwareVersion[0] == '4' && |
| 1736 | strcmp(Controller->FirmwareVersion, "4.08") >= 0) || |
| 1737 | (Controller->FirmwareVersion[0] == '5' && |
| 1738 | strcmp(Controller->FirmwareVersion, "5.08") >= 0)) |
| 1739 | { |
| 1740 | Controller->V1.BackgroundInitializationStatusSupported = true; |
| 1741 | DAC960_V1_ExecuteType3B(Controller, |
| 1742 | DAC960_V1_BackgroundInitializationControl, 0x20, |
| 1743 | Controller-> |
| 1744 | V1.BackgroundInitializationStatusDMA); |
| 1745 | memcpy(&Controller->V1.LastBackgroundInitializationStatus, |
| 1746 | Controller->V1.BackgroundInitializationStatus, |
| 1747 | sizeof(DAC960_V1_BackgroundInitializationStatus_T)); |
| 1748 | } |
| 1749 | /* |
| 1750 | Initialize the Logical Drive Initially Accessible flag. |
| 1751 | */ |
| 1752 | for (LogicalDriveNumber = 0; |
| 1753 | LogicalDriveNumber < Controller->LogicalDriveCount; |
| 1754 | LogicalDriveNumber++) |
| 1755 | if (Controller->V1.LogicalDriveInformation |
| 1756 | [LogicalDriveNumber].LogicalDriveState != |
| 1757 | DAC960_V1_LogicalDrive_Offline) |
| 1758 | Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true; |
| 1759 | Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress; |
| 1760 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 1761 | return true; |
| 1762 | } |
| 1763 | |
| 1764 | |
| 1765 | /* |
| 1766 | DAC960_V2_ReadControllerConfiguration reads the Configuration Information |
| 1767 | from DAC960 V2 Firmware Controllers and initializes the Controller structure. |
| 1768 | */ |
| 1769 | |
| 1770 | static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T |
| 1771 | *Controller) |
| 1772 | { |
| 1773 | DAC960_V2_ControllerInfo_T *ControllerInfo = |
| 1774 | &Controller->V2.ControllerInformation; |
| 1775 | unsigned short LogicalDeviceNumber = 0; |
| 1776 | int ModelNameLength; |
| 1777 | |
| 1778 | /* Get data into dma-able area, then copy into permanant location */ |
| 1779 | if (!DAC960_V2_NewControllerInfo(Controller)) |
| 1780 | return DAC960_Failure(Controller, "GET CONTROLLER INFO"); |
| 1781 | memcpy(ControllerInfo, Controller->V2.NewControllerInformation, |
| 1782 | sizeof(DAC960_V2_ControllerInfo_T)); |
| 1783 | |
| 1784 | |
| 1785 | if (!DAC960_V2_GeneralInfo(Controller)) |
| 1786 | return DAC960_Failure(Controller, "GET HEALTH STATUS"); |
| 1787 | |
| 1788 | /* |
| 1789 | Initialize the Controller Model Name and Full Model Name fields. |
| 1790 | */ |
| 1791 | ModelNameLength = sizeof(ControllerInfo->ControllerName); |
| 1792 | if (ModelNameLength > sizeof(Controller->ModelName)-1) |
| 1793 | ModelNameLength = sizeof(Controller->ModelName)-1; |
| 1794 | memcpy(Controller->ModelName, ControllerInfo->ControllerName, |
| 1795 | ModelNameLength); |
| 1796 | ModelNameLength--; |
| 1797 | while (Controller->ModelName[ModelNameLength] == ' ' || |
| 1798 | Controller->ModelName[ModelNameLength] == '\0') |
| 1799 | ModelNameLength--; |
| 1800 | Controller->ModelName[++ModelNameLength] = '\0'; |
| 1801 | strcpy(Controller->FullModelName, "Mylex "); |
| 1802 | strcat(Controller->FullModelName, Controller->ModelName); |
| 1803 | /* |
| 1804 | Initialize the Controller Firmware Version field. |
| 1805 | */ |
| 1806 | sprintf(Controller->FirmwareVersion, "%d.%02d-%02d", |
| 1807 | ControllerInfo->FirmwareMajorVersion, |
| 1808 | ControllerInfo->FirmwareMinorVersion, |
| 1809 | ControllerInfo->FirmwareTurnNumber); |
| 1810 | if (ControllerInfo->FirmwareMajorVersion == 6 && |
| 1811 | ControllerInfo->FirmwareMinorVersion == 0 && |
| 1812 | ControllerInfo->FirmwareTurnNumber < 1) |
| 1813 | { |
| 1814 | DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n", |
| 1815 | Controller, Controller->FirmwareVersion); |
| 1816 | DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n", |
| 1817 | Controller); |
| 1818 | DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n", |
| 1819 | Controller); |
| 1820 | } |
| 1821 | /* |
| 1822 | Initialize the Controller Channels, Targets, and Memory Size. |
| 1823 | */ |
| 1824 | Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent; |
| 1825 | Controller->Targets = |
| 1826 | ControllerInfo->MaximumTargetsPerChannel |
| 1827 | [ControllerInfo->NumberOfPhysicalChannelsPresent-1]; |
| 1828 | Controller->MemorySize = ControllerInfo->MemorySizeMB; |
| 1829 | /* |
| 1830 | Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive |
| 1831 | Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and |
| 1832 | Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one |
| 1833 | less than the Controller Queue Depth to allow for an automatic drive |
| 1834 | rebuild operation. |
| 1835 | */ |
| 1836 | Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands; |
| 1837 | Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1; |
| 1838 | if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth) |
| 1839 | Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth; |
| 1840 | Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent; |
| 1841 | Controller->MaxBlocksPerCommand = |
| 1842 | ControllerInfo->MaximumDataTransferSizeInBlocks; |
| 1843 | Controller->ControllerScatterGatherLimit = |
| 1844 | ControllerInfo->MaximumScatterGatherEntries; |
| 1845 | Controller->DriverScatterGatherLimit = |
| 1846 | Controller->ControllerScatterGatherLimit; |
| 1847 | if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit) |
| 1848 | Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit; |
| 1849 | /* |
| 1850 | Initialize the Logical Device Information. |
| 1851 | */ |
| 1852 | while (true) |
| 1853 | { |
| 1854 | DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo = |
| 1855 | Controller->V2.NewLogicalDeviceInformation; |
| 1856 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo; |
| 1857 | DAC960_V2_PhysicalDevice_T PhysicalDevice; |
| 1858 | |
| 1859 | if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber)) |
| 1860 | break; |
| 1861 | LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber; |
| 1862 | if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) { |
| 1863 | DAC960_Error("DAC960: Logical Drive Number %d not supported\n", |
| 1864 | Controller, LogicalDeviceNumber); |
| 1865 | break; |
| 1866 | } |
| 1867 | if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) { |
| 1868 | DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n", |
| 1869 | Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes); |
| 1870 | LogicalDeviceNumber++; |
| 1871 | continue; |
| 1872 | } |
| 1873 | PhysicalDevice.Controller = 0; |
| 1874 | PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel; |
| 1875 | PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID; |
| 1876 | PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit; |
| 1877 | Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] = |
| 1878 | PhysicalDevice; |
| 1879 | if (NewLogicalDeviceInfo->LogicalDeviceState != |
| 1880 | DAC960_V2_LogicalDevice_Offline) |
| 1881 | Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true; |
| 1882 | LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *) |
| 1883 | kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC); |
| 1884 | if (LogicalDeviceInfo == NULL) |
| 1885 | return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION"); |
| 1886 | Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] = |
| 1887 | LogicalDeviceInfo; |
| 1888 | memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo, |
| 1889 | sizeof(DAC960_V2_LogicalDeviceInfo_T)); |
| 1890 | LogicalDeviceNumber++; |
| 1891 | } |
| 1892 | return true; |
| 1893 | } |
| 1894 | |
| 1895 | |
| 1896 | /* |
| 1897 | DAC960_ReportControllerConfiguration reports the Configuration Information |
| 1898 | for Controller. |
| 1899 | */ |
| 1900 | |
| 1901 | static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T |
| 1902 | *Controller) |
| 1903 | { |
| 1904 | DAC960_Info("Configuring Mylex %s PCI RAID Controller\n", |
| 1905 | Controller, Controller->ModelName); |
| 1906 | DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n", |
| 1907 | Controller, Controller->FirmwareVersion, |
| 1908 | Controller->Channels, Controller->MemorySize); |
| 1909 | DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ", |
| 1910 | Controller, Controller->Bus, |
| 1911 | Controller->Device, Controller->Function); |
| 1912 | if (Controller->IO_Address == 0) |
| 1913 | DAC960_Info("Unassigned\n", Controller); |
| 1914 | else DAC960_Info("0x%X\n", Controller, Controller->IO_Address); |
| 1915 | DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n", |
| 1916 | Controller, Controller->PCI_Address, |
| 1917 | (unsigned long) Controller->BaseAddress, |
| 1918 | Controller->IRQ_Channel); |
| 1919 | DAC960_Info(" Controller Queue Depth: %d, " |
| 1920 | "Maximum Blocks per Command: %d\n", |
| 1921 | Controller, Controller->ControllerQueueDepth, |
| 1922 | Controller->MaxBlocksPerCommand); |
| 1923 | DAC960_Info(" Driver Queue Depth: %d, " |
| 1924 | "Scatter/Gather Limit: %d of %d Segments\n", |
| 1925 | Controller, Controller->DriverQueueDepth, |
| 1926 | Controller->DriverScatterGatherLimit, |
| 1927 | Controller->ControllerScatterGatherLimit); |
| 1928 | if (Controller->FirmwareType == DAC960_V1_Controller) |
| 1929 | { |
| 1930 | DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, " |
| 1931 | "BIOS Geometry: %d/%d\n", Controller, |
| 1932 | Controller->V1.StripeSize, |
| 1933 | Controller->V1.SegmentSize, |
| 1934 | Controller->V1.GeometryTranslationHeads, |
| 1935 | Controller->V1.GeometryTranslationSectors); |
| 1936 | if (Controller->V1.SAFTE_EnclosureManagementEnabled) |
| 1937 | DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller); |
| 1938 | } |
| 1939 | return true; |
| 1940 | } |
| 1941 | |
| 1942 | |
| 1943 | /* |
| 1944 | DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information |
| 1945 | for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI |
| 1946 | Inquiry Unit Serial Number information for each device connected to |
| 1947 | Controller. |
| 1948 | */ |
| 1949 | |
| 1950 | static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T |
| 1951 | *Controller) |
| 1952 | { |
| 1953 | struct dma_loaf local_dma; |
| 1954 | |
| 1955 | dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels]; |
| 1956 | DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels]; |
| 1957 | |
| 1958 | dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels]; |
| 1959 | DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels]; |
| 1960 | |
| 1961 | dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels]; |
| 1962 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels]; |
| 1963 | |
| 1964 | struct completion Completions[DAC960_V1_MaxChannels]; |
| 1965 | unsigned long flags; |
| 1966 | int Channel, TargetID; |
| 1967 | |
| 1968 | if (!init_dma_loaf(Controller->PCIDevice, &local_dma, |
| 1969 | DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) + |
| 1970 | sizeof(DAC960_SCSI_Inquiry_T) + |
| 1971 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)))) |
| 1972 | return DAC960_Failure(Controller, |
| 1973 | "DMA ALLOCATION FAILED IN ReadDeviceConfiguration"); |
| 1974 | |
| 1975 | for (Channel = 0; Channel < Controller->Channels; Channel++) { |
| 1976 | DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma, |
| 1977 | sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel); |
| 1978 | SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma, |
| 1979 | sizeof(DAC960_SCSI_Inquiry_T), |
| 1980 | SCSI_Inquiry_dma + Channel); |
| 1981 | SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma, |
| 1982 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), |
| 1983 | SCSI_NewInquiryUnitSerialNumberDMA + Channel); |
| 1984 | } |
| 1985 | |
| 1986 | for (TargetID = 0; TargetID < Controller->Targets; TargetID++) |
| 1987 | { |
| 1988 | /* |
| 1989 | * For each channel, submit a probe for a device on that channel. |
| 1990 | * The timeout interval for a device that is present is 10 seconds. |
| 1991 | * With this approach, the timeout periods can elapse in parallel |
| 1992 | * on each channel. |
| 1993 | */ |
| 1994 | for (Channel = 0; Channel < Controller->Channels; Channel++) |
| 1995 | { |
| 1996 | dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel]; |
| 1997 | DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel]; |
| 1998 | dma_addr_t DCDB_dma = DCDBs_dma[Channel]; |
| 1999 | DAC960_Command_T *Command = Controller->Commands[Channel]; |
| 2000 | struct completion *Completion = &Completions[Channel]; |
| 2001 | |
| 2002 | init_completion(Completion); |
| 2003 | DAC960_V1_ClearCommand(Command); |
| 2004 | Command->CommandType = DAC960_ImmediateCommand; |
| 2005 | Command->Completion = Completion; |
| 2006 | Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB; |
| 2007 | Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma; |
| 2008 | DCDB->Channel = Channel; |
| 2009 | DCDB->TargetID = TargetID; |
| 2010 | DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem; |
| 2011 | DCDB->EarlyStatus = false; |
| 2012 | DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds; |
| 2013 | DCDB->NoAutomaticRequestSense = false; |
| 2014 | DCDB->DisconnectPermitted = true; |
| 2015 | DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T); |
| 2016 | DCDB->BusAddress = NewInquiryStandardDataDMA; |
| 2017 | DCDB->CDBLength = 6; |
| 2018 | DCDB->TransferLengthHigh4 = 0; |
| 2019 | DCDB->SenseLength = sizeof(DCDB->SenseData); |
| 2020 | DCDB->CDB[0] = 0x12; /* INQUIRY */ |
| 2021 | DCDB->CDB[1] = 0; /* EVPD = 0 */ |
| 2022 | DCDB->CDB[2] = 0; /* Page Code */ |
| 2023 | DCDB->CDB[3] = 0; /* Reserved */ |
| 2024 | DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T); |
| 2025 | DCDB->CDB[5] = 0; /* Control */ |
| 2026 | |
| 2027 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 2028 | DAC960_QueueCommand(Command); |
| 2029 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 2030 | } |
| 2031 | /* |
| 2032 | * Wait for the problems submitted in the previous loop |
| 2033 | * to complete. On the probes that are successful, |
| 2034 | * get the serial number of the device that was found. |
| 2035 | */ |
| 2036 | for (Channel = 0; Channel < Controller->Channels; Channel++) |
| 2037 | { |
| 2038 | DAC960_SCSI_Inquiry_T *InquiryStandardData = |
| 2039 | &Controller->V1.InquiryStandardData[Channel][TargetID]; |
| 2040 | DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel]; |
| 2041 | dma_addr_t NewInquiryUnitSerialNumberDMA = |
| 2042 | SCSI_NewInquiryUnitSerialNumberDMA[Channel]; |
| 2043 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber = |
| 2044 | SCSI_NewInquiryUnitSerialNumberCPU[Channel]; |
| 2045 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = |
| 2046 | &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID]; |
| 2047 | DAC960_Command_T *Command = Controller->Commands[Channel]; |
| 2048 | DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel]; |
| 2049 | struct completion *Completion = &Completions[Channel]; |
| 2050 | |
| 2051 | wait_for_completion(Completion); |
| 2052 | |
| 2053 | if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) { |
| 2054 | memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T)); |
| 2055 | InquiryStandardData->PeripheralDeviceType = 0x1F; |
| 2056 | continue; |
| 2057 | } else |
| 2058 | memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T)); |
| 2059 | |
| 2060 | /* Preserve Channel and TargetID values from the previous loop */ |
| 2061 | Command->Completion = Completion; |
| 2062 | DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); |
| 2063 | DCDB->BusAddress = NewInquiryUnitSerialNumberDMA; |
| 2064 | DCDB->SenseLength = sizeof(DCDB->SenseData); |
| 2065 | DCDB->CDB[0] = 0x12; /* INQUIRY */ |
| 2066 | DCDB->CDB[1] = 1; /* EVPD = 1 */ |
| 2067 | DCDB->CDB[2] = 0x80; /* Page Code */ |
| 2068 | DCDB->CDB[3] = 0; /* Reserved */ |
| 2069 | DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); |
| 2070 | DCDB->CDB[5] = 0; /* Control */ |
| 2071 | |
| 2072 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 2073 | DAC960_QueueCommand(Command); |
| 2074 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 2075 | wait_for_completion(Completion); |
| 2076 | |
| 2077 | if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) { |
| 2078 | memset(InquiryUnitSerialNumber, 0, |
| 2079 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 2080 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; |
| 2081 | } else |
| 2082 | memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber, |
| 2083 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 2084 | } |
| 2085 | } |
| 2086 | free_dma_loaf(Controller->PCIDevice, &local_dma); |
| 2087 | return true; |
| 2088 | } |
| 2089 | |
| 2090 | |
| 2091 | /* |
| 2092 | DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information |
| 2093 | for DAC960 V2 Firmware Controllers by requesting the Physical Device |
| 2094 | Information and SCSI Inquiry Unit Serial Number information for each |
| 2095 | device connected to Controller. |
| 2096 | */ |
| 2097 | |
| 2098 | static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T |
| 2099 | *Controller) |
| 2100 | { |
| 2101 | unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0; |
| 2102 | unsigned short PhysicalDeviceIndex = 0; |
| 2103 | |
| 2104 | while (true) |
| 2105 | { |
| 2106 | DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo = |
| 2107 | Controller->V2.NewPhysicalDeviceInformation; |
| 2108 | DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo; |
| 2109 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber = |
| 2110 | Controller->V2.NewInquiryUnitSerialNumber; |
| 2111 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber; |
| 2112 | |
| 2113 | if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit)) |
| 2114 | break; |
| 2115 | |
| 2116 | PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *) |
| 2117 | kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC); |
| 2118 | if (PhysicalDeviceInfo == NULL) |
| 2119 | return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION"); |
| 2120 | Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] = |
| 2121 | PhysicalDeviceInfo; |
| 2122 | memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo, |
| 2123 | sizeof(DAC960_V2_PhysicalDeviceInfo_T)); |
| 2124 | |
| 2125 | InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *) |
| 2126 | kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC); |
| 2127 | if (InquiryUnitSerialNumber == NULL) { |
| 2128 | kfree(PhysicalDeviceInfo); |
| 2129 | return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION"); |
| 2130 | } |
| 2131 | Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] = |
| 2132 | InquiryUnitSerialNumber; |
| 2133 | |
| 2134 | Channel = NewPhysicalDeviceInfo->Channel; |
| 2135 | TargetID = NewPhysicalDeviceInfo->TargetID; |
| 2136 | LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit; |
| 2137 | |
| 2138 | /* |
| 2139 | Some devices do NOT have Unit Serial Numbers. |
| 2140 | This command fails for them. But, we still want to |
| 2141 | remember those devices are there. Construct a |
| 2142 | UnitSerialNumber structure for the failure case. |
| 2143 | */ |
| 2144 | if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) { |
| 2145 | memset(InquiryUnitSerialNumber, 0, |
| 2146 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 2147 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; |
| 2148 | } else |
| 2149 | memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber, |
| 2150 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 2151 | |
| 2152 | PhysicalDeviceIndex++; |
| 2153 | LogicalUnit++; |
| 2154 | } |
| 2155 | return true; |
| 2156 | } |
| 2157 | |
| 2158 | |
| 2159 | /* |
| 2160 | DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and |
| 2161 | Product Serial Number fields of the Inquiry Standard Data and Inquiry |
| 2162 | Unit Serial Number structures. |
| 2163 | */ |
| 2164 | |
| 2165 | static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T |
| 2166 | *InquiryStandardData, |
| 2167 | DAC960_SCSI_Inquiry_UnitSerialNumber_T |
| 2168 | *InquiryUnitSerialNumber, |
| 2169 | unsigned char *Vendor, |
| 2170 | unsigned char *Model, |
| 2171 | unsigned char *Revision, |
| 2172 | unsigned char *SerialNumber) |
| 2173 | { |
| 2174 | int SerialNumberLength, i; |
| 2175 | if (InquiryStandardData->PeripheralDeviceType == 0x1F) return; |
| 2176 | for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++) |
| 2177 | { |
| 2178 | unsigned char VendorCharacter = |
| 2179 | InquiryStandardData->VendorIdentification[i]; |
| 2180 | Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~' |
| 2181 | ? VendorCharacter : ' '); |
| 2182 | } |
| 2183 | Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0'; |
| 2184 | for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++) |
| 2185 | { |
| 2186 | unsigned char ModelCharacter = |
| 2187 | InquiryStandardData->ProductIdentification[i]; |
| 2188 | Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~' |
| 2189 | ? ModelCharacter : ' '); |
| 2190 | } |
| 2191 | Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0'; |
| 2192 | for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++) |
| 2193 | { |
| 2194 | unsigned char RevisionCharacter = |
| 2195 | InquiryStandardData->ProductRevisionLevel[i]; |
| 2196 | Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~' |
| 2197 | ? RevisionCharacter : ' '); |
| 2198 | } |
| 2199 | Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0'; |
| 2200 | if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return; |
| 2201 | SerialNumberLength = InquiryUnitSerialNumber->PageLength; |
| 2202 | if (SerialNumberLength > |
| 2203 | sizeof(InquiryUnitSerialNumber->ProductSerialNumber)) |
| 2204 | SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber); |
| 2205 | for (i = 0; i < SerialNumberLength; i++) |
| 2206 | { |
| 2207 | unsigned char SerialNumberCharacter = |
| 2208 | InquiryUnitSerialNumber->ProductSerialNumber[i]; |
| 2209 | SerialNumber[i] = |
| 2210 | (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~' |
| 2211 | ? SerialNumberCharacter : ' '); |
| 2212 | } |
| 2213 | SerialNumber[SerialNumberLength] = '\0'; |
| 2214 | } |
| 2215 | |
| 2216 | |
| 2217 | /* |
| 2218 | DAC960_V1_ReportDeviceConfiguration reports the Device Configuration |
| 2219 | Information for DAC960 V1 Firmware Controllers. |
| 2220 | */ |
| 2221 | |
| 2222 | static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T |
| 2223 | *Controller) |
| 2224 | { |
| 2225 | int LogicalDriveNumber, Channel, TargetID; |
| 2226 | DAC960_Info(" Physical Devices:\n", Controller); |
| 2227 | for (Channel = 0; Channel < Controller->Channels; Channel++) |
| 2228 | for (TargetID = 0; TargetID < Controller->Targets; TargetID++) |
| 2229 | { |
| 2230 | DAC960_SCSI_Inquiry_T *InquiryStandardData = |
| 2231 | &Controller->V1.InquiryStandardData[Channel][TargetID]; |
| 2232 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = |
| 2233 | &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID]; |
| 2234 | DAC960_V1_DeviceState_T *DeviceState = |
| 2235 | &Controller->V1.DeviceState[Channel][TargetID]; |
| 2236 | DAC960_V1_ErrorTableEntry_T *ErrorEntry = |
| 2237 | &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID]; |
| 2238 | char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)]; |
| 2239 | char Model[1+sizeof(InquiryStandardData->ProductIdentification)]; |
| 2240 | char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)]; |
| 2241 | char SerialNumber[1+sizeof(InquiryUnitSerialNumber |
| 2242 | ->ProductSerialNumber)]; |
| 2243 | if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue; |
| 2244 | DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber, |
| 2245 | Vendor, Model, Revision, SerialNumber); |
| 2246 | DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n", |
| 2247 | Controller, Channel, TargetID, (TargetID < 10 ? " " : ""), |
| 2248 | Vendor, Model, Revision); |
| 2249 | if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F) |
| 2250 | DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber); |
| 2251 | if (DeviceState->Present && |
| 2252 | DeviceState->DeviceType == DAC960_V1_DiskType) |
| 2253 | { |
| 2254 | if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0) |
| 2255 | DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n", |
| 2256 | Controller, |
| 2257 | (DeviceState->DeviceState == DAC960_V1_Device_Dead |
| 2258 | ? "Dead" |
| 2259 | : DeviceState->DeviceState |
| 2260 | == DAC960_V1_Device_WriteOnly |
| 2261 | ? "Write-Only" |
| 2262 | : DeviceState->DeviceState |
| 2263 | == DAC960_V1_Device_Online |
| 2264 | ? "Online" : "Standby"), |
| 2265 | DeviceState->DiskSize, |
| 2266 | Controller->V1.DeviceResetCount[Channel][TargetID]); |
| 2267 | else |
| 2268 | DAC960_Info(" Disk Status: %s, %u blocks\n", Controller, |
| 2269 | (DeviceState->DeviceState == DAC960_V1_Device_Dead |
| 2270 | ? "Dead" |
| 2271 | : DeviceState->DeviceState |
| 2272 | == DAC960_V1_Device_WriteOnly |
| 2273 | ? "Write-Only" |
| 2274 | : DeviceState->DeviceState |
| 2275 | == DAC960_V1_Device_Online |
| 2276 | ? "Online" : "Standby"), |
| 2277 | DeviceState->DiskSize); |
| 2278 | } |
| 2279 | if (ErrorEntry->ParityErrorCount > 0 || |
| 2280 | ErrorEntry->SoftErrorCount > 0 || |
| 2281 | ErrorEntry->HardErrorCount > 0 || |
| 2282 | ErrorEntry->MiscErrorCount > 0) |
| 2283 | DAC960_Info(" Errors - Parity: %d, Soft: %d, " |
| 2284 | "Hard: %d, Misc: %d\n", Controller, |
| 2285 | ErrorEntry->ParityErrorCount, |
| 2286 | ErrorEntry->SoftErrorCount, |
| 2287 | ErrorEntry->HardErrorCount, |
| 2288 | ErrorEntry->MiscErrorCount); |
| 2289 | } |
| 2290 | DAC960_Info(" Logical Drives:\n", Controller); |
| 2291 | for (LogicalDriveNumber = 0; |
| 2292 | LogicalDriveNumber < Controller->LogicalDriveCount; |
| 2293 | LogicalDriveNumber++) |
| 2294 | { |
| 2295 | DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation = |
| 2296 | &Controller->V1.LogicalDriveInformation[LogicalDriveNumber]; |
| 2297 | DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n", |
| 2298 | Controller, Controller->ControllerNumber, LogicalDriveNumber, |
| 2299 | LogicalDriveInformation->RAIDLevel, |
| 2300 | (LogicalDriveInformation->LogicalDriveState |
| 2301 | == DAC960_V1_LogicalDrive_Online |
| 2302 | ? "Online" |
| 2303 | : LogicalDriveInformation->LogicalDriveState |
| 2304 | == DAC960_V1_LogicalDrive_Critical |
| 2305 | ? "Critical" : "Offline"), |
| 2306 | LogicalDriveInformation->LogicalDriveSize, |
| 2307 | (LogicalDriveInformation->WriteBack |
| 2308 | ? "Write Back" : "Write Thru")); |
| 2309 | } |
| 2310 | return true; |
| 2311 | } |
| 2312 | |
| 2313 | |
| 2314 | /* |
| 2315 | DAC960_V2_ReportDeviceConfiguration reports the Device Configuration |
| 2316 | Information for DAC960 V2 Firmware Controllers. |
| 2317 | */ |
| 2318 | |
| 2319 | static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T |
| 2320 | *Controller) |
| 2321 | { |
| 2322 | int PhysicalDeviceIndex, LogicalDriveNumber; |
| 2323 | DAC960_Info(" Physical Devices:\n", Controller); |
| 2324 | for (PhysicalDeviceIndex = 0; |
| 2325 | PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices; |
| 2326 | PhysicalDeviceIndex++) |
| 2327 | { |
| 2328 | DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo = |
| 2329 | Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex]; |
| 2330 | DAC960_SCSI_Inquiry_T *InquiryStandardData = |
| 2331 | (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData; |
| 2332 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = |
| 2333 | Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex]; |
| 2334 | char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)]; |
| 2335 | char Model[1+sizeof(InquiryStandardData->ProductIdentification)]; |
| 2336 | char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)]; |
| 2337 | char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)]; |
| 2338 | if (PhysicalDeviceInfo == NULL) break; |
| 2339 | DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber, |
| 2340 | Vendor, Model, Revision, SerialNumber); |
| 2341 | DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n", |
| 2342 | Controller, |
| 2343 | PhysicalDeviceInfo->Channel, |
| 2344 | PhysicalDeviceInfo->TargetID, |
| 2345 | (PhysicalDeviceInfo->TargetID < 10 ? " " : ""), |
| 2346 | Vendor, Model, Revision); |
| 2347 | if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0) |
| 2348 | DAC960_Info(" %sAsynchronous\n", Controller, |
| 2349 | (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16 |
| 2350 | ? "Wide " :"")); |
| 2351 | else |
| 2352 | DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller, |
| 2353 | (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16 |
| 2354 | ? "Wide " :""), |
| 2355 | (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers |
| 2356 | * PhysicalDeviceInfo->NegotiatedDataWidthBits/8)); |
| 2357 | if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F) |
| 2358 | DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber); |
| 2359 | if (PhysicalDeviceInfo->PhysicalDeviceState == |
| 2360 | DAC960_V2_Device_Unconfigured) |
| 2361 | continue; |
| 2362 | DAC960_Info(" Disk Status: %s, %u blocks\n", Controller, |
| 2363 | (PhysicalDeviceInfo->PhysicalDeviceState |
| 2364 | == DAC960_V2_Device_Online |
| 2365 | ? "Online" |
| 2366 | : PhysicalDeviceInfo->PhysicalDeviceState |
| 2367 | == DAC960_V2_Device_Rebuild |
| 2368 | ? "Rebuild" |
| 2369 | : PhysicalDeviceInfo->PhysicalDeviceState |
| 2370 | == DAC960_V2_Device_Missing |
| 2371 | ? "Missing" |
| 2372 | : PhysicalDeviceInfo->PhysicalDeviceState |
| 2373 | == DAC960_V2_Device_Critical |
| 2374 | ? "Critical" |
| 2375 | : PhysicalDeviceInfo->PhysicalDeviceState |
| 2376 | == DAC960_V2_Device_Dead |
| 2377 | ? "Dead" |
| 2378 | : PhysicalDeviceInfo->PhysicalDeviceState |
| 2379 | == DAC960_V2_Device_SuspectedDead |
| 2380 | ? "Suspected-Dead" |
| 2381 | : PhysicalDeviceInfo->PhysicalDeviceState |
| 2382 | == DAC960_V2_Device_CommandedOffline |
| 2383 | ? "Commanded-Offline" |
| 2384 | : PhysicalDeviceInfo->PhysicalDeviceState |
| 2385 | == DAC960_V2_Device_Standby |
| 2386 | ? "Standby" : "Unknown"), |
| 2387 | PhysicalDeviceInfo->ConfigurableDeviceSize); |
| 2388 | if (PhysicalDeviceInfo->ParityErrors == 0 && |
| 2389 | PhysicalDeviceInfo->SoftErrors == 0 && |
| 2390 | PhysicalDeviceInfo->HardErrors == 0 && |
| 2391 | PhysicalDeviceInfo->MiscellaneousErrors == 0 && |
| 2392 | PhysicalDeviceInfo->CommandTimeouts == 0 && |
| 2393 | PhysicalDeviceInfo->Retries == 0 && |
| 2394 | PhysicalDeviceInfo->Aborts == 0 && |
| 2395 | PhysicalDeviceInfo->PredictedFailuresDetected == 0) |
| 2396 | continue; |
| 2397 | DAC960_Info(" Errors - Parity: %d, Soft: %d, " |
| 2398 | "Hard: %d, Misc: %d\n", Controller, |
| 2399 | PhysicalDeviceInfo->ParityErrors, |
| 2400 | PhysicalDeviceInfo->SoftErrors, |
| 2401 | PhysicalDeviceInfo->HardErrors, |
| 2402 | PhysicalDeviceInfo->MiscellaneousErrors); |
| 2403 | DAC960_Info(" Timeouts: %d, Retries: %d, " |
| 2404 | "Aborts: %d, Predicted: %d\n", Controller, |
| 2405 | PhysicalDeviceInfo->CommandTimeouts, |
| 2406 | PhysicalDeviceInfo->Retries, |
| 2407 | PhysicalDeviceInfo->Aborts, |
| 2408 | PhysicalDeviceInfo->PredictedFailuresDetected); |
| 2409 | } |
| 2410 | DAC960_Info(" Logical Drives:\n", Controller); |
| 2411 | for (LogicalDriveNumber = 0; |
| 2412 | LogicalDriveNumber < DAC960_MaxLogicalDrives; |
| 2413 | LogicalDriveNumber++) |
| 2414 | { |
| 2415 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo = |
| 2416 | Controller->V2.LogicalDeviceInformation[LogicalDriveNumber]; |
| 2417 | unsigned char *ReadCacheStatus[] = { "Read Cache Disabled", |
| 2418 | "Read Cache Enabled", |
| 2419 | "Read Ahead Enabled", |
| 2420 | "Intelligent Read Ahead Enabled", |
| 2421 | "-", "-", "-", "-" }; |
| 2422 | unsigned char *WriteCacheStatus[] = { "Write Cache Disabled", |
| 2423 | "Logical Device Read Only", |
| 2424 | "Write Cache Enabled", |
| 2425 | "Intelligent Write Cache Enabled", |
| 2426 | "-", "-", "-", "-" }; |
| 2427 | unsigned char *GeometryTranslation; |
| 2428 | if (LogicalDeviceInfo == NULL) continue; |
| 2429 | switch (LogicalDeviceInfo->DriveGeometry) |
| 2430 | { |
| 2431 | case DAC960_V2_Geometry_128_32: |
| 2432 | GeometryTranslation = "128/32"; |
| 2433 | break; |
| 2434 | case DAC960_V2_Geometry_255_63: |
| 2435 | GeometryTranslation = "255/63"; |
| 2436 | break; |
| 2437 | default: |
| 2438 | GeometryTranslation = "Invalid"; |
| 2439 | DAC960_Error("Illegal Logical Device Geometry %d\n", |
| 2440 | Controller, LogicalDeviceInfo->DriveGeometry); |
| 2441 | break; |
| 2442 | } |
| 2443 | DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n", |
| 2444 | Controller, Controller->ControllerNumber, LogicalDriveNumber, |
| 2445 | LogicalDeviceInfo->RAIDLevel, |
| 2446 | (LogicalDeviceInfo->LogicalDeviceState |
| 2447 | == DAC960_V2_LogicalDevice_Online |
| 2448 | ? "Online" |
| 2449 | : LogicalDeviceInfo->LogicalDeviceState |
| 2450 | == DAC960_V2_LogicalDevice_Critical |
| 2451 | ? "Critical" : "Offline"), |
| 2452 | LogicalDeviceInfo->ConfigurableDeviceSize); |
| 2453 | DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n", |
| 2454 | Controller, |
| 2455 | (LogicalDeviceInfo->LogicalDeviceControl |
| 2456 | .LogicalDeviceInitialized |
| 2457 | ? "Initialized" : "Uninitialized"), |
| 2458 | GeometryTranslation); |
| 2459 | if (LogicalDeviceInfo->StripeSize == 0) |
| 2460 | { |
| 2461 | if (LogicalDeviceInfo->CacheLineSize == 0) |
| 2462 | DAC960_Info(" Stripe Size: N/A, " |
| 2463 | "Segment Size: N/A\n", Controller); |
| 2464 | else |
| 2465 | DAC960_Info(" Stripe Size: N/A, " |
| 2466 | "Segment Size: %dKB\n", Controller, |
| 2467 | 1 << (LogicalDeviceInfo->CacheLineSize - 2)); |
| 2468 | } |
| 2469 | else |
| 2470 | { |
| 2471 | if (LogicalDeviceInfo->CacheLineSize == 0) |
| 2472 | DAC960_Info(" Stripe Size: %dKB, " |
| 2473 | "Segment Size: N/A\n", Controller, |
| 2474 | 1 << (LogicalDeviceInfo->StripeSize - 2)); |
| 2475 | else |
| 2476 | DAC960_Info(" Stripe Size: %dKB, " |
| 2477 | "Segment Size: %dKB\n", Controller, |
| 2478 | 1 << (LogicalDeviceInfo->StripeSize - 2), |
| 2479 | 1 << (LogicalDeviceInfo->CacheLineSize - 2)); |
| 2480 | } |
| 2481 | DAC960_Info(" %s, %s\n", Controller, |
| 2482 | ReadCacheStatus[ |
| 2483 | LogicalDeviceInfo->LogicalDeviceControl.ReadCache], |
| 2484 | WriteCacheStatus[ |
| 2485 | LogicalDeviceInfo->LogicalDeviceControl.WriteCache]); |
| 2486 | if (LogicalDeviceInfo->SoftErrors > 0 || |
| 2487 | LogicalDeviceInfo->CommandsFailed > 0 || |
| 2488 | LogicalDeviceInfo->DeferredWriteErrors) |
| 2489 | DAC960_Info(" Errors - Soft: %d, Failed: %d, " |
| 2490 | "Deferred Write: %d\n", Controller, |
| 2491 | LogicalDeviceInfo->SoftErrors, |
| 2492 | LogicalDeviceInfo->CommandsFailed, |
| 2493 | LogicalDeviceInfo->DeferredWriteErrors); |
| 2494 | |
| 2495 | } |
| 2496 | return true; |
| 2497 | } |
| 2498 | |
| 2499 | /* |
| 2500 | DAC960_RegisterBlockDevice registers the Block Device structures |
| 2501 | associated with Controller. |
| 2502 | */ |
| 2503 | |
| 2504 | static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller) |
| 2505 | { |
| 2506 | int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber; |
| 2507 | int n; |
| 2508 | |
| 2509 | /* |
| 2510 | Register the Block Device Major Number for this DAC960 Controller. |
| 2511 | */ |
| 2512 | if (register_blkdev(MajorNumber, "dac960") < 0) |
| 2513 | return false; |
| 2514 | |
| 2515 | for (n = 0; n < DAC960_MaxLogicalDrives; n++) { |
| 2516 | struct gendisk *disk = Controller->disks[n]; |
| 2517 | struct request_queue *RequestQueue; |
| 2518 | |
| 2519 | /* for now, let all request queues share controller's lock */ |
| 2520 | RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock); |
| 2521 | if (!RequestQueue) { |
| 2522 | printk("DAC960: failure to allocate request queue\n"); |
| 2523 | continue; |
| 2524 | } |
| 2525 | Controller->RequestQueue[n] = RequestQueue; |
| 2526 | blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit); |
| 2527 | RequestQueue->queuedata = Controller; |
| 2528 | blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit); |
| 2529 | blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit); |
| 2530 | blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand); |
| 2531 | disk->queue = RequestQueue; |
| 2532 | sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n); |
| 2533 | sprintf(disk->devfs_name, "rd/host%d/target%d", Controller->ControllerNumber, n); |
| 2534 | disk->major = MajorNumber; |
| 2535 | disk->first_minor = n << DAC960_MaxPartitionsBits; |
| 2536 | disk->fops = &DAC960_BlockDeviceOperations; |
| 2537 | } |
| 2538 | /* |
| 2539 | Indicate the Block Device Registration completed successfully, |
| 2540 | */ |
| 2541 | return true; |
| 2542 | } |
| 2543 | |
| 2544 | |
| 2545 | /* |
| 2546 | DAC960_UnregisterBlockDevice unregisters the Block Device structures |
| 2547 | associated with Controller. |
| 2548 | */ |
| 2549 | |
| 2550 | static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller) |
| 2551 | { |
| 2552 | int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber; |
| 2553 | int disk; |
| 2554 | |
| 2555 | /* does order matter when deleting gendisk and cleanup in request queue? */ |
| 2556 | for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) { |
| 2557 | del_gendisk(Controller->disks[disk]); |
| 2558 | blk_cleanup_queue(Controller->RequestQueue[disk]); |
| 2559 | Controller->RequestQueue[disk] = NULL; |
| 2560 | } |
| 2561 | |
| 2562 | /* |
| 2563 | Unregister the Block Device Major Number for this DAC960 Controller. |
| 2564 | */ |
| 2565 | unregister_blkdev(MajorNumber, "dac960"); |
| 2566 | } |
| 2567 | |
| 2568 | /* |
| 2569 | DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk |
| 2570 | Information Partition Sector Counts and Block Sizes. |
| 2571 | */ |
| 2572 | |
| 2573 | static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller) |
| 2574 | { |
| 2575 | int disk; |
| 2576 | for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) |
| 2577 | set_capacity(Controller->disks[disk], disk_size(Controller, disk)); |
| 2578 | } |
| 2579 | |
| 2580 | /* |
| 2581 | DAC960_ReportErrorStatus reports Controller BIOS Messages passed through |
| 2582 | the Error Status Register when the driver performs the BIOS handshaking. |
| 2583 | It returns true for fatal errors and false otherwise. |
| 2584 | */ |
| 2585 | |
| 2586 | static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller, |
| 2587 | unsigned char ErrorStatus, |
| 2588 | unsigned char Parameter0, |
| 2589 | unsigned char Parameter1) |
| 2590 | { |
| 2591 | switch (ErrorStatus) |
| 2592 | { |
| 2593 | case 0x00: |
| 2594 | DAC960_Notice("Physical Device %d:%d Not Responding\n", |
| 2595 | Controller, Parameter1, Parameter0); |
| 2596 | break; |
| 2597 | case 0x08: |
| 2598 | if (Controller->DriveSpinUpMessageDisplayed) break; |
| 2599 | DAC960_Notice("Spinning Up Drives\n", Controller); |
| 2600 | Controller->DriveSpinUpMessageDisplayed = true; |
| 2601 | break; |
| 2602 | case 0x30: |
| 2603 | DAC960_Notice("Configuration Checksum Error\n", Controller); |
| 2604 | break; |
| 2605 | case 0x60: |
| 2606 | DAC960_Notice("Mirror Race Recovery Failed\n", Controller); |
| 2607 | break; |
| 2608 | case 0x70: |
| 2609 | DAC960_Notice("Mirror Race Recovery In Progress\n", Controller); |
| 2610 | break; |
| 2611 | case 0x90: |
| 2612 | DAC960_Notice("Physical Device %d:%d COD Mismatch\n", |
| 2613 | Controller, Parameter1, Parameter0); |
| 2614 | break; |
| 2615 | case 0xA0: |
| 2616 | DAC960_Notice("Logical Drive Installation Aborted\n", Controller); |
| 2617 | break; |
| 2618 | case 0xB0: |
| 2619 | DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller); |
| 2620 | break; |
| 2621 | case 0xD0: |
| 2622 | DAC960_Notice("New Controller Configuration Found\n", Controller); |
| 2623 | break; |
| 2624 | case 0xF0: |
| 2625 | DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller); |
| 2626 | return true; |
| 2627 | default: |
| 2628 | DAC960_Error("Unknown Initialization Error %02X for Controller at\n", |
| 2629 | Controller, ErrorStatus); |
| 2630 | return true; |
| 2631 | } |
| 2632 | return false; |
| 2633 | } |
| 2634 | |
| 2635 | |
| 2636 | /* |
| 2637 | * DAC960_DetectCleanup releases the resources that were allocated |
| 2638 | * during DAC960_DetectController(). DAC960_DetectController can |
| 2639 | * has several internal failure points, so not ALL resources may |
| 2640 | * have been allocated. It's important to free only |
| 2641 | * resources that HAVE been allocated. The code below always |
| 2642 | * tests that the resource has been allocated before attempting to |
| 2643 | * free it. |
| 2644 | */ |
| 2645 | static void DAC960_DetectCleanup(DAC960_Controller_T *Controller) |
| 2646 | { |
| 2647 | int i; |
| 2648 | |
| 2649 | /* Free the memory mailbox, status, and related structures */ |
| 2650 | free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages); |
| 2651 | if (Controller->MemoryMappedAddress) { |
| 2652 | switch(Controller->HardwareType) |
| 2653 | { |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 2654 | case DAC960_GEM_Controller: |
| 2655 | DAC960_GEM_DisableInterrupts(Controller->BaseAddress); |
| 2656 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2657 | case DAC960_BA_Controller: |
| 2658 | DAC960_BA_DisableInterrupts(Controller->BaseAddress); |
| 2659 | break; |
| 2660 | case DAC960_LP_Controller: |
| 2661 | DAC960_LP_DisableInterrupts(Controller->BaseAddress); |
| 2662 | break; |
| 2663 | case DAC960_LA_Controller: |
| 2664 | DAC960_LA_DisableInterrupts(Controller->BaseAddress); |
| 2665 | break; |
| 2666 | case DAC960_PG_Controller: |
| 2667 | DAC960_PG_DisableInterrupts(Controller->BaseAddress); |
| 2668 | break; |
| 2669 | case DAC960_PD_Controller: |
| 2670 | DAC960_PD_DisableInterrupts(Controller->BaseAddress); |
| 2671 | break; |
| 2672 | case DAC960_P_Controller: |
| 2673 | DAC960_PD_DisableInterrupts(Controller->BaseAddress); |
| 2674 | break; |
| 2675 | } |
| 2676 | iounmap(Controller->MemoryMappedAddress); |
| 2677 | } |
| 2678 | if (Controller->IRQ_Channel) |
| 2679 | free_irq(Controller->IRQ_Channel, Controller); |
| 2680 | if (Controller->IO_Address) |
| 2681 | release_region(Controller->IO_Address, 0x80); |
| 2682 | pci_disable_device(Controller->PCIDevice); |
| 2683 | for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++) |
| 2684 | put_disk(Controller->disks[i]); |
| 2685 | DAC960_Controllers[Controller->ControllerNumber] = NULL; |
| 2686 | kfree(Controller); |
| 2687 | } |
| 2688 | |
| 2689 | |
| 2690 | /* |
| 2691 | DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID |
| 2692 | PCI RAID Controllers by interrogating the PCI Configuration Space for |
| 2693 | Controller Type. |
| 2694 | */ |
| 2695 | |
| 2696 | static DAC960_Controller_T * |
| 2697 | DAC960_DetectController(struct pci_dev *PCI_Device, |
| 2698 | const struct pci_device_id *entry) |
| 2699 | { |
| 2700 | struct DAC960_privdata *privdata = |
| 2701 | (struct DAC960_privdata *)entry->driver_data; |
| 2702 | irqreturn_t (*InterruptHandler)(int, void *, struct pt_regs *) = |
| 2703 | privdata->InterruptHandler; |
| 2704 | unsigned int MemoryWindowSize = privdata->MemoryWindowSize; |
| 2705 | DAC960_Controller_T *Controller = NULL; |
| 2706 | unsigned char DeviceFunction = PCI_Device->devfn; |
| 2707 | unsigned char ErrorStatus, Parameter0, Parameter1; |
| 2708 | unsigned int IRQ_Channel; |
| 2709 | void __iomem *BaseAddress; |
| 2710 | int i; |
| 2711 | |
| 2712 | Controller = (DAC960_Controller_T *) |
| 2713 | kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC); |
| 2714 | if (Controller == NULL) { |
| 2715 | DAC960_Error("Unable to allocate Controller structure for " |
| 2716 | "Controller at\n", NULL); |
| 2717 | return NULL; |
| 2718 | } |
| 2719 | memset(Controller, 0, sizeof(DAC960_Controller_T)); |
| 2720 | Controller->ControllerNumber = DAC960_ControllerCount; |
| 2721 | DAC960_Controllers[DAC960_ControllerCount++] = Controller; |
| 2722 | Controller->Bus = PCI_Device->bus->number; |
| 2723 | Controller->FirmwareType = privdata->FirmwareType; |
| 2724 | Controller->HardwareType = privdata->HardwareType; |
| 2725 | Controller->Device = DeviceFunction >> 3; |
| 2726 | Controller->Function = DeviceFunction & 0x7; |
| 2727 | Controller->PCIDevice = PCI_Device; |
| 2728 | strcpy(Controller->FullModelName, "DAC960"); |
| 2729 | |
| 2730 | if (pci_enable_device(PCI_Device)) |
| 2731 | goto Failure; |
| 2732 | |
| 2733 | switch (Controller->HardwareType) |
| 2734 | { |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 2735 | case DAC960_GEM_Controller: |
| 2736 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); |
| 2737 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2738 | case DAC960_BA_Controller: |
| 2739 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); |
| 2740 | break; |
| 2741 | case DAC960_LP_Controller: |
| 2742 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); |
| 2743 | break; |
| 2744 | case DAC960_LA_Controller: |
| 2745 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); |
| 2746 | break; |
| 2747 | case DAC960_PG_Controller: |
| 2748 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); |
| 2749 | break; |
| 2750 | case DAC960_PD_Controller: |
| 2751 | Controller->IO_Address = pci_resource_start(PCI_Device, 0); |
| 2752 | Controller->PCI_Address = pci_resource_start(PCI_Device, 1); |
| 2753 | break; |
| 2754 | case DAC960_P_Controller: |
| 2755 | Controller->IO_Address = pci_resource_start(PCI_Device, 0); |
| 2756 | Controller->PCI_Address = pci_resource_start(PCI_Device, 1); |
| 2757 | break; |
| 2758 | } |
| 2759 | |
| 2760 | pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber)); |
| 2761 | for (i = 0; i < DAC960_MaxLogicalDrives; i++) { |
| 2762 | Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits); |
| 2763 | if (!Controller->disks[i]) |
| 2764 | goto Failure; |
| 2765 | Controller->disks[i]->private_data = (void *)((long)i); |
| 2766 | } |
| 2767 | init_waitqueue_head(&Controller->CommandWaitQueue); |
| 2768 | init_waitqueue_head(&Controller->HealthStatusWaitQueue); |
| 2769 | spin_lock_init(&Controller->queue_lock); |
| 2770 | DAC960_AnnounceDriver(Controller); |
| 2771 | /* |
| 2772 | Map the Controller Register Window. |
| 2773 | */ |
| 2774 | if (MemoryWindowSize < PAGE_SIZE) |
| 2775 | MemoryWindowSize = PAGE_SIZE; |
| 2776 | Controller->MemoryMappedAddress = |
| 2777 | ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize); |
| 2778 | Controller->BaseAddress = |
| 2779 | Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK); |
| 2780 | if (Controller->MemoryMappedAddress == NULL) |
| 2781 | { |
| 2782 | DAC960_Error("Unable to map Controller Register Window for " |
| 2783 | "Controller at\n", Controller); |
| 2784 | goto Failure; |
| 2785 | } |
| 2786 | BaseAddress = Controller->BaseAddress; |
| 2787 | switch (Controller->HardwareType) |
| 2788 | { |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 2789 | case DAC960_GEM_Controller: |
| 2790 | DAC960_GEM_DisableInterrupts(BaseAddress); |
| 2791 | DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress); |
| 2792 | udelay(1000); |
| 2793 | while (DAC960_GEM_InitializationInProgressP(BaseAddress)) |
| 2794 | { |
| 2795 | if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus, |
| 2796 | &Parameter0, &Parameter1) && |
| 2797 | DAC960_ReportErrorStatus(Controller, ErrorStatus, |
| 2798 | Parameter0, Parameter1)) |
| 2799 | goto Failure; |
| 2800 | udelay(10); |
| 2801 | } |
| 2802 | if (!DAC960_V2_EnableMemoryMailboxInterface(Controller)) |
| 2803 | { |
| 2804 | DAC960_Error("Unable to Enable Memory Mailbox Interface " |
| 2805 | "for Controller at\n", Controller); |
| 2806 | goto Failure; |
| 2807 | } |
| 2808 | DAC960_GEM_EnableInterrupts(BaseAddress); |
| 2809 | Controller->QueueCommand = DAC960_GEM_QueueCommand; |
| 2810 | Controller->ReadControllerConfiguration = |
| 2811 | DAC960_V2_ReadControllerConfiguration; |
| 2812 | Controller->ReadDeviceConfiguration = |
| 2813 | DAC960_V2_ReadDeviceConfiguration; |
| 2814 | Controller->ReportDeviceConfiguration = |
| 2815 | DAC960_V2_ReportDeviceConfiguration; |
| 2816 | Controller->QueueReadWriteCommand = |
| 2817 | DAC960_V2_QueueReadWriteCommand; |
| 2818 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2819 | case DAC960_BA_Controller: |
| 2820 | DAC960_BA_DisableInterrupts(BaseAddress); |
| 2821 | DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress); |
| 2822 | udelay(1000); |
| 2823 | while (DAC960_BA_InitializationInProgressP(BaseAddress)) |
| 2824 | { |
| 2825 | if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus, |
| 2826 | &Parameter0, &Parameter1) && |
| 2827 | DAC960_ReportErrorStatus(Controller, ErrorStatus, |
| 2828 | Parameter0, Parameter1)) |
| 2829 | goto Failure; |
| 2830 | udelay(10); |
| 2831 | } |
| 2832 | if (!DAC960_V2_EnableMemoryMailboxInterface(Controller)) |
| 2833 | { |
| 2834 | DAC960_Error("Unable to Enable Memory Mailbox Interface " |
| 2835 | "for Controller at\n", Controller); |
| 2836 | goto Failure; |
| 2837 | } |
| 2838 | DAC960_BA_EnableInterrupts(BaseAddress); |
| 2839 | Controller->QueueCommand = DAC960_BA_QueueCommand; |
| 2840 | Controller->ReadControllerConfiguration = |
| 2841 | DAC960_V2_ReadControllerConfiguration; |
| 2842 | Controller->ReadDeviceConfiguration = |
| 2843 | DAC960_V2_ReadDeviceConfiguration; |
| 2844 | Controller->ReportDeviceConfiguration = |
| 2845 | DAC960_V2_ReportDeviceConfiguration; |
| 2846 | Controller->QueueReadWriteCommand = |
| 2847 | DAC960_V2_QueueReadWriteCommand; |
| 2848 | break; |
| 2849 | case DAC960_LP_Controller: |
| 2850 | DAC960_LP_DisableInterrupts(BaseAddress); |
| 2851 | DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress); |
| 2852 | udelay(1000); |
| 2853 | while (DAC960_LP_InitializationInProgressP(BaseAddress)) |
| 2854 | { |
| 2855 | if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus, |
| 2856 | &Parameter0, &Parameter1) && |
| 2857 | DAC960_ReportErrorStatus(Controller, ErrorStatus, |
| 2858 | Parameter0, Parameter1)) |
| 2859 | goto Failure; |
| 2860 | udelay(10); |
| 2861 | } |
| 2862 | if (!DAC960_V2_EnableMemoryMailboxInterface(Controller)) |
| 2863 | { |
| 2864 | DAC960_Error("Unable to Enable Memory Mailbox Interface " |
| 2865 | "for Controller at\n", Controller); |
| 2866 | goto Failure; |
| 2867 | } |
| 2868 | DAC960_LP_EnableInterrupts(BaseAddress); |
| 2869 | Controller->QueueCommand = DAC960_LP_QueueCommand; |
| 2870 | Controller->ReadControllerConfiguration = |
| 2871 | DAC960_V2_ReadControllerConfiguration; |
| 2872 | Controller->ReadDeviceConfiguration = |
| 2873 | DAC960_V2_ReadDeviceConfiguration; |
| 2874 | Controller->ReportDeviceConfiguration = |
| 2875 | DAC960_V2_ReportDeviceConfiguration; |
| 2876 | Controller->QueueReadWriteCommand = |
| 2877 | DAC960_V2_QueueReadWriteCommand; |
| 2878 | break; |
| 2879 | case DAC960_LA_Controller: |
| 2880 | DAC960_LA_DisableInterrupts(BaseAddress); |
| 2881 | DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress); |
| 2882 | udelay(1000); |
| 2883 | while (DAC960_LA_InitializationInProgressP(BaseAddress)) |
| 2884 | { |
| 2885 | if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus, |
| 2886 | &Parameter0, &Parameter1) && |
| 2887 | DAC960_ReportErrorStatus(Controller, ErrorStatus, |
| 2888 | Parameter0, Parameter1)) |
| 2889 | goto Failure; |
| 2890 | udelay(10); |
| 2891 | } |
| 2892 | if (!DAC960_V1_EnableMemoryMailboxInterface(Controller)) |
| 2893 | { |
| 2894 | DAC960_Error("Unable to Enable Memory Mailbox Interface " |
| 2895 | "for Controller at\n", Controller); |
| 2896 | goto Failure; |
| 2897 | } |
| 2898 | DAC960_LA_EnableInterrupts(BaseAddress); |
| 2899 | if (Controller->V1.DualModeMemoryMailboxInterface) |
| 2900 | Controller->QueueCommand = DAC960_LA_QueueCommandDualMode; |
| 2901 | else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode; |
| 2902 | Controller->ReadControllerConfiguration = |
| 2903 | DAC960_V1_ReadControllerConfiguration; |
| 2904 | Controller->ReadDeviceConfiguration = |
| 2905 | DAC960_V1_ReadDeviceConfiguration; |
| 2906 | Controller->ReportDeviceConfiguration = |
| 2907 | DAC960_V1_ReportDeviceConfiguration; |
| 2908 | Controller->QueueReadWriteCommand = |
| 2909 | DAC960_V1_QueueReadWriteCommand; |
| 2910 | break; |
| 2911 | case DAC960_PG_Controller: |
| 2912 | DAC960_PG_DisableInterrupts(BaseAddress); |
| 2913 | DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress); |
| 2914 | udelay(1000); |
| 2915 | while (DAC960_PG_InitializationInProgressP(BaseAddress)) |
| 2916 | { |
| 2917 | if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus, |
| 2918 | &Parameter0, &Parameter1) && |
| 2919 | DAC960_ReportErrorStatus(Controller, ErrorStatus, |
| 2920 | Parameter0, Parameter1)) |
| 2921 | goto Failure; |
| 2922 | udelay(10); |
| 2923 | } |
| 2924 | if (!DAC960_V1_EnableMemoryMailboxInterface(Controller)) |
| 2925 | { |
| 2926 | DAC960_Error("Unable to Enable Memory Mailbox Interface " |
| 2927 | "for Controller at\n", Controller); |
| 2928 | goto Failure; |
| 2929 | } |
| 2930 | DAC960_PG_EnableInterrupts(BaseAddress); |
| 2931 | if (Controller->V1.DualModeMemoryMailboxInterface) |
| 2932 | Controller->QueueCommand = DAC960_PG_QueueCommandDualMode; |
| 2933 | else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode; |
| 2934 | Controller->ReadControllerConfiguration = |
| 2935 | DAC960_V1_ReadControllerConfiguration; |
| 2936 | Controller->ReadDeviceConfiguration = |
| 2937 | DAC960_V1_ReadDeviceConfiguration; |
| 2938 | Controller->ReportDeviceConfiguration = |
| 2939 | DAC960_V1_ReportDeviceConfiguration; |
| 2940 | Controller->QueueReadWriteCommand = |
| 2941 | DAC960_V1_QueueReadWriteCommand; |
| 2942 | break; |
| 2943 | case DAC960_PD_Controller: |
| 2944 | if (!request_region(Controller->IO_Address, 0x80, |
| 2945 | Controller->FullModelName)) { |
| 2946 | DAC960_Error("IO port 0x%d busy for Controller at\n", |
| 2947 | Controller, Controller->IO_Address); |
| 2948 | goto Failure; |
| 2949 | } |
| 2950 | DAC960_PD_DisableInterrupts(BaseAddress); |
| 2951 | DAC960_PD_AcknowledgeStatus(BaseAddress); |
| 2952 | udelay(1000); |
| 2953 | while (DAC960_PD_InitializationInProgressP(BaseAddress)) |
| 2954 | { |
| 2955 | if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus, |
| 2956 | &Parameter0, &Parameter1) && |
| 2957 | DAC960_ReportErrorStatus(Controller, ErrorStatus, |
| 2958 | Parameter0, Parameter1)) |
| 2959 | goto Failure; |
| 2960 | udelay(10); |
| 2961 | } |
| 2962 | if (!DAC960_V1_EnableMemoryMailboxInterface(Controller)) |
| 2963 | { |
| 2964 | DAC960_Error("Unable to allocate DMA mapped memory " |
| 2965 | "for Controller at\n", Controller); |
| 2966 | goto Failure; |
| 2967 | } |
| 2968 | DAC960_PD_EnableInterrupts(BaseAddress); |
| 2969 | Controller->QueueCommand = DAC960_PD_QueueCommand; |
| 2970 | Controller->ReadControllerConfiguration = |
| 2971 | DAC960_V1_ReadControllerConfiguration; |
| 2972 | Controller->ReadDeviceConfiguration = |
| 2973 | DAC960_V1_ReadDeviceConfiguration; |
| 2974 | Controller->ReportDeviceConfiguration = |
| 2975 | DAC960_V1_ReportDeviceConfiguration; |
| 2976 | Controller->QueueReadWriteCommand = |
| 2977 | DAC960_V1_QueueReadWriteCommand; |
| 2978 | break; |
| 2979 | case DAC960_P_Controller: |
| 2980 | if (!request_region(Controller->IO_Address, 0x80, |
| 2981 | Controller->FullModelName)){ |
| 2982 | DAC960_Error("IO port 0x%d busy for Controller at\n", |
| 2983 | Controller, Controller->IO_Address); |
| 2984 | goto Failure; |
| 2985 | } |
| 2986 | DAC960_PD_DisableInterrupts(BaseAddress); |
| 2987 | DAC960_PD_AcknowledgeStatus(BaseAddress); |
| 2988 | udelay(1000); |
| 2989 | while (DAC960_PD_InitializationInProgressP(BaseAddress)) |
| 2990 | { |
| 2991 | if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus, |
| 2992 | &Parameter0, &Parameter1) && |
| 2993 | DAC960_ReportErrorStatus(Controller, ErrorStatus, |
| 2994 | Parameter0, Parameter1)) |
| 2995 | goto Failure; |
| 2996 | udelay(10); |
| 2997 | } |
| 2998 | if (!DAC960_V1_EnableMemoryMailboxInterface(Controller)) |
| 2999 | { |
| 3000 | DAC960_Error("Unable to allocate DMA mapped memory" |
| 3001 | "for Controller at\n", Controller); |
| 3002 | goto Failure; |
| 3003 | } |
| 3004 | DAC960_PD_EnableInterrupts(BaseAddress); |
| 3005 | Controller->QueueCommand = DAC960_P_QueueCommand; |
| 3006 | Controller->ReadControllerConfiguration = |
| 3007 | DAC960_V1_ReadControllerConfiguration; |
| 3008 | Controller->ReadDeviceConfiguration = |
| 3009 | DAC960_V1_ReadDeviceConfiguration; |
| 3010 | Controller->ReportDeviceConfiguration = |
| 3011 | DAC960_V1_ReportDeviceConfiguration; |
| 3012 | Controller->QueueReadWriteCommand = |
| 3013 | DAC960_V1_QueueReadWriteCommand; |
| 3014 | break; |
| 3015 | } |
| 3016 | /* |
| 3017 | Acquire shared access to the IRQ Channel. |
| 3018 | */ |
| 3019 | IRQ_Channel = PCI_Device->irq; |
| 3020 | if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ, |
| 3021 | Controller->FullModelName, Controller) < 0) |
| 3022 | { |
| 3023 | DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n", |
| 3024 | Controller, Controller->IRQ_Channel); |
| 3025 | goto Failure; |
| 3026 | } |
| 3027 | Controller->IRQ_Channel = IRQ_Channel; |
| 3028 | Controller->InitialCommand.CommandIdentifier = 1; |
| 3029 | Controller->InitialCommand.Controller = Controller; |
| 3030 | Controller->Commands[0] = &Controller->InitialCommand; |
| 3031 | Controller->FreeCommands = &Controller->InitialCommand; |
| 3032 | return Controller; |
| 3033 | |
| 3034 | Failure: |
| 3035 | if (Controller->IO_Address == 0) |
| 3036 | DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A " |
| 3037 | "PCI Address 0x%X\n", Controller, |
| 3038 | Controller->Bus, Controller->Device, |
| 3039 | Controller->Function, Controller->PCI_Address); |
| 3040 | else |
| 3041 | DAC960_Error("PCI Bus %d Device %d Function %d I/O Address " |
| 3042 | "0x%X PCI Address 0x%X\n", Controller, |
| 3043 | Controller->Bus, Controller->Device, |
| 3044 | Controller->Function, Controller->IO_Address, |
| 3045 | Controller->PCI_Address); |
| 3046 | DAC960_DetectCleanup(Controller); |
| 3047 | DAC960_ControllerCount--; |
| 3048 | return NULL; |
| 3049 | } |
| 3050 | |
| 3051 | /* |
| 3052 | DAC960_InitializeController initializes Controller. |
| 3053 | */ |
| 3054 | |
| 3055 | static boolean |
| 3056 | DAC960_InitializeController(DAC960_Controller_T *Controller) |
| 3057 | { |
| 3058 | if (DAC960_ReadControllerConfiguration(Controller) && |
| 3059 | DAC960_ReportControllerConfiguration(Controller) && |
| 3060 | DAC960_CreateAuxiliaryStructures(Controller) && |
| 3061 | DAC960_ReadDeviceConfiguration(Controller) && |
| 3062 | DAC960_ReportDeviceConfiguration(Controller) && |
| 3063 | DAC960_RegisterBlockDevice(Controller)) |
| 3064 | { |
| 3065 | /* |
| 3066 | Initialize the Monitoring Timer. |
| 3067 | */ |
| 3068 | init_timer(&Controller->MonitoringTimer); |
| 3069 | Controller->MonitoringTimer.expires = |
| 3070 | jiffies + DAC960_MonitoringTimerInterval; |
| 3071 | Controller->MonitoringTimer.data = (unsigned long) Controller; |
| 3072 | Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction; |
| 3073 | add_timer(&Controller->MonitoringTimer); |
| 3074 | Controller->ControllerInitialized = true; |
| 3075 | return true; |
| 3076 | } |
| 3077 | return false; |
| 3078 | } |
| 3079 | |
| 3080 | |
| 3081 | /* |
| 3082 | DAC960_FinalizeController finalizes Controller. |
| 3083 | */ |
| 3084 | |
| 3085 | static void DAC960_FinalizeController(DAC960_Controller_T *Controller) |
| 3086 | { |
| 3087 | if (Controller->ControllerInitialized) |
| 3088 | { |
| 3089 | unsigned long flags; |
| 3090 | |
| 3091 | /* |
| 3092 | * Acquiring and releasing lock here eliminates |
| 3093 | * a very low probability race. |
| 3094 | * |
| 3095 | * The code below allocates controller command structures |
| 3096 | * from the free list without holding the controller lock. |
| 3097 | * This is safe assuming there is no other activity on |
| 3098 | * the controller at the time. |
| 3099 | * |
| 3100 | * But, there might be a monitoring command still |
| 3101 | * in progress. Setting the Shutdown flag while holding |
| 3102 | * the lock ensures that there is no monitoring command |
| 3103 | * in the interrupt handler currently, and any monitoring |
| 3104 | * commands that complete from this time on will NOT return |
| 3105 | * their command structure to the free list. |
| 3106 | */ |
| 3107 | |
| 3108 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 3109 | Controller->ShutdownMonitoringTimer = 1; |
| 3110 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 3111 | |
| 3112 | del_timer_sync(&Controller->MonitoringTimer); |
| 3113 | if (Controller->FirmwareType == DAC960_V1_Controller) |
| 3114 | { |
| 3115 | DAC960_Notice("Flushing Cache...", Controller); |
| 3116 | DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0); |
| 3117 | DAC960_Notice("done\n", Controller); |
| 3118 | |
| 3119 | if (Controller->HardwareType == DAC960_PD_Controller) |
| 3120 | release_region(Controller->IO_Address, 0x80); |
| 3121 | } |
| 3122 | else |
| 3123 | { |
| 3124 | DAC960_Notice("Flushing Cache...", Controller); |
| 3125 | DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice, |
| 3126 | DAC960_V2_RAID_Controller); |
| 3127 | DAC960_Notice("done\n", Controller); |
| 3128 | } |
| 3129 | } |
| 3130 | DAC960_UnregisterBlockDevice(Controller); |
| 3131 | DAC960_DestroyAuxiliaryStructures(Controller); |
| 3132 | DAC960_DestroyProcEntries(Controller); |
| 3133 | DAC960_DetectCleanup(Controller); |
| 3134 | } |
| 3135 | |
| 3136 | |
| 3137 | /* |
| 3138 | DAC960_Probe verifies controller's existence and |
| 3139 | initializes the DAC960 Driver for that controller. |
| 3140 | */ |
| 3141 | |
| 3142 | static int |
| 3143 | DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry) |
| 3144 | { |
| 3145 | int disk; |
| 3146 | DAC960_Controller_T *Controller; |
| 3147 | |
| 3148 | if (DAC960_ControllerCount == DAC960_MaxControllers) |
| 3149 | { |
| 3150 | DAC960_Error("More than %d DAC960 Controllers detected - " |
| 3151 | "ignoring from Controller at\n", |
| 3152 | NULL, DAC960_MaxControllers); |
| 3153 | return -ENODEV; |
| 3154 | } |
| 3155 | |
| 3156 | Controller = DAC960_DetectController(dev, entry); |
| 3157 | if (!Controller) |
| 3158 | return -ENODEV; |
| 3159 | |
| 3160 | if (!DAC960_InitializeController(Controller)) { |
| 3161 | DAC960_FinalizeController(Controller); |
| 3162 | return -ENODEV; |
| 3163 | } |
| 3164 | |
| 3165 | for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) { |
| 3166 | set_capacity(Controller->disks[disk], disk_size(Controller, disk)); |
| 3167 | add_disk(Controller->disks[disk]); |
| 3168 | } |
| 3169 | DAC960_CreateProcEntries(Controller); |
| 3170 | return 0; |
| 3171 | } |
| 3172 | |
| 3173 | |
| 3174 | /* |
| 3175 | DAC960_Finalize finalizes the DAC960 Driver. |
| 3176 | */ |
| 3177 | |
| 3178 | static void DAC960_Remove(struct pci_dev *PCI_Device) |
| 3179 | { |
| 3180 | int Controller_Number = (long)pci_get_drvdata(PCI_Device); |
| 3181 | DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number]; |
| 3182 | if (Controller != NULL) |
| 3183 | DAC960_FinalizeController(Controller); |
| 3184 | } |
| 3185 | |
| 3186 | |
| 3187 | /* |
| 3188 | DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for |
| 3189 | DAC960 V1 Firmware Controllers. |
| 3190 | */ |
| 3191 | |
| 3192 | static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command) |
| 3193 | { |
| 3194 | DAC960_Controller_T *Controller = Command->Controller; |
| 3195 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 3196 | DAC960_V1_ScatterGatherSegment_T *ScatterGatherList = |
| 3197 | Command->V1.ScatterGatherList; |
| 3198 | struct scatterlist *ScatterList = Command->V1.ScatterList; |
| 3199 | |
| 3200 | DAC960_V1_ClearCommand(Command); |
| 3201 | |
| 3202 | if (Command->SegmentCount == 1) |
| 3203 | { |
| 3204 | if (Command->DmaDirection == PCI_DMA_FROMDEVICE) |
| 3205 | CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read; |
| 3206 | else |
| 3207 | CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write; |
| 3208 | |
| 3209 | CommandMailbox->Type5.LD.TransferLength = Command->BlockCount; |
| 3210 | CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber; |
| 3211 | CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber; |
| 3212 | CommandMailbox->Type5.BusAddress = |
| 3213 | (DAC960_BusAddress32_T)sg_dma_address(ScatterList); |
| 3214 | } |
| 3215 | else |
| 3216 | { |
| 3217 | int i; |
| 3218 | |
| 3219 | if (Command->DmaDirection == PCI_DMA_FROMDEVICE) |
| 3220 | CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather; |
| 3221 | else |
| 3222 | CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather; |
| 3223 | |
| 3224 | CommandMailbox->Type5.LD.TransferLength = Command->BlockCount; |
| 3225 | CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber; |
| 3226 | CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber; |
| 3227 | CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA; |
| 3228 | |
| 3229 | CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount; |
| 3230 | |
| 3231 | for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) { |
| 3232 | ScatterGatherList->SegmentDataPointer = |
| 3233 | (DAC960_BusAddress32_T)sg_dma_address(ScatterList); |
| 3234 | ScatterGatherList->SegmentByteCount = |
| 3235 | (DAC960_ByteCount32_T)sg_dma_len(ScatterList); |
| 3236 | } |
| 3237 | } |
| 3238 | DAC960_QueueCommand(Command); |
| 3239 | } |
| 3240 | |
| 3241 | |
| 3242 | /* |
| 3243 | DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for |
| 3244 | DAC960 V2 Firmware Controllers. |
| 3245 | */ |
| 3246 | |
| 3247 | static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command) |
| 3248 | { |
| 3249 | DAC960_Controller_T *Controller = Command->Controller; |
| 3250 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 3251 | struct scatterlist *ScatterList = Command->V2.ScatterList; |
| 3252 | |
| 3253 | DAC960_V2_ClearCommand(Command); |
| 3254 | |
| 3255 | CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10; |
| 3256 | CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost = |
| 3257 | (Command->DmaDirection == PCI_DMA_FROMDEVICE); |
| 3258 | CommandMailbox->SCSI_10.DataTransferSize = |
| 3259 | Command->BlockCount << DAC960_BlockSizeBits; |
| 3260 | CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA; |
| 3261 | CommandMailbox->SCSI_10.PhysicalDevice = |
| 3262 | Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber]; |
| 3263 | CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T); |
| 3264 | CommandMailbox->SCSI_10.CDBLength = 10; |
| 3265 | CommandMailbox->SCSI_10.SCSI_CDB[0] = |
| 3266 | (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A); |
| 3267 | CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24; |
| 3268 | CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16; |
| 3269 | CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8; |
| 3270 | CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber; |
| 3271 | CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8; |
| 3272 | CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount; |
| 3273 | |
| 3274 | if (Command->SegmentCount == 1) |
| 3275 | { |
| 3276 | CommandMailbox->SCSI_10.DataTransferMemoryAddress |
| 3277 | .ScatterGatherSegments[0] |
| 3278 | .SegmentDataPointer = |
| 3279 | (DAC960_BusAddress64_T)sg_dma_address(ScatterList); |
| 3280 | CommandMailbox->SCSI_10.DataTransferMemoryAddress |
| 3281 | .ScatterGatherSegments[0] |
| 3282 | .SegmentByteCount = |
| 3283 | CommandMailbox->SCSI_10.DataTransferSize; |
| 3284 | } |
| 3285 | else |
| 3286 | { |
| 3287 | DAC960_V2_ScatterGatherSegment_T *ScatterGatherList; |
| 3288 | int i; |
| 3289 | |
| 3290 | if (Command->SegmentCount > 2) |
| 3291 | { |
| 3292 | ScatterGatherList = Command->V2.ScatterGatherList; |
| 3293 | CommandMailbox->SCSI_10.CommandControlBits |
| 3294 | .AdditionalScatterGatherListMemory = true; |
| 3295 | CommandMailbox->SCSI_10.DataTransferMemoryAddress |
| 3296 | .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount; |
| 3297 | CommandMailbox->SCSI_10.DataTransferMemoryAddress |
| 3298 | .ExtendedScatterGather.ScatterGatherList0Address = |
| 3299 | Command->V2.ScatterGatherListDMA; |
| 3300 | } |
| 3301 | else |
| 3302 | ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress |
| 3303 | .ScatterGatherSegments; |
| 3304 | |
| 3305 | for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) { |
| 3306 | ScatterGatherList->SegmentDataPointer = |
| 3307 | (DAC960_BusAddress64_T)sg_dma_address(ScatterList); |
| 3308 | ScatterGatherList->SegmentByteCount = |
| 3309 | (DAC960_ByteCount64_T)sg_dma_len(ScatterList); |
| 3310 | } |
| 3311 | } |
| 3312 | DAC960_QueueCommand(Command); |
| 3313 | } |
| 3314 | |
| 3315 | |
| 3316 | static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q) |
| 3317 | { |
| 3318 | struct request *Request; |
| 3319 | DAC960_Command_T *Command; |
| 3320 | |
| 3321 | while(1) { |
| 3322 | Request = elv_next_request(req_q); |
| 3323 | if (!Request) |
| 3324 | return 1; |
| 3325 | |
| 3326 | Command = DAC960_AllocateCommand(Controller); |
| 3327 | if (Command == NULL) |
| 3328 | return 0; |
| 3329 | |
| 3330 | if (rq_data_dir(Request) == READ) { |
| 3331 | Command->DmaDirection = PCI_DMA_FROMDEVICE; |
| 3332 | Command->CommandType = DAC960_ReadCommand; |
| 3333 | } else { |
| 3334 | Command->DmaDirection = PCI_DMA_TODEVICE; |
| 3335 | Command->CommandType = DAC960_WriteCommand; |
| 3336 | } |
| 3337 | Command->Completion = Request->waiting; |
| 3338 | Command->LogicalDriveNumber = (long)Request->rq_disk->private_data; |
| 3339 | Command->BlockNumber = Request->sector; |
| 3340 | Command->BlockCount = Request->nr_sectors; |
| 3341 | Command->Request = Request; |
| 3342 | blkdev_dequeue_request(Request); |
| 3343 | Command->SegmentCount = blk_rq_map_sg(req_q, |
| 3344 | Command->Request, Command->cmd_sglist); |
| 3345 | /* pci_map_sg MAY change the value of SegCount */ |
| 3346 | Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, |
| 3347 | Command->SegmentCount, Command->DmaDirection); |
| 3348 | |
| 3349 | DAC960_QueueReadWriteCommand(Command); |
| 3350 | } |
| 3351 | } |
| 3352 | |
| 3353 | /* |
| 3354 | DAC960_ProcessRequest attempts to remove one I/O Request from Controller's |
| 3355 | I/O Request Queue and queues it to the Controller. WaitForCommand is true if |
| 3356 | this function should wait for a Command to become available if necessary. |
| 3357 | This function returns true if an I/O Request was queued and false otherwise. |
| 3358 | */ |
| 3359 | static void DAC960_ProcessRequest(DAC960_Controller_T *controller) |
| 3360 | { |
| 3361 | int i; |
| 3362 | |
| 3363 | if (!controller->ControllerInitialized) |
| 3364 | return; |
| 3365 | |
| 3366 | /* Do this better later! */ |
| 3367 | for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) { |
| 3368 | struct request_queue *req_q = controller->RequestQueue[i]; |
| 3369 | |
| 3370 | if (req_q == NULL) |
| 3371 | continue; |
| 3372 | |
| 3373 | if (!DAC960_process_queue(controller, req_q)) { |
| 3374 | controller->req_q_index = i; |
| 3375 | return; |
| 3376 | } |
| 3377 | } |
| 3378 | |
| 3379 | if (controller->req_q_index == 0) |
| 3380 | return; |
| 3381 | |
| 3382 | for (i = 0; i < controller->req_q_index; i++) { |
| 3383 | struct request_queue *req_q = controller->RequestQueue[i]; |
| 3384 | |
| 3385 | if (req_q == NULL) |
| 3386 | continue; |
| 3387 | |
| 3388 | if (!DAC960_process_queue(controller, req_q)) { |
| 3389 | controller->req_q_index = i; |
| 3390 | return; |
| 3391 | } |
| 3392 | } |
| 3393 | } |
| 3394 | |
| 3395 | |
| 3396 | /* |
| 3397 | DAC960_queue_partial_rw extracts one bio from the request already |
| 3398 | associated with argument command, and construct a new command block to retry I/O |
| 3399 | only on that bio. Queue that command to the controller. |
| 3400 | |
| 3401 | This function re-uses a previously-allocated Command, |
| 3402 | there is no failure mode from trying to allocate a command. |
| 3403 | */ |
| 3404 | |
| 3405 | static void DAC960_queue_partial_rw(DAC960_Command_T *Command) |
| 3406 | { |
| 3407 | DAC960_Controller_T *Controller = Command->Controller; |
| 3408 | struct request *Request = Command->Request; |
| 3409 | struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber]; |
| 3410 | |
| 3411 | if (Command->DmaDirection == PCI_DMA_FROMDEVICE) |
| 3412 | Command->CommandType = DAC960_ReadRetryCommand; |
| 3413 | else |
| 3414 | Command->CommandType = DAC960_WriteRetryCommand; |
| 3415 | |
| 3416 | /* |
| 3417 | * We could be more efficient with these mapping requests |
| 3418 | * and map only the portions that we need. But since this |
| 3419 | * code should almost never be called, just go with a |
| 3420 | * simple coding. |
| 3421 | */ |
| 3422 | (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist); |
| 3423 | |
| 3424 | (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection); |
| 3425 | /* |
| 3426 | * Resubmitting the request sector at a time is really tedious. |
| 3427 | * But, this should almost never happen. So, we're willing to pay |
| 3428 | * this price so that in the end, as much of the transfer is completed |
| 3429 | * successfully as possible. |
| 3430 | */ |
| 3431 | Command->SegmentCount = 1; |
| 3432 | Command->BlockNumber = Request->sector; |
| 3433 | Command->BlockCount = 1; |
| 3434 | DAC960_QueueReadWriteCommand(Command); |
| 3435 | return; |
| 3436 | } |
| 3437 | |
| 3438 | /* |
| 3439 | DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers. |
| 3440 | */ |
| 3441 | |
| 3442 | static void DAC960_RequestFunction(struct request_queue *RequestQueue) |
| 3443 | { |
| 3444 | DAC960_ProcessRequest(RequestQueue->queuedata); |
| 3445 | } |
| 3446 | |
| 3447 | /* |
| 3448 | DAC960_ProcessCompletedBuffer performs completion processing for an |
| 3449 | individual Buffer. |
| 3450 | */ |
| 3451 | |
| 3452 | static inline boolean DAC960_ProcessCompletedRequest(DAC960_Command_T *Command, |
| 3453 | boolean SuccessfulIO) |
| 3454 | { |
| 3455 | struct request *Request = Command->Request; |
| 3456 | int UpToDate; |
| 3457 | |
| 3458 | UpToDate = 0; |
| 3459 | if (SuccessfulIO) |
| 3460 | UpToDate = 1; |
| 3461 | |
| 3462 | pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist, |
| 3463 | Command->SegmentCount, Command->DmaDirection); |
| 3464 | |
| 3465 | if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) { |
| 3466 | |
Tejun Heo | 8ffdc65 | 2006-01-06 09:49:03 +0100 | [diff] [blame] | 3467 | end_that_request_last(Request, UpToDate); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3468 | |
| 3469 | if (Command->Completion) { |
| 3470 | complete(Command->Completion); |
| 3471 | Command->Completion = NULL; |
| 3472 | } |
| 3473 | return true; |
| 3474 | } |
| 3475 | return false; |
| 3476 | } |
| 3477 | |
| 3478 | /* |
| 3479 | DAC960_V1_ReadWriteError prints an appropriate error message for Command |
| 3480 | when an error occurs on a Read or Write operation. |
| 3481 | */ |
| 3482 | |
| 3483 | static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command) |
| 3484 | { |
| 3485 | DAC960_Controller_T *Controller = Command->Controller; |
| 3486 | unsigned char *CommandName = "UNKNOWN"; |
| 3487 | switch (Command->CommandType) |
| 3488 | { |
| 3489 | case DAC960_ReadCommand: |
| 3490 | case DAC960_ReadRetryCommand: |
| 3491 | CommandName = "READ"; |
| 3492 | break; |
| 3493 | case DAC960_WriteCommand: |
| 3494 | case DAC960_WriteRetryCommand: |
| 3495 | CommandName = "WRITE"; |
| 3496 | break; |
| 3497 | case DAC960_MonitoringCommand: |
| 3498 | case DAC960_ImmediateCommand: |
| 3499 | case DAC960_QueuedCommand: |
| 3500 | break; |
| 3501 | } |
| 3502 | switch (Command->V1.CommandStatus) |
| 3503 | { |
| 3504 | case DAC960_V1_IrrecoverableDataError: |
| 3505 | DAC960_Error("Irrecoverable Data Error on %s:\n", |
| 3506 | Controller, CommandName); |
| 3507 | break; |
| 3508 | case DAC960_V1_LogicalDriveNonexistentOrOffline: |
| 3509 | DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n", |
| 3510 | Controller, CommandName); |
| 3511 | break; |
| 3512 | case DAC960_V1_AccessBeyondEndOfLogicalDrive: |
| 3513 | DAC960_Error("Attempt to Access Beyond End of Logical Drive " |
| 3514 | "on %s:\n", Controller, CommandName); |
| 3515 | break; |
| 3516 | case DAC960_V1_BadDataEncountered: |
| 3517 | DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName); |
| 3518 | break; |
| 3519 | default: |
| 3520 | DAC960_Error("Unexpected Error Status %04X on %s:\n", |
| 3521 | Controller, Command->V1.CommandStatus, CommandName); |
| 3522 | break; |
| 3523 | } |
| 3524 | DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n", |
| 3525 | Controller, Controller->ControllerNumber, |
| 3526 | Command->LogicalDriveNumber, Command->BlockNumber, |
| 3527 | Command->BlockNumber + Command->BlockCount - 1); |
| 3528 | } |
| 3529 | |
| 3530 | |
| 3531 | /* |
| 3532 | DAC960_V1_ProcessCompletedCommand performs completion processing for Command |
| 3533 | for DAC960 V1 Firmware Controllers. |
| 3534 | */ |
| 3535 | |
| 3536 | static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command) |
| 3537 | { |
| 3538 | DAC960_Controller_T *Controller = Command->Controller; |
| 3539 | DAC960_CommandType_T CommandType = Command->CommandType; |
| 3540 | DAC960_V1_CommandOpcode_T CommandOpcode = |
| 3541 | Command->V1.CommandMailbox.Common.CommandOpcode; |
| 3542 | DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus; |
| 3543 | |
| 3544 | if (CommandType == DAC960_ReadCommand || |
| 3545 | CommandType == DAC960_WriteCommand) |
| 3546 | { |
| 3547 | |
| 3548 | #ifdef FORCE_RETRY_DEBUG |
| 3549 | CommandStatus = DAC960_V1_IrrecoverableDataError; |
| 3550 | #endif |
| 3551 | |
| 3552 | if (CommandStatus == DAC960_V1_NormalCompletion) { |
| 3553 | |
| 3554 | if (!DAC960_ProcessCompletedRequest(Command, true)) |
| 3555 | BUG(); |
| 3556 | |
| 3557 | } else if (CommandStatus == DAC960_V1_IrrecoverableDataError || |
| 3558 | CommandStatus == DAC960_V1_BadDataEncountered) |
| 3559 | { |
| 3560 | /* |
| 3561 | * break the command down into pieces and resubmit each |
| 3562 | * piece, hoping that some of them will succeed. |
| 3563 | */ |
| 3564 | DAC960_queue_partial_rw(Command); |
| 3565 | return; |
| 3566 | } |
| 3567 | else |
| 3568 | { |
| 3569 | if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline) |
| 3570 | DAC960_V1_ReadWriteError(Command); |
| 3571 | |
| 3572 | if (!DAC960_ProcessCompletedRequest(Command, false)) |
| 3573 | BUG(); |
| 3574 | } |
| 3575 | } |
| 3576 | else if (CommandType == DAC960_ReadRetryCommand || |
| 3577 | CommandType == DAC960_WriteRetryCommand) |
| 3578 | { |
| 3579 | boolean normal_completion; |
| 3580 | #ifdef FORCE_RETRY_FAILURE_DEBUG |
| 3581 | static int retry_count = 1; |
| 3582 | #endif |
| 3583 | /* |
| 3584 | Perform completion processing for the portion that was |
| 3585 | retried, and submit the next portion, if any. |
| 3586 | */ |
| 3587 | normal_completion = true; |
| 3588 | if (CommandStatus != DAC960_V1_NormalCompletion) { |
| 3589 | normal_completion = false; |
| 3590 | if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline) |
| 3591 | DAC960_V1_ReadWriteError(Command); |
| 3592 | } |
| 3593 | |
| 3594 | #ifdef FORCE_RETRY_FAILURE_DEBUG |
| 3595 | if (!(++retry_count % 10000)) { |
| 3596 | printk("V1 error retry failure test\n"); |
| 3597 | normal_completion = false; |
| 3598 | DAC960_V1_ReadWriteError(Command); |
| 3599 | } |
| 3600 | #endif |
| 3601 | |
| 3602 | if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) { |
| 3603 | DAC960_queue_partial_rw(Command); |
| 3604 | return; |
| 3605 | } |
| 3606 | } |
| 3607 | |
| 3608 | else if (CommandType == DAC960_MonitoringCommand) |
| 3609 | { |
| 3610 | if (Controller->ShutdownMonitoringTimer) |
| 3611 | return; |
| 3612 | if (CommandOpcode == DAC960_V1_Enquiry) |
| 3613 | { |
| 3614 | DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry; |
| 3615 | DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry; |
| 3616 | unsigned int OldCriticalLogicalDriveCount = |
| 3617 | OldEnquiry->CriticalLogicalDriveCount; |
| 3618 | unsigned int NewCriticalLogicalDriveCount = |
| 3619 | NewEnquiry->CriticalLogicalDriveCount; |
| 3620 | if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount) |
| 3621 | { |
| 3622 | int LogicalDriveNumber = Controller->LogicalDriveCount - 1; |
| 3623 | while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives) |
| 3624 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " |
| 3625 | "Now Exists\n", Controller, |
| 3626 | LogicalDriveNumber, |
| 3627 | Controller->ControllerNumber, |
| 3628 | LogicalDriveNumber); |
| 3629 | Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives; |
| 3630 | DAC960_ComputeGenericDiskInfo(Controller); |
| 3631 | } |
| 3632 | if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount) |
| 3633 | { |
| 3634 | int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1; |
| 3635 | while (++LogicalDriveNumber < Controller->LogicalDriveCount) |
| 3636 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " |
| 3637 | "No Longer Exists\n", Controller, |
| 3638 | LogicalDriveNumber, |
| 3639 | Controller->ControllerNumber, |
| 3640 | LogicalDriveNumber); |
| 3641 | Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives; |
| 3642 | DAC960_ComputeGenericDiskInfo(Controller); |
| 3643 | } |
| 3644 | if (NewEnquiry->StatusFlags.DeferredWriteError != |
| 3645 | OldEnquiry->StatusFlags.DeferredWriteError) |
| 3646 | DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller, |
| 3647 | (NewEnquiry->StatusFlags.DeferredWriteError |
| 3648 | ? "TRUE" : "FALSE")); |
| 3649 | if ((NewCriticalLogicalDriveCount > 0 || |
| 3650 | NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) || |
| 3651 | (NewEnquiry->OfflineLogicalDriveCount > 0 || |
| 3652 | NewEnquiry->OfflineLogicalDriveCount != |
| 3653 | OldEnquiry->OfflineLogicalDriveCount) || |
| 3654 | (NewEnquiry->DeadDriveCount > 0 || |
| 3655 | NewEnquiry->DeadDriveCount != |
| 3656 | OldEnquiry->DeadDriveCount) || |
| 3657 | (NewEnquiry->EventLogSequenceNumber != |
| 3658 | OldEnquiry->EventLogSequenceNumber) || |
| 3659 | Controller->MonitoringTimerCount == 0 || |
| 3660 | (jiffies - Controller->SecondaryMonitoringTime |
| 3661 | >= DAC960_SecondaryMonitoringInterval)) |
| 3662 | { |
| 3663 | Controller->V1.NeedLogicalDriveInformation = true; |
| 3664 | Controller->V1.NewEventLogSequenceNumber = |
| 3665 | NewEnquiry->EventLogSequenceNumber; |
| 3666 | Controller->V1.NeedErrorTableInformation = true; |
| 3667 | Controller->V1.NeedDeviceStateInformation = true; |
| 3668 | Controller->V1.StartDeviceStateScan = true; |
| 3669 | Controller->V1.NeedBackgroundInitializationStatus = |
| 3670 | Controller->V1.BackgroundInitializationStatusSupported; |
| 3671 | Controller->SecondaryMonitoringTime = jiffies; |
| 3672 | } |
| 3673 | if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress || |
| 3674 | NewEnquiry->RebuildFlag |
| 3675 | == DAC960_V1_BackgroundRebuildInProgress || |
| 3676 | OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress || |
| 3677 | OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress) |
| 3678 | { |
| 3679 | Controller->V1.NeedRebuildProgress = true; |
| 3680 | Controller->V1.RebuildProgressFirst = |
| 3681 | (NewEnquiry->CriticalLogicalDriveCount < |
| 3682 | OldEnquiry->CriticalLogicalDriveCount); |
| 3683 | } |
| 3684 | if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress) |
| 3685 | switch (NewEnquiry->RebuildFlag) |
| 3686 | { |
| 3687 | case DAC960_V1_NoStandbyRebuildOrCheckInProgress: |
| 3688 | DAC960_Progress("Consistency Check Completed Successfully\n", |
| 3689 | Controller); |
| 3690 | break; |
| 3691 | case DAC960_V1_StandbyRebuildInProgress: |
| 3692 | case DAC960_V1_BackgroundRebuildInProgress: |
| 3693 | break; |
| 3694 | case DAC960_V1_BackgroundCheckInProgress: |
| 3695 | Controller->V1.NeedConsistencyCheckProgress = true; |
| 3696 | break; |
| 3697 | case DAC960_V1_StandbyRebuildCompletedWithError: |
| 3698 | DAC960_Progress("Consistency Check Completed with Error\n", |
| 3699 | Controller); |
| 3700 | break; |
| 3701 | case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed: |
| 3702 | DAC960_Progress("Consistency Check Failed - " |
| 3703 | "Physical Device Failed\n", Controller); |
| 3704 | break; |
| 3705 | case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed: |
| 3706 | DAC960_Progress("Consistency Check Failed - " |
| 3707 | "Logical Drive Failed\n", Controller); |
| 3708 | break; |
| 3709 | case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses: |
| 3710 | DAC960_Progress("Consistency Check Failed - Other Causes\n", |
| 3711 | Controller); |
| 3712 | break; |
| 3713 | case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated: |
| 3714 | DAC960_Progress("Consistency Check Successfully Terminated\n", |
| 3715 | Controller); |
| 3716 | break; |
| 3717 | } |
| 3718 | else if (NewEnquiry->RebuildFlag |
| 3719 | == DAC960_V1_BackgroundCheckInProgress) |
| 3720 | Controller->V1.NeedConsistencyCheckProgress = true; |
| 3721 | Controller->MonitoringAlertMode = |
| 3722 | (NewEnquiry->CriticalLogicalDriveCount > 0 || |
| 3723 | NewEnquiry->OfflineLogicalDriveCount > 0 || |
| 3724 | NewEnquiry->DeadDriveCount > 0); |
| 3725 | if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress) |
| 3726 | { |
| 3727 | Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag; |
| 3728 | Controller->V1.RebuildFlagPending = true; |
| 3729 | } |
| 3730 | memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry, |
| 3731 | sizeof(DAC960_V1_Enquiry_T)); |
| 3732 | } |
| 3733 | else if (CommandOpcode == DAC960_V1_PerformEventLogOperation) |
| 3734 | { |
| 3735 | static char |
| 3736 | *DAC960_EventMessages[] = |
| 3737 | { "killed because write recovery failed", |
| 3738 | "killed because of SCSI bus reset failure", |
| 3739 | "killed because of double check condition", |
| 3740 | "killed because it was removed", |
| 3741 | "killed because of gross error on SCSI chip", |
| 3742 | "killed because of bad tag returned from drive", |
| 3743 | "killed because of timeout on SCSI command", |
| 3744 | "killed because of reset SCSI command issued from system", |
| 3745 | "killed because busy or parity error count exceeded limit", |
| 3746 | "killed because of 'kill drive' command from system", |
| 3747 | "killed because of selection timeout", |
| 3748 | "killed due to SCSI phase sequence error", |
| 3749 | "killed due to unknown status" }; |
| 3750 | DAC960_V1_EventLogEntry_T *EventLogEntry = |
| 3751 | Controller->V1.EventLogEntry; |
| 3752 | if (EventLogEntry->SequenceNumber == |
| 3753 | Controller->V1.OldEventLogSequenceNumber) |
| 3754 | { |
| 3755 | unsigned char SenseKey = EventLogEntry->SenseKey; |
| 3756 | unsigned char AdditionalSenseCode = |
| 3757 | EventLogEntry->AdditionalSenseCode; |
| 3758 | unsigned char AdditionalSenseCodeQualifier = |
| 3759 | EventLogEntry->AdditionalSenseCodeQualifier; |
| 3760 | if (SenseKey == DAC960_SenseKey_VendorSpecific && |
| 3761 | AdditionalSenseCode == 0x80 && |
| 3762 | AdditionalSenseCodeQualifier < |
Tobias Klauser | 945f390 | 2006-01-08 01:05:11 -0800 | [diff] [blame] | 3763 | ARRAY_SIZE(DAC960_EventMessages)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3764 | DAC960_Critical("Physical Device %d:%d %s\n", Controller, |
| 3765 | EventLogEntry->Channel, |
| 3766 | EventLogEntry->TargetID, |
| 3767 | DAC960_EventMessages[ |
| 3768 | AdditionalSenseCodeQualifier]); |
| 3769 | else if (SenseKey == DAC960_SenseKey_UnitAttention && |
| 3770 | AdditionalSenseCode == 0x29) |
| 3771 | { |
| 3772 | if (Controller->MonitoringTimerCount > 0) |
| 3773 | Controller->V1.DeviceResetCount[EventLogEntry->Channel] |
| 3774 | [EventLogEntry->TargetID]++; |
| 3775 | } |
| 3776 | else if (!(SenseKey == DAC960_SenseKey_NoSense || |
| 3777 | (SenseKey == DAC960_SenseKey_NotReady && |
| 3778 | AdditionalSenseCode == 0x04 && |
| 3779 | (AdditionalSenseCodeQualifier == 0x01 || |
| 3780 | AdditionalSenseCodeQualifier == 0x02)))) |
| 3781 | { |
| 3782 | DAC960_Critical("Physical Device %d:%d Error Log: " |
| 3783 | "Sense Key = %X, ASC = %02X, ASCQ = %02X\n", |
| 3784 | Controller, |
| 3785 | EventLogEntry->Channel, |
| 3786 | EventLogEntry->TargetID, |
| 3787 | SenseKey, |
| 3788 | AdditionalSenseCode, |
| 3789 | AdditionalSenseCodeQualifier); |
| 3790 | DAC960_Critical("Physical Device %d:%d Error Log: " |
| 3791 | "Information = %02X%02X%02X%02X " |
| 3792 | "%02X%02X%02X%02X\n", |
| 3793 | Controller, |
| 3794 | EventLogEntry->Channel, |
| 3795 | EventLogEntry->TargetID, |
| 3796 | EventLogEntry->Information[0], |
| 3797 | EventLogEntry->Information[1], |
| 3798 | EventLogEntry->Information[2], |
| 3799 | EventLogEntry->Information[3], |
| 3800 | EventLogEntry->CommandSpecificInformation[0], |
| 3801 | EventLogEntry->CommandSpecificInformation[1], |
| 3802 | EventLogEntry->CommandSpecificInformation[2], |
| 3803 | EventLogEntry->CommandSpecificInformation[3]); |
| 3804 | } |
| 3805 | } |
| 3806 | Controller->V1.OldEventLogSequenceNumber++; |
| 3807 | } |
| 3808 | else if (CommandOpcode == DAC960_V1_GetErrorTable) |
| 3809 | { |
| 3810 | DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable; |
| 3811 | DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable; |
| 3812 | int Channel, TargetID; |
| 3813 | for (Channel = 0; Channel < Controller->Channels; Channel++) |
| 3814 | for (TargetID = 0; TargetID < Controller->Targets; TargetID++) |
| 3815 | { |
| 3816 | DAC960_V1_ErrorTableEntry_T *NewErrorEntry = |
| 3817 | &NewErrorTable->ErrorTableEntries[Channel][TargetID]; |
| 3818 | DAC960_V1_ErrorTableEntry_T *OldErrorEntry = |
| 3819 | &OldErrorTable->ErrorTableEntries[Channel][TargetID]; |
| 3820 | if ((NewErrorEntry->ParityErrorCount != |
| 3821 | OldErrorEntry->ParityErrorCount) || |
| 3822 | (NewErrorEntry->SoftErrorCount != |
| 3823 | OldErrorEntry->SoftErrorCount) || |
| 3824 | (NewErrorEntry->HardErrorCount != |
| 3825 | OldErrorEntry->HardErrorCount) || |
| 3826 | (NewErrorEntry->MiscErrorCount != |
| 3827 | OldErrorEntry->MiscErrorCount)) |
| 3828 | DAC960_Critical("Physical Device %d:%d Errors: " |
| 3829 | "Parity = %d, Soft = %d, " |
| 3830 | "Hard = %d, Misc = %d\n", |
| 3831 | Controller, Channel, TargetID, |
| 3832 | NewErrorEntry->ParityErrorCount, |
| 3833 | NewErrorEntry->SoftErrorCount, |
| 3834 | NewErrorEntry->HardErrorCount, |
| 3835 | NewErrorEntry->MiscErrorCount); |
| 3836 | } |
| 3837 | memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable, |
| 3838 | sizeof(DAC960_V1_ErrorTable_T)); |
| 3839 | } |
| 3840 | else if (CommandOpcode == DAC960_V1_GetDeviceState) |
| 3841 | { |
| 3842 | DAC960_V1_DeviceState_T *OldDeviceState = |
| 3843 | &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel] |
| 3844 | [Controller->V1.DeviceStateTargetID]; |
| 3845 | DAC960_V1_DeviceState_T *NewDeviceState = |
| 3846 | Controller->V1.NewDeviceState; |
| 3847 | if (NewDeviceState->DeviceState != OldDeviceState->DeviceState) |
| 3848 | DAC960_Critical("Physical Device %d:%d is now %s\n", Controller, |
| 3849 | Controller->V1.DeviceStateChannel, |
| 3850 | Controller->V1.DeviceStateTargetID, |
| 3851 | (NewDeviceState->DeviceState |
| 3852 | == DAC960_V1_Device_Dead |
| 3853 | ? "DEAD" |
| 3854 | : NewDeviceState->DeviceState |
| 3855 | == DAC960_V1_Device_WriteOnly |
| 3856 | ? "WRITE-ONLY" |
| 3857 | : NewDeviceState->DeviceState |
| 3858 | == DAC960_V1_Device_Online |
| 3859 | ? "ONLINE" : "STANDBY")); |
| 3860 | if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead && |
| 3861 | NewDeviceState->DeviceState != DAC960_V1_Device_Dead) |
| 3862 | { |
| 3863 | Controller->V1.NeedDeviceInquiryInformation = true; |
| 3864 | Controller->V1.NeedDeviceSerialNumberInformation = true; |
| 3865 | Controller->V1.DeviceResetCount |
| 3866 | [Controller->V1.DeviceStateChannel] |
| 3867 | [Controller->V1.DeviceStateTargetID] = 0; |
| 3868 | } |
| 3869 | memcpy(OldDeviceState, NewDeviceState, |
| 3870 | sizeof(DAC960_V1_DeviceState_T)); |
| 3871 | } |
| 3872 | else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation) |
| 3873 | { |
| 3874 | int LogicalDriveNumber; |
| 3875 | for (LogicalDriveNumber = 0; |
| 3876 | LogicalDriveNumber < Controller->LogicalDriveCount; |
| 3877 | LogicalDriveNumber++) |
| 3878 | { |
| 3879 | DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation = |
| 3880 | &Controller->V1.LogicalDriveInformation[LogicalDriveNumber]; |
| 3881 | DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation = |
| 3882 | &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber]; |
| 3883 | if (NewLogicalDriveInformation->LogicalDriveState != |
| 3884 | OldLogicalDriveInformation->LogicalDriveState) |
| 3885 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " |
| 3886 | "is now %s\n", Controller, |
| 3887 | LogicalDriveNumber, |
| 3888 | Controller->ControllerNumber, |
| 3889 | LogicalDriveNumber, |
| 3890 | (NewLogicalDriveInformation->LogicalDriveState |
| 3891 | == DAC960_V1_LogicalDrive_Online |
| 3892 | ? "ONLINE" |
| 3893 | : NewLogicalDriveInformation->LogicalDriveState |
| 3894 | == DAC960_V1_LogicalDrive_Critical |
| 3895 | ? "CRITICAL" : "OFFLINE")); |
| 3896 | if (NewLogicalDriveInformation->WriteBack != |
| 3897 | OldLogicalDriveInformation->WriteBack) |
| 3898 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " |
| 3899 | "is now %s\n", Controller, |
| 3900 | LogicalDriveNumber, |
| 3901 | Controller->ControllerNumber, |
| 3902 | LogicalDriveNumber, |
| 3903 | (NewLogicalDriveInformation->WriteBack |
| 3904 | ? "WRITE BACK" : "WRITE THRU")); |
| 3905 | } |
| 3906 | memcpy(&Controller->V1.LogicalDriveInformation, |
| 3907 | Controller->V1.NewLogicalDriveInformation, |
| 3908 | sizeof(DAC960_V1_LogicalDriveInformationArray_T)); |
| 3909 | } |
| 3910 | else if (CommandOpcode == DAC960_V1_GetRebuildProgress) |
| 3911 | { |
| 3912 | unsigned int LogicalDriveNumber = |
| 3913 | Controller->V1.RebuildProgress->LogicalDriveNumber; |
| 3914 | unsigned int LogicalDriveSize = |
| 3915 | Controller->V1.RebuildProgress->LogicalDriveSize; |
| 3916 | unsigned int BlocksCompleted = |
| 3917 | LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks; |
| 3918 | if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress && |
| 3919 | Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion) |
| 3920 | CommandStatus = DAC960_V1_RebuildSuccessful; |
| 3921 | switch (CommandStatus) |
| 3922 | { |
| 3923 | case DAC960_V1_NormalCompletion: |
| 3924 | Controller->EphemeralProgressMessage = true; |
| 3925 | DAC960_Progress("Rebuild in Progress: " |
| 3926 | "Logical Drive %d (/dev/rd/c%dd%d) " |
| 3927 | "%d%% completed\n", |
| 3928 | Controller, LogicalDriveNumber, |
| 3929 | Controller->ControllerNumber, |
| 3930 | LogicalDriveNumber, |
| 3931 | (100 * (BlocksCompleted >> 7)) |
| 3932 | / (LogicalDriveSize >> 7)); |
| 3933 | Controller->EphemeralProgressMessage = false; |
| 3934 | break; |
| 3935 | case DAC960_V1_RebuildFailed_LogicalDriveFailure: |
| 3936 | DAC960_Progress("Rebuild Failed due to " |
| 3937 | "Logical Drive Failure\n", Controller); |
| 3938 | break; |
| 3939 | case DAC960_V1_RebuildFailed_BadBlocksOnOther: |
| 3940 | DAC960_Progress("Rebuild Failed due to " |
| 3941 | "Bad Blocks on Other Drives\n", Controller); |
| 3942 | break; |
| 3943 | case DAC960_V1_RebuildFailed_NewDriveFailed: |
| 3944 | DAC960_Progress("Rebuild Failed due to " |
| 3945 | "Failure of Drive Being Rebuilt\n", Controller); |
| 3946 | break; |
| 3947 | case DAC960_V1_NoRebuildOrCheckInProgress: |
| 3948 | break; |
| 3949 | case DAC960_V1_RebuildSuccessful: |
| 3950 | DAC960_Progress("Rebuild Completed Successfully\n", Controller); |
| 3951 | break; |
| 3952 | case DAC960_V1_RebuildSuccessfullyTerminated: |
| 3953 | DAC960_Progress("Rebuild Successfully Terminated\n", Controller); |
| 3954 | break; |
| 3955 | } |
| 3956 | Controller->V1.LastRebuildStatus = CommandStatus; |
| 3957 | if (CommandType != DAC960_MonitoringCommand && |
| 3958 | Controller->V1.RebuildStatusPending) |
| 3959 | { |
| 3960 | Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus; |
| 3961 | Controller->V1.RebuildStatusPending = false; |
| 3962 | } |
| 3963 | else if (CommandType == DAC960_MonitoringCommand && |
| 3964 | CommandStatus != DAC960_V1_NormalCompletion && |
| 3965 | CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress) |
| 3966 | { |
| 3967 | Controller->V1.PendingRebuildStatus = CommandStatus; |
| 3968 | Controller->V1.RebuildStatusPending = true; |
| 3969 | } |
| 3970 | } |
| 3971 | else if (CommandOpcode == DAC960_V1_RebuildStat) |
| 3972 | { |
| 3973 | unsigned int LogicalDriveNumber = |
| 3974 | Controller->V1.RebuildProgress->LogicalDriveNumber; |
| 3975 | unsigned int LogicalDriveSize = |
| 3976 | Controller->V1.RebuildProgress->LogicalDriveSize; |
| 3977 | unsigned int BlocksCompleted = |
| 3978 | LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks; |
| 3979 | if (CommandStatus == DAC960_V1_NormalCompletion) |
| 3980 | { |
| 3981 | Controller->EphemeralProgressMessage = true; |
| 3982 | DAC960_Progress("Consistency Check in Progress: " |
| 3983 | "Logical Drive %d (/dev/rd/c%dd%d) " |
| 3984 | "%d%% completed\n", |
| 3985 | Controller, LogicalDriveNumber, |
| 3986 | Controller->ControllerNumber, |
| 3987 | LogicalDriveNumber, |
| 3988 | (100 * (BlocksCompleted >> 7)) |
| 3989 | / (LogicalDriveSize >> 7)); |
| 3990 | Controller->EphemeralProgressMessage = false; |
| 3991 | } |
| 3992 | } |
| 3993 | else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl) |
| 3994 | { |
| 3995 | unsigned int LogicalDriveNumber = |
| 3996 | Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber; |
| 3997 | unsigned int LogicalDriveSize = |
| 3998 | Controller->V1.BackgroundInitializationStatus->LogicalDriveSize; |
| 3999 | unsigned int BlocksCompleted = |
| 4000 | Controller->V1.BackgroundInitializationStatus->BlocksCompleted; |
| 4001 | switch (CommandStatus) |
| 4002 | { |
| 4003 | case DAC960_V1_NormalCompletion: |
| 4004 | switch (Controller->V1.BackgroundInitializationStatus->Status) |
| 4005 | { |
| 4006 | case DAC960_V1_BackgroundInitializationInvalid: |
| 4007 | break; |
| 4008 | case DAC960_V1_BackgroundInitializationStarted: |
| 4009 | DAC960_Progress("Background Initialization Started\n", |
| 4010 | Controller); |
| 4011 | break; |
| 4012 | case DAC960_V1_BackgroundInitializationInProgress: |
| 4013 | if (BlocksCompleted == |
| 4014 | Controller->V1.LastBackgroundInitializationStatus. |
| 4015 | BlocksCompleted && |
| 4016 | LogicalDriveNumber == |
| 4017 | Controller->V1.LastBackgroundInitializationStatus. |
| 4018 | LogicalDriveNumber) |
| 4019 | break; |
| 4020 | Controller->EphemeralProgressMessage = true; |
| 4021 | DAC960_Progress("Background Initialization in Progress: " |
| 4022 | "Logical Drive %d (/dev/rd/c%dd%d) " |
| 4023 | "%d%% completed\n", |
| 4024 | Controller, LogicalDriveNumber, |
| 4025 | Controller->ControllerNumber, |
| 4026 | LogicalDriveNumber, |
| 4027 | (100 * (BlocksCompleted >> 7)) |
| 4028 | / (LogicalDriveSize >> 7)); |
| 4029 | Controller->EphemeralProgressMessage = false; |
| 4030 | break; |
| 4031 | case DAC960_V1_BackgroundInitializationSuspended: |
| 4032 | DAC960_Progress("Background Initialization Suspended\n", |
| 4033 | Controller); |
| 4034 | break; |
| 4035 | case DAC960_V1_BackgroundInitializationCancelled: |
| 4036 | DAC960_Progress("Background Initialization Cancelled\n", |
| 4037 | Controller); |
| 4038 | break; |
| 4039 | } |
| 4040 | memcpy(&Controller->V1.LastBackgroundInitializationStatus, |
| 4041 | Controller->V1.BackgroundInitializationStatus, |
| 4042 | sizeof(DAC960_V1_BackgroundInitializationStatus_T)); |
| 4043 | break; |
| 4044 | case DAC960_V1_BackgroundInitSuccessful: |
| 4045 | if (Controller->V1.BackgroundInitializationStatus->Status == |
| 4046 | DAC960_V1_BackgroundInitializationInProgress) |
| 4047 | DAC960_Progress("Background Initialization " |
| 4048 | "Completed Successfully\n", Controller); |
| 4049 | Controller->V1.BackgroundInitializationStatus->Status = |
| 4050 | DAC960_V1_BackgroundInitializationInvalid; |
| 4051 | break; |
| 4052 | case DAC960_V1_BackgroundInitAborted: |
| 4053 | if (Controller->V1.BackgroundInitializationStatus->Status == |
| 4054 | DAC960_V1_BackgroundInitializationInProgress) |
| 4055 | DAC960_Progress("Background Initialization Aborted\n", |
| 4056 | Controller); |
| 4057 | Controller->V1.BackgroundInitializationStatus->Status = |
| 4058 | DAC960_V1_BackgroundInitializationInvalid; |
| 4059 | break; |
| 4060 | case DAC960_V1_NoBackgroundInitInProgress: |
| 4061 | break; |
| 4062 | } |
| 4063 | } |
| 4064 | else if (CommandOpcode == DAC960_V1_DCDB) |
| 4065 | { |
| 4066 | /* |
| 4067 | This is a bit ugly. |
| 4068 | |
| 4069 | The InquiryStandardData and |
| 4070 | the InquiryUntitSerialNumber information |
| 4071 | retrieval operations BOTH use the DAC960_V1_DCDB |
| 4072 | commands. the test above can't distinguish between |
| 4073 | these two cases. |
| 4074 | |
| 4075 | Instead, we rely on the order of code later in this |
| 4076 | function to ensure that DeviceInquiryInformation commands |
| 4077 | are submitted before DeviceSerialNumber commands. |
| 4078 | */ |
| 4079 | if (Controller->V1.NeedDeviceInquiryInformation) |
| 4080 | { |
| 4081 | DAC960_SCSI_Inquiry_T *InquiryStandardData = |
| 4082 | &Controller->V1.InquiryStandardData |
| 4083 | [Controller->V1.DeviceStateChannel] |
| 4084 | [Controller->V1.DeviceStateTargetID]; |
| 4085 | if (CommandStatus != DAC960_V1_NormalCompletion) |
| 4086 | { |
| 4087 | memset(InquiryStandardData, 0, |
| 4088 | sizeof(DAC960_SCSI_Inquiry_T)); |
| 4089 | InquiryStandardData->PeripheralDeviceType = 0x1F; |
| 4090 | } |
| 4091 | else |
| 4092 | memcpy(InquiryStandardData, |
| 4093 | Controller->V1.NewInquiryStandardData, |
| 4094 | sizeof(DAC960_SCSI_Inquiry_T)); |
| 4095 | Controller->V1.NeedDeviceInquiryInformation = false; |
| 4096 | } |
| 4097 | else if (Controller->V1.NeedDeviceSerialNumberInformation) |
| 4098 | { |
| 4099 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = |
| 4100 | &Controller->V1.InquiryUnitSerialNumber |
| 4101 | [Controller->V1.DeviceStateChannel] |
| 4102 | [Controller->V1.DeviceStateTargetID]; |
| 4103 | if (CommandStatus != DAC960_V1_NormalCompletion) |
| 4104 | { |
| 4105 | memset(InquiryUnitSerialNumber, 0, |
| 4106 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 4107 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; |
| 4108 | } |
| 4109 | else |
| 4110 | memcpy(InquiryUnitSerialNumber, |
| 4111 | Controller->V1.NewInquiryUnitSerialNumber, |
| 4112 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 4113 | Controller->V1.NeedDeviceSerialNumberInformation = false; |
| 4114 | } |
| 4115 | } |
| 4116 | /* |
| 4117 | Begin submitting new monitoring commands. |
| 4118 | */ |
| 4119 | if (Controller->V1.NewEventLogSequenceNumber |
| 4120 | - Controller->V1.OldEventLogSequenceNumber > 0) |
| 4121 | { |
| 4122 | Command->V1.CommandMailbox.Type3E.CommandOpcode = |
| 4123 | DAC960_V1_PerformEventLogOperation; |
| 4124 | Command->V1.CommandMailbox.Type3E.OperationType = |
| 4125 | DAC960_V1_GetEventLogEntry; |
| 4126 | Command->V1.CommandMailbox.Type3E.OperationQualifier = 1; |
| 4127 | Command->V1.CommandMailbox.Type3E.SequenceNumber = |
| 4128 | Controller->V1.OldEventLogSequenceNumber; |
| 4129 | Command->V1.CommandMailbox.Type3E.BusAddress = |
| 4130 | Controller->V1.EventLogEntryDMA; |
| 4131 | DAC960_QueueCommand(Command); |
| 4132 | return; |
| 4133 | } |
| 4134 | if (Controller->V1.NeedErrorTableInformation) |
| 4135 | { |
| 4136 | Controller->V1.NeedErrorTableInformation = false; |
| 4137 | Command->V1.CommandMailbox.Type3.CommandOpcode = |
| 4138 | DAC960_V1_GetErrorTable; |
| 4139 | Command->V1.CommandMailbox.Type3.BusAddress = |
| 4140 | Controller->V1.NewErrorTableDMA; |
| 4141 | DAC960_QueueCommand(Command); |
| 4142 | return; |
| 4143 | } |
| 4144 | if (Controller->V1.NeedRebuildProgress && |
| 4145 | Controller->V1.RebuildProgressFirst) |
| 4146 | { |
| 4147 | Controller->V1.NeedRebuildProgress = false; |
| 4148 | Command->V1.CommandMailbox.Type3.CommandOpcode = |
| 4149 | DAC960_V1_GetRebuildProgress; |
| 4150 | Command->V1.CommandMailbox.Type3.BusAddress = |
| 4151 | Controller->V1.RebuildProgressDMA; |
| 4152 | DAC960_QueueCommand(Command); |
| 4153 | return; |
| 4154 | } |
| 4155 | if (Controller->V1.NeedDeviceStateInformation) |
| 4156 | { |
| 4157 | if (Controller->V1.NeedDeviceInquiryInformation) |
| 4158 | { |
| 4159 | DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB; |
| 4160 | dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA; |
| 4161 | |
| 4162 | dma_addr_t NewInquiryStandardDataDMA = |
| 4163 | Controller->V1.NewInquiryStandardDataDMA; |
| 4164 | |
| 4165 | Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB; |
| 4166 | Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA; |
| 4167 | DCDB->Channel = Controller->V1.DeviceStateChannel; |
| 4168 | DCDB->TargetID = Controller->V1.DeviceStateTargetID; |
| 4169 | DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem; |
| 4170 | DCDB->EarlyStatus = false; |
| 4171 | DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds; |
| 4172 | DCDB->NoAutomaticRequestSense = false; |
| 4173 | DCDB->DisconnectPermitted = true; |
| 4174 | DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T); |
| 4175 | DCDB->BusAddress = NewInquiryStandardDataDMA; |
| 4176 | DCDB->CDBLength = 6; |
| 4177 | DCDB->TransferLengthHigh4 = 0; |
| 4178 | DCDB->SenseLength = sizeof(DCDB->SenseData); |
| 4179 | DCDB->CDB[0] = 0x12; /* INQUIRY */ |
| 4180 | DCDB->CDB[1] = 0; /* EVPD = 0 */ |
| 4181 | DCDB->CDB[2] = 0; /* Page Code */ |
| 4182 | DCDB->CDB[3] = 0; /* Reserved */ |
| 4183 | DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T); |
| 4184 | DCDB->CDB[5] = 0; /* Control */ |
| 4185 | DAC960_QueueCommand(Command); |
| 4186 | return; |
| 4187 | } |
| 4188 | if (Controller->V1.NeedDeviceSerialNumberInformation) |
| 4189 | { |
| 4190 | DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB; |
| 4191 | dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA; |
| 4192 | dma_addr_t NewInquiryUnitSerialNumberDMA = |
| 4193 | Controller->V1.NewInquiryUnitSerialNumberDMA; |
| 4194 | |
| 4195 | Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB; |
| 4196 | Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA; |
| 4197 | DCDB->Channel = Controller->V1.DeviceStateChannel; |
| 4198 | DCDB->TargetID = Controller->V1.DeviceStateTargetID; |
| 4199 | DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem; |
| 4200 | DCDB->EarlyStatus = false; |
| 4201 | DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds; |
| 4202 | DCDB->NoAutomaticRequestSense = false; |
| 4203 | DCDB->DisconnectPermitted = true; |
| 4204 | DCDB->TransferLength = |
| 4205 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); |
| 4206 | DCDB->BusAddress = NewInquiryUnitSerialNumberDMA; |
| 4207 | DCDB->CDBLength = 6; |
| 4208 | DCDB->TransferLengthHigh4 = 0; |
| 4209 | DCDB->SenseLength = sizeof(DCDB->SenseData); |
| 4210 | DCDB->CDB[0] = 0x12; /* INQUIRY */ |
| 4211 | DCDB->CDB[1] = 1; /* EVPD = 1 */ |
| 4212 | DCDB->CDB[2] = 0x80; /* Page Code */ |
| 4213 | DCDB->CDB[3] = 0; /* Reserved */ |
| 4214 | DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); |
| 4215 | DCDB->CDB[5] = 0; /* Control */ |
| 4216 | DAC960_QueueCommand(Command); |
| 4217 | return; |
| 4218 | } |
| 4219 | if (Controller->V1.StartDeviceStateScan) |
| 4220 | { |
| 4221 | Controller->V1.DeviceStateChannel = 0; |
| 4222 | Controller->V1.DeviceStateTargetID = 0; |
| 4223 | Controller->V1.StartDeviceStateScan = false; |
| 4224 | } |
| 4225 | else if (++Controller->V1.DeviceStateTargetID == Controller->Targets) |
| 4226 | { |
| 4227 | Controller->V1.DeviceStateChannel++; |
| 4228 | Controller->V1.DeviceStateTargetID = 0; |
| 4229 | } |
| 4230 | if (Controller->V1.DeviceStateChannel < Controller->Channels) |
| 4231 | { |
| 4232 | Controller->V1.NewDeviceState->DeviceState = |
| 4233 | DAC960_V1_Device_Dead; |
| 4234 | Command->V1.CommandMailbox.Type3D.CommandOpcode = |
| 4235 | DAC960_V1_GetDeviceState; |
| 4236 | Command->V1.CommandMailbox.Type3D.Channel = |
| 4237 | Controller->V1.DeviceStateChannel; |
| 4238 | Command->V1.CommandMailbox.Type3D.TargetID = |
| 4239 | Controller->V1.DeviceStateTargetID; |
| 4240 | Command->V1.CommandMailbox.Type3D.BusAddress = |
| 4241 | Controller->V1.NewDeviceStateDMA; |
| 4242 | DAC960_QueueCommand(Command); |
| 4243 | return; |
| 4244 | } |
| 4245 | Controller->V1.NeedDeviceStateInformation = false; |
| 4246 | } |
| 4247 | if (Controller->V1.NeedLogicalDriveInformation) |
| 4248 | { |
| 4249 | Controller->V1.NeedLogicalDriveInformation = false; |
| 4250 | Command->V1.CommandMailbox.Type3.CommandOpcode = |
| 4251 | DAC960_V1_GetLogicalDriveInformation; |
| 4252 | Command->V1.CommandMailbox.Type3.BusAddress = |
| 4253 | Controller->V1.NewLogicalDriveInformationDMA; |
| 4254 | DAC960_QueueCommand(Command); |
| 4255 | return; |
| 4256 | } |
| 4257 | if (Controller->V1.NeedRebuildProgress) |
| 4258 | { |
| 4259 | Controller->V1.NeedRebuildProgress = false; |
| 4260 | Command->V1.CommandMailbox.Type3.CommandOpcode = |
| 4261 | DAC960_V1_GetRebuildProgress; |
| 4262 | Command->V1.CommandMailbox.Type3.BusAddress = |
| 4263 | Controller->V1.RebuildProgressDMA; |
| 4264 | DAC960_QueueCommand(Command); |
| 4265 | return; |
| 4266 | } |
| 4267 | if (Controller->V1.NeedConsistencyCheckProgress) |
| 4268 | { |
| 4269 | Controller->V1.NeedConsistencyCheckProgress = false; |
| 4270 | Command->V1.CommandMailbox.Type3.CommandOpcode = |
| 4271 | DAC960_V1_RebuildStat; |
| 4272 | Command->V1.CommandMailbox.Type3.BusAddress = |
| 4273 | Controller->V1.RebuildProgressDMA; |
| 4274 | DAC960_QueueCommand(Command); |
| 4275 | return; |
| 4276 | } |
| 4277 | if (Controller->V1.NeedBackgroundInitializationStatus) |
| 4278 | { |
| 4279 | Controller->V1.NeedBackgroundInitializationStatus = false; |
| 4280 | Command->V1.CommandMailbox.Type3B.CommandOpcode = |
| 4281 | DAC960_V1_BackgroundInitializationControl; |
| 4282 | Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20; |
| 4283 | Command->V1.CommandMailbox.Type3B.BusAddress = |
| 4284 | Controller->V1.BackgroundInitializationStatusDMA; |
| 4285 | DAC960_QueueCommand(Command); |
| 4286 | return; |
| 4287 | } |
| 4288 | Controller->MonitoringTimerCount++; |
| 4289 | Controller->MonitoringTimer.expires = |
| 4290 | jiffies + DAC960_MonitoringTimerInterval; |
| 4291 | add_timer(&Controller->MonitoringTimer); |
| 4292 | } |
| 4293 | if (CommandType == DAC960_ImmediateCommand) |
| 4294 | { |
| 4295 | complete(Command->Completion); |
| 4296 | Command->Completion = NULL; |
| 4297 | return; |
| 4298 | } |
| 4299 | if (CommandType == DAC960_QueuedCommand) |
| 4300 | { |
| 4301 | DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand; |
| 4302 | KernelCommand->CommandStatus = Command->V1.CommandStatus; |
| 4303 | Command->V1.KernelCommand = NULL; |
| 4304 | if (CommandOpcode == DAC960_V1_DCDB) |
| 4305 | Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel] |
| 4306 | [KernelCommand->DCDB->TargetID] = |
| 4307 | false; |
| 4308 | DAC960_DeallocateCommand(Command); |
| 4309 | KernelCommand->CompletionFunction(KernelCommand); |
| 4310 | return; |
| 4311 | } |
| 4312 | /* |
| 4313 | Queue a Status Monitoring Command to the Controller using the just |
| 4314 | completed Command if one was deferred previously due to lack of a |
| 4315 | free Command when the Monitoring Timer Function was called. |
| 4316 | */ |
| 4317 | if (Controller->MonitoringCommandDeferred) |
| 4318 | { |
| 4319 | Controller->MonitoringCommandDeferred = false; |
| 4320 | DAC960_V1_QueueMonitoringCommand(Command); |
| 4321 | return; |
| 4322 | } |
| 4323 | /* |
| 4324 | Deallocate the Command. |
| 4325 | */ |
| 4326 | DAC960_DeallocateCommand(Command); |
| 4327 | /* |
| 4328 | Wake up any processes waiting on a free Command. |
| 4329 | */ |
| 4330 | wake_up(&Controller->CommandWaitQueue); |
| 4331 | } |
| 4332 | |
| 4333 | |
| 4334 | /* |
| 4335 | DAC960_V2_ReadWriteError prints an appropriate error message for Command |
| 4336 | when an error occurs on a Read or Write operation. |
| 4337 | */ |
| 4338 | |
| 4339 | static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command) |
| 4340 | { |
| 4341 | DAC960_Controller_T *Controller = Command->Controller; |
| 4342 | unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR", |
| 4343 | "NOT READY", "MEDIUM ERROR", |
| 4344 | "HARDWARE ERROR", "ILLEGAL REQUEST", |
| 4345 | "UNIT ATTENTION", "DATA PROTECT", |
| 4346 | "BLANK CHECK", "VENDOR-SPECIFIC", |
| 4347 | "COPY ABORTED", "ABORTED COMMAND", |
| 4348 | "EQUAL", "VOLUME OVERFLOW", |
| 4349 | "MISCOMPARE", "RESERVED" }; |
| 4350 | unsigned char *CommandName = "UNKNOWN"; |
| 4351 | switch (Command->CommandType) |
| 4352 | { |
| 4353 | case DAC960_ReadCommand: |
| 4354 | case DAC960_ReadRetryCommand: |
| 4355 | CommandName = "READ"; |
| 4356 | break; |
| 4357 | case DAC960_WriteCommand: |
| 4358 | case DAC960_WriteRetryCommand: |
| 4359 | CommandName = "WRITE"; |
| 4360 | break; |
| 4361 | case DAC960_MonitoringCommand: |
| 4362 | case DAC960_ImmediateCommand: |
| 4363 | case DAC960_QueuedCommand: |
| 4364 | break; |
| 4365 | } |
| 4366 | DAC960_Error("Error Condition %s on %s:\n", Controller, |
| 4367 | SenseErrors[Command->V2.RequestSense->SenseKey], CommandName); |
| 4368 | DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n", |
| 4369 | Controller, Controller->ControllerNumber, |
| 4370 | Command->LogicalDriveNumber, Command->BlockNumber, |
| 4371 | Command->BlockNumber + Command->BlockCount - 1); |
| 4372 | } |
| 4373 | |
| 4374 | |
| 4375 | /* |
| 4376 | DAC960_V2_ReportEvent prints an appropriate message when a Controller Event |
| 4377 | occurs. |
| 4378 | */ |
| 4379 | |
| 4380 | static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller, |
| 4381 | DAC960_V2_Event_T *Event) |
| 4382 | { |
| 4383 | DAC960_SCSI_RequestSense_T *RequestSense = |
| 4384 | (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData; |
| 4385 | unsigned char MessageBuffer[DAC960_LineBufferSize]; |
| 4386 | static struct { int EventCode; unsigned char *EventMessage; } EventList[] = |
| 4387 | { /* Physical Device Events (0x0000 - 0x007F) */ |
| 4388 | { 0x0001, "P Online" }, |
| 4389 | { 0x0002, "P Standby" }, |
| 4390 | { 0x0005, "P Automatic Rebuild Started" }, |
| 4391 | { 0x0006, "P Manual Rebuild Started" }, |
| 4392 | { 0x0007, "P Rebuild Completed" }, |
| 4393 | { 0x0008, "P Rebuild Cancelled" }, |
| 4394 | { 0x0009, "P Rebuild Failed for Unknown Reasons" }, |
| 4395 | { 0x000A, "P Rebuild Failed due to New Physical Device" }, |
| 4396 | { 0x000B, "P Rebuild Failed due to Logical Drive Failure" }, |
| 4397 | { 0x000C, "S Offline" }, |
| 4398 | { 0x000D, "P Found" }, |
| 4399 | { 0x000E, "P Removed" }, |
| 4400 | { 0x000F, "P Unconfigured" }, |
| 4401 | { 0x0010, "P Expand Capacity Started" }, |
| 4402 | { 0x0011, "P Expand Capacity Completed" }, |
| 4403 | { 0x0012, "P Expand Capacity Failed" }, |
| 4404 | { 0x0013, "P Command Timed Out" }, |
| 4405 | { 0x0014, "P Command Aborted" }, |
| 4406 | { 0x0015, "P Command Retried" }, |
| 4407 | { 0x0016, "P Parity Error" }, |
| 4408 | { 0x0017, "P Soft Error" }, |
| 4409 | { 0x0018, "P Miscellaneous Error" }, |
| 4410 | { 0x0019, "P Reset" }, |
| 4411 | { 0x001A, "P Active Spare Found" }, |
| 4412 | { 0x001B, "P Warm Spare Found" }, |
| 4413 | { 0x001C, "S Sense Data Received" }, |
| 4414 | { 0x001D, "P Initialization Started" }, |
| 4415 | { 0x001E, "P Initialization Completed" }, |
| 4416 | { 0x001F, "P Initialization Failed" }, |
| 4417 | { 0x0020, "P Initialization Cancelled" }, |
| 4418 | { 0x0021, "P Failed because Write Recovery Failed" }, |
| 4419 | { 0x0022, "P Failed because SCSI Bus Reset Failed" }, |
| 4420 | { 0x0023, "P Failed because of Double Check Condition" }, |
| 4421 | { 0x0024, "P Failed because Device Cannot Be Accessed" }, |
| 4422 | { 0x0025, "P Failed because of Gross Error on SCSI Processor" }, |
| 4423 | { 0x0026, "P Failed because of Bad Tag from Device" }, |
| 4424 | { 0x0027, "P Failed because of Command Timeout" }, |
| 4425 | { 0x0028, "P Failed because of System Reset" }, |
| 4426 | { 0x0029, "P Failed because of Busy Status or Parity Error" }, |
| 4427 | { 0x002A, "P Failed because Host Set Device to Failed State" }, |
| 4428 | { 0x002B, "P Failed because of Selection Timeout" }, |
| 4429 | { 0x002C, "P Failed because of SCSI Bus Phase Error" }, |
| 4430 | { 0x002D, "P Failed because Device Returned Unknown Status" }, |
| 4431 | { 0x002E, "P Failed because Device Not Ready" }, |
| 4432 | { 0x002F, "P Failed because Device Not Found at Startup" }, |
| 4433 | { 0x0030, "P Failed because COD Write Operation Failed" }, |
| 4434 | { 0x0031, "P Failed because BDT Write Operation Failed" }, |
| 4435 | { 0x0039, "P Missing at Startup" }, |
| 4436 | { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" }, |
| 4437 | { 0x003C, "P Temporarily Offline Device Automatically Made Online" }, |
| 4438 | { 0x003D, "P Standby Rebuild Started" }, |
| 4439 | /* Logical Device Events (0x0080 - 0x00FF) */ |
| 4440 | { 0x0080, "M Consistency Check Started" }, |
| 4441 | { 0x0081, "M Consistency Check Completed" }, |
| 4442 | { 0x0082, "M Consistency Check Cancelled" }, |
| 4443 | { 0x0083, "M Consistency Check Completed With Errors" }, |
| 4444 | { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" }, |
| 4445 | { 0x0085, "M Consistency Check Failed due to Physical Device Failure" }, |
| 4446 | { 0x0086, "L Offline" }, |
| 4447 | { 0x0087, "L Critical" }, |
| 4448 | { 0x0088, "L Online" }, |
| 4449 | { 0x0089, "M Automatic Rebuild Started" }, |
| 4450 | { 0x008A, "M Manual Rebuild Started" }, |
| 4451 | { 0x008B, "M Rebuild Completed" }, |
| 4452 | { 0x008C, "M Rebuild Cancelled" }, |
| 4453 | { 0x008D, "M Rebuild Failed for Unknown Reasons" }, |
| 4454 | { 0x008E, "M Rebuild Failed due to New Physical Device" }, |
| 4455 | { 0x008F, "M Rebuild Failed due to Logical Drive Failure" }, |
| 4456 | { 0x0090, "M Initialization Started" }, |
| 4457 | { 0x0091, "M Initialization Completed" }, |
| 4458 | { 0x0092, "M Initialization Cancelled" }, |
| 4459 | { 0x0093, "M Initialization Failed" }, |
| 4460 | { 0x0094, "L Found" }, |
| 4461 | { 0x0095, "L Deleted" }, |
| 4462 | { 0x0096, "M Expand Capacity Started" }, |
| 4463 | { 0x0097, "M Expand Capacity Completed" }, |
| 4464 | { 0x0098, "M Expand Capacity Failed" }, |
| 4465 | { 0x0099, "L Bad Block Found" }, |
| 4466 | { 0x009A, "L Size Changed" }, |
| 4467 | { 0x009B, "L Type Changed" }, |
| 4468 | { 0x009C, "L Bad Data Block Found" }, |
| 4469 | { 0x009E, "L Read of Data Block in BDT" }, |
| 4470 | { 0x009F, "L Write Back Data for Disk Block Lost" }, |
| 4471 | { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" }, |
| 4472 | { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" }, |
| 4473 | { 0x00A2, "L Standby Rebuild Started" }, |
| 4474 | /* Fault Management Events (0x0100 - 0x017F) */ |
| 4475 | { 0x0140, "E Fan %d Failed" }, |
| 4476 | { 0x0141, "E Fan %d OK" }, |
| 4477 | { 0x0142, "E Fan %d Not Present" }, |
| 4478 | { 0x0143, "E Power Supply %d Failed" }, |
| 4479 | { 0x0144, "E Power Supply %d OK" }, |
| 4480 | { 0x0145, "E Power Supply %d Not Present" }, |
| 4481 | { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" }, |
| 4482 | { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" }, |
| 4483 | { 0x0148, "E Temperature Sensor %d Temperature Normal" }, |
| 4484 | { 0x0149, "E Temperature Sensor %d Not Present" }, |
| 4485 | { 0x014A, "E Enclosure Management Unit %d Access Critical" }, |
| 4486 | { 0x014B, "E Enclosure Management Unit %d Access OK" }, |
| 4487 | { 0x014C, "E Enclosure Management Unit %d Access Offline" }, |
| 4488 | /* Controller Events (0x0180 - 0x01FF) */ |
| 4489 | { 0x0181, "C Cache Write Back Error" }, |
| 4490 | { 0x0188, "C Battery Backup Unit Found" }, |
| 4491 | { 0x0189, "C Battery Backup Unit Charge Level Low" }, |
| 4492 | { 0x018A, "C Battery Backup Unit Charge Level OK" }, |
| 4493 | { 0x0193, "C Installation Aborted" }, |
| 4494 | { 0x0195, "C Battery Backup Unit Physically Removed" }, |
| 4495 | { 0x0196, "C Memory Error During Warm Boot" }, |
| 4496 | { 0x019E, "C Memory Soft ECC Error Corrected" }, |
| 4497 | { 0x019F, "C Memory Hard ECC Error Corrected" }, |
| 4498 | { 0x01A2, "C Battery Backup Unit Failed" }, |
| 4499 | { 0x01AB, "C Mirror Race Recovery Failed" }, |
| 4500 | { 0x01AC, "C Mirror Race on Critical Drive" }, |
| 4501 | /* Controller Internal Processor Events */ |
| 4502 | { 0x0380, "C Internal Controller Hung" }, |
| 4503 | { 0x0381, "C Internal Controller Firmware Breakpoint" }, |
| 4504 | { 0x0390, "C Internal Controller i960 Processor Specific Error" }, |
| 4505 | { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" }, |
| 4506 | { 0, "" } }; |
| 4507 | int EventListIndex = 0, EventCode; |
| 4508 | unsigned char EventType, *EventMessage; |
| 4509 | if (Event->EventCode == 0x1C && |
| 4510 | RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific && |
| 4511 | (RequestSense->AdditionalSenseCode == 0x80 || |
| 4512 | RequestSense->AdditionalSenseCode == 0x81)) |
| 4513 | Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) | |
| 4514 | RequestSense->AdditionalSenseCodeQualifier; |
| 4515 | while (true) |
| 4516 | { |
| 4517 | EventCode = EventList[EventListIndex].EventCode; |
| 4518 | if (EventCode == Event->EventCode || EventCode == 0) break; |
| 4519 | EventListIndex++; |
| 4520 | } |
| 4521 | EventType = EventList[EventListIndex].EventMessage[0]; |
| 4522 | EventMessage = &EventList[EventListIndex].EventMessage[2]; |
| 4523 | if (EventCode == 0) |
| 4524 | { |
| 4525 | DAC960_Critical("Unknown Controller Event Code %04X\n", |
| 4526 | Controller, Event->EventCode); |
| 4527 | return; |
| 4528 | } |
| 4529 | switch (EventType) |
| 4530 | { |
| 4531 | case 'P': |
| 4532 | DAC960_Critical("Physical Device %d:%d %s\n", Controller, |
| 4533 | Event->Channel, Event->TargetID, EventMessage); |
| 4534 | break; |
| 4535 | case 'L': |
| 4536 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller, |
| 4537 | Event->LogicalUnit, Controller->ControllerNumber, |
| 4538 | Event->LogicalUnit, EventMessage); |
| 4539 | break; |
| 4540 | case 'M': |
| 4541 | DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller, |
| 4542 | Event->LogicalUnit, Controller->ControllerNumber, |
| 4543 | Event->LogicalUnit, EventMessage); |
| 4544 | break; |
| 4545 | case 'S': |
| 4546 | if (RequestSense->SenseKey == DAC960_SenseKey_NoSense || |
| 4547 | (RequestSense->SenseKey == DAC960_SenseKey_NotReady && |
| 4548 | RequestSense->AdditionalSenseCode == 0x04 && |
| 4549 | (RequestSense->AdditionalSenseCodeQualifier == 0x01 || |
| 4550 | RequestSense->AdditionalSenseCodeQualifier == 0x02))) |
| 4551 | break; |
| 4552 | DAC960_Critical("Physical Device %d:%d %s\n", Controller, |
| 4553 | Event->Channel, Event->TargetID, EventMessage); |
| 4554 | DAC960_Critical("Physical Device %d:%d Request Sense: " |
| 4555 | "Sense Key = %X, ASC = %02X, ASCQ = %02X\n", |
| 4556 | Controller, |
| 4557 | Event->Channel, |
| 4558 | Event->TargetID, |
| 4559 | RequestSense->SenseKey, |
| 4560 | RequestSense->AdditionalSenseCode, |
| 4561 | RequestSense->AdditionalSenseCodeQualifier); |
| 4562 | DAC960_Critical("Physical Device %d:%d Request Sense: " |
| 4563 | "Information = %02X%02X%02X%02X " |
| 4564 | "%02X%02X%02X%02X\n", |
| 4565 | Controller, |
| 4566 | Event->Channel, |
| 4567 | Event->TargetID, |
| 4568 | RequestSense->Information[0], |
| 4569 | RequestSense->Information[1], |
| 4570 | RequestSense->Information[2], |
| 4571 | RequestSense->Information[3], |
| 4572 | RequestSense->CommandSpecificInformation[0], |
| 4573 | RequestSense->CommandSpecificInformation[1], |
| 4574 | RequestSense->CommandSpecificInformation[2], |
| 4575 | RequestSense->CommandSpecificInformation[3]); |
| 4576 | break; |
| 4577 | case 'E': |
| 4578 | if (Controller->SuppressEnclosureMessages) break; |
| 4579 | sprintf(MessageBuffer, EventMessage, Event->LogicalUnit); |
| 4580 | DAC960_Critical("Enclosure %d %s\n", Controller, |
| 4581 | Event->TargetID, MessageBuffer); |
| 4582 | break; |
| 4583 | case 'C': |
| 4584 | DAC960_Critical("Controller %s\n", Controller, EventMessage); |
| 4585 | break; |
| 4586 | default: |
| 4587 | DAC960_Critical("Unknown Controller Event Code %04X\n", |
| 4588 | Controller, Event->EventCode); |
| 4589 | break; |
| 4590 | } |
| 4591 | } |
| 4592 | |
| 4593 | |
| 4594 | /* |
| 4595 | DAC960_V2_ReportProgress prints an appropriate progress message for |
| 4596 | Logical Device Long Operations. |
| 4597 | */ |
| 4598 | |
| 4599 | static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller, |
| 4600 | unsigned char *MessageString, |
| 4601 | unsigned int LogicalDeviceNumber, |
| 4602 | unsigned long BlocksCompleted, |
| 4603 | unsigned long LogicalDeviceSize) |
| 4604 | { |
| 4605 | Controller->EphemeralProgressMessage = true; |
| 4606 | DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) " |
| 4607 | "%d%% completed\n", Controller, |
| 4608 | MessageString, |
| 4609 | LogicalDeviceNumber, |
| 4610 | Controller->ControllerNumber, |
| 4611 | LogicalDeviceNumber, |
| 4612 | (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7)); |
| 4613 | Controller->EphemeralProgressMessage = false; |
| 4614 | } |
| 4615 | |
| 4616 | |
| 4617 | /* |
| 4618 | DAC960_V2_ProcessCompletedCommand performs completion processing for Command |
| 4619 | for DAC960 V2 Firmware Controllers. |
| 4620 | */ |
| 4621 | |
| 4622 | static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command) |
| 4623 | { |
| 4624 | DAC960_Controller_T *Controller = Command->Controller; |
| 4625 | DAC960_CommandType_T CommandType = Command->CommandType; |
| 4626 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 4627 | DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode; |
| 4628 | DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus; |
| 4629 | |
| 4630 | if (CommandType == DAC960_ReadCommand || |
| 4631 | CommandType == DAC960_WriteCommand) |
| 4632 | { |
| 4633 | |
| 4634 | #ifdef FORCE_RETRY_DEBUG |
| 4635 | CommandStatus = DAC960_V2_AbormalCompletion; |
| 4636 | #endif |
| 4637 | Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError; |
| 4638 | |
| 4639 | if (CommandStatus == DAC960_V2_NormalCompletion) { |
| 4640 | |
| 4641 | if (!DAC960_ProcessCompletedRequest(Command, true)) |
| 4642 | BUG(); |
| 4643 | |
| 4644 | } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError) |
| 4645 | { |
| 4646 | /* |
| 4647 | * break the command down into pieces and resubmit each |
| 4648 | * piece, hoping that some of them will succeed. |
| 4649 | */ |
| 4650 | DAC960_queue_partial_rw(Command); |
| 4651 | return; |
| 4652 | } |
| 4653 | else |
| 4654 | { |
| 4655 | if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady) |
| 4656 | DAC960_V2_ReadWriteError(Command); |
| 4657 | /* |
| 4658 | Perform completion processing for all buffers in this I/O Request. |
| 4659 | */ |
| 4660 | (void)DAC960_ProcessCompletedRequest(Command, false); |
| 4661 | } |
| 4662 | } |
| 4663 | else if (CommandType == DAC960_ReadRetryCommand || |
| 4664 | CommandType == DAC960_WriteRetryCommand) |
| 4665 | { |
| 4666 | boolean normal_completion; |
| 4667 | |
| 4668 | #ifdef FORCE_RETRY_FAILURE_DEBUG |
| 4669 | static int retry_count = 1; |
| 4670 | #endif |
| 4671 | /* |
| 4672 | Perform completion processing for the portion that was |
| 4673 | retried, and submit the next portion, if any. |
| 4674 | */ |
| 4675 | normal_completion = true; |
| 4676 | if (CommandStatus != DAC960_V2_NormalCompletion) { |
| 4677 | normal_completion = false; |
| 4678 | if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady) |
| 4679 | DAC960_V2_ReadWriteError(Command); |
| 4680 | } |
| 4681 | |
| 4682 | #ifdef FORCE_RETRY_FAILURE_DEBUG |
| 4683 | if (!(++retry_count % 10000)) { |
| 4684 | printk("V2 error retry failure test\n"); |
| 4685 | normal_completion = false; |
| 4686 | DAC960_V2_ReadWriteError(Command); |
| 4687 | } |
| 4688 | #endif |
| 4689 | |
| 4690 | if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) { |
| 4691 | DAC960_queue_partial_rw(Command); |
| 4692 | return; |
| 4693 | } |
| 4694 | } |
| 4695 | else if (CommandType == DAC960_MonitoringCommand) |
| 4696 | { |
| 4697 | if (Controller->ShutdownMonitoringTimer) |
| 4698 | return; |
| 4699 | if (CommandOpcode == DAC960_V2_GetControllerInfo) |
| 4700 | { |
| 4701 | DAC960_V2_ControllerInfo_T *NewControllerInfo = |
| 4702 | Controller->V2.NewControllerInformation; |
| 4703 | DAC960_V2_ControllerInfo_T *ControllerInfo = |
| 4704 | &Controller->V2.ControllerInformation; |
| 4705 | Controller->LogicalDriveCount = |
| 4706 | NewControllerInfo->LogicalDevicesPresent; |
| 4707 | Controller->V2.NeedLogicalDeviceInformation = true; |
| 4708 | Controller->V2.NeedPhysicalDeviceInformation = true; |
| 4709 | Controller->V2.StartLogicalDeviceInformationScan = true; |
| 4710 | Controller->V2.StartPhysicalDeviceInformationScan = true; |
| 4711 | Controller->MonitoringAlertMode = |
| 4712 | (NewControllerInfo->LogicalDevicesCritical > 0 || |
| 4713 | NewControllerInfo->LogicalDevicesOffline > 0 || |
| 4714 | NewControllerInfo->PhysicalDisksCritical > 0 || |
| 4715 | NewControllerInfo->PhysicalDisksOffline > 0); |
| 4716 | memcpy(ControllerInfo, NewControllerInfo, |
| 4717 | sizeof(DAC960_V2_ControllerInfo_T)); |
| 4718 | } |
| 4719 | else if (CommandOpcode == DAC960_V2_GetEvent) |
| 4720 | { |
| 4721 | if (CommandStatus == DAC960_V2_NormalCompletion) { |
| 4722 | DAC960_V2_ReportEvent(Controller, Controller->V2.Event); |
| 4723 | } |
| 4724 | Controller->V2.NextEventSequenceNumber++; |
| 4725 | } |
| 4726 | else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid && |
| 4727 | CommandStatus == DAC960_V2_NormalCompletion) |
| 4728 | { |
| 4729 | DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo = |
| 4730 | Controller->V2.NewPhysicalDeviceInformation; |
| 4731 | unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex; |
| 4732 | DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo = |
| 4733 | Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex]; |
| 4734 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = |
| 4735 | Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex]; |
| 4736 | unsigned int DeviceIndex; |
| 4737 | while (PhysicalDeviceInfo != NULL && |
| 4738 | (NewPhysicalDeviceInfo->Channel > |
| 4739 | PhysicalDeviceInfo->Channel || |
| 4740 | (NewPhysicalDeviceInfo->Channel == |
| 4741 | PhysicalDeviceInfo->Channel && |
| 4742 | (NewPhysicalDeviceInfo->TargetID > |
| 4743 | PhysicalDeviceInfo->TargetID || |
| 4744 | (NewPhysicalDeviceInfo->TargetID == |
| 4745 | PhysicalDeviceInfo->TargetID && |
| 4746 | NewPhysicalDeviceInfo->LogicalUnit > |
| 4747 | PhysicalDeviceInfo->LogicalUnit))))) |
| 4748 | { |
| 4749 | DAC960_Critical("Physical Device %d:%d No Longer Exists\n", |
| 4750 | Controller, |
| 4751 | PhysicalDeviceInfo->Channel, |
| 4752 | PhysicalDeviceInfo->TargetID); |
| 4753 | Controller->V2.PhysicalDeviceInformation |
| 4754 | [PhysicalDeviceIndex] = NULL; |
| 4755 | Controller->V2.InquiryUnitSerialNumber |
| 4756 | [PhysicalDeviceIndex] = NULL; |
| 4757 | kfree(PhysicalDeviceInfo); |
| 4758 | kfree(InquiryUnitSerialNumber); |
| 4759 | for (DeviceIndex = PhysicalDeviceIndex; |
| 4760 | DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1; |
| 4761 | DeviceIndex++) |
| 4762 | { |
| 4763 | Controller->V2.PhysicalDeviceInformation[DeviceIndex] = |
| 4764 | Controller->V2.PhysicalDeviceInformation[DeviceIndex+1]; |
| 4765 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = |
| 4766 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1]; |
| 4767 | } |
| 4768 | Controller->V2.PhysicalDeviceInformation |
| 4769 | [DAC960_V2_MaxPhysicalDevices-1] = NULL; |
| 4770 | Controller->V2.InquiryUnitSerialNumber |
| 4771 | [DAC960_V2_MaxPhysicalDevices-1] = NULL; |
| 4772 | PhysicalDeviceInfo = |
| 4773 | Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex]; |
| 4774 | InquiryUnitSerialNumber = |
| 4775 | Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex]; |
| 4776 | } |
| 4777 | if (PhysicalDeviceInfo == NULL || |
| 4778 | (NewPhysicalDeviceInfo->Channel != |
| 4779 | PhysicalDeviceInfo->Channel) || |
| 4780 | (NewPhysicalDeviceInfo->TargetID != |
| 4781 | PhysicalDeviceInfo->TargetID) || |
| 4782 | (NewPhysicalDeviceInfo->LogicalUnit != |
| 4783 | PhysicalDeviceInfo->LogicalUnit)) |
| 4784 | { |
| 4785 | PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *) |
| 4786 | kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC); |
| 4787 | InquiryUnitSerialNumber = |
| 4788 | (DAC960_SCSI_Inquiry_UnitSerialNumber_T *) |
| 4789 | kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), |
| 4790 | GFP_ATOMIC); |
| 4791 | if (InquiryUnitSerialNumber == NULL && |
| 4792 | PhysicalDeviceInfo != NULL) |
| 4793 | { |
| 4794 | kfree(PhysicalDeviceInfo); |
| 4795 | PhysicalDeviceInfo = NULL; |
| 4796 | } |
| 4797 | DAC960_Critical("Physical Device %d:%d Now Exists%s\n", |
| 4798 | Controller, |
| 4799 | NewPhysicalDeviceInfo->Channel, |
| 4800 | NewPhysicalDeviceInfo->TargetID, |
| 4801 | (PhysicalDeviceInfo != NULL |
| 4802 | ? "" : " - Allocation Failed")); |
| 4803 | if (PhysicalDeviceInfo != NULL) |
| 4804 | { |
| 4805 | memset(PhysicalDeviceInfo, 0, |
| 4806 | sizeof(DAC960_V2_PhysicalDeviceInfo_T)); |
| 4807 | PhysicalDeviceInfo->PhysicalDeviceState = |
| 4808 | DAC960_V2_Device_InvalidState; |
| 4809 | memset(InquiryUnitSerialNumber, 0, |
| 4810 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 4811 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; |
| 4812 | for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1; |
| 4813 | DeviceIndex > PhysicalDeviceIndex; |
| 4814 | DeviceIndex--) |
| 4815 | { |
| 4816 | Controller->V2.PhysicalDeviceInformation[DeviceIndex] = |
| 4817 | Controller->V2.PhysicalDeviceInformation[DeviceIndex-1]; |
| 4818 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = |
| 4819 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1]; |
| 4820 | } |
| 4821 | Controller->V2.PhysicalDeviceInformation |
| 4822 | [PhysicalDeviceIndex] = |
| 4823 | PhysicalDeviceInfo; |
| 4824 | Controller->V2.InquiryUnitSerialNumber |
| 4825 | [PhysicalDeviceIndex] = |
| 4826 | InquiryUnitSerialNumber; |
| 4827 | Controller->V2.NeedDeviceSerialNumberInformation = true; |
| 4828 | } |
| 4829 | } |
| 4830 | if (PhysicalDeviceInfo != NULL) |
| 4831 | { |
| 4832 | if (NewPhysicalDeviceInfo->PhysicalDeviceState != |
| 4833 | PhysicalDeviceInfo->PhysicalDeviceState) |
| 4834 | DAC960_Critical( |
| 4835 | "Physical Device %d:%d is now %s\n", Controller, |
| 4836 | NewPhysicalDeviceInfo->Channel, |
| 4837 | NewPhysicalDeviceInfo->TargetID, |
| 4838 | (NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4839 | == DAC960_V2_Device_Online |
| 4840 | ? "ONLINE" |
| 4841 | : NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4842 | == DAC960_V2_Device_Rebuild |
| 4843 | ? "REBUILD" |
| 4844 | : NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4845 | == DAC960_V2_Device_Missing |
| 4846 | ? "MISSING" |
| 4847 | : NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4848 | == DAC960_V2_Device_Critical |
| 4849 | ? "CRITICAL" |
| 4850 | : NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4851 | == DAC960_V2_Device_Dead |
| 4852 | ? "DEAD" |
| 4853 | : NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4854 | == DAC960_V2_Device_SuspectedDead |
| 4855 | ? "SUSPECTED-DEAD" |
| 4856 | : NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4857 | == DAC960_V2_Device_CommandedOffline |
| 4858 | ? "COMMANDED-OFFLINE" |
| 4859 | : NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4860 | == DAC960_V2_Device_Standby |
| 4861 | ? "STANDBY" : "UNKNOWN")); |
| 4862 | if ((NewPhysicalDeviceInfo->ParityErrors != |
| 4863 | PhysicalDeviceInfo->ParityErrors) || |
| 4864 | (NewPhysicalDeviceInfo->SoftErrors != |
| 4865 | PhysicalDeviceInfo->SoftErrors) || |
| 4866 | (NewPhysicalDeviceInfo->HardErrors != |
| 4867 | PhysicalDeviceInfo->HardErrors) || |
| 4868 | (NewPhysicalDeviceInfo->MiscellaneousErrors != |
| 4869 | PhysicalDeviceInfo->MiscellaneousErrors) || |
| 4870 | (NewPhysicalDeviceInfo->CommandTimeouts != |
| 4871 | PhysicalDeviceInfo->CommandTimeouts) || |
| 4872 | (NewPhysicalDeviceInfo->Retries != |
| 4873 | PhysicalDeviceInfo->Retries) || |
| 4874 | (NewPhysicalDeviceInfo->Aborts != |
| 4875 | PhysicalDeviceInfo->Aborts) || |
| 4876 | (NewPhysicalDeviceInfo->PredictedFailuresDetected != |
| 4877 | PhysicalDeviceInfo->PredictedFailuresDetected)) |
| 4878 | { |
| 4879 | DAC960_Critical("Physical Device %d:%d Errors: " |
| 4880 | "Parity = %d, Soft = %d, " |
| 4881 | "Hard = %d, Misc = %d\n", |
| 4882 | Controller, |
| 4883 | NewPhysicalDeviceInfo->Channel, |
| 4884 | NewPhysicalDeviceInfo->TargetID, |
| 4885 | NewPhysicalDeviceInfo->ParityErrors, |
| 4886 | NewPhysicalDeviceInfo->SoftErrors, |
| 4887 | NewPhysicalDeviceInfo->HardErrors, |
| 4888 | NewPhysicalDeviceInfo->MiscellaneousErrors); |
| 4889 | DAC960_Critical("Physical Device %d:%d Errors: " |
| 4890 | "Timeouts = %d, Retries = %d, " |
| 4891 | "Aborts = %d, Predicted = %d\n", |
| 4892 | Controller, |
| 4893 | NewPhysicalDeviceInfo->Channel, |
| 4894 | NewPhysicalDeviceInfo->TargetID, |
| 4895 | NewPhysicalDeviceInfo->CommandTimeouts, |
| 4896 | NewPhysicalDeviceInfo->Retries, |
| 4897 | NewPhysicalDeviceInfo->Aborts, |
| 4898 | NewPhysicalDeviceInfo |
| 4899 | ->PredictedFailuresDetected); |
| 4900 | } |
| 4901 | if ((PhysicalDeviceInfo->PhysicalDeviceState |
| 4902 | == DAC960_V2_Device_Dead || |
| 4903 | PhysicalDeviceInfo->PhysicalDeviceState |
| 4904 | == DAC960_V2_Device_InvalidState) && |
| 4905 | NewPhysicalDeviceInfo->PhysicalDeviceState |
| 4906 | != DAC960_V2_Device_Dead) |
| 4907 | Controller->V2.NeedDeviceSerialNumberInformation = true; |
| 4908 | memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo, |
| 4909 | sizeof(DAC960_V2_PhysicalDeviceInfo_T)); |
| 4910 | } |
| 4911 | NewPhysicalDeviceInfo->LogicalUnit++; |
| 4912 | Controller->V2.PhysicalDeviceIndex++; |
| 4913 | } |
| 4914 | else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid) |
| 4915 | { |
| 4916 | unsigned int DeviceIndex; |
| 4917 | for (DeviceIndex = Controller->V2.PhysicalDeviceIndex; |
| 4918 | DeviceIndex < DAC960_V2_MaxPhysicalDevices; |
| 4919 | DeviceIndex++) |
| 4920 | { |
| 4921 | DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo = |
| 4922 | Controller->V2.PhysicalDeviceInformation[DeviceIndex]; |
| 4923 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = |
| 4924 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex]; |
| 4925 | if (PhysicalDeviceInfo == NULL) break; |
| 4926 | DAC960_Critical("Physical Device %d:%d No Longer Exists\n", |
| 4927 | Controller, |
| 4928 | PhysicalDeviceInfo->Channel, |
| 4929 | PhysicalDeviceInfo->TargetID); |
| 4930 | Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL; |
| 4931 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL; |
| 4932 | kfree(PhysicalDeviceInfo); |
| 4933 | kfree(InquiryUnitSerialNumber); |
| 4934 | } |
| 4935 | Controller->V2.NeedPhysicalDeviceInformation = false; |
| 4936 | } |
| 4937 | else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid && |
| 4938 | CommandStatus == DAC960_V2_NormalCompletion) |
| 4939 | { |
| 4940 | DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo = |
| 4941 | Controller->V2.NewLogicalDeviceInformation; |
| 4942 | unsigned short LogicalDeviceNumber = |
| 4943 | NewLogicalDeviceInfo->LogicalDeviceNumber; |
| 4944 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo = |
| 4945 | Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber]; |
| 4946 | if (LogicalDeviceInfo == NULL) |
| 4947 | { |
| 4948 | DAC960_V2_PhysicalDevice_T PhysicalDevice; |
| 4949 | PhysicalDevice.Controller = 0; |
| 4950 | PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel; |
| 4951 | PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID; |
| 4952 | PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit; |
| 4953 | Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] = |
| 4954 | PhysicalDevice; |
| 4955 | LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *) |
| 4956 | kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC); |
| 4957 | Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] = |
| 4958 | LogicalDeviceInfo; |
| 4959 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " |
| 4960 | "Now Exists%s\n", Controller, |
| 4961 | LogicalDeviceNumber, |
| 4962 | Controller->ControllerNumber, |
| 4963 | LogicalDeviceNumber, |
| 4964 | (LogicalDeviceInfo != NULL |
| 4965 | ? "" : " - Allocation Failed")); |
| 4966 | if (LogicalDeviceInfo != NULL) |
| 4967 | { |
| 4968 | memset(LogicalDeviceInfo, 0, |
| 4969 | sizeof(DAC960_V2_LogicalDeviceInfo_T)); |
| 4970 | DAC960_ComputeGenericDiskInfo(Controller); |
| 4971 | } |
| 4972 | } |
| 4973 | if (LogicalDeviceInfo != NULL) |
| 4974 | { |
| 4975 | unsigned long LogicalDeviceSize = |
| 4976 | NewLogicalDeviceInfo->ConfigurableDeviceSize; |
| 4977 | if (NewLogicalDeviceInfo->LogicalDeviceState != |
| 4978 | LogicalDeviceInfo->LogicalDeviceState) |
| 4979 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " |
| 4980 | "is now %s\n", Controller, |
| 4981 | LogicalDeviceNumber, |
| 4982 | Controller->ControllerNumber, |
| 4983 | LogicalDeviceNumber, |
| 4984 | (NewLogicalDeviceInfo->LogicalDeviceState |
| 4985 | == DAC960_V2_LogicalDevice_Online |
| 4986 | ? "ONLINE" |
| 4987 | : NewLogicalDeviceInfo->LogicalDeviceState |
| 4988 | == DAC960_V2_LogicalDevice_Critical |
| 4989 | ? "CRITICAL" : "OFFLINE")); |
| 4990 | if ((NewLogicalDeviceInfo->SoftErrors != |
| 4991 | LogicalDeviceInfo->SoftErrors) || |
| 4992 | (NewLogicalDeviceInfo->CommandsFailed != |
| 4993 | LogicalDeviceInfo->CommandsFailed) || |
| 4994 | (NewLogicalDeviceInfo->DeferredWriteErrors != |
| 4995 | LogicalDeviceInfo->DeferredWriteErrors)) |
| 4996 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: " |
| 4997 | "Soft = %d, Failed = %d, Deferred Write = %d\n", |
| 4998 | Controller, LogicalDeviceNumber, |
| 4999 | Controller->ControllerNumber, |
| 5000 | LogicalDeviceNumber, |
| 5001 | NewLogicalDeviceInfo->SoftErrors, |
| 5002 | NewLogicalDeviceInfo->CommandsFailed, |
| 5003 | NewLogicalDeviceInfo->DeferredWriteErrors); |
| 5004 | if (NewLogicalDeviceInfo->ConsistencyCheckInProgress) |
| 5005 | DAC960_V2_ReportProgress(Controller, |
| 5006 | "Consistency Check", |
| 5007 | LogicalDeviceNumber, |
| 5008 | NewLogicalDeviceInfo |
| 5009 | ->ConsistencyCheckBlockNumber, |
| 5010 | LogicalDeviceSize); |
| 5011 | else if (NewLogicalDeviceInfo->RebuildInProgress) |
| 5012 | DAC960_V2_ReportProgress(Controller, |
| 5013 | "Rebuild", |
| 5014 | LogicalDeviceNumber, |
| 5015 | NewLogicalDeviceInfo |
| 5016 | ->RebuildBlockNumber, |
| 5017 | LogicalDeviceSize); |
| 5018 | else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress) |
| 5019 | DAC960_V2_ReportProgress(Controller, |
| 5020 | "Background Initialization", |
| 5021 | LogicalDeviceNumber, |
| 5022 | NewLogicalDeviceInfo |
| 5023 | ->BackgroundInitializationBlockNumber, |
| 5024 | LogicalDeviceSize); |
| 5025 | else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress) |
| 5026 | DAC960_V2_ReportProgress(Controller, |
| 5027 | "Foreground Initialization", |
| 5028 | LogicalDeviceNumber, |
| 5029 | NewLogicalDeviceInfo |
| 5030 | ->ForegroundInitializationBlockNumber, |
| 5031 | LogicalDeviceSize); |
| 5032 | else if (NewLogicalDeviceInfo->DataMigrationInProgress) |
| 5033 | DAC960_V2_ReportProgress(Controller, |
| 5034 | "Data Migration", |
| 5035 | LogicalDeviceNumber, |
| 5036 | NewLogicalDeviceInfo |
| 5037 | ->DataMigrationBlockNumber, |
| 5038 | LogicalDeviceSize); |
| 5039 | else if (NewLogicalDeviceInfo->PatrolOperationInProgress) |
| 5040 | DAC960_V2_ReportProgress(Controller, |
| 5041 | "Patrol Operation", |
| 5042 | LogicalDeviceNumber, |
| 5043 | NewLogicalDeviceInfo |
| 5044 | ->PatrolOperationBlockNumber, |
| 5045 | LogicalDeviceSize); |
| 5046 | if (LogicalDeviceInfo->BackgroundInitializationInProgress && |
| 5047 | !NewLogicalDeviceInfo->BackgroundInitializationInProgress) |
| 5048 | DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) " |
| 5049 | "Background Initialization %s\n", |
| 5050 | Controller, |
| 5051 | LogicalDeviceNumber, |
| 5052 | Controller->ControllerNumber, |
| 5053 | LogicalDeviceNumber, |
| 5054 | (NewLogicalDeviceInfo->LogicalDeviceControl |
| 5055 | .LogicalDeviceInitialized |
| 5056 | ? "Completed" : "Failed")); |
| 5057 | memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo, |
| 5058 | sizeof(DAC960_V2_LogicalDeviceInfo_T)); |
| 5059 | } |
| 5060 | Controller->V2.LogicalDriveFoundDuringScan |
| 5061 | [LogicalDeviceNumber] = true; |
| 5062 | NewLogicalDeviceInfo->LogicalDeviceNumber++; |
| 5063 | } |
| 5064 | else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid) |
| 5065 | { |
| 5066 | int LogicalDriveNumber; |
| 5067 | for (LogicalDriveNumber = 0; |
| 5068 | LogicalDriveNumber < DAC960_MaxLogicalDrives; |
| 5069 | LogicalDriveNumber++) |
| 5070 | { |
| 5071 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo = |
| 5072 | Controller->V2.LogicalDeviceInformation[LogicalDriveNumber]; |
| 5073 | if (LogicalDeviceInfo == NULL || |
| 5074 | Controller->V2.LogicalDriveFoundDuringScan |
| 5075 | [LogicalDriveNumber]) |
| 5076 | continue; |
| 5077 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " |
| 5078 | "No Longer Exists\n", Controller, |
| 5079 | LogicalDriveNumber, |
| 5080 | Controller->ControllerNumber, |
| 5081 | LogicalDriveNumber); |
| 5082 | Controller->V2.LogicalDeviceInformation |
| 5083 | [LogicalDriveNumber] = NULL; |
| 5084 | kfree(LogicalDeviceInfo); |
| 5085 | Controller->LogicalDriveInitiallyAccessible |
| 5086 | [LogicalDriveNumber] = false; |
| 5087 | DAC960_ComputeGenericDiskInfo(Controller); |
| 5088 | } |
| 5089 | Controller->V2.NeedLogicalDeviceInformation = false; |
| 5090 | } |
| 5091 | else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru) |
| 5092 | { |
| 5093 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = |
| 5094 | Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1]; |
| 5095 | |
| 5096 | if (CommandStatus != DAC960_V2_NormalCompletion) { |
| 5097 | memset(InquiryUnitSerialNumber, |
| 5098 | 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 5099 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; |
| 5100 | } else |
| 5101 | memcpy(InquiryUnitSerialNumber, |
| 5102 | Controller->V2.NewInquiryUnitSerialNumber, |
| 5103 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); |
| 5104 | |
| 5105 | Controller->V2.NeedDeviceSerialNumberInformation = false; |
| 5106 | } |
| 5107 | |
| 5108 | if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber |
| 5109 | - Controller->V2.NextEventSequenceNumber > 0) |
| 5110 | { |
| 5111 | CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL; |
| 5112 | CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T); |
| 5113 | CommandMailbox->GetEvent.EventSequenceNumberHigh16 = |
| 5114 | Controller->V2.NextEventSequenceNumber >> 16; |
| 5115 | CommandMailbox->GetEvent.ControllerNumber = 0; |
| 5116 | CommandMailbox->GetEvent.IOCTL_Opcode = |
| 5117 | DAC960_V2_GetEvent; |
| 5118 | CommandMailbox->GetEvent.EventSequenceNumberLow16 = |
| 5119 | Controller->V2.NextEventSequenceNumber & 0xFFFF; |
| 5120 | CommandMailbox->GetEvent.DataTransferMemoryAddress |
| 5121 | .ScatterGatherSegments[0] |
| 5122 | .SegmentDataPointer = |
| 5123 | Controller->V2.EventDMA; |
| 5124 | CommandMailbox->GetEvent.DataTransferMemoryAddress |
| 5125 | .ScatterGatherSegments[0] |
| 5126 | .SegmentByteCount = |
| 5127 | CommandMailbox->GetEvent.DataTransferSize; |
| 5128 | DAC960_QueueCommand(Command); |
| 5129 | return; |
| 5130 | } |
| 5131 | if (Controller->V2.NeedPhysicalDeviceInformation) |
| 5132 | { |
| 5133 | if (Controller->V2.NeedDeviceSerialNumberInformation) |
| 5134 | { |
| 5135 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = |
| 5136 | Controller->V2.NewInquiryUnitSerialNumber; |
| 5137 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; |
| 5138 | |
| 5139 | DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox, |
| 5140 | Controller->V2.NewPhysicalDeviceInformation->Channel, |
| 5141 | Controller->V2.NewPhysicalDeviceInformation->TargetID, |
| 5142 | Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1); |
| 5143 | |
| 5144 | |
| 5145 | DAC960_QueueCommand(Command); |
| 5146 | return; |
| 5147 | } |
| 5148 | if (Controller->V2.StartPhysicalDeviceInformationScan) |
| 5149 | { |
| 5150 | Controller->V2.PhysicalDeviceIndex = 0; |
| 5151 | Controller->V2.NewPhysicalDeviceInformation->Channel = 0; |
| 5152 | Controller->V2.NewPhysicalDeviceInformation->TargetID = 0; |
| 5153 | Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0; |
| 5154 | Controller->V2.StartPhysicalDeviceInformationScan = false; |
| 5155 | } |
| 5156 | CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL; |
| 5157 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize = |
| 5158 | sizeof(DAC960_V2_PhysicalDeviceInfo_T); |
| 5159 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = |
| 5160 | Controller->V2.NewPhysicalDeviceInformation->LogicalUnit; |
| 5161 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = |
| 5162 | Controller->V2.NewPhysicalDeviceInformation->TargetID; |
| 5163 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = |
| 5164 | Controller->V2.NewPhysicalDeviceInformation->Channel; |
| 5165 | CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = |
| 5166 | DAC960_V2_GetPhysicalDeviceInfoValid; |
| 5167 | CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress |
| 5168 | .ScatterGatherSegments[0] |
| 5169 | .SegmentDataPointer = |
| 5170 | Controller->V2.NewPhysicalDeviceInformationDMA; |
| 5171 | CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress |
| 5172 | .ScatterGatherSegments[0] |
| 5173 | .SegmentByteCount = |
| 5174 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize; |
| 5175 | DAC960_QueueCommand(Command); |
| 5176 | return; |
| 5177 | } |
| 5178 | if (Controller->V2.NeedLogicalDeviceInformation) |
| 5179 | { |
| 5180 | if (Controller->V2.StartLogicalDeviceInformationScan) |
| 5181 | { |
| 5182 | int LogicalDriveNumber; |
| 5183 | for (LogicalDriveNumber = 0; |
| 5184 | LogicalDriveNumber < DAC960_MaxLogicalDrives; |
| 5185 | LogicalDriveNumber++) |
| 5186 | Controller->V2.LogicalDriveFoundDuringScan |
| 5187 | [LogicalDriveNumber] = false; |
| 5188 | Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0; |
| 5189 | Controller->V2.StartLogicalDeviceInformationScan = false; |
| 5190 | } |
| 5191 | CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL; |
| 5192 | CommandMailbox->LogicalDeviceInfo.DataTransferSize = |
| 5193 | sizeof(DAC960_V2_LogicalDeviceInfo_T); |
| 5194 | CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber = |
| 5195 | Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber; |
| 5196 | CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = |
| 5197 | DAC960_V2_GetLogicalDeviceInfoValid; |
| 5198 | CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress |
| 5199 | .ScatterGatherSegments[0] |
| 5200 | .SegmentDataPointer = |
| 5201 | Controller->V2.NewLogicalDeviceInformationDMA; |
| 5202 | CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress |
| 5203 | .ScatterGatherSegments[0] |
| 5204 | .SegmentByteCount = |
| 5205 | CommandMailbox->LogicalDeviceInfo.DataTransferSize; |
| 5206 | DAC960_QueueCommand(Command); |
| 5207 | return; |
| 5208 | } |
| 5209 | Controller->MonitoringTimerCount++; |
| 5210 | Controller->MonitoringTimer.expires = |
| 5211 | jiffies + DAC960_HealthStatusMonitoringInterval; |
| 5212 | add_timer(&Controller->MonitoringTimer); |
| 5213 | } |
| 5214 | if (CommandType == DAC960_ImmediateCommand) |
| 5215 | { |
| 5216 | complete(Command->Completion); |
| 5217 | Command->Completion = NULL; |
| 5218 | return; |
| 5219 | } |
| 5220 | if (CommandType == DAC960_QueuedCommand) |
| 5221 | { |
| 5222 | DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand; |
| 5223 | KernelCommand->CommandStatus = CommandStatus; |
| 5224 | KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength; |
| 5225 | KernelCommand->DataTransferLength = Command->V2.DataTransferResidue; |
| 5226 | Command->V2.KernelCommand = NULL; |
| 5227 | DAC960_DeallocateCommand(Command); |
| 5228 | KernelCommand->CompletionFunction(KernelCommand); |
| 5229 | return; |
| 5230 | } |
| 5231 | /* |
| 5232 | Queue a Status Monitoring Command to the Controller using the just |
| 5233 | completed Command if one was deferred previously due to lack of a |
| 5234 | free Command when the Monitoring Timer Function was called. |
| 5235 | */ |
| 5236 | if (Controller->MonitoringCommandDeferred) |
| 5237 | { |
| 5238 | Controller->MonitoringCommandDeferred = false; |
| 5239 | DAC960_V2_QueueMonitoringCommand(Command); |
| 5240 | return; |
| 5241 | } |
| 5242 | /* |
| 5243 | Deallocate the Command. |
| 5244 | */ |
| 5245 | DAC960_DeallocateCommand(Command); |
| 5246 | /* |
| 5247 | Wake up any processes waiting on a free Command. |
| 5248 | */ |
| 5249 | wake_up(&Controller->CommandWaitQueue); |
| 5250 | } |
| 5251 | |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 5252 | /* |
| 5253 | DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series |
| 5254 | Controllers. |
| 5255 | */ |
| 5256 | |
| 5257 | static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel, |
| 5258 | void *DeviceIdentifier, |
| 5259 | struct pt_regs *InterruptRegisters) |
| 5260 | { |
| 5261 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; |
| 5262 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 5263 | DAC960_V2_StatusMailbox_T *NextStatusMailbox; |
| 5264 | unsigned long flags; |
| 5265 | |
| 5266 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5267 | DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress); |
| 5268 | NextStatusMailbox = Controller->V2.NextStatusMailbox; |
| 5269 | while (NextStatusMailbox->Fields.CommandIdentifier > 0) |
| 5270 | { |
| 5271 | DAC960_V2_CommandIdentifier_T CommandIdentifier = |
| 5272 | NextStatusMailbox->Fields.CommandIdentifier; |
| 5273 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; |
| 5274 | Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus; |
| 5275 | Command->V2.RequestSenseLength = |
| 5276 | NextStatusMailbox->Fields.RequestSenseLength; |
| 5277 | Command->V2.DataTransferResidue = |
| 5278 | NextStatusMailbox->Fields.DataTransferResidue; |
| 5279 | NextStatusMailbox->Words[0] = 0; |
| 5280 | if (++NextStatusMailbox > Controller->V2.LastStatusMailbox) |
| 5281 | NextStatusMailbox = Controller->V2.FirstStatusMailbox; |
| 5282 | DAC960_V2_ProcessCompletedCommand(Command); |
| 5283 | } |
| 5284 | Controller->V2.NextStatusMailbox = NextStatusMailbox; |
| 5285 | /* |
| 5286 | Attempt to remove additional I/O Requests from the Controller's |
| 5287 | I/O Request Queue and queue them to the Controller. |
| 5288 | */ |
| 5289 | DAC960_ProcessRequest(Controller); |
| 5290 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5291 | return IRQ_HANDLED; |
| 5292 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5293 | |
| 5294 | /* |
| 5295 | DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series |
| 5296 | Controllers. |
| 5297 | */ |
| 5298 | |
| 5299 | static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel, |
| 5300 | void *DeviceIdentifier, |
| 5301 | struct pt_regs *InterruptRegisters) |
| 5302 | { |
| 5303 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; |
| 5304 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 5305 | DAC960_V2_StatusMailbox_T *NextStatusMailbox; |
| 5306 | unsigned long flags; |
| 5307 | |
| 5308 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5309 | DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress); |
| 5310 | NextStatusMailbox = Controller->V2.NextStatusMailbox; |
| 5311 | while (NextStatusMailbox->Fields.CommandIdentifier > 0) |
| 5312 | { |
| 5313 | DAC960_V2_CommandIdentifier_T CommandIdentifier = |
| 5314 | NextStatusMailbox->Fields.CommandIdentifier; |
| 5315 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; |
| 5316 | Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus; |
| 5317 | Command->V2.RequestSenseLength = |
| 5318 | NextStatusMailbox->Fields.RequestSenseLength; |
| 5319 | Command->V2.DataTransferResidue = |
| 5320 | NextStatusMailbox->Fields.DataTransferResidue; |
| 5321 | NextStatusMailbox->Words[0] = 0; |
| 5322 | if (++NextStatusMailbox > Controller->V2.LastStatusMailbox) |
| 5323 | NextStatusMailbox = Controller->V2.FirstStatusMailbox; |
| 5324 | DAC960_V2_ProcessCompletedCommand(Command); |
| 5325 | } |
| 5326 | Controller->V2.NextStatusMailbox = NextStatusMailbox; |
| 5327 | /* |
| 5328 | Attempt to remove additional I/O Requests from the Controller's |
| 5329 | I/O Request Queue and queue them to the Controller. |
| 5330 | */ |
| 5331 | DAC960_ProcessRequest(Controller); |
| 5332 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5333 | return IRQ_HANDLED; |
| 5334 | } |
| 5335 | |
| 5336 | |
| 5337 | /* |
| 5338 | DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series |
| 5339 | Controllers. |
| 5340 | */ |
| 5341 | |
| 5342 | static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel, |
| 5343 | void *DeviceIdentifier, |
| 5344 | struct pt_regs *InterruptRegisters) |
| 5345 | { |
| 5346 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; |
| 5347 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 5348 | DAC960_V2_StatusMailbox_T *NextStatusMailbox; |
| 5349 | unsigned long flags; |
| 5350 | |
| 5351 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5352 | DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress); |
| 5353 | NextStatusMailbox = Controller->V2.NextStatusMailbox; |
| 5354 | while (NextStatusMailbox->Fields.CommandIdentifier > 0) |
| 5355 | { |
| 5356 | DAC960_V2_CommandIdentifier_T CommandIdentifier = |
| 5357 | NextStatusMailbox->Fields.CommandIdentifier; |
| 5358 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; |
| 5359 | Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus; |
| 5360 | Command->V2.RequestSenseLength = |
| 5361 | NextStatusMailbox->Fields.RequestSenseLength; |
| 5362 | Command->V2.DataTransferResidue = |
| 5363 | NextStatusMailbox->Fields.DataTransferResidue; |
| 5364 | NextStatusMailbox->Words[0] = 0; |
| 5365 | if (++NextStatusMailbox > Controller->V2.LastStatusMailbox) |
| 5366 | NextStatusMailbox = Controller->V2.FirstStatusMailbox; |
| 5367 | DAC960_V2_ProcessCompletedCommand(Command); |
| 5368 | } |
| 5369 | Controller->V2.NextStatusMailbox = NextStatusMailbox; |
| 5370 | /* |
| 5371 | Attempt to remove additional I/O Requests from the Controller's |
| 5372 | I/O Request Queue and queue them to the Controller. |
| 5373 | */ |
| 5374 | DAC960_ProcessRequest(Controller); |
| 5375 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5376 | return IRQ_HANDLED; |
| 5377 | } |
| 5378 | |
| 5379 | |
| 5380 | /* |
| 5381 | DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series |
| 5382 | Controllers. |
| 5383 | */ |
| 5384 | |
| 5385 | static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel, |
| 5386 | void *DeviceIdentifier, |
| 5387 | struct pt_regs *InterruptRegisters) |
| 5388 | { |
| 5389 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; |
| 5390 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 5391 | DAC960_V1_StatusMailbox_T *NextStatusMailbox; |
| 5392 | unsigned long flags; |
| 5393 | |
| 5394 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5395 | DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress); |
| 5396 | NextStatusMailbox = Controller->V1.NextStatusMailbox; |
| 5397 | while (NextStatusMailbox->Fields.Valid) |
| 5398 | { |
| 5399 | DAC960_V1_CommandIdentifier_T CommandIdentifier = |
| 5400 | NextStatusMailbox->Fields.CommandIdentifier; |
| 5401 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; |
| 5402 | Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus; |
| 5403 | NextStatusMailbox->Word = 0; |
| 5404 | if (++NextStatusMailbox > Controller->V1.LastStatusMailbox) |
| 5405 | NextStatusMailbox = Controller->V1.FirstStatusMailbox; |
| 5406 | DAC960_V1_ProcessCompletedCommand(Command); |
| 5407 | } |
| 5408 | Controller->V1.NextStatusMailbox = NextStatusMailbox; |
| 5409 | /* |
| 5410 | Attempt to remove additional I/O Requests from the Controller's |
| 5411 | I/O Request Queue and queue them to the Controller. |
| 5412 | */ |
| 5413 | DAC960_ProcessRequest(Controller); |
| 5414 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5415 | return IRQ_HANDLED; |
| 5416 | } |
| 5417 | |
| 5418 | |
| 5419 | /* |
| 5420 | DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series |
| 5421 | Controllers. |
| 5422 | */ |
| 5423 | |
| 5424 | static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel, |
| 5425 | void *DeviceIdentifier, |
| 5426 | struct pt_regs *InterruptRegisters) |
| 5427 | { |
| 5428 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; |
| 5429 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 5430 | DAC960_V1_StatusMailbox_T *NextStatusMailbox; |
| 5431 | unsigned long flags; |
| 5432 | |
| 5433 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5434 | DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress); |
| 5435 | NextStatusMailbox = Controller->V1.NextStatusMailbox; |
| 5436 | while (NextStatusMailbox->Fields.Valid) |
| 5437 | { |
| 5438 | DAC960_V1_CommandIdentifier_T CommandIdentifier = |
| 5439 | NextStatusMailbox->Fields.CommandIdentifier; |
| 5440 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; |
| 5441 | Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus; |
| 5442 | NextStatusMailbox->Word = 0; |
| 5443 | if (++NextStatusMailbox > Controller->V1.LastStatusMailbox) |
| 5444 | NextStatusMailbox = Controller->V1.FirstStatusMailbox; |
| 5445 | DAC960_V1_ProcessCompletedCommand(Command); |
| 5446 | } |
| 5447 | Controller->V1.NextStatusMailbox = NextStatusMailbox; |
| 5448 | /* |
| 5449 | Attempt to remove additional I/O Requests from the Controller's |
| 5450 | I/O Request Queue and queue them to the Controller. |
| 5451 | */ |
| 5452 | DAC960_ProcessRequest(Controller); |
| 5453 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5454 | return IRQ_HANDLED; |
| 5455 | } |
| 5456 | |
| 5457 | |
| 5458 | /* |
| 5459 | DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series |
| 5460 | Controllers. |
| 5461 | */ |
| 5462 | |
| 5463 | static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel, |
| 5464 | void *DeviceIdentifier, |
| 5465 | struct pt_regs *InterruptRegisters) |
| 5466 | { |
| 5467 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; |
| 5468 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 5469 | unsigned long flags; |
| 5470 | |
| 5471 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5472 | while (DAC960_PD_StatusAvailableP(ControllerBaseAddress)) |
| 5473 | { |
| 5474 | DAC960_V1_CommandIdentifier_T CommandIdentifier = |
| 5475 | DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress); |
| 5476 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; |
| 5477 | Command->V1.CommandStatus = |
| 5478 | DAC960_PD_ReadStatusRegister(ControllerBaseAddress); |
| 5479 | DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress); |
| 5480 | DAC960_PD_AcknowledgeStatus(ControllerBaseAddress); |
| 5481 | DAC960_V1_ProcessCompletedCommand(Command); |
| 5482 | } |
| 5483 | /* |
| 5484 | Attempt to remove additional I/O Requests from the Controller's |
| 5485 | I/O Request Queue and queue them to the Controller. |
| 5486 | */ |
| 5487 | DAC960_ProcessRequest(Controller); |
| 5488 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5489 | return IRQ_HANDLED; |
| 5490 | } |
| 5491 | |
| 5492 | |
| 5493 | /* |
| 5494 | DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series |
| 5495 | Controllers. |
| 5496 | |
| 5497 | Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely |
| 5498 | on the data having been placed into DAC960_Controller_T, rather than |
| 5499 | an arbitrary buffer. |
| 5500 | */ |
| 5501 | |
| 5502 | static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel, |
| 5503 | void *DeviceIdentifier, |
| 5504 | struct pt_regs *InterruptRegisters) |
| 5505 | { |
| 5506 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; |
| 5507 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; |
| 5508 | unsigned long flags; |
| 5509 | |
| 5510 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5511 | while (DAC960_PD_StatusAvailableP(ControllerBaseAddress)) |
| 5512 | { |
| 5513 | DAC960_V1_CommandIdentifier_T CommandIdentifier = |
| 5514 | DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress); |
| 5515 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; |
| 5516 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 5517 | DAC960_V1_CommandOpcode_T CommandOpcode = |
| 5518 | CommandMailbox->Common.CommandOpcode; |
| 5519 | Command->V1.CommandStatus = |
| 5520 | DAC960_PD_ReadStatusRegister(ControllerBaseAddress); |
| 5521 | DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress); |
| 5522 | DAC960_PD_AcknowledgeStatus(ControllerBaseAddress); |
| 5523 | switch (CommandOpcode) |
| 5524 | { |
| 5525 | case DAC960_V1_Enquiry_Old: |
| 5526 | Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry; |
| 5527 | DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry); |
| 5528 | break; |
| 5529 | case DAC960_V1_GetDeviceState_Old: |
| 5530 | Command->V1.CommandMailbox.Common.CommandOpcode = |
| 5531 | DAC960_V1_GetDeviceState; |
| 5532 | DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState); |
| 5533 | break; |
| 5534 | case DAC960_V1_Read_Old: |
| 5535 | Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read; |
| 5536 | DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox); |
| 5537 | break; |
| 5538 | case DAC960_V1_Write_Old: |
| 5539 | Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write; |
| 5540 | DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox); |
| 5541 | break; |
| 5542 | case DAC960_V1_ReadWithScatterGather_Old: |
| 5543 | Command->V1.CommandMailbox.Common.CommandOpcode = |
| 5544 | DAC960_V1_ReadWithScatterGather; |
| 5545 | DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox); |
| 5546 | break; |
| 5547 | case DAC960_V1_WriteWithScatterGather_Old: |
| 5548 | Command->V1.CommandMailbox.Common.CommandOpcode = |
| 5549 | DAC960_V1_WriteWithScatterGather; |
| 5550 | DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox); |
| 5551 | break; |
| 5552 | default: |
| 5553 | break; |
| 5554 | } |
| 5555 | DAC960_V1_ProcessCompletedCommand(Command); |
| 5556 | } |
| 5557 | /* |
| 5558 | Attempt to remove additional I/O Requests from the Controller's |
| 5559 | I/O Request Queue and queue them to the Controller. |
| 5560 | */ |
| 5561 | DAC960_ProcessRequest(Controller); |
| 5562 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5563 | return IRQ_HANDLED; |
| 5564 | } |
| 5565 | |
| 5566 | |
| 5567 | /* |
| 5568 | DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1 |
| 5569 | Firmware Controllers. |
| 5570 | */ |
| 5571 | |
| 5572 | static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command) |
| 5573 | { |
| 5574 | DAC960_Controller_T *Controller = Command->Controller; |
| 5575 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 5576 | DAC960_V1_ClearCommand(Command); |
| 5577 | Command->CommandType = DAC960_MonitoringCommand; |
| 5578 | CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry; |
| 5579 | CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA; |
| 5580 | DAC960_QueueCommand(Command); |
| 5581 | } |
| 5582 | |
| 5583 | |
| 5584 | /* |
| 5585 | DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2 |
| 5586 | Firmware Controllers. |
| 5587 | */ |
| 5588 | |
| 5589 | static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command) |
| 5590 | { |
| 5591 | DAC960_Controller_T *Controller = Command->Controller; |
| 5592 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; |
| 5593 | DAC960_V2_ClearCommand(Command); |
| 5594 | Command->CommandType = DAC960_MonitoringCommand; |
| 5595 | CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL; |
| 5596 | CommandMailbox->ControllerInfo.CommandControlBits |
| 5597 | .DataTransferControllerToHost = true; |
| 5598 | CommandMailbox->ControllerInfo.CommandControlBits |
| 5599 | .NoAutoRequestSense = true; |
| 5600 | CommandMailbox->ControllerInfo.DataTransferSize = |
| 5601 | sizeof(DAC960_V2_ControllerInfo_T); |
| 5602 | CommandMailbox->ControllerInfo.ControllerNumber = 0; |
| 5603 | CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo; |
| 5604 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress |
| 5605 | .ScatterGatherSegments[0] |
| 5606 | .SegmentDataPointer = |
| 5607 | Controller->V2.NewControllerInformationDMA; |
| 5608 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress |
| 5609 | .ScatterGatherSegments[0] |
| 5610 | .SegmentByteCount = |
| 5611 | CommandMailbox->ControllerInfo.DataTransferSize; |
| 5612 | DAC960_QueueCommand(Command); |
| 5613 | } |
| 5614 | |
| 5615 | |
| 5616 | /* |
| 5617 | DAC960_MonitoringTimerFunction is the timer function for monitoring |
| 5618 | the status of DAC960 Controllers. |
| 5619 | */ |
| 5620 | |
| 5621 | static void DAC960_MonitoringTimerFunction(unsigned long TimerData) |
| 5622 | { |
| 5623 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData; |
| 5624 | DAC960_Command_T *Command; |
| 5625 | unsigned long flags; |
| 5626 | |
| 5627 | if (Controller->FirmwareType == DAC960_V1_Controller) |
| 5628 | { |
| 5629 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5630 | /* |
| 5631 | Queue a Status Monitoring Command to Controller. |
| 5632 | */ |
| 5633 | Command = DAC960_AllocateCommand(Controller); |
| 5634 | if (Command != NULL) |
| 5635 | DAC960_V1_QueueMonitoringCommand(Command); |
| 5636 | else Controller->MonitoringCommandDeferred = true; |
| 5637 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5638 | } |
| 5639 | else |
| 5640 | { |
| 5641 | DAC960_V2_ControllerInfo_T *ControllerInfo = |
| 5642 | &Controller->V2.ControllerInformation; |
| 5643 | unsigned int StatusChangeCounter = |
| 5644 | Controller->V2.HealthStatusBuffer->StatusChangeCounter; |
| 5645 | boolean ForceMonitoringCommand = false; |
| 5646 | if (jiffies - Controller->SecondaryMonitoringTime |
| 5647 | > DAC960_SecondaryMonitoringInterval) |
| 5648 | { |
| 5649 | int LogicalDriveNumber; |
| 5650 | for (LogicalDriveNumber = 0; |
| 5651 | LogicalDriveNumber < DAC960_MaxLogicalDrives; |
| 5652 | LogicalDriveNumber++) |
| 5653 | { |
| 5654 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo = |
| 5655 | Controller->V2.LogicalDeviceInformation[LogicalDriveNumber]; |
| 5656 | if (LogicalDeviceInfo == NULL) continue; |
| 5657 | if (!LogicalDeviceInfo->LogicalDeviceControl |
| 5658 | .LogicalDeviceInitialized) |
| 5659 | { |
| 5660 | ForceMonitoringCommand = true; |
| 5661 | break; |
| 5662 | } |
| 5663 | } |
| 5664 | Controller->SecondaryMonitoringTime = jiffies; |
| 5665 | } |
| 5666 | if (StatusChangeCounter == Controller->V2.StatusChangeCounter && |
| 5667 | Controller->V2.HealthStatusBuffer->NextEventSequenceNumber |
| 5668 | == Controller->V2.NextEventSequenceNumber && |
| 5669 | (ControllerInfo->BackgroundInitializationsActive + |
| 5670 | ControllerInfo->LogicalDeviceInitializationsActive + |
| 5671 | ControllerInfo->PhysicalDeviceInitializationsActive + |
| 5672 | ControllerInfo->ConsistencyChecksActive + |
| 5673 | ControllerInfo->RebuildsActive + |
| 5674 | ControllerInfo->OnlineExpansionsActive == 0 || |
| 5675 | jiffies - Controller->PrimaryMonitoringTime |
| 5676 | < DAC960_MonitoringTimerInterval) && |
| 5677 | !ForceMonitoringCommand) |
| 5678 | { |
| 5679 | Controller->MonitoringTimer.expires = |
| 5680 | jiffies + DAC960_HealthStatusMonitoringInterval; |
| 5681 | add_timer(&Controller->MonitoringTimer); |
| 5682 | return; |
| 5683 | } |
| 5684 | Controller->V2.StatusChangeCounter = StatusChangeCounter; |
| 5685 | Controller->PrimaryMonitoringTime = jiffies; |
| 5686 | |
| 5687 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5688 | /* |
| 5689 | Queue a Status Monitoring Command to Controller. |
| 5690 | */ |
| 5691 | Command = DAC960_AllocateCommand(Controller); |
| 5692 | if (Command != NULL) |
| 5693 | DAC960_V2_QueueMonitoringCommand(Command); |
| 5694 | else Controller->MonitoringCommandDeferred = true; |
| 5695 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5696 | /* |
| 5697 | Wake up any processes waiting on a Health Status Buffer change. |
| 5698 | */ |
| 5699 | wake_up(&Controller->HealthStatusWaitQueue); |
| 5700 | } |
| 5701 | } |
| 5702 | |
| 5703 | /* |
| 5704 | DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount |
| 5705 | additional bytes in the Combined Status Buffer and grows the buffer if |
| 5706 | necessary. It returns true if there is enough room and false otherwise. |
| 5707 | */ |
| 5708 | |
| 5709 | static boolean DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller, |
| 5710 | unsigned int ByteCount) |
| 5711 | { |
| 5712 | unsigned char *NewStatusBuffer; |
| 5713 | if (Controller->InitialStatusLength + 1 + |
| 5714 | Controller->CurrentStatusLength + ByteCount + 1 <= |
| 5715 | Controller->CombinedStatusBufferLength) |
| 5716 | return true; |
| 5717 | if (Controller->CombinedStatusBufferLength == 0) |
| 5718 | { |
| 5719 | unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize; |
| 5720 | while (NewStatusBufferLength < ByteCount) |
| 5721 | NewStatusBufferLength *= 2; |
| 5722 | Controller->CombinedStatusBuffer = |
| 5723 | (unsigned char *) kmalloc(NewStatusBufferLength, GFP_ATOMIC); |
| 5724 | if (Controller->CombinedStatusBuffer == NULL) return false; |
| 5725 | Controller->CombinedStatusBufferLength = NewStatusBufferLength; |
| 5726 | return true; |
| 5727 | } |
| 5728 | NewStatusBuffer = (unsigned char *) |
| 5729 | kmalloc(2 * Controller->CombinedStatusBufferLength, GFP_ATOMIC); |
| 5730 | if (NewStatusBuffer == NULL) |
| 5731 | { |
| 5732 | DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n", |
| 5733 | Controller); |
| 5734 | return false; |
| 5735 | } |
| 5736 | memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer, |
| 5737 | Controller->CombinedStatusBufferLength); |
| 5738 | kfree(Controller->CombinedStatusBuffer); |
| 5739 | Controller->CombinedStatusBuffer = NewStatusBuffer; |
| 5740 | Controller->CombinedStatusBufferLength *= 2; |
| 5741 | Controller->CurrentStatusBuffer = |
| 5742 | &NewStatusBuffer[Controller->InitialStatusLength + 1]; |
| 5743 | return true; |
| 5744 | } |
| 5745 | |
| 5746 | |
| 5747 | /* |
| 5748 | DAC960_Message prints Driver Messages. |
| 5749 | */ |
| 5750 | |
| 5751 | static void DAC960_Message(DAC960_MessageLevel_T MessageLevel, |
| 5752 | unsigned char *Format, |
| 5753 | DAC960_Controller_T *Controller, |
| 5754 | ...) |
| 5755 | { |
| 5756 | static unsigned char Buffer[DAC960_LineBufferSize]; |
| 5757 | static boolean BeginningOfLine = true; |
| 5758 | va_list Arguments; |
| 5759 | int Length = 0; |
| 5760 | va_start(Arguments, Controller); |
| 5761 | Length = vsprintf(Buffer, Format, Arguments); |
| 5762 | va_end(Arguments); |
| 5763 | if (Controller == NULL) |
| 5764 | printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], |
| 5765 | DAC960_ControllerCount, Buffer); |
| 5766 | else if (MessageLevel == DAC960_AnnounceLevel || |
| 5767 | MessageLevel == DAC960_InfoLevel) |
| 5768 | { |
| 5769 | if (!Controller->ControllerInitialized) |
| 5770 | { |
| 5771 | if (DAC960_CheckStatusBuffer(Controller, Length)) |
| 5772 | { |
| 5773 | strcpy(&Controller->CombinedStatusBuffer |
| 5774 | [Controller->InitialStatusLength], |
| 5775 | Buffer); |
| 5776 | Controller->InitialStatusLength += Length; |
| 5777 | Controller->CurrentStatusBuffer = |
| 5778 | &Controller->CombinedStatusBuffer |
| 5779 | [Controller->InitialStatusLength + 1]; |
| 5780 | } |
| 5781 | if (MessageLevel == DAC960_AnnounceLevel) |
| 5782 | { |
| 5783 | static int AnnouncementLines = 0; |
| 5784 | if (++AnnouncementLines <= 2) |
| 5785 | printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel], |
| 5786 | Buffer); |
| 5787 | } |
| 5788 | else |
| 5789 | { |
| 5790 | if (BeginningOfLine) |
| 5791 | { |
| 5792 | if (Buffer[0] != '\n' || Length > 1) |
| 5793 | printk("%sDAC960#%d: %s", |
| 5794 | DAC960_MessageLevelMap[MessageLevel], |
| 5795 | Controller->ControllerNumber, Buffer); |
| 5796 | } |
| 5797 | else printk("%s", Buffer); |
| 5798 | } |
| 5799 | } |
| 5800 | else if (DAC960_CheckStatusBuffer(Controller, Length)) |
| 5801 | { |
| 5802 | strcpy(&Controller->CurrentStatusBuffer[ |
| 5803 | Controller->CurrentStatusLength], Buffer); |
| 5804 | Controller->CurrentStatusLength += Length; |
| 5805 | } |
| 5806 | } |
| 5807 | else if (MessageLevel == DAC960_ProgressLevel) |
| 5808 | { |
| 5809 | strcpy(Controller->ProgressBuffer, Buffer); |
| 5810 | Controller->ProgressBufferLength = Length; |
| 5811 | if (Controller->EphemeralProgressMessage) |
| 5812 | { |
| 5813 | if (jiffies - Controller->LastProgressReportTime |
| 5814 | >= DAC960_ProgressReportingInterval) |
| 5815 | { |
| 5816 | printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], |
| 5817 | Controller->ControllerNumber, Buffer); |
| 5818 | Controller->LastProgressReportTime = jiffies; |
| 5819 | } |
| 5820 | } |
| 5821 | else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], |
| 5822 | Controller->ControllerNumber, Buffer); |
| 5823 | } |
| 5824 | else if (MessageLevel == DAC960_UserCriticalLevel) |
| 5825 | { |
| 5826 | strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength], |
| 5827 | Buffer); |
| 5828 | Controller->UserStatusLength += Length; |
| 5829 | if (Buffer[0] != '\n' || Length > 1) |
| 5830 | printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], |
| 5831 | Controller->ControllerNumber, Buffer); |
| 5832 | } |
| 5833 | else |
| 5834 | { |
| 5835 | if (BeginningOfLine) |
| 5836 | printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], |
| 5837 | Controller->ControllerNumber, Buffer); |
| 5838 | else printk("%s", Buffer); |
| 5839 | } |
| 5840 | BeginningOfLine = (Buffer[Length-1] == '\n'); |
| 5841 | } |
| 5842 | |
| 5843 | |
| 5844 | /* |
| 5845 | DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device |
| 5846 | Channel:TargetID specification from a User Command string. It updates |
| 5847 | Channel and TargetID and returns true on success and false on failure. |
| 5848 | */ |
| 5849 | |
| 5850 | static boolean DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller, |
| 5851 | char *UserCommandString, |
| 5852 | unsigned char *Channel, |
| 5853 | unsigned char *TargetID) |
| 5854 | { |
| 5855 | char *NewUserCommandString = UserCommandString; |
| 5856 | unsigned long XChannel, XTargetID; |
| 5857 | while (*UserCommandString == ' ') UserCommandString++; |
| 5858 | if (UserCommandString == NewUserCommandString) |
| 5859 | return false; |
| 5860 | XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10); |
| 5861 | if (NewUserCommandString == UserCommandString || |
| 5862 | *NewUserCommandString != ':' || |
| 5863 | XChannel >= Controller->Channels) |
| 5864 | return false; |
| 5865 | UserCommandString = ++NewUserCommandString; |
| 5866 | XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10); |
| 5867 | if (NewUserCommandString == UserCommandString || |
| 5868 | *NewUserCommandString != '\0' || |
| 5869 | XTargetID >= Controller->Targets) |
| 5870 | return false; |
| 5871 | *Channel = XChannel; |
| 5872 | *TargetID = XTargetID; |
| 5873 | return true; |
| 5874 | } |
| 5875 | |
| 5876 | |
| 5877 | /* |
| 5878 | DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number |
| 5879 | specification from a User Command string. It updates LogicalDriveNumber and |
| 5880 | returns true on success and false on failure. |
| 5881 | */ |
| 5882 | |
| 5883 | static boolean DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller, |
| 5884 | char *UserCommandString, |
| 5885 | unsigned char *LogicalDriveNumber) |
| 5886 | { |
| 5887 | char *NewUserCommandString = UserCommandString; |
| 5888 | unsigned long XLogicalDriveNumber; |
| 5889 | while (*UserCommandString == ' ') UserCommandString++; |
| 5890 | if (UserCommandString == NewUserCommandString) |
| 5891 | return false; |
| 5892 | XLogicalDriveNumber = |
| 5893 | simple_strtoul(UserCommandString, &NewUserCommandString, 10); |
| 5894 | if (NewUserCommandString == UserCommandString || |
| 5895 | *NewUserCommandString != '\0' || |
| 5896 | XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1) |
| 5897 | return false; |
| 5898 | *LogicalDriveNumber = XLogicalDriveNumber; |
| 5899 | return true; |
| 5900 | } |
| 5901 | |
| 5902 | |
| 5903 | /* |
| 5904 | DAC960_V1_SetDeviceState sets the Device State for a Physical Device for |
| 5905 | DAC960 V1 Firmware Controllers. |
| 5906 | */ |
| 5907 | |
| 5908 | static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller, |
| 5909 | DAC960_Command_T *Command, |
| 5910 | unsigned char Channel, |
| 5911 | unsigned char TargetID, |
| 5912 | DAC960_V1_PhysicalDeviceState_T |
| 5913 | DeviceState, |
| 5914 | const unsigned char *DeviceStateString) |
| 5915 | { |
| 5916 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; |
| 5917 | CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice; |
| 5918 | CommandMailbox->Type3D.Channel = Channel; |
| 5919 | CommandMailbox->Type3D.TargetID = TargetID; |
| 5920 | CommandMailbox->Type3D.DeviceState = DeviceState; |
| 5921 | CommandMailbox->Type3D.Modifier = 0; |
| 5922 | DAC960_ExecuteCommand(Command); |
| 5923 | switch (Command->V1.CommandStatus) |
| 5924 | { |
| 5925 | case DAC960_V1_NormalCompletion: |
| 5926 | DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller, |
| 5927 | DeviceStateString, Channel, TargetID); |
| 5928 | break; |
| 5929 | case DAC960_V1_UnableToStartDevice: |
| 5930 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " |
| 5931 | "Unable to Start Device\n", Controller, |
| 5932 | DeviceStateString, Channel, TargetID); |
| 5933 | break; |
| 5934 | case DAC960_V1_NoDeviceAtAddress: |
| 5935 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " |
| 5936 | "No Device at Address\n", Controller, |
| 5937 | DeviceStateString, Channel, TargetID); |
| 5938 | break; |
| 5939 | case DAC960_V1_InvalidChannelOrTargetOrModifier: |
| 5940 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " |
| 5941 | "Invalid Channel or Target or Modifier\n", |
| 5942 | Controller, DeviceStateString, Channel, TargetID); |
| 5943 | break; |
| 5944 | case DAC960_V1_ChannelBusy: |
| 5945 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " |
| 5946 | "Channel Busy\n", Controller, |
| 5947 | DeviceStateString, Channel, TargetID); |
| 5948 | break; |
| 5949 | default: |
| 5950 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " |
| 5951 | "Unexpected Status %04X\n", Controller, |
| 5952 | DeviceStateString, Channel, TargetID, |
| 5953 | Command->V1.CommandStatus); |
| 5954 | break; |
| 5955 | } |
| 5956 | } |
| 5957 | |
| 5958 | |
| 5959 | /* |
| 5960 | DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware |
| 5961 | Controllers. |
| 5962 | */ |
| 5963 | |
| 5964 | static boolean DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller, |
| 5965 | unsigned char *UserCommand) |
| 5966 | { |
| 5967 | DAC960_Command_T *Command; |
| 5968 | DAC960_V1_CommandMailbox_T *CommandMailbox; |
| 5969 | unsigned long flags; |
| 5970 | unsigned char Channel, TargetID, LogicalDriveNumber; |
| 5971 | |
| 5972 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 5973 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) |
| 5974 | DAC960_WaitForCommand(Controller); |
| 5975 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 5976 | Controller->UserStatusLength = 0; |
| 5977 | DAC960_V1_ClearCommand(Command); |
| 5978 | Command->CommandType = DAC960_ImmediateCommand; |
| 5979 | CommandMailbox = &Command->V1.CommandMailbox; |
| 5980 | if (strcmp(UserCommand, "flush-cache") == 0) |
| 5981 | { |
| 5982 | CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush; |
| 5983 | DAC960_ExecuteCommand(Command); |
| 5984 | DAC960_UserCritical("Cache Flush Completed\n", Controller); |
| 5985 | } |
| 5986 | else if (strncmp(UserCommand, "kill", 4) == 0 && |
| 5987 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[4], |
| 5988 | &Channel, &TargetID)) |
| 5989 | { |
| 5990 | DAC960_V1_DeviceState_T *DeviceState = |
| 5991 | &Controller->V1.DeviceState[Channel][TargetID]; |
| 5992 | if (DeviceState->Present && |
| 5993 | DeviceState->DeviceType == DAC960_V1_DiskType && |
| 5994 | DeviceState->DeviceState != DAC960_V1_Device_Dead) |
| 5995 | DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID, |
| 5996 | DAC960_V1_Device_Dead, "Kill"); |
| 5997 | else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n", |
| 5998 | Controller, Channel, TargetID); |
| 5999 | } |
| 6000 | else if (strncmp(UserCommand, "make-online", 11) == 0 && |
| 6001 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[11], |
| 6002 | &Channel, &TargetID)) |
| 6003 | { |
| 6004 | DAC960_V1_DeviceState_T *DeviceState = |
| 6005 | &Controller->V1.DeviceState[Channel][TargetID]; |
| 6006 | if (DeviceState->Present && |
| 6007 | DeviceState->DeviceType == DAC960_V1_DiskType && |
| 6008 | DeviceState->DeviceState == DAC960_V1_Device_Dead) |
| 6009 | DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID, |
| 6010 | DAC960_V1_Device_Online, "Make Online"); |
| 6011 | else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n", |
| 6012 | Controller, Channel, TargetID); |
| 6013 | |
| 6014 | } |
| 6015 | else if (strncmp(UserCommand, "make-standby", 12) == 0 && |
| 6016 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[12], |
| 6017 | &Channel, &TargetID)) |
| 6018 | { |
| 6019 | DAC960_V1_DeviceState_T *DeviceState = |
| 6020 | &Controller->V1.DeviceState[Channel][TargetID]; |
| 6021 | if (DeviceState->Present && |
| 6022 | DeviceState->DeviceType == DAC960_V1_DiskType && |
| 6023 | DeviceState->DeviceState == DAC960_V1_Device_Dead) |
| 6024 | DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID, |
| 6025 | DAC960_V1_Device_Standby, "Make Standby"); |
| 6026 | else DAC960_UserCritical("Make Standby of Physical " |
| 6027 | "Device %d:%d Illegal\n", |
| 6028 | Controller, Channel, TargetID); |
| 6029 | } |
| 6030 | else if (strncmp(UserCommand, "rebuild", 7) == 0 && |
| 6031 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[7], |
| 6032 | &Channel, &TargetID)) |
| 6033 | { |
| 6034 | CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync; |
| 6035 | CommandMailbox->Type3D.Channel = Channel; |
| 6036 | CommandMailbox->Type3D.TargetID = TargetID; |
| 6037 | DAC960_ExecuteCommand(Command); |
| 6038 | switch (Command->V1.CommandStatus) |
| 6039 | { |
| 6040 | case DAC960_V1_NormalCompletion: |
| 6041 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n", |
| 6042 | Controller, Channel, TargetID); |
| 6043 | break; |
| 6044 | case DAC960_V1_AttemptToRebuildOnlineDrive: |
| 6045 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " |
| 6046 | "Attempt to Rebuild Online or " |
| 6047 | "Unresponsive Drive\n", |
| 6048 | Controller, Channel, TargetID); |
| 6049 | break; |
| 6050 | case DAC960_V1_NewDiskFailedDuringRebuild: |
| 6051 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " |
| 6052 | "New Disk Failed During Rebuild\n", |
| 6053 | Controller, Channel, TargetID); |
| 6054 | break; |
| 6055 | case DAC960_V1_InvalidDeviceAddress: |
| 6056 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " |
| 6057 | "Invalid Device Address\n", |
| 6058 | Controller, Channel, TargetID); |
| 6059 | break; |
| 6060 | case DAC960_V1_RebuildOrCheckAlreadyInProgress: |
| 6061 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " |
| 6062 | "Rebuild or Consistency Check Already " |
| 6063 | "in Progress\n", Controller, Channel, TargetID); |
| 6064 | break; |
| 6065 | default: |
| 6066 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " |
| 6067 | "Unexpected Status %04X\n", Controller, |
| 6068 | Channel, TargetID, Command->V1.CommandStatus); |
| 6069 | break; |
| 6070 | } |
| 6071 | } |
| 6072 | else if (strncmp(UserCommand, "check-consistency", 17) == 0 && |
| 6073 | DAC960_ParseLogicalDrive(Controller, &UserCommand[17], |
| 6074 | &LogicalDriveNumber)) |
| 6075 | { |
| 6076 | CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync; |
| 6077 | CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber; |
| 6078 | CommandMailbox->Type3C.AutoRestore = true; |
| 6079 | DAC960_ExecuteCommand(Command); |
| 6080 | switch (Command->V1.CommandStatus) |
| 6081 | { |
| 6082 | case DAC960_V1_NormalCompletion: |
| 6083 | DAC960_UserCritical("Consistency Check of Logical Drive %d " |
| 6084 | "(/dev/rd/c%dd%d) Initiated\n", |
| 6085 | Controller, LogicalDriveNumber, |
| 6086 | Controller->ControllerNumber, |
| 6087 | LogicalDriveNumber); |
| 6088 | break; |
| 6089 | case DAC960_V1_DependentDiskIsDead: |
| 6090 | DAC960_UserCritical("Consistency Check of Logical Drive %d " |
| 6091 | "(/dev/rd/c%dd%d) Failed - " |
| 6092 | "Dependent Physical Device is DEAD\n", |
| 6093 | Controller, LogicalDriveNumber, |
| 6094 | Controller->ControllerNumber, |
| 6095 | LogicalDriveNumber); |
| 6096 | break; |
| 6097 | case DAC960_V1_InvalidOrNonredundantLogicalDrive: |
| 6098 | DAC960_UserCritical("Consistency Check of Logical Drive %d " |
| 6099 | "(/dev/rd/c%dd%d) Failed - " |
| 6100 | "Invalid or Nonredundant Logical Drive\n", |
| 6101 | Controller, LogicalDriveNumber, |
| 6102 | Controller->ControllerNumber, |
| 6103 | LogicalDriveNumber); |
| 6104 | break; |
| 6105 | case DAC960_V1_RebuildOrCheckAlreadyInProgress: |
| 6106 | DAC960_UserCritical("Consistency Check of Logical Drive %d " |
| 6107 | "(/dev/rd/c%dd%d) Failed - Rebuild or " |
| 6108 | "Consistency Check Already in Progress\n", |
| 6109 | Controller, LogicalDriveNumber, |
| 6110 | Controller->ControllerNumber, |
| 6111 | LogicalDriveNumber); |
| 6112 | break; |
| 6113 | default: |
| 6114 | DAC960_UserCritical("Consistency Check of Logical Drive %d " |
| 6115 | "(/dev/rd/c%dd%d) Failed - " |
| 6116 | "Unexpected Status %04X\n", |
| 6117 | Controller, LogicalDriveNumber, |
| 6118 | Controller->ControllerNumber, |
| 6119 | LogicalDriveNumber, Command->V1.CommandStatus); |
| 6120 | break; |
| 6121 | } |
| 6122 | } |
| 6123 | else if (strcmp(UserCommand, "cancel-rebuild") == 0 || |
| 6124 | strcmp(UserCommand, "cancel-consistency-check") == 0) |
| 6125 | { |
| 6126 | /* |
| 6127 | the OldRebuildRateConstant is never actually used |
| 6128 | once its value is retrieved from the controller. |
| 6129 | */ |
| 6130 | unsigned char *OldRebuildRateConstant; |
| 6131 | dma_addr_t OldRebuildRateConstantDMA; |
| 6132 | |
| 6133 | OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice, |
| 6134 | sizeof(char), &OldRebuildRateConstantDMA); |
| 6135 | if (OldRebuildRateConstant == NULL) { |
| 6136 | DAC960_UserCritical("Cancellation of Rebuild or " |
| 6137 | "Consistency Check Failed - " |
| 6138 | "Out of Memory", |
| 6139 | Controller); |
| 6140 | goto failure; |
| 6141 | } |
| 6142 | CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl; |
| 6143 | CommandMailbox->Type3R.RebuildRateConstant = 0xFF; |
| 6144 | CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA; |
| 6145 | DAC960_ExecuteCommand(Command); |
| 6146 | switch (Command->V1.CommandStatus) |
| 6147 | { |
| 6148 | case DAC960_V1_NormalCompletion: |
| 6149 | DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n", |
| 6150 | Controller); |
| 6151 | break; |
| 6152 | default: |
| 6153 | DAC960_UserCritical("Cancellation of Rebuild or " |
| 6154 | "Consistency Check Failed - " |
| 6155 | "Unexpected Status %04X\n", |
| 6156 | Controller, Command->V1.CommandStatus); |
| 6157 | break; |
| 6158 | } |
| 6159 | failure: |
| 6160 | pci_free_consistent(Controller->PCIDevice, sizeof(char), |
| 6161 | OldRebuildRateConstant, OldRebuildRateConstantDMA); |
| 6162 | } |
| 6163 | else DAC960_UserCritical("Illegal User Command: '%s'\n", |
| 6164 | Controller, UserCommand); |
| 6165 | |
| 6166 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 6167 | DAC960_DeallocateCommand(Command); |
| 6168 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 6169 | return true; |
| 6170 | } |
| 6171 | |
| 6172 | |
| 6173 | /* |
| 6174 | DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and |
| 6175 | TargetID into a Logical Device. It returns true on success and false |
| 6176 | on failure. |
| 6177 | */ |
| 6178 | |
| 6179 | static boolean DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command, |
| 6180 | unsigned char Channel, |
| 6181 | unsigned char TargetID, |
| 6182 | unsigned short |
| 6183 | *LogicalDeviceNumber) |
| 6184 | { |
| 6185 | DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox; |
| 6186 | DAC960_Controller_T *Controller = Command->Controller; |
| 6187 | |
| 6188 | CommandMailbox = &Command->V2.CommandMailbox; |
| 6189 | memcpy(&SavedCommandMailbox, CommandMailbox, |
| 6190 | sizeof(DAC960_V2_CommandMailbox_T)); |
| 6191 | |
| 6192 | CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL; |
| 6193 | CommandMailbox->PhysicalDeviceInfo.CommandControlBits |
| 6194 | .DataTransferControllerToHost = true; |
| 6195 | CommandMailbox->PhysicalDeviceInfo.CommandControlBits |
| 6196 | .NoAutoRequestSense = true; |
| 6197 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize = |
| 6198 | sizeof(DAC960_V2_PhysicalToLogicalDevice_T); |
| 6199 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID; |
| 6200 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel; |
| 6201 | CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = |
| 6202 | DAC960_V2_TranslatePhysicalToLogicalDevice; |
| 6203 | CommandMailbox->Common.DataTransferMemoryAddress |
| 6204 | .ScatterGatherSegments[0] |
| 6205 | .SegmentDataPointer = |
| 6206 | Controller->V2.PhysicalToLogicalDeviceDMA; |
| 6207 | CommandMailbox->Common.DataTransferMemoryAddress |
| 6208 | .ScatterGatherSegments[0] |
| 6209 | .SegmentByteCount = |
| 6210 | CommandMailbox->Common.DataTransferSize; |
| 6211 | |
| 6212 | DAC960_ExecuteCommand(Command); |
| 6213 | *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber; |
| 6214 | |
| 6215 | memcpy(CommandMailbox, &SavedCommandMailbox, |
| 6216 | sizeof(DAC960_V2_CommandMailbox_T)); |
| 6217 | return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion); |
| 6218 | } |
| 6219 | |
| 6220 | |
| 6221 | /* |
| 6222 | DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware |
| 6223 | Controllers. |
| 6224 | */ |
| 6225 | |
| 6226 | static boolean DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller, |
| 6227 | unsigned char *UserCommand) |
| 6228 | { |
| 6229 | DAC960_Command_T *Command; |
| 6230 | DAC960_V2_CommandMailbox_T *CommandMailbox; |
| 6231 | unsigned long flags; |
| 6232 | unsigned char Channel, TargetID, LogicalDriveNumber; |
| 6233 | unsigned short LogicalDeviceNumber; |
| 6234 | |
| 6235 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 6236 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) |
| 6237 | DAC960_WaitForCommand(Controller); |
| 6238 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 6239 | Controller->UserStatusLength = 0; |
| 6240 | DAC960_V2_ClearCommand(Command); |
| 6241 | Command->CommandType = DAC960_ImmediateCommand; |
| 6242 | CommandMailbox = &Command->V2.CommandMailbox; |
| 6243 | CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL; |
| 6244 | CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true; |
| 6245 | CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true; |
| 6246 | if (strcmp(UserCommand, "flush-cache") == 0) |
| 6247 | { |
| 6248 | CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice; |
| 6249 | CommandMailbox->DeviceOperation.OperationDevice = |
| 6250 | DAC960_V2_RAID_Controller; |
| 6251 | DAC960_ExecuteCommand(Command); |
| 6252 | DAC960_UserCritical("Cache Flush Completed\n", Controller); |
| 6253 | } |
| 6254 | else if (strncmp(UserCommand, "kill", 4) == 0 && |
| 6255 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[4], |
| 6256 | &Channel, &TargetID) && |
| 6257 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, |
| 6258 | &LogicalDeviceNumber)) |
| 6259 | { |
| 6260 | CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber = |
| 6261 | LogicalDeviceNumber; |
| 6262 | CommandMailbox->SetDeviceState.IOCTL_Opcode = |
| 6263 | DAC960_V2_SetDeviceState; |
| 6264 | CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState = |
| 6265 | DAC960_V2_Device_Dead; |
| 6266 | DAC960_ExecuteCommand(Command); |
| 6267 | DAC960_UserCritical("Kill of Physical Device %d:%d %s\n", |
| 6268 | Controller, Channel, TargetID, |
| 6269 | (Command->V2.CommandStatus |
| 6270 | == DAC960_V2_NormalCompletion |
| 6271 | ? "Succeeded" : "Failed")); |
| 6272 | } |
| 6273 | else if (strncmp(UserCommand, "make-online", 11) == 0 && |
| 6274 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[11], |
| 6275 | &Channel, &TargetID) && |
| 6276 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, |
| 6277 | &LogicalDeviceNumber)) |
| 6278 | { |
| 6279 | CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber = |
| 6280 | LogicalDeviceNumber; |
| 6281 | CommandMailbox->SetDeviceState.IOCTL_Opcode = |
| 6282 | DAC960_V2_SetDeviceState; |
| 6283 | CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState = |
| 6284 | DAC960_V2_Device_Online; |
| 6285 | DAC960_ExecuteCommand(Command); |
| 6286 | DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n", |
| 6287 | Controller, Channel, TargetID, |
| 6288 | (Command->V2.CommandStatus |
| 6289 | == DAC960_V2_NormalCompletion |
| 6290 | ? "Succeeded" : "Failed")); |
| 6291 | } |
| 6292 | else if (strncmp(UserCommand, "make-standby", 12) == 0 && |
| 6293 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[12], |
| 6294 | &Channel, &TargetID) && |
| 6295 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, |
| 6296 | &LogicalDeviceNumber)) |
| 6297 | { |
| 6298 | CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber = |
| 6299 | LogicalDeviceNumber; |
| 6300 | CommandMailbox->SetDeviceState.IOCTL_Opcode = |
| 6301 | DAC960_V2_SetDeviceState; |
| 6302 | CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState = |
| 6303 | DAC960_V2_Device_Standby; |
| 6304 | DAC960_ExecuteCommand(Command); |
| 6305 | DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n", |
| 6306 | Controller, Channel, TargetID, |
| 6307 | (Command->V2.CommandStatus |
| 6308 | == DAC960_V2_NormalCompletion |
| 6309 | ? "Succeeded" : "Failed")); |
| 6310 | } |
| 6311 | else if (strncmp(UserCommand, "rebuild", 7) == 0 && |
| 6312 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[7], |
| 6313 | &Channel, &TargetID) && |
| 6314 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, |
| 6315 | &LogicalDeviceNumber)) |
| 6316 | { |
| 6317 | CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber = |
| 6318 | LogicalDeviceNumber; |
| 6319 | CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = |
| 6320 | DAC960_V2_RebuildDeviceStart; |
| 6321 | DAC960_ExecuteCommand(Command); |
| 6322 | DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n", |
| 6323 | Controller, Channel, TargetID, |
| 6324 | (Command->V2.CommandStatus |
| 6325 | == DAC960_V2_NormalCompletion |
| 6326 | ? "Initiated" : "Not Initiated")); |
| 6327 | } |
| 6328 | else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 && |
| 6329 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[14], |
| 6330 | &Channel, &TargetID) && |
| 6331 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, |
| 6332 | &LogicalDeviceNumber)) |
| 6333 | { |
| 6334 | CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber = |
| 6335 | LogicalDeviceNumber; |
| 6336 | CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = |
| 6337 | DAC960_V2_RebuildDeviceStop; |
| 6338 | DAC960_ExecuteCommand(Command); |
| 6339 | DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n", |
| 6340 | Controller, Channel, TargetID, |
| 6341 | (Command->V2.CommandStatus |
| 6342 | == DAC960_V2_NormalCompletion |
| 6343 | ? "Cancelled" : "Not Cancelled")); |
| 6344 | } |
| 6345 | else if (strncmp(UserCommand, "check-consistency", 17) == 0 && |
| 6346 | DAC960_ParseLogicalDrive(Controller, &UserCommand[17], |
| 6347 | &LogicalDriveNumber)) |
| 6348 | { |
| 6349 | CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber = |
| 6350 | LogicalDriveNumber; |
| 6351 | CommandMailbox->ConsistencyCheck.IOCTL_Opcode = |
| 6352 | DAC960_V2_ConsistencyCheckStart; |
| 6353 | CommandMailbox->ConsistencyCheck.RestoreConsistency = true; |
| 6354 | CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false; |
| 6355 | DAC960_ExecuteCommand(Command); |
| 6356 | DAC960_UserCritical("Consistency Check of Logical Drive %d " |
| 6357 | "(/dev/rd/c%dd%d) %s\n", |
| 6358 | Controller, LogicalDriveNumber, |
| 6359 | Controller->ControllerNumber, |
| 6360 | LogicalDriveNumber, |
| 6361 | (Command->V2.CommandStatus |
| 6362 | == DAC960_V2_NormalCompletion |
| 6363 | ? "Initiated" : "Not Initiated")); |
| 6364 | } |
| 6365 | else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 && |
| 6366 | DAC960_ParseLogicalDrive(Controller, &UserCommand[24], |
| 6367 | &LogicalDriveNumber)) |
| 6368 | { |
| 6369 | CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber = |
| 6370 | LogicalDriveNumber; |
| 6371 | CommandMailbox->ConsistencyCheck.IOCTL_Opcode = |
| 6372 | DAC960_V2_ConsistencyCheckStop; |
| 6373 | DAC960_ExecuteCommand(Command); |
| 6374 | DAC960_UserCritical("Consistency Check of Logical Drive %d " |
| 6375 | "(/dev/rd/c%dd%d) %s\n", |
| 6376 | Controller, LogicalDriveNumber, |
| 6377 | Controller->ControllerNumber, |
| 6378 | LogicalDriveNumber, |
| 6379 | (Command->V2.CommandStatus |
| 6380 | == DAC960_V2_NormalCompletion |
| 6381 | ? "Cancelled" : "Not Cancelled")); |
| 6382 | } |
| 6383 | else if (strcmp(UserCommand, "perform-discovery") == 0) |
| 6384 | { |
| 6385 | CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery; |
| 6386 | DAC960_ExecuteCommand(Command); |
| 6387 | DAC960_UserCritical("Discovery %s\n", Controller, |
| 6388 | (Command->V2.CommandStatus |
| 6389 | == DAC960_V2_NormalCompletion |
| 6390 | ? "Initiated" : "Not Initiated")); |
| 6391 | if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion) |
| 6392 | { |
| 6393 | CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL; |
| 6394 | CommandMailbox->ControllerInfo.CommandControlBits |
| 6395 | .DataTransferControllerToHost = true; |
| 6396 | CommandMailbox->ControllerInfo.CommandControlBits |
| 6397 | .NoAutoRequestSense = true; |
| 6398 | CommandMailbox->ControllerInfo.DataTransferSize = |
| 6399 | sizeof(DAC960_V2_ControllerInfo_T); |
| 6400 | CommandMailbox->ControllerInfo.ControllerNumber = 0; |
| 6401 | CommandMailbox->ControllerInfo.IOCTL_Opcode = |
| 6402 | DAC960_V2_GetControllerInfo; |
| 6403 | /* |
| 6404 | * How does this NOT race with the queued Monitoring |
| 6405 | * usage of this structure? |
| 6406 | */ |
| 6407 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress |
| 6408 | .ScatterGatherSegments[0] |
| 6409 | .SegmentDataPointer = |
| 6410 | Controller->V2.NewControllerInformationDMA; |
| 6411 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress |
| 6412 | .ScatterGatherSegments[0] |
| 6413 | .SegmentByteCount = |
| 6414 | CommandMailbox->ControllerInfo.DataTransferSize; |
| 6415 | DAC960_ExecuteCommand(Command); |
| 6416 | while (Controller->V2.NewControllerInformation->PhysicalScanActive) |
| 6417 | { |
| 6418 | DAC960_ExecuteCommand(Command); |
| 6419 | sleep_on_timeout(&Controller->CommandWaitQueue, HZ); |
| 6420 | } |
| 6421 | DAC960_UserCritical("Discovery Completed\n", Controller); |
| 6422 | } |
| 6423 | } |
| 6424 | else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0) |
| 6425 | Controller->SuppressEnclosureMessages = true; |
| 6426 | else DAC960_UserCritical("Illegal User Command: '%s'\n", |
| 6427 | Controller, UserCommand); |
| 6428 | |
| 6429 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 6430 | DAC960_DeallocateCommand(Command); |
| 6431 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 6432 | return true; |
| 6433 | } |
| 6434 | |
| 6435 | |
| 6436 | /* |
| 6437 | DAC960_ProcReadStatus implements reading /proc/rd/status. |
| 6438 | */ |
| 6439 | |
| 6440 | static int DAC960_ProcReadStatus(char *Page, char **Start, off_t Offset, |
| 6441 | int Count, int *EOF, void *Data) |
| 6442 | { |
| 6443 | unsigned char *StatusMessage = "OK\n"; |
| 6444 | int ControllerNumber, BytesAvailable; |
| 6445 | for (ControllerNumber = 0; |
| 6446 | ControllerNumber < DAC960_ControllerCount; |
| 6447 | ControllerNumber++) |
| 6448 | { |
| 6449 | DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber]; |
| 6450 | if (Controller == NULL) continue; |
| 6451 | if (Controller->MonitoringAlertMode) |
| 6452 | { |
| 6453 | StatusMessage = "ALERT\n"; |
| 6454 | break; |
| 6455 | } |
| 6456 | } |
| 6457 | BytesAvailable = strlen(StatusMessage) - Offset; |
| 6458 | if (Count >= BytesAvailable) |
| 6459 | { |
| 6460 | Count = BytesAvailable; |
| 6461 | *EOF = true; |
| 6462 | } |
| 6463 | if (Count <= 0) return 0; |
| 6464 | *Start = Page; |
| 6465 | memcpy(Page, &StatusMessage[Offset], Count); |
| 6466 | return Count; |
| 6467 | } |
| 6468 | |
| 6469 | |
| 6470 | /* |
| 6471 | DAC960_ProcReadInitialStatus implements reading /proc/rd/cN/initial_status. |
| 6472 | */ |
| 6473 | |
| 6474 | static int DAC960_ProcReadInitialStatus(char *Page, char **Start, off_t Offset, |
| 6475 | int Count, int *EOF, void *Data) |
| 6476 | { |
| 6477 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data; |
| 6478 | int BytesAvailable = Controller->InitialStatusLength - Offset; |
| 6479 | if (Count >= BytesAvailable) |
| 6480 | { |
| 6481 | Count = BytesAvailable; |
| 6482 | *EOF = true; |
| 6483 | } |
| 6484 | if (Count <= 0) return 0; |
| 6485 | *Start = Page; |
| 6486 | memcpy(Page, &Controller->CombinedStatusBuffer[Offset], Count); |
| 6487 | return Count; |
| 6488 | } |
| 6489 | |
| 6490 | |
| 6491 | /* |
| 6492 | DAC960_ProcReadCurrentStatus implements reading /proc/rd/cN/current_status. |
| 6493 | */ |
| 6494 | |
| 6495 | static int DAC960_ProcReadCurrentStatus(char *Page, char **Start, off_t Offset, |
| 6496 | int Count, int *EOF, void *Data) |
| 6497 | { |
| 6498 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data; |
| 6499 | unsigned char *StatusMessage = |
| 6500 | "No Rebuild or Consistency Check in Progress\n"; |
| 6501 | int ProgressMessageLength = strlen(StatusMessage); |
| 6502 | int BytesAvailable; |
| 6503 | if (jiffies != Controller->LastCurrentStatusTime) |
| 6504 | { |
| 6505 | Controller->CurrentStatusLength = 0; |
| 6506 | DAC960_AnnounceDriver(Controller); |
| 6507 | DAC960_ReportControllerConfiguration(Controller); |
| 6508 | DAC960_ReportDeviceConfiguration(Controller); |
| 6509 | if (Controller->ProgressBufferLength > 0) |
| 6510 | ProgressMessageLength = Controller->ProgressBufferLength; |
| 6511 | if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength)) |
| 6512 | { |
| 6513 | unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer; |
| 6514 | CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' '; |
| 6515 | CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' '; |
| 6516 | if (Controller->ProgressBufferLength > 0) |
| 6517 | strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength], |
| 6518 | Controller->ProgressBuffer); |
| 6519 | else |
| 6520 | strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength], |
| 6521 | StatusMessage); |
| 6522 | Controller->CurrentStatusLength += ProgressMessageLength; |
| 6523 | } |
| 6524 | Controller->LastCurrentStatusTime = jiffies; |
| 6525 | } |
| 6526 | BytesAvailable = Controller->CurrentStatusLength - Offset; |
| 6527 | if (Count >= BytesAvailable) |
| 6528 | { |
| 6529 | Count = BytesAvailable; |
| 6530 | *EOF = true; |
| 6531 | } |
| 6532 | if (Count <= 0) return 0; |
| 6533 | *Start = Page; |
| 6534 | memcpy(Page, &Controller->CurrentStatusBuffer[Offset], Count); |
| 6535 | return Count; |
| 6536 | } |
| 6537 | |
| 6538 | |
| 6539 | /* |
| 6540 | DAC960_ProcReadUserCommand implements reading /proc/rd/cN/user_command. |
| 6541 | */ |
| 6542 | |
| 6543 | static int DAC960_ProcReadUserCommand(char *Page, char **Start, off_t Offset, |
| 6544 | int Count, int *EOF, void *Data) |
| 6545 | { |
| 6546 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data; |
| 6547 | int BytesAvailable = Controller->UserStatusLength - Offset; |
| 6548 | if (Count >= BytesAvailable) |
| 6549 | { |
| 6550 | Count = BytesAvailable; |
| 6551 | *EOF = true; |
| 6552 | } |
| 6553 | if (Count <= 0) return 0; |
| 6554 | *Start = Page; |
| 6555 | memcpy(Page, &Controller->UserStatusBuffer[Offset], Count); |
| 6556 | return Count; |
| 6557 | } |
| 6558 | |
| 6559 | |
| 6560 | /* |
| 6561 | DAC960_ProcWriteUserCommand implements writing /proc/rd/cN/user_command. |
| 6562 | */ |
| 6563 | |
| 6564 | static int DAC960_ProcWriteUserCommand(struct file *file, |
| 6565 | const char __user *Buffer, |
| 6566 | unsigned long Count, void *Data) |
| 6567 | { |
| 6568 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data; |
| 6569 | unsigned char CommandBuffer[80]; |
| 6570 | int Length; |
| 6571 | if (Count > sizeof(CommandBuffer)-1) return -EINVAL; |
| 6572 | if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT; |
| 6573 | CommandBuffer[Count] = '\0'; |
| 6574 | Length = strlen(CommandBuffer); |
| 6575 | if (CommandBuffer[Length-1] == '\n') |
| 6576 | CommandBuffer[--Length] = '\0'; |
| 6577 | if (Controller->FirmwareType == DAC960_V1_Controller) |
| 6578 | return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer) |
| 6579 | ? Count : -EBUSY); |
| 6580 | else |
| 6581 | return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer) |
| 6582 | ? Count : -EBUSY); |
| 6583 | } |
| 6584 | |
| 6585 | |
| 6586 | /* |
| 6587 | DAC960_CreateProcEntries creates the /proc/rd/... entries for the |
| 6588 | DAC960 Driver. |
| 6589 | */ |
| 6590 | |
| 6591 | static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller) |
| 6592 | { |
| 6593 | struct proc_dir_entry *StatusProcEntry; |
| 6594 | struct proc_dir_entry *ControllerProcEntry; |
| 6595 | struct proc_dir_entry *UserCommandProcEntry; |
| 6596 | |
| 6597 | if (DAC960_ProcDirectoryEntry == NULL) { |
| 6598 | DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL); |
| 6599 | StatusProcEntry = create_proc_read_entry("status", 0, |
| 6600 | DAC960_ProcDirectoryEntry, |
| 6601 | DAC960_ProcReadStatus, NULL); |
| 6602 | } |
| 6603 | |
| 6604 | sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber); |
| 6605 | ControllerProcEntry = proc_mkdir(Controller->ControllerName, |
| 6606 | DAC960_ProcDirectoryEntry); |
| 6607 | create_proc_read_entry("initial_status", 0, ControllerProcEntry, |
| 6608 | DAC960_ProcReadInitialStatus, Controller); |
| 6609 | create_proc_read_entry("current_status", 0, ControllerProcEntry, |
| 6610 | DAC960_ProcReadCurrentStatus, Controller); |
| 6611 | UserCommandProcEntry = |
| 6612 | create_proc_read_entry("user_command", S_IWUSR | S_IRUSR, |
| 6613 | ControllerProcEntry, DAC960_ProcReadUserCommand, |
| 6614 | Controller); |
| 6615 | UserCommandProcEntry->write_proc = DAC960_ProcWriteUserCommand; |
| 6616 | Controller->ControllerProcEntry = ControllerProcEntry; |
| 6617 | } |
| 6618 | |
| 6619 | |
| 6620 | /* |
| 6621 | DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the |
| 6622 | DAC960 Driver. |
| 6623 | */ |
| 6624 | |
| 6625 | static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller) |
| 6626 | { |
| 6627 | if (Controller->ControllerProcEntry == NULL) |
| 6628 | return; |
| 6629 | remove_proc_entry("initial_status", Controller->ControllerProcEntry); |
| 6630 | remove_proc_entry("current_status", Controller->ControllerProcEntry); |
| 6631 | remove_proc_entry("user_command", Controller->ControllerProcEntry); |
| 6632 | remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry); |
| 6633 | Controller->ControllerProcEntry = NULL; |
| 6634 | } |
| 6635 | |
| 6636 | #ifdef DAC960_GAM_MINOR |
| 6637 | |
| 6638 | /* |
| 6639 | * DAC960_gam_ioctl is the ioctl function for performing RAID operations. |
| 6640 | */ |
| 6641 | |
| 6642 | static int DAC960_gam_ioctl(struct inode *inode, struct file *file, |
| 6643 | unsigned int Request, unsigned long Argument) |
| 6644 | { |
| 6645 | int ErrorCode = 0; |
| 6646 | if (!capable(CAP_SYS_ADMIN)) return -EACCES; |
| 6647 | switch (Request) |
| 6648 | { |
| 6649 | case DAC960_IOCTL_GET_CONTROLLER_COUNT: |
| 6650 | return DAC960_ControllerCount; |
| 6651 | case DAC960_IOCTL_GET_CONTROLLER_INFO: |
| 6652 | { |
| 6653 | DAC960_ControllerInfo_T __user *UserSpaceControllerInfo = |
| 6654 | (DAC960_ControllerInfo_T __user *) Argument; |
| 6655 | DAC960_ControllerInfo_T ControllerInfo; |
| 6656 | DAC960_Controller_T *Controller; |
| 6657 | int ControllerNumber; |
| 6658 | if (UserSpaceControllerInfo == NULL) return -EINVAL; |
| 6659 | ErrorCode = get_user(ControllerNumber, |
| 6660 | &UserSpaceControllerInfo->ControllerNumber); |
| 6661 | if (ErrorCode != 0) return ErrorCode; |
| 6662 | if (ControllerNumber < 0 || |
| 6663 | ControllerNumber > DAC960_ControllerCount - 1) |
| 6664 | return -ENXIO; |
| 6665 | Controller = DAC960_Controllers[ControllerNumber]; |
| 6666 | if (Controller == NULL) return -ENXIO; |
| 6667 | memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T)); |
| 6668 | ControllerInfo.ControllerNumber = ControllerNumber; |
| 6669 | ControllerInfo.FirmwareType = Controller->FirmwareType; |
| 6670 | ControllerInfo.Channels = Controller->Channels; |
| 6671 | ControllerInfo.Targets = Controller->Targets; |
| 6672 | ControllerInfo.PCI_Bus = Controller->Bus; |
| 6673 | ControllerInfo.PCI_Device = Controller->Device; |
| 6674 | ControllerInfo.PCI_Function = Controller->Function; |
| 6675 | ControllerInfo.IRQ_Channel = Controller->IRQ_Channel; |
| 6676 | ControllerInfo.PCI_Address = Controller->PCI_Address; |
| 6677 | strcpy(ControllerInfo.ModelName, Controller->ModelName); |
| 6678 | strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion); |
| 6679 | return (copy_to_user(UserSpaceControllerInfo, &ControllerInfo, |
| 6680 | sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0); |
| 6681 | } |
| 6682 | case DAC960_IOCTL_V1_EXECUTE_COMMAND: |
| 6683 | { |
| 6684 | DAC960_V1_UserCommand_T __user *UserSpaceUserCommand = |
| 6685 | (DAC960_V1_UserCommand_T __user *) Argument; |
| 6686 | DAC960_V1_UserCommand_T UserCommand; |
| 6687 | DAC960_Controller_T *Controller; |
| 6688 | DAC960_Command_T *Command = NULL; |
| 6689 | DAC960_V1_CommandOpcode_T CommandOpcode; |
| 6690 | DAC960_V1_CommandStatus_T CommandStatus; |
| 6691 | DAC960_V1_DCDB_T DCDB; |
| 6692 | DAC960_V1_DCDB_T *DCDB_IOBUF = NULL; |
| 6693 | dma_addr_t DCDB_IOBUFDMA; |
| 6694 | unsigned long flags; |
| 6695 | int ControllerNumber, DataTransferLength; |
| 6696 | unsigned char *DataTransferBuffer = NULL; |
| 6697 | dma_addr_t DataTransferBufferDMA; |
| 6698 | if (UserSpaceUserCommand == NULL) return -EINVAL; |
| 6699 | if (copy_from_user(&UserCommand, UserSpaceUserCommand, |
| 6700 | sizeof(DAC960_V1_UserCommand_T))) { |
| 6701 | ErrorCode = -EFAULT; |
| 6702 | goto Failure1a; |
| 6703 | } |
| 6704 | ControllerNumber = UserCommand.ControllerNumber; |
| 6705 | if (ControllerNumber < 0 || |
| 6706 | ControllerNumber > DAC960_ControllerCount - 1) |
| 6707 | return -ENXIO; |
| 6708 | Controller = DAC960_Controllers[ControllerNumber]; |
| 6709 | if (Controller == NULL) return -ENXIO; |
| 6710 | if (Controller->FirmwareType != DAC960_V1_Controller) return -EINVAL; |
| 6711 | CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode; |
| 6712 | DataTransferLength = UserCommand.DataTransferLength; |
| 6713 | if (CommandOpcode & 0x80) return -EINVAL; |
| 6714 | if (CommandOpcode == DAC960_V1_DCDB) |
| 6715 | { |
| 6716 | if (copy_from_user(&DCDB, UserCommand.DCDB, |
| 6717 | sizeof(DAC960_V1_DCDB_T))) { |
| 6718 | ErrorCode = -EFAULT; |
| 6719 | goto Failure1a; |
| 6720 | } |
| 6721 | if (DCDB.Channel >= DAC960_V1_MaxChannels) return -EINVAL; |
| 6722 | if (!((DataTransferLength == 0 && |
| 6723 | DCDB.Direction |
| 6724 | == DAC960_V1_DCDB_NoDataTransfer) || |
| 6725 | (DataTransferLength > 0 && |
| 6726 | DCDB.Direction |
| 6727 | == DAC960_V1_DCDB_DataTransferDeviceToSystem) || |
| 6728 | (DataTransferLength < 0 && |
| 6729 | DCDB.Direction |
| 6730 | == DAC960_V1_DCDB_DataTransferSystemToDevice))) |
| 6731 | return -EINVAL; |
| 6732 | if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength) |
| 6733 | != abs(DataTransferLength)) |
| 6734 | return -EINVAL; |
| 6735 | DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice, |
| 6736 | sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA); |
| 6737 | if (DCDB_IOBUF == NULL) |
| 6738 | return -ENOMEM; |
| 6739 | } |
| 6740 | if (DataTransferLength > 0) |
| 6741 | { |
| 6742 | DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice, |
| 6743 | DataTransferLength, &DataTransferBufferDMA); |
| 6744 | if (DataTransferBuffer == NULL) { |
| 6745 | ErrorCode = -ENOMEM; |
| 6746 | goto Failure1; |
| 6747 | } |
| 6748 | memset(DataTransferBuffer, 0, DataTransferLength); |
| 6749 | } |
| 6750 | else if (DataTransferLength < 0) |
| 6751 | { |
| 6752 | DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice, |
| 6753 | -DataTransferLength, &DataTransferBufferDMA); |
| 6754 | if (DataTransferBuffer == NULL) { |
| 6755 | ErrorCode = -ENOMEM; |
| 6756 | goto Failure1; |
| 6757 | } |
| 6758 | if (copy_from_user(DataTransferBuffer, |
| 6759 | UserCommand.DataTransferBuffer, |
| 6760 | -DataTransferLength)) { |
| 6761 | ErrorCode = -EFAULT; |
| 6762 | goto Failure1; |
| 6763 | } |
| 6764 | } |
| 6765 | if (CommandOpcode == DAC960_V1_DCDB) |
| 6766 | { |
| 6767 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 6768 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) |
| 6769 | DAC960_WaitForCommand(Controller); |
| 6770 | while (Controller->V1.DirectCommandActive[DCDB.Channel] |
| 6771 | [DCDB.TargetID]) |
| 6772 | { |
| 6773 | spin_unlock_irq(&Controller->queue_lock); |
| 6774 | __wait_event(Controller->CommandWaitQueue, |
| 6775 | !Controller->V1.DirectCommandActive |
| 6776 | [DCDB.Channel][DCDB.TargetID]); |
| 6777 | spin_lock_irq(&Controller->queue_lock); |
| 6778 | } |
| 6779 | Controller->V1.DirectCommandActive[DCDB.Channel] |
| 6780 | [DCDB.TargetID] = true; |
| 6781 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 6782 | DAC960_V1_ClearCommand(Command); |
| 6783 | Command->CommandType = DAC960_ImmediateCommand; |
| 6784 | memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox, |
| 6785 | sizeof(DAC960_V1_CommandMailbox_T)); |
| 6786 | Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA; |
| 6787 | DCDB.BusAddress = DataTransferBufferDMA; |
| 6788 | memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T)); |
| 6789 | } |
| 6790 | else |
| 6791 | { |
| 6792 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 6793 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) |
| 6794 | DAC960_WaitForCommand(Controller); |
| 6795 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 6796 | DAC960_V1_ClearCommand(Command); |
| 6797 | Command->CommandType = DAC960_ImmediateCommand; |
| 6798 | memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox, |
| 6799 | sizeof(DAC960_V1_CommandMailbox_T)); |
| 6800 | if (DataTransferBuffer != NULL) |
| 6801 | Command->V1.CommandMailbox.Type3.BusAddress = |
| 6802 | DataTransferBufferDMA; |
| 6803 | } |
| 6804 | DAC960_ExecuteCommand(Command); |
| 6805 | CommandStatus = Command->V1.CommandStatus; |
| 6806 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 6807 | DAC960_DeallocateCommand(Command); |
| 6808 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 6809 | if (DataTransferLength > 0) |
| 6810 | { |
| 6811 | if (copy_to_user(UserCommand.DataTransferBuffer, |
| 6812 | DataTransferBuffer, DataTransferLength)) { |
| 6813 | ErrorCode = -EFAULT; |
| 6814 | goto Failure1; |
| 6815 | } |
| 6816 | } |
| 6817 | if (CommandOpcode == DAC960_V1_DCDB) |
| 6818 | { |
| 6819 | /* |
| 6820 | I don't believe Target or Channel in the DCDB_IOBUF |
| 6821 | should be any different from the contents of DCDB. |
| 6822 | */ |
| 6823 | Controller->V1.DirectCommandActive[DCDB.Channel] |
| 6824 | [DCDB.TargetID] = false; |
| 6825 | if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF, |
| 6826 | sizeof(DAC960_V1_DCDB_T))) { |
| 6827 | ErrorCode = -EFAULT; |
| 6828 | goto Failure1; |
| 6829 | } |
| 6830 | } |
| 6831 | ErrorCode = CommandStatus; |
| 6832 | Failure1: |
| 6833 | if (DataTransferBuffer != NULL) |
| 6834 | pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength), |
| 6835 | DataTransferBuffer, DataTransferBufferDMA); |
| 6836 | if (DCDB_IOBUF != NULL) |
| 6837 | pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T), |
| 6838 | DCDB_IOBUF, DCDB_IOBUFDMA); |
| 6839 | Failure1a: |
| 6840 | return ErrorCode; |
| 6841 | } |
| 6842 | case DAC960_IOCTL_V2_EXECUTE_COMMAND: |
| 6843 | { |
| 6844 | DAC960_V2_UserCommand_T __user *UserSpaceUserCommand = |
| 6845 | (DAC960_V2_UserCommand_T __user *) Argument; |
| 6846 | DAC960_V2_UserCommand_T UserCommand; |
| 6847 | DAC960_Controller_T *Controller; |
| 6848 | DAC960_Command_T *Command = NULL; |
| 6849 | DAC960_V2_CommandMailbox_T *CommandMailbox; |
| 6850 | DAC960_V2_CommandStatus_T CommandStatus; |
| 6851 | unsigned long flags; |
| 6852 | int ControllerNumber, DataTransferLength; |
| 6853 | int DataTransferResidue, RequestSenseLength; |
| 6854 | unsigned char *DataTransferBuffer = NULL; |
| 6855 | dma_addr_t DataTransferBufferDMA; |
| 6856 | unsigned char *RequestSenseBuffer = NULL; |
| 6857 | dma_addr_t RequestSenseBufferDMA; |
| 6858 | if (UserSpaceUserCommand == NULL) return -EINVAL; |
| 6859 | if (copy_from_user(&UserCommand, UserSpaceUserCommand, |
| 6860 | sizeof(DAC960_V2_UserCommand_T))) { |
| 6861 | ErrorCode = -EFAULT; |
| 6862 | goto Failure2a; |
| 6863 | } |
| 6864 | ControllerNumber = UserCommand.ControllerNumber; |
| 6865 | if (ControllerNumber < 0 || |
| 6866 | ControllerNumber > DAC960_ControllerCount - 1) |
| 6867 | return -ENXIO; |
| 6868 | Controller = DAC960_Controllers[ControllerNumber]; |
| 6869 | if (Controller == NULL) return -ENXIO; |
| 6870 | if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL; |
| 6871 | DataTransferLength = UserCommand.DataTransferLength; |
| 6872 | if (DataTransferLength > 0) |
| 6873 | { |
| 6874 | DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice, |
| 6875 | DataTransferLength, &DataTransferBufferDMA); |
| 6876 | if (DataTransferBuffer == NULL) return -ENOMEM; |
| 6877 | memset(DataTransferBuffer, 0, DataTransferLength); |
| 6878 | } |
| 6879 | else if (DataTransferLength < 0) |
| 6880 | { |
| 6881 | DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice, |
| 6882 | -DataTransferLength, &DataTransferBufferDMA); |
| 6883 | if (DataTransferBuffer == NULL) return -ENOMEM; |
| 6884 | if (copy_from_user(DataTransferBuffer, |
| 6885 | UserCommand.DataTransferBuffer, |
| 6886 | -DataTransferLength)) { |
| 6887 | ErrorCode = -EFAULT; |
| 6888 | goto Failure2; |
| 6889 | } |
| 6890 | } |
| 6891 | RequestSenseLength = UserCommand.RequestSenseLength; |
| 6892 | if (RequestSenseLength > 0) |
| 6893 | { |
| 6894 | RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice, |
| 6895 | RequestSenseLength, &RequestSenseBufferDMA); |
| 6896 | if (RequestSenseBuffer == NULL) |
| 6897 | { |
| 6898 | ErrorCode = -ENOMEM; |
| 6899 | goto Failure2; |
| 6900 | } |
| 6901 | memset(RequestSenseBuffer, 0, RequestSenseLength); |
| 6902 | } |
| 6903 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 6904 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) |
| 6905 | DAC960_WaitForCommand(Controller); |
| 6906 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 6907 | DAC960_V2_ClearCommand(Command); |
| 6908 | Command->CommandType = DAC960_ImmediateCommand; |
| 6909 | CommandMailbox = &Command->V2.CommandMailbox; |
| 6910 | memcpy(CommandMailbox, &UserCommand.CommandMailbox, |
| 6911 | sizeof(DAC960_V2_CommandMailbox_T)); |
| 6912 | CommandMailbox->Common.CommandControlBits |
| 6913 | .AdditionalScatterGatherListMemory = false; |
| 6914 | CommandMailbox->Common.CommandControlBits |
| 6915 | .NoAutoRequestSense = true; |
| 6916 | CommandMailbox->Common.DataTransferSize = 0; |
| 6917 | CommandMailbox->Common.DataTransferPageNumber = 0; |
| 6918 | memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0, |
| 6919 | sizeof(DAC960_V2_DataTransferMemoryAddress_T)); |
| 6920 | if (DataTransferLength != 0) |
| 6921 | { |
| 6922 | if (DataTransferLength > 0) |
| 6923 | { |
| 6924 | CommandMailbox->Common.CommandControlBits |
| 6925 | .DataTransferControllerToHost = true; |
| 6926 | CommandMailbox->Common.DataTransferSize = DataTransferLength; |
| 6927 | } |
| 6928 | else |
| 6929 | { |
| 6930 | CommandMailbox->Common.CommandControlBits |
| 6931 | .DataTransferControllerToHost = false; |
| 6932 | CommandMailbox->Common.DataTransferSize = -DataTransferLength; |
| 6933 | } |
| 6934 | CommandMailbox->Common.DataTransferMemoryAddress |
| 6935 | .ScatterGatherSegments[0] |
| 6936 | .SegmentDataPointer = DataTransferBufferDMA; |
| 6937 | CommandMailbox->Common.DataTransferMemoryAddress |
| 6938 | .ScatterGatherSegments[0] |
| 6939 | .SegmentByteCount = |
| 6940 | CommandMailbox->Common.DataTransferSize; |
| 6941 | } |
| 6942 | if (RequestSenseLength > 0) |
| 6943 | { |
| 6944 | CommandMailbox->Common.CommandControlBits |
| 6945 | .NoAutoRequestSense = false; |
| 6946 | CommandMailbox->Common.RequestSenseSize = RequestSenseLength; |
| 6947 | CommandMailbox->Common.RequestSenseBusAddress = |
| 6948 | RequestSenseBufferDMA; |
| 6949 | } |
| 6950 | DAC960_ExecuteCommand(Command); |
| 6951 | CommandStatus = Command->V2.CommandStatus; |
| 6952 | RequestSenseLength = Command->V2.RequestSenseLength; |
| 6953 | DataTransferResidue = Command->V2.DataTransferResidue; |
| 6954 | spin_lock_irqsave(&Controller->queue_lock, flags); |
| 6955 | DAC960_DeallocateCommand(Command); |
| 6956 | spin_unlock_irqrestore(&Controller->queue_lock, flags); |
| 6957 | if (RequestSenseLength > UserCommand.RequestSenseLength) |
| 6958 | RequestSenseLength = UserCommand.RequestSenseLength; |
| 6959 | if (copy_to_user(&UserSpaceUserCommand->DataTransferLength, |
| 6960 | &DataTransferResidue, |
| 6961 | sizeof(DataTransferResidue))) { |
| 6962 | ErrorCode = -EFAULT; |
| 6963 | goto Failure2; |
| 6964 | } |
| 6965 | if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength, |
| 6966 | &RequestSenseLength, sizeof(RequestSenseLength))) { |
| 6967 | ErrorCode = -EFAULT; |
| 6968 | goto Failure2; |
| 6969 | } |
| 6970 | if (DataTransferLength > 0) |
| 6971 | { |
| 6972 | if (copy_to_user(UserCommand.DataTransferBuffer, |
| 6973 | DataTransferBuffer, DataTransferLength)) { |
| 6974 | ErrorCode = -EFAULT; |
| 6975 | goto Failure2; |
| 6976 | } |
| 6977 | } |
| 6978 | if (RequestSenseLength > 0) |
| 6979 | { |
| 6980 | if (copy_to_user(UserCommand.RequestSenseBuffer, |
| 6981 | RequestSenseBuffer, RequestSenseLength)) { |
| 6982 | ErrorCode = -EFAULT; |
| 6983 | goto Failure2; |
| 6984 | } |
| 6985 | } |
| 6986 | ErrorCode = CommandStatus; |
| 6987 | Failure2: |
| 6988 | pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength), |
| 6989 | DataTransferBuffer, DataTransferBufferDMA); |
| 6990 | if (RequestSenseBuffer != NULL) |
| 6991 | pci_free_consistent(Controller->PCIDevice, RequestSenseLength, |
| 6992 | RequestSenseBuffer, RequestSenseBufferDMA); |
| 6993 | Failure2a: |
| 6994 | return ErrorCode; |
| 6995 | } |
| 6996 | case DAC960_IOCTL_V2_GET_HEALTH_STATUS: |
| 6997 | { |
| 6998 | DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus = |
| 6999 | (DAC960_V2_GetHealthStatus_T __user *) Argument; |
| 7000 | DAC960_V2_GetHealthStatus_T GetHealthStatus; |
| 7001 | DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer; |
| 7002 | DAC960_Controller_T *Controller; |
| 7003 | int ControllerNumber; |
| 7004 | if (UserSpaceGetHealthStatus == NULL) return -EINVAL; |
| 7005 | if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus, |
| 7006 | sizeof(DAC960_V2_GetHealthStatus_T))) |
| 7007 | return -EFAULT; |
| 7008 | ControllerNumber = GetHealthStatus.ControllerNumber; |
| 7009 | if (ControllerNumber < 0 || |
| 7010 | ControllerNumber > DAC960_ControllerCount - 1) |
| 7011 | return -ENXIO; |
| 7012 | Controller = DAC960_Controllers[ControllerNumber]; |
| 7013 | if (Controller == NULL) return -ENXIO; |
| 7014 | if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL; |
| 7015 | if (copy_from_user(&HealthStatusBuffer, |
| 7016 | GetHealthStatus.HealthStatusBuffer, |
| 7017 | sizeof(DAC960_V2_HealthStatusBuffer_T))) |
| 7018 | return -EFAULT; |
| 7019 | while (Controller->V2.HealthStatusBuffer->StatusChangeCounter |
| 7020 | == HealthStatusBuffer.StatusChangeCounter && |
| 7021 | Controller->V2.HealthStatusBuffer->NextEventSequenceNumber |
| 7022 | == HealthStatusBuffer.NextEventSequenceNumber) |
| 7023 | { |
| 7024 | interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue, |
| 7025 | DAC960_MonitoringTimerInterval); |
| 7026 | if (signal_pending(current)) return -EINTR; |
| 7027 | } |
| 7028 | if (copy_to_user(GetHealthStatus.HealthStatusBuffer, |
| 7029 | Controller->V2.HealthStatusBuffer, |
| 7030 | sizeof(DAC960_V2_HealthStatusBuffer_T))) |
| 7031 | return -EFAULT; |
| 7032 | return 0; |
| 7033 | } |
| 7034 | } |
| 7035 | return -EINVAL; |
| 7036 | } |
| 7037 | |
| 7038 | static struct file_operations DAC960_gam_fops = { |
| 7039 | .owner = THIS_MODULE, |
| 7040 | .ioctl = DAC960_gam_ioctl |
| 7041 | }; |
| 7042 | |
| 7043 | static struct miscdevice DAC960_gam_dev = { |
| 7044 | DAC960_GAM_MINOR, |
| 7045 | "dac960_gam", |
| 7046 | &DAC960_gam_fops |
| 7047 | }; |
| 7048 | |
| 7049 | static int DAC960_gam_init(void) |
| 7050 | { |
| 7051 | int ret; |
| 7052 | |
| 7053 | ret = misc_register(&DAC960_gam_dev); |
| 7054 | if (ret) |
| 7055 | printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR); |
| 7056 | return ret; |
| 7057 | } |
| 7058 | |
| 7059 | static void DAC960_gam_cleanup(void) |
| 7060 | { |
| 7061 | misc_deregister(&DAC960_gam_dev); |
| 7062 | } |
| 7063 | |
| 7064 | #endif /* DAC960_GAM_MINOR */ |
| 7065 | |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 7066 | static struct DAC960_privdata DAC960_GEM_privdata = { |
| 7067 | .HardwareType = DAC960_GEM_Controller, |
| 7068 | .FirmwareType = DAC960_V2_Controller, |
| 7069 | .InterruptHandler = DAC960_GEM_InterruptHandler, |
| 7070 | .MemoryWindowSize = DAC960_GEM_RegisterWindowSize, |
| 7071 | }; |
| 7072 | |
| 7073 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7074 | static struct DAC960_privdata DAC960_BA_privdata = { |
| 7075 | .HardwareType = DAC960_BA_Controller, |
| 7076 | .FirmwareType = DAC960_V2_Controller, |
| 7077 | .InterruptHandler = DAC960_BA_InterruptHandler, |
| 7078 | .MemoryWindowSize = DAC960_BA_RegisterWindowSize, |
| 7079 | }; |
| 7080 | |
| 7081 | static struct DAC960_privdata DAC960_LP_privdata = { |
| 7082 | .HardwareType = DAC960_LP_Controller, |
| 7083 | .FirmwareType = DAC960_LP_Controller, |
| 7084 | .InterruptHandler = DAC960_LP_InterruptHandler, |
| 7085 | .MemoryWindowSize = DAC960_LP_RegisterWindowSize, |
| 7086 | }; |
| 7087 | |
| 7088 | static struct DAC960_privdata DAC960_LA_privdata = { |
| 7089 | .HardwareType = DAC960_LA_Controller, |
| 7090 | .FirmwareType = DAC960_V1_Controller, |
| 7091 | .InterruptHandler = DAC960_LA_InterruptHandler, |
| 7092 | .MemoryWindowSize = DAC960_LA_RegisterWindowSize, |
| 7093 | }; |
| 7094 | |
| 7095 | static struct DAC960_privdata DAC960_PG_privdata = { |
| 7096 | .HardwareType = DAC960_PG_Controller, |
| 7097 | .FirmwareType = DAC960_V1_Controller, |
| 7098 | .InterruptHandler = DAC960_PG_InterruptHandler, |
| 7099 | .MemoryWindowSize = DAC960_PG_RegisterWindowSize, |
| 7100 | }; |
| 7101 | |
| 7102 | static struct DAC960_privdata DAC960_PD_privdata = { |
| 7103 | .HardwareType = DAC960_PD_Controller, |
| 7104 | .FirmwareType = DAC960_V1_Controller, |
| 7105 | .InterruptHandler = DAC960_PD_InterruptHandler, |
| 7106 | .MemoryWindowSize = DAC960_PD_RegisterWindowSize, |
| 7107 | }; |
| 7108 | |
| 7109 | static struct DAC960_privdata DAC960_P_privdata = { |
| 7110 | .HardwareType = DAC960_P_Controller, |
| 7111 | .FirmwareType = DAC960_V1_Controller, |
| 7112 | .InterruptHandler = DAC960_P_InterruptHandler, |
| 7113 | .MemoryWindowSize = DAC960_PD_RegisterWindowSize, |
| 7114 | }; |
| 7115 | |
| 7116 | static struct pci_device_id DAC960_id_table[] = { |
| 7117 | { |
| 7118 | .vendor = PCI_VENDOR_ID_MYLEX, |
Christoph Hellwig | 5b76ffd | 2005-05-05 16:15:58 -0700 | [diff] [blame] | 7119 | .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM, |
| 7120 | .subvendor = PCI_ANY_ID, |
| 7121 | .subdevice = PCI_ANY_ID, |
| 7122 | .driver_data = (unsigned long) &DAC960_GEM_privdata, |
| 7123 | }, |
| 7124 | { |
| 7125 | .vendor = PCI_VENDOR_ID_MYLEX, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7126 | .device = PCI_DEVICE_ID_MYLEX_DAC960_BA, |
| 7127 | .subvendor = PCI_ANY_ID, |
| 7128 | .subdevice = PCI_ANY_ID, |
| 7129 | .driver_data = (unsigned long) &DAC960_BA_privdata, |
| 7130 | }, |
| 7131 | { |
| 7132 | .vendor = PCI_VENDOR_ID_MYLEX, |
| 7133 | .device = PCI_DEVICE_ID_MYLEX_DAC960_LP, |
| 7134 | .subvendor = PCI_ANY_ID, |
| 7135 | .subdevice = PCI_ANY_ID, |
| 7136 | .driver_data = (unsigned long) &DAC960_LP_privdata, |
| 7137 | }, |
| 7138 | { |
| 7139 | .vendor = PCI_VENDOR_ID_DEC, |
| 7140 | .device = PCI_DEVICE_ID_DEC_21285, |
| 7141 | .subvendor = PCI_VENDOR_ID_MYLEX, |
| 7142 | .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA, |
| 7143 | .driver_data = (unsigned long) &DAC960_LA_privdata, |
| 7144 | }, |
| 7145 | { |
| 7146 | .vendor = PCI_VENDOR_ID_MYLEX, |
| 7147 | .device = PCI_DEVICE_ID_MYLEX_DAC960_PG, |
| 7148 | .subvendor = PCI_ANY_ID, |
| 7149 | .subdevice = PCI_ANY_ID, |
| 7150 | .driver_data = (unsigned long) &DAC960_PG_privdata, |
| 7151 | }, |
| 7152 | { |
| 7153 | .vendor = PCI_VENDOR_ID_MYLEX, |
| 7154 | .device = PCI_DEVICE_ID_MYLEX_DAC960_PD, |
| 7155 | .subvendor = PCI_ANY_ID, |
| 7156 | .subdevice = PCI_ANY_ID, |
| 7157 | .driver_data = (unsigned long) &DAC960_PD_privdata, |
| 7158 | }, |
| 7159 | { |
| 7160 | .vendor = PCI_VENDOR_ID_MYLEX, |
| 7161 | .device = PCI_DEVICE_ID_MYLEX_DAC960_P, |
| 7162 | .subvendor = PCI_ANY_ID, |
| 7163 | .subdevice = PCI_ANY_ID, |
| 7164 | .driver_data = (unsigned long) &DAC960_P_privdata, |
| 7165 | }, |
| 7166 | {0, }, |
| 7167 | }; |
| 7168 | |
| 7169 | MODULE_DEVICE_TABLE(pci, DAC960_id_table); |
| 7170 | |
| 7171 | static struct pci_driver DAC960_pci_driver = { |
| 7172 | .name = "DAC960", |
| 7173 | .id_table = DAC960_id_table, |
| 7174 | .probe = DAC960_Probe, |
| 7175 | .remove = DAC960_Remove, |
| 7176 | }; |
| 7177 | |
| 7178 | static int DAC960_init_module(void) |
| 7179 | { |
| 7180 | int ret; |
| 7181 | |
Richard Knutsson | 9bfab8c | 2005-11-30 00:59:34 +0100 | [diff] [blame^] | 7182 | ret = pci_register_driver(&DAC960_pci_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7183 | #ifdef DAC960_GAM_MINOR |
| 7184 | if (!ret) |
| 7185 | DAC960_gam_init(); |
| 7186 | #endif |
| 7187 | return ret; |
| 7188 | } |
| 7189 | |
| 7190 | static void DAC960_cleanup_module(void) |
| 7191 | { |
| 7192 | int i; |
| 7193 | |
| 7194 | #ifdef DAC960_GAM_MINOR |
| 7195 | DAC960_gam_cleanup(); |
| 7196 | #endif |
| 7197 | |
| 7198 | for (i = 0; i < DAC960_ControllerCount; i++) { |
| 7199 | DAC960_Controller_T *Controller = DAC960_Controllers[i]; |
| 7200 | if (Controller == NULL) |
| 7201 | continue; |
| 7202 | DAC960_FinalizeController(Controller); |
| 7203 | } |
| 7204 | if (DAC960_ProcDirectoryEntry != NULL) { |
| 7205 | remove_proc_entry("rd/status", NULL); |
| 7206 | remove_proc_entry("rd", NULL); |
| 7207 | } |
| 7208 | DAC960_ControllerCount = 0; |
| 7209 | pci_unregister_driver(&DAC960_pci_driver); |
| 7210 | } |
| 7211 | |
| 7212 | module_init(DAC960_init_module); |
| 7213 | module_exit(DAC960_cleanup_module); |
| 7214 | |
| 7215 | MODULE_LICENSE("GPL"); |