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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (C) 2000 YAEGASHI Takeshi
3 * Hitachi HD64461 companion chip support
4 */
5
Linus Torvalds1da177e2005-04-16 15:20:36 -07006#include <linux/sched.h>
7#include <linux/module.h>
8#include <linux/kernel.h>
9#include <linux/param.h>
10#include <linux/interrupt.h>
11#include <linux/init.h>
12#include <linux/irq.h>
Matt Fleming135210b2008-11-28 08:58:30 +000013#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <asm/irq.h>
Paul Mundt6d75e652006-09-27 13:42:57 +090015#include <asm/hd64461.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016
Kristoffer Ericsonf1382302007-09-11 12:48:45 +090017/* This belongs in cpu specific */
18#define INTC_ICR1 0xA4140010UL
19
Matt Fleming135210b2008-11-28 08:58:30 +000020static void hd64461_mask_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -070021{
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 unsigned short nimr;
23 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
24
Matt Fleming135210b2008-11-28 08:58:30 +000025 nimr = __raw_readw(HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 nimr |= mask;
Matt Fleming135210b2008-11-28 08:58:30 +000027 __raw_writew(nimr, HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070028}
29
Matt Fleming135210b2008-11-28 08:58:30 +000030static void hd64461_unmask_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -070031{
Linus Torvalds1da177e2005-04-16 15:20:36 -070032 unsigned short nimr;
33 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
34
Matt Fleming135210b2008-11-28 08:58:30 +000035 nimr = __raw_readw(HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070036 nimr &= ~mask;
Matt Fleming135210b2008-11-28 08:58:30 +000037 __raw_writew(nimr, HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070038}
39
Matt Fleming135210b2008-11-28 08:58:30 +000040static void hd64461_mask_and_ack_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -070041{
Matt Fleming135210b2008-11-28 08:58:30 +000042 hd64461_mask_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#ifdef CONFIG_HD64461_ENABLER
44 if (irq == HD64461_IRQBASE + 13)
Matt Fleming135210b2008-11-28 08:58:30 +000045 __raw_writeb(0x00, HD64461_PCC1CSCR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#endif
47}
48
Matt Fleming135210b2008-11-28 08:58:30 +000049static struct irq_chip hd64461_irq_chip = {
50 .name = "HD64461-IRQ",
51 .mask = hd64461_mask_irq,
52 .mask_ack = hd64461_mask_and_ack_irq,
53 .unmask = hd64461_unmask_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -070054};
55
Rafael Ignacio Zurita3bf50922009-03-20 02:08:22 +000056static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -070057{
Paul Mundt9d56dd32010-01-26 12:58:40 +090058 unsigned short intv = __raw_readw(HD64461_NIRR);
Rafael Ignacio Zurita3bf50922009-03-20 02:08:22 +000059 struct irq_desc *ext_desc;
60 unsigned int ext_irq = HD64461_IRQBASE;
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
Rafael Ignacio Zurita3bf50922009-03-20 02:08:22 +000062 intv &= (1 << HD64461_IRQ_NUM) - 1;
63
64 while (intv) {
65 if (intv & 1) {
66 ext_desc = irq_desc + ext_irq;
67 handle_level_irq(ext_irq, ext_desc);
68 }
69 intv >>= 1;
70 ext_irq++;
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070072}
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074int __init setup_hd64461(void)
75{
76 int i;
77
78 if (!MACH_HD64461)
79 return 0;
80
81 printk(KERN_INFO
82 "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
Paul Mundt62669e612009-05-20 11:27:13 +090083 HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 HD64461_IRQBASE + 15);
85
Matt Fleming135210b2008-11-28 08:58:30 +000086/* Should be at processor specific part.. */
87#if defined(CONFIG_CPU_SUBTYPE_SH7709)
88 __raw_writew(0x2240, INTC_ICR1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070089#endif
Matt Fleming135210b2008-11-28 08:58:30 +000090 __raw_writew(0xffff, HD64461_NIMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
Kristoffer Ericsonf1382302007-09-11 12:48:45 +090092 /* IRQ 80 -> 95 belongs to HD64461 */
Matt Fleming135210b2008-11-28 08:58:30 +000093 for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++)
94 set_irq_chip_and_handler(i, &hd64461_irq_chip,
95 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070096
Rafael Ignacio Zurita3bf50922009-03-20 02:08:22 +000097 set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
98 set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
99
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100#ifdef CONFIG_HD64461_ENABLER
101 printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
Matt Fleming135210b2008-11-28 08:58:30 +0000102 __raw_writeb(0x4c, HD64461_PCC1CSCIER);
103 __raw_writeb(0x00, HD64461_PCC1CSCR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104#endif
105
106 return 0;
107}
108
109module_init(setup_hd64461);