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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-sh/dma.h
3 *
4 * Copyright (C) 2003, 2004 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __ASM_SH_DMA_H
11#define __ASM_SH_DMA_H
12#ifdef __KERNEL__
13
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/spinlock.h>
15#include <linux/wait.h>
Evgeniy Polyakov66c52272007-05-31 13:46:21 +090016#include <linux/sched.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <linux/sysdev.h>
Paul Mundtf15cbe62008-07-29 08:09:44 +090018#include <cpu/dma.h>
Paul Mundt9deaa3b2009-06-14 21:45:06 +090019#include <asm-generic/dma.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020
21#ifdef CONFIG_NR_DMA_CHANNELS
Nobuhiro Iwamatsu71b973a2009-03-10 17:26:49 +090022# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS)
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#else
Nobuhiro Iwamatsu71b973a2009-03-10 17:26:49 +090024# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS)
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#endif
26
27/*
28 * Read and write modes can mean drastically different things depending on the
29 * channel configuration. Consult your DMAC documentation and module
30 * implementation for further clues.
31 */
32#define DMA_MODE_READ 0x00
33#define DMA_MODE_WRITE 0x01
34#define DMA_MODE_MASK 0x01
35
36#define DMA_AUTOINIT 0x10
37
38/*
39 * DMAC (dma_info) flags
40 */
41enum {
Mark Glaisherdb9b99d2006-11-24 15:13:52 +090042 DMAC_CHANNELS_CONFIGURED = 0x01,
43 DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */
Linus Torvalds1da177e2005-04-16 15:20:36 -070044};
45
46/*
47 * DMA channel capabilities / flags
48 */
49enum {
Mark Glaisherdb9b99d2006-11-24 15:13:52 +090050 DMA_CONFIGURED = 0x01,
51
52 /*
53 * Transfer end interrupt, inherited from DMAC.
54 * wait_queue used in dma_wait_for_completion.
55 */
56 DMA_TEI_CAPABLE = 0x02,
Linus Torvalds1da177e2005-04-16 15:20:36 -070057};
58
59extern spinlock_t dma_spin_lock;
60
61struct dma_channel;
62
63struct dma_ops {
64 int (*request)(struct dma_channel *chan);
65 void (*free)(struct dma_channel *chan);
66
67 int (*get_residue)(struct dma_channel *chan);
68 int (*xfer)(struct dma_channel *chan);
Mark Glaisherdb9b99d2006-11-24 15:13:52 +090069 int (*configure)(struct dma_channel *chan, unsigned long flags);
70 int (*extend)(struct dma_channel *chan, unsigned long op, void *param);
Linus Torvalds1da177e2005-04-16 15:20:36 -070071};
72
73struct dma_channel {
Mark Glaisherdb9b99d2006-11-24 15:13:52 +090074 char dev_id[16]; /* unique name per DMAC of channel */
Linus Torvalds1da177e2005-04-16 15:20:36 -070075
Mark Glaisherdb9b99d2006-11-24 15:13:52 +090076 unsigned int chan; /* DMAC channel number */
Paul Mundt0d831772006-01-16 22:14:09 -080077 unsigned int vchan; /* Virtual channel number */
Mark Glaisherdb9b99d2006-11-24 15:13:52 +090078
Linus Torvalds1da177e2005-04-16 15:20:36 -070079 unsigned int mode;
80 unsigned int count;
81
82 unsigned long sar;
83 unsigned long dar;
84
Mark Glaisherdb9b99d2006-11-24 15:13:52 +090085 const char **caps;
86
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 unsigned long flags;
88 atomic_t busy;
89
Linus Torvalds1da177e2005-04-16 15:20:36 -070090 wait_queue_head_t wait_queue;
91
92 struct sys_device dev;
Mark Glaisherdb9b99d2006-11-24 15:13:52 +090093 void *priv_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -070094};
95
96struct dma_info {
Paul Mundt0d831772006-01-16 22:14:09 -080097 struct platform_device *pdev;
98
Linus Torvalds1da177e2005-04-16 15:20:36 -070099 const char *name;
100 unsigned int nr_channels;
101 unsigned long flags;
102
103 struct dma_ops *ops;
104 struct dma_channel *channels;
105
106 struct list_head list;
Mark Glaisherdb9b99d2006-11-24 15:13:52 +0900107 int first_channel_nr;
Adrian McMenamineb695db2007-07-24 13:30:55 +0900108 int first_vchannel_nr;
Mark Glaisherdb9b99d2006-11-24 15:13:52 +0900109};
110
111struct dma_chan_caps {
112 int ch_num;
113 const char **caplist;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114};
115
116#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev)
117
118/* arch/sh/drivers/dma/dma-api.c */
119extern int dma_xfer(unsigned int chan, unsigned long from,
120 unsigned long to, size_t size, unsigned int mode);
121
122#define dma_write(chan, from, to, size) \
123 dma_xfer(chan, from, to, size, DMA_MODE_WRITE)
124#define dma_write_page(chan, from, to) \
125 dma_write(chan, from, to, PAGE_SIZE)
126
127#define dma_read(chan, from, to, size) \
128 dma_xfer(chan, from, to, size, DMA_MODE_READ)
129#define dma_read_page(chan, from, to) \
130 dma_read(chan, from, to, PAGE_SIZE)
131
Mark Glaisherdb9b99d2006-11-24 15:13:52 +0900132extern int request_dma_bycap(const char **dmac, const char **caps,
133 const char *dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134extern int get_dma_residue(unsigned int chan);
135extern struct dma_info *get_dma_info(unsigned int chan);
136extern struct dma_channel *get_dma_channel(unsigned int chan);
137extern void dma_wait_for_completion(unsigned int chan);
138extern void dma_configure_channel(unsigned int chan, unsigned long flags);
139
140extern int register_dmac(struct dma_info *info);
141extern void unregister_dmac(struct dma_info *info);
Mark Glaisherdb9b99d2006-11-24 15:13:52 +0900142extern struct dma_info *get_dma_info_by_name(const char *dmac_name);
143
144extern int dma_extend(unsigned int chan, unsigned long op, void *param);
145extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147/* arch/sh/drivers/dma/dma-sysfs.c */
Paul Mundt0d831772006-01-16 22:14:09 -0800148extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *);
149extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
151#ifdef CONFIG_PCI
152extern int isa_dma_bridge_buggy;
153#else
154#define isa_dma_bridge_buggy (0)
155#endif
156
157#endif /* __KERNEL__ */
158#endif /* __ASM_SH_DMA_H */