blob: ca13d9c8c5f81d8ba382372775be68856bf44c5d [file] [log] [blame]
Florian Fainelli49122142013-01-09 20:56:07 +01001/*
2 * Device Tree file for Marvell Armada 370 Reference Design board
3 * (RD-88F6710-A1)
4 *
5 * Copied from arch/arm/boot/dts/armada-370-db.dts
6 *
7 * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14/dts-v1/;
Thomas Petazzoni5c0169d2014-02-11 18:07:13 +010015#include <dt-bindings/input/input.h>
Thomas Petazzoni29e74f82014-02-11 18:07:12 +010016#include <dt-bindings/gpio/gpio.h>
Ezequiel Garcia38149882013-07-26 10:17:56 -030017#include "armada-370.dtsi"
Florian Fainelli49122142013-01-09 20:56:07 +010018
19/ {
20 model = "Marvell Armada 370 Reference Design";
21 compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
22
23 chosen {
24 bootargs = "console=ttyS0,115200 earlyprintk";
25 };
26
27 memory {
28 device_type = "memory";
29 reg = <0x00000000 0x20000000>; /* 512 MB */
30 };
31
32 soc {
Ezequiel Garcia0cd37542013-07-26 10:17:58 -030033 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
34 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
Ezequiel Garcia5e12a612013-07-26 10:17:57 -030035
Ezequiel Garcia0af83302013-08-08 18:03:09 -030036 pcie-controller {
37 status = "okay";
38
39 /* Internal mini-PCIe connector */
40 pcie@1,0 {
41 /* Port 0, Lane 0 */
42 status = "okay";
43 };
44
45 /* Internal mini-PCIe connector */
46 pcie@2,0 {
47 /* Port 1, Lane 0 */
48 status = "okay";
49 };
50 };
51
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020052 internal-regs {
53 serial@12000 {
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020054 status = "okay";
55 };
56 sata@a0000 {
57 nr-ports = <2>;
58 status = "okay";
Florian Fainelli49122142013-01-09 20:56:07 +010059 };
60
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020061 mdio {
Ezequiel Garcia9dfb5c42014-08-11 09:14:41 -030062 pinctrl-0 = <&mdio_pins>;
63 pinctrl-names = "default";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020064 phy0: ethernet-phy@0 {
65 reg = <0>;
66 };
67
68 phy1: ethernet-phy@1 {
69 reg = <1>;
70 };
71 };
72
73 ethernet@70000 {
74 status = "okay";
75 phy = <&phy0>;
76 phy-mode = "sgmii";
77 };
78 ethernet@74000 {
Ezequiel Garcia9dfb5c42014-08-11 09:14:41 -030079 pinctrl-0 = <&ge1_rgmii_pins>;
80 pinctrl-names = "default";
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020081 status = "okay";
82 phy = <&phy1>;
83 phy-mode = "rgmii-id";
84 };
85
86 mvsdio@d4000 {
87 pinctrl-0 = <&sdio_pins1>;
88 pinctrl-names = "default";
89 status = "okay";
90 /* No CD or WP GPIOs */
Simon Baatzd87b5fb2013-05-13 23:18:58 +020091 broken-cd;
Gregory CLEMENT467f54b2013-04-12 16:29:09 +020092 };
93
94 usb@50000 {
95 status = "okay";
96 };
97
98 usb@51000 {
99 status = "okay";
100 };
101
102 gpio-keys {
103 compatible = "gpio-keys";
104 #address-cells = <1>;
105 #size-cells = <0>;
106 button@1 {
107 label = "Software Button";
Thomas Petazzoni5c0169d2014-02-11 18:07:13 +0100108 linux,code = <KEY_POWER>;
Thomas Petazzoni29e74f82014-02-11 18:07:12 +0100109 gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200110 };
Florian Fainelli49122142013-01-09 20:56:07 +0100111 };
Ezequiel Garcia69e18e22013-12-11 19:28:39 -0300112
113 nand@d0000 {
114 status = "okay";
115 num-cs = <1>;
116 marvell,nand-keep-config;
117 marvell,nand-enable-arbiter;
118 nand-on-flash-bbt;
119
120 partition@0 {
121 label = "U-Boot";
122 reg = <0 0x800000>;
123 };
124 partition@800000 {
125 label = "Linux";
126 reg = <0x800000 0x800000>;
127 };
128 partition@1000000 {
129 label = "Filesystem";
130 reg = <0x1000000 0x3f000000>;
131 };
132 };
Florian Fainelli49122142013-01-09 20:56:07 +0100133 };
Florian Fainelli49122142013-01-09 20:56:07 +0100134 };
Gregory CLEMENT467f54b2013-04-12 16:29:09 +0200135 };