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Alex Dai33a732f2015-08-12 15:43:36 +01001/*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
Arkadiusz Hiler8c4f24f2016-11-25 18:59:33 +010024#ifndef _INTEL_UC_H_
25#define _INTEL_UC_H_
Alex Dai33a732f2015-08-12 15:43:36 +010026
Michal Wajdeczkoa16b4312017-10-04 15:33:25 +000027#include "intel_uc_fw.h"
Alex Dai33a732f2015-08-12 15:43:36 +010028#include "intel_guc_fwif.h"
29#include "i915_guc_reg.h"
Dave Gordon0b63bb12016-06-20 15:18:07 +010030#include "intel_ringbuffer.h"
Michal Wajdeczkof8a58d62017-05-26 11:13:25 +000031#include "intel_guc_ct.h"
Michal Wajdeczkod62e2bf2017-10-04 18:13:39 +000032#include "intel_guc_log.h"
Chris Wilson4741da92016-12-24 19:31:46 +000033#include "i915_vma.h"
Michal Wajdeczkod56d63d2017-10-04 15:33:26 +000034#include "intel_huc.h"
Chris Wilson4741da92016-12-24 19:31:46 +000035
Alex Dai33a732f2015-08-12 15:43:36 +010036struct intel_guc {
Anusha Srivatsadb0a0912017-01-13 17:17:04 -080037 struct intel_uc_fw fw;
Akash Goeld6b40b42016-10-12 21:54:29 +053038 struct intel_guc_log log;
Michal Wajdeczkof8a58d62017-05-26 11:13:25 +000039 struct intel_guc_ct ct;
Alex Daibac427f2015-08-12 15:43:39 +010040
Daniele Ceraolo Spurioac58d2a2017-05-22 10:50:28 -070041 /* Log snapshot if GuC errors during load */
42 struct drm_i915_gem_object *load_err_log;
43
Arkadiusz Hilera80bc452016-11-25 18:59:34 +010044 /* intel_guc_recv interrupt related state */
Sagar Arun Kamble26705e22016-10-12 21:54:31 +053045 bool interrupts_enabled;
46
Chris Wilson8b797af2016-08-15 10:48:51 +010047 struct i915_vma *ads_vma;
Oscar Mateob09935a2017-03-22 10:39:53 -070048 struct i915_vma *stage_desc_pool;
49 void *stage_desc_pool_vaddr;
50 struct ida stage_ids;
Dave Gordon44a28b12015-08-12 15:43:41 +010051
52 struct i915_guc_client *execbuf_client;
53
Joonas Lahtinenabddffd2017-03-22 10:39:44 -070054 DECLARE_BITMAP(doorbell_bitmap, GUC_NUM_DOORBELLS);
Dave Gordon44a28b12015-08-12 15:43:41 +010055 uint32_t db_cacheline; /* Cyclic counter mod pagesize */
56
Michal Wajdeczkoa0c1fe22017-05-10 12:59:27 +000057 /* GuC's FW specific registers used in MMIO send */
58 struct {
59 u32 base;
60 unsigned int count;
61 enum forcewake_domains fw_domains;
62 } send_regs;
63
Arkadiusz Hilera80bc452016-11-25 18:59:34 +010064 /* To serialize the intel_guc_send actions */
65 struct mutex send_mutex;
Oscar Mateo5e7cd372017-03-22 10:39:49 -070066
67 /* GuC's FW specific send function */
68 int (*send)(struct intel_guc *guc, const u32 *data, u32 len);
Michal Wajdeczkoa03aac42017-05-10 12:59:26 +000069
70 /* GuC's FW specific notify function */
71 void (*notify)(struct intel_guc *guc);
Alex Dai33a732f2015-08-12 15:43:36 +010072};
73
Arkadiusz Hiler2d803c22016-11-25 18:59:35 +010074/* intel_uc.c */
Arkadiusz Hilerd2be9f22017-03-14 15:28:10 +010075void intel_uc_sanitize_options(struct drm_i915_private *dev_priv);
Arkadiusz Hiler413e8fd2016-11-25 18:59:36 +010076void intel_uc_init_early(struct drm_i915_private *dev_priv);
Sagar Arun Kamble1fc556f2017-10-04 15:33:24 +000077void intel_uc_init_mmio(struct drm_i915_private *dev_priv);
Arkadiusz Hiler29ad6a32017-03-14 15:28:09 +010078void intel_uc_init_fw(struct drm_i915_private *dev_priv);
Oscar Mateo3950bf32017-03-22 10:39:46 -070079void intel_uc_fini_fw(struct drm_i915_private *dev_priv);
Arkadiusz Hiler6cd5a722017-03-14 15:28:11 +010080int intel_uc_init_hw(struct drm_i915_private *dev_priv);
Oscar Mateo3950bf32017-03-22 10:39:46 -070081void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
Arkadiusz Hiler2d803c22016-11-25 18:59:35 +010082int intel_guc_sample_forcewake(struct intel_guc *guc);
Michal Wajdeczko789a6252017-05-02 10:32:42 +000083int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len);
Oscar Mateo5e7cd372017-03-22 10:39:49 -070084int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len);
Sagar Arun Kamble9a2cbf22017-09-26 12:47:16 +053085int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
Michal Wajdeczkoa03aac42017-05-10 12:59:26 +000086
Oscar Mateo5e7cd372017-03-22 10:39:49 -070087static inline int intel_guc_send(struct intel_guc *guc, const u32 *action, u32 len)
88{
89 return guc->send(guc, action, len);
90}
Arkadiusz Hiler2d803c22016-11-25 18:59:35 +010091
Michal Wajdeczkoa03aac42017-05-10 12:59:26 +000092static inline void intel_guc_notify(struct intel_guc *guc)
93{
94 guc->notify(guc);
95}
96
Alex Dai33a732f2015-08-12 15:43:36 +010097/* intel_guc_loader.c */
Arkadiusz Hilerb551f612017-03-14 15:28:13 +010098int intel_guc_select_fw(struct intel_guc *guc);
Arkadiusz Hiler882d1db2017-03-14 15:28:07 +010099int intel_guc_init_hw(struct intel_guc *guc);
Arkadiusz Hiler0417a2b2017-03-14 15:28:05 +0100100int intel_guc_suspend(struct drm_i915_private *dev_priv);
101int intel_guc_resume(struct drm_i915_private *dev_priv);
Anusha Srivatsadb0a0912017-01-13 17:17:04 -0800102u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
Alex Dai33a732f2015-08-12 15:43:36 +0100103
Michal Wajdeczkof9cda042017-01-13 17:41:57 +0000104struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
105
Chris Wilson4741da92016-12-24 19:31:46 +0000106static inline u32 guc_ggtt_offset(struct i915_vma *vma)
107{
108 u32 offset = i915_ggtt_offset(vma);
109 GEM_BUG_ON(offset < GUC_WOPCM_TOP);
Chris Wilsondb9309a2017-01-05 15:30:23 +0000110 GEM_BUG_ON(range_overflows_t(u64, offset, vma->size, GUC_GGTT_TOP));
Chris Wilson4741da92016-12-24 19:31:46 +0000111 return offset;
112}
113
Alex Dai33a732f2015-08-12 15:43:36 +0100114#endif